Time measuring device and distance measuring device

Abstract

Provided is a time measurement device comprising: a first counter unit (204) that, by counting on the basis of a reference clock signal, acquires a difference time between a first signal to be measured and a second signal to be measured as a first measurement result; a delay signal generation unit (208) that, on the basis of the first measurement result fed back from the first counter unit, delays the first signal to be measured and generates a delay signal; a measurement unit (210) that measures a difference time between the delay signal and the second signal to be measured as a second measurement result; and a computing unit (212) that computes using the first and second measurement results.

Description

Technical Field

[0001] The present disclosure relates to a time measurement device, a time measurement method, and a distance measurement device.

Background Art

[0002] As a method for measuring the distance to an object, a ToF (Time of Flight) sensor (distance measurement device) is known. For example, when the ToF sensor is an indirect type TOF method sensor, the object is irradiated with irradiation light having a predetermined period, and the distance to the object can be measured (distance measurement) by detecting the phase difference between the irradiation light and the reflected light reflected from the object. Although improvement in the distance measurement accuracy of such a distance measurement device has been demanded, there has been a limit to the improvement in the distance measurement accuracy of the distance measurement device.

[0003] Therefore, in order to improve the distance measurement accuracy, it is conceivable to measure the time error (for example, the time difference generated between control signals) generated in the distance measurement device by a time measurement device and correct the distance measurement device based on the measurement result. For example, as a time measurement device for measuring such a minute time, the device disclosed in Patent Document 1 below can be cited.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, in the time measurement device disclosed in Patent Document 1 above, since there is a limit to the resolution of the measurement time, even when the distance measurement device is corrected using the time measurement device, there is a limit to the improvement in the distance measurement accuracy of the distance measurement device.

[0006] Therefore, the present disclosure proposes a time measurement device, a time measurement method, and a distance measurement device using the same, which have higher time resolution.

Means for Solving the Problems

[0007] According to the present disclosure, a first counter unit that obtains a difference time between a first signal to be measured and a second signal to be measured as a first measurement result by counting based on a reference clock signal, and based on the first measurement result fed back from the first counter unit, a delay signal generation unit that delays the first signal to be measured to generate a delay signal, a measurement unit that measures a difference time between the delay signal and the second signal to be measured as a second measurement result, and an arithmetic unit that performs an operation using the first and second measurement results are provided.

[0008] Also, according to the present disclosure, a difference time between a first signal to be measured and a second signal to be measured is obtained as a first measurement result by counting based on a reference clock signal, a delay signal is generated by delaying the first signal to be measured based on the fed-back first measurement result, a difference time between the delay signal and the second signal to be measured is measured as a second measurement result, and a time measurement method including performing an operation using the first and second measurement results is provided.

[0009] Furthermore, according to the present disclosure, a ToF type distance measurement device including a time measurement device, wherein the time measurement device includes a first counter unit that obtains a difference time between a first signal to be measured and a second signal to be measured as a first measurement result by counting based on a reference clock signal, a delay signal generation unit that delays the first signal to be measured to generate a delay signal based on the first measurement result fed back from the first counter unit, a measurement unit that measures a difference time between the delay signal and the second signal to be measured as a second measurement result, and an arithmetic unit that performs an operation using the first and second measurement results is provided.

Brief Description of the Drawings

[0010]

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[0011] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the present specification and drawings, components having substantially the same functional configuration are denoted by the same reference numerals, and redundant description is omitted.

[0012] In addition, in this specification and the drawings, when distinguishing a plurality of components having substantially the same or similar functional configurations, different numbers may be appended after the same reference numeral. However, when it is not necessary to particularly distinguish each of the plurality of components having substantially the same or similar functional configurations, only the same reference numeral is appended. Also, for similar components in different embodiments, different alphabets may be appended after the same reference numeral for distinction. However, when it is not necessary to particularly distinguish each of the similar components, only the same reference numeral is appended.

[0013] In the following description, the term "substantially rectangular" is not limited to a geometrically perfect rectangle, but also includes a shape in which the corners of the rectangle are somewhat rounded (curved) to an extent acceptable in the operation of the time measuring device, or a shape similar thereto.

[0014] In addition, in the following description, when explaining the circuit configuration, unless otherwise specified, "connection" means electrically connecting between a plurality of elements. Further, the "connection" in the following description includes not only the case of directly and electrically connecting a plurality of elements, but also the case of indirectly and electrically connecting via other elements.

[0015] The description shall be made in the following order. 1. Overview of the distance measuring device 1 2. Principle of the distance calculation method using the distance measuring device 1 3. Background leading to the creation of the embodiments according to the present disclosure by the inventors 4. First embodiment 4.1 Overview 4.2 Delay signal generation unit 208 4.3 Time measurement method 5. Second embodiment 5.1 Configuration example of the TDC200 5.2 Configuration example of the TAC500 5.3 Operation example of the TAC500 5.4 Modification example 6. Third embodiment 7. Fourth embodiment 8. Summary 9. Supplementary Explanation

[0016] <<1. Overview of the Distance Measuring Device 1>> First, with reference to FIG. 1, a schematic configuration of the distance measuring device 1 according to an embodiment of the present disclosure will be described. FIG. 1 is a block diagram showing a configuration example of the distance measuring device 1 according to an embodiment of the present disclosure. The distance measuring device 1 according to an embodiment of the present disclosure is an indirect type ToF (Time of Flight) sensor. Specifically, by irradiating an object with irradiation light having a predetermined period and detecting the phase difference between the irradiation light and the reflected light from the object, the distance to the object can be measured. More specifically, as shown in FIG. 1, the distance measuring device 1 can mainly include an irradiation unit 20, a light receiving unit 30, a control unit 40, and a processing unit 60. Hereinafter, each functional block included in the distance measuring device 1 according to the present embodiment will be described.

[0017] (Irradiation Unit 20) The irradiation unit 20 has a laser light source (not shown). The wavelength of the irradiated light can be changed by appropriately selecting the light source. In the present embodiment, the irradiation unit 20 will be described as irradiating infrared light in the wavelength range of 780 nm to 1000 nm, for example. However, the present embodiment is not limited to irradiating such infrared light. Further, the irradiation unit 20 can irradiate the object 800 with irradiation light whose brightness periodically varies in synchronization with a signal (drive pulse) supplied from the control unit 40 described later.

[0018] (Light Receiving Unit 30) The light receiving unit 30 receives the reflected light reflected from the object 800. The light receiving unit 30 has a condenser lens (not shown) and a plurality of light receiving elements (pixels) (not shown) described later. The condenser lens has a function of collecting the received light on each light receiving element 10. Further, the light receiving element generates electric charges (for example, electrons) based on the intensity of the received light, converts the generated electric charges into a signal in synchronization with a signal (drive pulse) supplied from the control unit 40 described later, and transfers the signal to the processing unit 60.

[0019] (Control Unit 40) The control unit 40 supplies a periodic signal (drive pulse) to the irradiation unit 20 and the light receiving unit 30, and controls the irradiation timing of the irradiation light and the drive timing of the light receiving unit 30.

[0020] (Processing unit 60) The processing unit 60 acquires the signal from the light receiving unit 30, and based on the acquired signal, can acquire the distance to the object 800 by, for example, an indirect time-of-flight (iToF) method. The method for calculating the distance will be described later.

[0021] <<2. Principle of the distance calculation method using the distance measuring device 1>> Next, the principle of the distance calculation method (indirect type) using the distance measuring device 1 according to the embodiment of the present disclosure will be described with reference to FIG. 2. FIG. 2 is an explanatory diagram for explaining the principle of the distance calculation method using the distance measuring device 1 according to the embodiment of the present disclosure. Specifically, it schematically shows the temporal variation of the intensity of the irradiation light and the reflected light, and the drive signal of the light receiving unit 30 in the distance measuring device 1.

[0022] As shown in FIG. 2, the distance measuring device 1 irradiates the object 800 from the irradiation unit 20 with light whose intensity is modulated to vary periodically. The irradiated light is reflected by the object 800 and detected as reflected light by the light receiving unit 30 of the distance measuring device 1. As shown in FIG. 2, the detected reflected light (the second row from the top in FIG. 2) has a phase difference φ with respect to the irradiation light (the first row from the top in FIG. 2). The phase difference φ increases as the distance from the distance measuring device 1 to the object 800 increases, and decreases as the distance from the distance measuring device 1 to the object 800 decreases. That is, since the phase difference φ and the distance from the distance measuring device 1 to the object 800 have a predetermined relationship, in the present embodiment, the distance from the distance measuring device 1 to the object 800 can be obtained by detecting the phase difference φ.

[0023] Therefore, in the light receiving unit 30 according to the present embodiment, for example, two elements A and B (for example, a light receiving element or a memory element) provided for each pixel unit, a driving signal (specifically, a driving pulse) that causes differential operation (driven in different periods) is applied. For example, in the third row from the top in FIG. 2, the driving signal applied to element A is shown, and in the fourth row from the top in FIG. 2, the driving signal applied to element B is shown. It is assumed that these elements A and B operate during the period with a convex shape on the upper side. And as shown by the shape of the driving signals in FIG. 2, since the operating periods of these elements A and B do not overlap, it can be seen that these elements A and B are differentially operated with respect to each other.

[0024] Furthermore, as shown in FIG. 2, when the reflected light has a phase difference φ with respect to the irradiated light, each of the elements A and B receives the reflected light, generates charges, and accumulates them during the respective periods of the regions 802a and 802b shown in gray in FIG. 2. In other words, each of the elements A and B acquires a light reception signal corresponding to the areas of the regions 802a and 802b in FIG. 2. And as is clear from FIG. 2, the difference between the light reception signal amount (corresponding to the area of the region 802a) in element A and the light reception signal amount (corresponding to the area of the region 802b) in element B changes according to the phase difference φ. Therefore, in the present embodiment, the distance can be calculated by calculating the difference between the light reception signal amounts of the elements A and B and calculating the phase difference φ based on the calculated difference. Note that in the present embodiment, the distance may be calculated by calculating the phase difference φ using the ratio of the light reception signal amounts instead of the difference between the light reception signal amounts.

[0025] <<3. Background for the inventors to create the embodiments according to the present disclosure>> Next, before explaining the details of the embodiments according to the present disclosure, the background for the inventors to create the embodiments according to the present disclosure will be described with reference to FIGS. 2 and 3. FIG. 3 is an explanatory diagram for explaining the phase error θ, and each row in FIG. 3 corresponds to each row in FIG. 2.

[0026] In the distance measuring device 1, as described above, the control unit 40 supplies a periodic signal (driving pulse) to the irradiation unit 20 and the light receiving unit 30 (specifically, element A and element B), and controls the irradiation timing of the irradiation light and the driving timing of the light receiving unit 30. For example, as shown in FIG. 2, the control unit 40 supplies a driving signal that is synchronized with the signal applied to the irradiation unit 20 (the driving signal having the intensity of the irradiation light shown in the first row from the top in FIG. 2 and changing with time) to element A of the light receiving unit 30 so that element A of the light receiving unit 30 operates in synchronization with the irradiation unit 20. Further, the control unit 40 supplies a driving signal having a timing different from the driving signal applied to element A to element B so that element B of the light receiving unit 30 is differential from element A. In the present embodiment, the signal applied to element A of the light receiving unit 30 does not have to be synchronized with the driving signal applied to the irradiation unit 20, and is not particularly limited as long as it is a signal having a fixed, known predetermined phase difference with respect to the driving signal applied to the irradiation unit 20.

[0027] As described above, there is a demand for further improvement in the ranging accuracy of the ranging device 1. However, according to the study by the present inventors, there are errors as described below, which limit the improvement of the ranging accuracy. Specifically, due to voltage fluctuations in the control unit 40, the power supply (not shown), etc., and fluctuations in the device temperature, for example, as shown in FIG. 3, the drive signal applied to element A of the light receiving unit 30 may have an unintended phase difference θ (phase error θ) with respect to the drive signal applied to the irradiation unit 20. In other words, the drive signal applied to element A of the light receiving unit 30 has a phase error θ that varies due to voltage fluctuations and temperature fluctuations. As described above, in the ranging device 1, the distance is calculated by calculating the phase difference φ between the irradiation light and the reflected light corresponding to the difference or ratio of the light reception signal amounts of elements A and B. Therefore, since the phase error θ causes the relationship between the phase difference φ and the distance to vary due to voltage fluctuations and temperature fluctuations, it becomes impossible to correctly calculate the phase difference φ from the difference in the light reception signal amounts, etc., in the ranging device 1. As a result, in the ranging device 1, since the phase difference φ cannot be correctly calculated, a ranging error occurs. That is, since the drive signal applied to element A of the light receiving unit 30 has a phase error θ due to voltage fluctuations and temperature fluctuations, resulting in a ranging error, there is a limit to the improvement of the ranging accuracy of the ranging device 1.

[0028] In view of such a situation, the present inventors have come up with the idea of detecting the phase error θ and performing correction using the detected phase error θ to suppress the occurrence of a ranging error, that is, to improve the ranging accuracy. And for that purpose, a time measurement device (TDC (Time to Digital Converter)) that can accurately measure the phase error θ, in other words, with high resolution (for example, 10 ps or less), is required. More specifically, if correction can be performed based on the phase error θ measured by such a high-resolution TDC, it becomes possible to suppress the ranging error to, for example, several millimeters or less.

[0029] Therefore, the inventors of the present invention have intensively studied high-resolution TDCs. Here, referring to FIGS. 4 and 5, a TV conversion circuit (Time to Voltage Converter) 100, which is one of the components of the TDC, will be studied. FIG. 4 is a circuit block diagram showing a configuration example of the TV conversion circuit 100 including an ADC (Analog to Digital Converter) 106, and FIG. 5 is a timing chart showing an example of changes in the output signal of the TV conversion circuit 100 in FIG. 4.

[0030] The TDC measures the difference in the rising or falling time between an early arrival signal (start), which is a substantially rectangular wave (substantially rectangular pulse) or a signal that periodically repeats a substantially rectangular wave (toggle signal), and a late arrival signal (stop). As shown in FIGS. 4 and 5, the TV conversion circuit 100 includes a pulse generator 102 that converts the difference in the rising or falling time between the early arrival signal (start) and the late arrival signal (stop) into a measured pulse V p Furthermore, the TV conversion circuit 100 includes an integrator 104 that converts the pulse width T p of the measured pulse V vp into a voltage V eq , an ADC 106 that converts the converted voltage V eq into a digital code Y, and a delay unit 108. If the integrator 104 is ideally configured, since the integration slope S of the integrator 104 takes a constant value, a voltage V p corresponding to the pulse width T vp of the measured pulse V eq can be obtained. Therefore, by reading the voltage V eq with the ADC 106 and dividing it by the known integration slope S, the pulse width T vp can be calculated (see Equation (1)).

[0031]

Equation

[0032] In addition, the voltage V eq The readout accuracy of V is determined by the effective number of bits N of the ADC 106, as shown in the following formula (2). max -V min is the voltage V input to the ADC106 eq This means the range of fluctuation.

[0033]

number

[0034] Therefore, based on the formula (1) and the formula (2), the pulse width T vp That is, the measurement accuracy of the time to be measured can be expressed by the following formula (3).

[0035]

number

[0036] Therefore, the measurement accuracy of the time to be measured by the TDC depends on the voltage (V eq ) fluctuation range V max -V min The measurement accuracy of the time to be measured by the TDC can also be reduced by increasing the effective number of bits N.

[0037] Moreover, formula (3) can be transformed into the following formula (4).

[0038]

number

[0039] That is, as can be seen from the formula (4), the measurement accuracy of the time to be measured by the TDC is p Pulse width T vpIt can also be reduced by reducing it and increasing the number of effective bits N. In other words, the time resolution of the TDC is the measured pulse V output from the pulse generator 102 p with a pulse width T vp by reducing it and increasing the number of effective bits N. Note that the measured pulse V p with a pulse width T vp The maximum value of is the maximum value of the difference between the rising or falling times of the signal (start) arriving early and the signal (stop) arriving late, which is the measurement range of the TDC.

[0040] However, in order to improve the time resolution of the TDC, it is conceivable to increase the number of effective bits N of the ADC106. However, when manufacturing the TDC in a miniaturization process that requires a lower operating voltage, there is a limit to increasing the number of effective bits N of the ADC106. Also, in order to improve the time resolution of the TDC, it is conceivable to reduce the maximum value of the difference between the rising or falling times of the signal (start) arriving early and the signal (stop) arriving late. However, since this means narrowing the measurement range of the TDC, it cannot be said to be a preferable solution. That is, it can be said that it is difficult to improve the time resolution of the TDC without narrowing the measurement range of the TDC because these are in a trade-off relationship.

[0041] Therefore, as a means of improving the time resolution without narrowing the measurement range of the TDC, for example, the technique disclosed in Patent Document 1 above can be cited. In Patent Document 1 above, a technique is disclosed in which the entire measurement range of the TDC is roughly measured (counted) by a counter at the clock cycle, and a part of the measurement range is measured by a TV conversion circuit with a resolution below the clock cycle. In the following description, the technique disclosed in Patent Document 1 above is referred to as a comparative example.

[0042] A comparative example will be described below with reference to FIG. 6. FIG. 6 is an example of a timing chart of the comparative example. In the comparative example, when attempting to measure a signal to be measured (a signal with a time width T) (specifically, for example, the time difference between the rising times of the start signal and the stop signal shown in FIG. 6), first, the signal to be measured is converted into a digital timing signal based on a reference clock signal (note that the example in FIG. 6 assumes the case of using a generally used double flip flop synchronizer). As shown in FIG. 6, the digital timing signal is a signal obtained by knocking out the signal to be measured at the clock period intervals of the reference clock signal at the rising timing of the reference clock signal (that is, it is roughly measured at the clock period). Further, the difference (input pulse signal) between the signal to be measured and the digital clock signal is cut out, the cut-out difference is measured by a TV conversion circuit, and the time width T of the signal to be measured can be measured by subtracting the difference measured with respect to the digital timing signal.

[0043] In the comparative example, by doing so, since the measurement range of the TDC and the width of the pulse signal input to the TV conversion circuit can be separated, the width of the pulse signal input to the TV conversion circuit can be narrowed without narrowing the measurement range of the TDC. And in the comparative example, since the width of the pulse signal input to the TV conversion circuit can be narrowed, the time resolution is improved. Therefore, according to the comparative example, the time resolution of the TDC can be improved without narrowing the measurement range of the TDC.

[0044] However, according to the study by the present inventors, in the comparative example, the difference between the signal to be measured and the digital clock signal may be the integration of the clock period and the width below the clock period as shown in FIG. 6. Therefore, the width of the input pulse signal measurable by the TV conversion circuit must be set to be equal to or greater than the clock period. As a result, in the comparative example, since it is necessary to increase the maximum value of the width of the pulse signal input to the TV conversion circuit, there is a limit to the improvement of the time resolution of the TDC.

[0045] That is, in the TDC according to the comparative example, since there is a limit to improving the time resolution, even if the TDC is used to correct the distance measuring device 1, there is a limit to improving the distance measuring accuracy. Therefore, the inventors of the present invention have intensively studied to obtain a TDC with a higher time resolution. As a result, the inventors of the present invention have created a TDC according to an embodiment of the present disclosure that can improve the time resolution of the TDC without narrowing the measurement range of the TDC. Hereinafter, the details of such an embodiment of the present disclosure will be sequentially described.

[0046] <<4. First Embodiment>> <4.1 Overview> First, the overview of the first embodiment of the present disclosure will be described with reference to FIGS. 7 to 9. FIG. 7 is a flowchart for explaining the time measurement method of the TDC 200 according to the first embodiment of the present disclosure. FIG. 8 is an explanatory diagram for explaining a configuration example of the TDC 200 according to the first embodiment of the present disclosure, and FIG. 9 is an example of a timing chart of the TDC 200 according to the first embodiment of the present disclosure.

[0047] In the first embodiment of the present disclosure created by the inventors of the present invention, as shown in FIG. 7, similar to the comparative example, the entire measurement range of the TDC is roughly measured in Coarse mode by a counter with a clock period T CLK (see FIG. 9) (step S100), then the Fine mode for fine measurement is performed (step S101), and further, an operation is performed based on the measurement results in these two modes (step S103). In other words, in the present embodiment, time measurement is performed in three major steps, and these steps include two types of measurement modes.

[0048] Specifically, as shown in FIG. 8, the TDC 200 according to the first embodiment of the present disclosure mainly includes a pulse generator 202, a Coarse measurement unit (first counter unit) 204, a delay evaluation unit 206, a delay signal generation unit 208, a fine measurement unit (measurement unit) 210, and an arithmetic unit 212. Hereinafter, each component of the TDC 200 will be sequentially described.

[0049] (Pulse generator 202) The pulse generator 202 is composed of a logic circuit. In the above step S100, the measured signal V is two substantially rectangular waves (substantially rectangular pulses) or a signal (toggle signal) that periodically repeats the substantially rectangular wave. T1 , V T2 (The rising or falling time difference (differential time between the first measured signal and the second measured signal) of the first measured signal and the second measured signal (see FIG. 9)) is converted into the measured pulse V T2-T1 (see FIG. 9) and output to the Coarse measurement unit 204 described later. Note that the width of the measured pulse V T2-T1 is the measurement target of the TDC200. Therefore, the above-mentioned signal (start) that arrives earlier corresponds to the measured signal V T1 , and the signal (stop) that arrives later corresponds to the measured signal V T2 .

[0050] Also, in the above step S101, the pulse generator 202 converts the rising or falling time difference between the delay signal V T1D (see FIG. 9) output from the delay signal generation unit 208 described later and the above-mentioned measured signal V T2 (see FIG. 9) into a differential V FN that is a substantially rectangular wave (see FIG. 9) and outputs it to the fine measurement unit 210 described later. Note that although details will be described later, in this embodiment, in the Fine mode of fine measurement, instead of measuring the difference (input pulse signal) between the measured signal and the digital clock signal as in the comparative example, the difference V T1D between the delay signal V T2 and the above-mentioned measured signal V FN will be measured.

[0051] (Coarse measurement unit 204) The Coarse measurement unit 204 is composed of a counter circuit (logic circuit) and can count the number of clock signals of the reference clock signal CLK (see FIG. 9). Specifically, in step S100, the Coarse measurement unit 204 uses the measured pulse V T2-T1 to knock out in units of the clock period T CLK (see FIG. 9) of the reference clock signal CLK, generates a digital timing signal V CS (see FIG. 9), and counts (coarsely measures) the digital timing signal V CS at the clock period T CLK . Then, the Coarse measurement unit 204 outputs the count result (the first measurement result) thus obtained to a delay evaluation unit 206 and an arithmetic unit 212 described later.

[0052] (Delay evaluation unit 206) The delay evaluation unit 206 determines a delay amount (RG value) using the count result of the Coarse measurement unit 204 and feeds it back to a delay signal generation unit 208 described later. In the present embodiment, it is set such that the delay amount (RG value) increases in proportion to the width of the measured pulse V T2-T1 (see FIG. 9) (in other words, the delay amount (RG value) follows the width of the measured pulse V T2-T1 ).

[0053] (Delay signal generation unit 208) The delay signal generation unit 208 delays the above-described measured signal V T1 (see FIG. 9) based on the delay amount (RG value) fed back from the delay evaluation unit 206 to generate a delay signal V T1D (see FIG. 9). More specifically, the delay signal generation unit 208 delays the measured signal V T1 by the value obtained by multiplying the delay amount (RG value) by the reference clock period T CLK (see FIG. 9). Then, the delay signal generation unit 208 outputs the generated delay signal V T1DOutput it to the pulse generator 202 described above. Further, the delay signal generation unit 208 can also generate a calibration signal for calibrating the TDC 200. The details of the calibration will be described later.

[0054] And the delay signal generation unit 208 may be composed of, for example, a plurality of flip-flop circuits (not shown) arranged in a row and evenly on a semiconductor substrate (not shown). Alternatively, the delay signal generation unit 208 may be composed of, for example, a plurality of latch circuits (not shown) arranged in a row and evenly on a semiconductor substrate (not shown). Further, the plurality of flip-flop circuits or latch circuits may be electrically connected to wiring branched in a tournament shape from a reference clock signal source 420 (for example, composed of a PLL (Phase Locked Loop), etc.) (see FIG. 11), and the reference clock signal CLK is evenly transmitted to each of the flip-flop circuits or latch circuits by the wiring. The details of the circuit configuration of the delay signal generation unit 208 will be described later.

[0055] (fine measurement unit 210) The fine measurement unit 210 can be composed of, for example, a TV conversion circuit 100 including an ADC 106 as shown in FIG. 4, and implements a fine mode for fine measurement in step S101 above. Specifically, the fine measurement unit 210 measures the differential V FN output from the pulse generator 202 with high resolution and outputs the measurement result (the second measurement result) to an arithmetic unit 212 described later. Since the measurement method has already been described with reference to FIGS. 4 and 5, the description is omitted here. In the present embodiment, the fine measurement unit 210 does not measure the difference (input pulse signal) between the signal to be measured and the digital clock signal as in the comparative example, but measures the difference V T1D between the delay signal V T2 and the signal to be measured V FN described above.

[0056] And, as described above, the delay signal VT1D is the delay amount (RG value) proportional to the width of the measured pulse V T2-T1 and the reference clock period T CLK and is generated by delaying the measured signal V T1 by the amount of the value obtained by multiplying them. Then, the difference V FN to be measured by the fine measurement unit 210 is the difference between the thus generated V T1D and the measured signal V T2 , so it has a width of the reference clock period T CLK or less. Therefore, since the measurement range of the fine measurement unit 210 which is the TV conversion circuit 100 can be narrowed to a width of the reference clock period T CLK or less, the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC200 can be improved.

[0057] (Arithmetic unit 212) The arithmetic unit 212 is composed of a logic circuit, a memory, etc., and uses the count result (first measurement result) of the above-described Coarse measurement unit 204 and the measurement result (second measurement result) of the fine measurement unit 210 to calculate the rise time or fall time difference (difference time between the first measured signal and the second measured signal) of the two measured signals V T1 , V T2 (the first measured signal, the second measured signal) (see FIG. 9).

[0058] Note that in the present embodiment, the components included in the TDC200 are not limited to the components shown in FIG. 8, and other components may be included.

[0059] The details of the time measurement method implemented by the TDC200 according to the present embodiment will be described below with reference to FIGS. 8 and 10.

[0060] First, in the present embodiment, the pulse generator 202 generates two measured signals V T1 , V T2Convert the difference in rise time or fall time into the measured pulse V shown in the third row from the top in FIG. 9 T2-T1 and output it to the Coarse measurement unit 204. Next, the Coarse measurement unit 204 uses the measured pulse V T2-T1 as a clock cycle T of the reference clock signal CLK CLK to knock out at intervals, and generate a digital timing signal V shown in the fourth row from the top in FIG. 9 CS and count (coarsely measure) the digital timing signal V CS at the clock cycle T CLK (Step S100).

[0061] Furthermore, in this embodiment, the delay evaluation unit 206 determines the delay amount (RG value) using the count result of the Coarse measurement unit 204 and feeds it back to the delay signal generation unit 208. For example, the delay evaluation unit 206 determines the delay amount (RG value) based on the count result with reference to the following mathematical formula (5).

[0062]

Equation

[0063] In the mathematical formula (5), CNT is the count result in the Coarse measurement unit 204, that is, the count number obtained by counting the digital timing signal V CS at the clock cycle (T CLK ). Also, the constant N p can use any integer. For example, in the example shown in FIG. 9, it is set to 0. As can be seen from the mathematical formula (5), in this embodiment, the delay amount (RG value) is set to increase in proportion to the width of the measured pulse V T2-T1 .

[0064] Then, the delay signal generation unit 208 delays the measured signal V T1 based on the delay amount (RG value) fed back from the delay evaluation unit 206, and generates a delay signal V shown in the fifth row from the top in FIG. 9 T1DMore specifically, the delay signal generating unit 208 generates a delay signal based on the delay amount (RG value) and the reference clock period T CLK The measured signal V T1 The delayed signal V T1D to the above-mentioned pulse generator 202. Furthermore, the pulse generator 202 receives the delayed signal V T1D and the above-mentioned measured signal V T2 The difference between the rise time or fall time of FN and outputs it to the fine measurement unit 210 (note that in the example of FIG. 9, the difference in rise time is used).

[0065] Next, the fine measurement unit 210 measures the difference V FN with high resolution and outputs the measurement result to the calculation unit 212 (step S101). That is, in this embodiment, the fine measurement unit 210 does not measure the difference between the measured signal and the digital clock signal (input pulse signal) as in the comparative example, but measures the delay signal V T1D and the above-mentioned measured signal V T2 Difference V FN As explained above, the delayed signal V T1D is the measured pulse V T2-T1 The delay (RG value) is proportional to the width of the reference clock period T CLK The measured signal V T1 Then, the difference V FN is the V generated in this way. T1D and the measured signal V T2 Since it is the difference between the reference clock period T CLK Therefore, the measurement range of the fine measurement unit 210, which is the TV conversion circuit 100, is set to the reference clock period T CLKSince it can be narrowed down to the following width, the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved.

[0066] The calculation unit 212 uses the count result of the Coarse measurement unit 204 and the measurement result of the fine measurement unit 210 to calculate the difference in the rising time or falling time of the two signals to be measured V T1 、V T2 (step S103). In the example of FIG. 9, the difference in the rising time of the two signals to be measured V T1 、V T2 is calculated. More specifically, the calculation unit 212 calculates the calculation result V CS+FN shown in the seventh row from the top in FIG. 9 based on the following formula (6).

[0067]

Equation

[0068] In formula (6), T MEAS is the difference in the rising time or falling time of the two signals to be measured V T1 、V T2 , T CS is the time width of the digital timing signal V CS shown in the fourth row from the top in FIG. 9, and T FN is the time width of the difference V FN shown in the sixth row from the top in FIG. 9. That is, the calculation result V MEAS in FIG. 9, which is the measurement target T CS+FN , can be obtained by integrating the time width of the difference V CLK which is the multiplication result of the delay amount (RG) and the reference clock period T FN by the measurement result of the fine measurement unit 210. Note that the delay amount (RG) is determined based on the count result of the Coarse measurement unit 204 as described above.

[0069] Here, referring to FIG. 10, the measurement target of the TDC200 according to the present embodiment in the distance measuring device 1 will be specifically described. FIG. 10 is an explanatory diagram for explaining the terminals of the measurement target of the TDC200 according to the present embodiment.

[0070] As shown in FIG. 10, the distance measuring device 1 has, for example, a pixel drive pulse generator 300 that supplies a signal (drive pulse) for driving a plurality of light receiving elements (pixels) of the light receiving unit 30 described above. Further, the distance measuring device 1 has a laser drive pulse generator 310 that supplies a signal (drive pulse) for driving the laser light source of the irradiation unit 20 described above, and a pixel unit 320 (light receiving unit 30) composed of a plurality of light receiving elements. In the present embodiment, the measured signal V that is the measurement target of the TDC200 T1 is 、 obtained, for example, by measuring the voltage of the output terminal 302 of the pixel drive pulse generator 300. Also, in the present embodiment, a plurality of measured signals V that are the measurement targets of the TDC200 T2 are 、 obtained, for example, by measuring the voltages of the output terminal 312 of the laser drive pulse generator 310, the input terminal 322 of the pixel unit 320, and the like.

[0071] For example, in the present embodiment, by the TDC200, the rise time or fall time difference between each measured signal V T2 and the measured signal V T1 is measured respectively, and the above-described phase error θ (delay time) can be detected respectively. Further, in the present embodiment, by calculating the difference between the detected phase errors θ (delay times), the phase difference (delay time) of the signals between the terminals 312 and 322 can be detected. And in the present embodiment, by performing correction using the phase error θ and the phase difference (delay time) detected by these high-resolution TDC200s, the distance measurement accuracy of the distance measuring device 1 can be improved. Hereinafter, the detailed configuration of the TDC200 according to the present embodiment and the details of the time measurement method will be sequentially described.

[0072] <4.2 Delay Signal Generation Unit 208> As described above, the TDC200 according to the present embodiment has a delay signal generation unit 208. Therefore, with reference to FIGS. 11 to 16, the detailed configuration of the delay signal generation unit 208 will be described. FIGS. 11 to 16 are explanatory diagrams for explaining an example of the delay signal generation unit 208 according to the present embodiment.

[0073] First, with reference to FIG. 11, an overview of an example of the delay signal generation unit 208 according to the present embodiment will be described. The delay signal generation unit 208 can have, for example, selectors 400a and 400b that select signals to be output, as shown in FIG. 11, and a generator 410 that generates a delay signal V T1D . Specifically, the selector 400a selects the delay signal generated from the generator 410 described later and outputs it to the terminal a. Also, the selector 400b selects a signal to be measured by the TDC200 from a plurality of signals V T2 that can be the measurement target described above and outputs it to the terminal b. The terminals a and b are electrically connected to the pulse generator 202 described above, and the signals selected by the selectors 400a and 400b are output to the pulse generator 202.

[0074] And, as described above, the generator 410 may be composed of, for example, a plurality of flip-flop circuits (not shown) arranged in a row and evenly on a semiconductor substrate (not shown) in order to make the output load uniform. Alternatively, the generator 410 may similarly be composed of, for example, a plurality of latch circuits (not shown) arranged in a row and evenly on a semiconductor substrate (not shown). The detailed configuration of the generator 410 will be described later.

[0075] Furthermore, the generator 410 is electrically connected to a reference clock signal source 420. Specifically, the reference clock signal CLK is supplied to the plurality of flip-flop circuits or latch circuits included in the generator 410 by wiring branched in a tournament shape from the reference clock signal source 420 so that the reference clock signal CLK is supplied uniformly without variation in delay time.

[0076] For example, the generator 410 may be composed of a plurality of D-type flip-flop circuits connected in series as shown in Fig. 12. The D-type flip-flop circuit acquires a signal input to an input terminal D, and outputs the acquired signal to an output terminal Q in response to a rising edge of a reference clock signal CLK input to a clock input terminal. T1 is input, and the flip-flop circuit of each stage receives the delayed signal (T R1 ~T RN ) are input in sequence. Furthermore, the reference clock signal CLK is input to each flip-flop circuit. Also, each flip-flop circuit converts the input measured signal V T1 Or the delayed signal (T R1 ~T RN ) based on the rising edge of the reference clock signal CLK input to each of them, one clock period T CLK (ΔT in Fig. 12 R ) and a new delayed signal (T R1 ~T RN ) is generated. R0 ) and the generated delayed signal (T R1 ~T R(N-1) ) is input to the selector 400a. The selector 400a selects the signal (T R0 ) and the generated delayed signal (T R1 ~T R(N-1) ) and outputs it to the pulse generator 202. Therefore, in this embodiment, the measurement range of the TDC 200 is limited by the number of stages of flip-flop circuits included in the generator 410. Note that in this embodiment, the flip-flop circuit of the generator 410 may be configured to output a signal acquired in response to a falling edge of the reference clock signal CLK to an output terminal Q, and to output an inverted signal of the acquired signal to an inverted output terminal Q (Q is underlined).

[0077] Also, as shown in FIG. 13, the generator 410 may reduce the number of flip-flop circuits by combining logic circuits (AND, EOR) with a plurality of flip-flop circuits to form a counter circuit. By reducing the number of flip-flop circuits in this way, the area of the chip on which the circuit of the TDC 200 is formed can be reduced, and an increase in manufacturing cost can be suppressed. Note that in the delay signal generation unit 208 shown in FIG. 13, a decoder / selector 430 is used instead of the selectors 400a and 400b.

[0078] Also, for example, as shown in FIG. 14, the generator 410 may modify the configuration shown in FIG. 12 so as to invert the reference clock signal CLK and input it to some of the flip-flop circuits. By doing so, since delay signals can be generated in fine increments by using both the rising edge and the falling edge of the reference clock signal CLK, the time resolution of the fine measurement unit 210 can be further improved, or the input range of signals to the fine measurement unit 210 can be narrowed. Similarly, for example, as shown in FIG. 15, the generator 410 may modify the configuration shown in FIG. 13 so as to invert the reference clock signal CLK and input it to some of the flip-flop circuits.

[0079] Also, as shown in FIG. 16 for example, the generator 410 may replace a plurality of flip-flop circuits in the configuration shown in FIG. 12 with a plurality of D-type latch circuits that perform state holding. The D-type latch circuit outputs the signal input to the input terminal D to the output terminal Q when the reference clock signal CLK input to the clock input terminal is at the HIGH level, and maintains the previously input signal when the reference clock signal CLK is at the LOW level. By replacing the flip-flop circuit with the latch circuit in this way, the area of the chip on which the circuit of the TDC200 is formed can be reduced, and an increase in manufacturing cost can be suppressed. Furthermore, power consumption can be suppressed. In this configuration, if the HIGH section of the positive clock input to the latch circuit overlaps with the LOW section of the negative clock, the signal may slip through, so it is preferable to take countermeasures.

[0080] <4.3 Time measurement method> Next, with reference to FIG. 17, the details of the time measurement method of the TDC200 according to the present embodiment will be described. FIG. 17 is a flowchart for explaining the time measurement method of the TDC200 according to the present embodiment. Specifically, as shown in FIG. 17, the time measurement method according to the present embodiment includes a plurality of steps from step S201 to step S211. Hereinafter, the details of each step included in the time measurement method according to the present embodiment will be described.

[0081] First, in the present embodiment, the TDC200 is activated, and the signal supply (drive pulse) supplied from the control unit 40 to each functional unit such as the TDC200 is repeated a predetermined number of times until the voltage of the signal stabilizes at a predetermined value (step S201). Next, a calibration operation of the TDC200 is performed (step S202). The details of the calibration operation according to the present embodiment will be described later.

[0082] Next, perform the Cosrse mode measurement shown in FIG. 7. The Cosrse mode measurement includes steps S203 to S206 as shown in FIG. 17. First, set the measurement count N to 1 (step S203). Then, the TDC200 uses the measured pulse V T2-T1 as a clock cycle T of the reference clock signal CLK CLK to generate a digital timing signal V CS and count (coarsely measure) the digital timing signal V CS at the reference clock cycle T CLK (step S204).

[0083] Furthermore, the TDC200 determines whether the measurement count N is greater than a predetermined value set in advance (step S205). In the present embodiment, it is preferable to repeat the measurement until it becomes greater than the predetermined value, and for example, improve the accuracy by adopting the average value of the values obtained by the measurement. Therefore, it is preferable that the predetermined value is set large, but if it is set too large, the measurement time will become long, so it is preferably adjusted appropriately according to the required ranging accuracy and the like. When the measurement count N is greater than the predetermined value (step S205: Yes), the TDC200 proceeds to the process of step S207, and when the measurement count N is not greater than the predetermined value (step S205: No), the TDC200 proceeds to the process of step S206. Then, the TDC200 increments the measurement count N by 1 and returns to step S204 (step S206).

[0084] Next, perform the fine mode measurement shown in FIG. 7. The fine mode measurement includes steps S207 to S210 as shown in FIG. 17. First, set the measurement count N to 1 (step S207). First, the TDC200 delays the measured signal V T2-T1 by an amount proportional to the width of the measured pulse V CLK (RG value) based on the count result of the Cosrse mode measurement and the reference clock cycle T T1 by an amount corresponding to the numerical value obtained by multiplying them to obtain a delayed signal V T1DGenerate it. Next, the TDC200 delays the signal V T1D and the measured signal V T2 to convert the difference in rise time or fall time between them into the difference V FN . Further, the TDC200 measures the difference V FN with high resolution (step S208).

[0085] Furthermore, the TDC200 determines whether the number of measurements N is greater than a predetermined value set in advance (step S209). In this embodiment, it is preferable to repeat the measurement until it becomes greater than the predetermined value, and for example, improve the accuracy by adopting the average value of the values obtained by the measurement. When the number of measurements N is greater than the predetermined value (step S209: Yes), the TDC200 proceeds to the process of step S211. When the number of measurements N is not greater than the predetermined value (step S209: No), the TDC200 proceeds to the process of step S210. Then, the TDC200 increases the number of measurements N by 1 and returns to step S208 (step S210).

[0086] Next, the TDC200 uses the count result of the Coarse mode measurement and the measurement result of the fine measurement to calculate the difference in rise time or fall time (measurement target T T1 , V T2 ) between the two measured signals V MEAS (step S211). Specifically, the TDC200 integrates the time width of the difference V FN which is the measurement result in the fine measurement mode with respect to the multiplication of the delay amount (RG) based on the count result of the Cosrse mode measurement and the reference clock period T CLK , and ends the time measurement method according to this embodiment. In this embodiment, the predetermined values compared with the number of measurements N in each of the above steps may be the same or different from each other in each step. Also, in FIG. 17, the calibration operation (step S202) is performed after the stable operation (step S201), but in this embodiment, it is not limited to this, and it may be performed at any timing as long as it is after the stable operation (step S201).

[0087] As described above, in the present embodiment, the fine measurement unit 210 measures the difference V between the delay signal V generated by delaying the measurement signal V by an amount (RG value) proportional to the width of the measurement pulse V and the reference clock period T. T2-T1 by the value obtained by multiplying the reference clock period T. CLK The difference V between the measurement signal V and the above-described measurement signal V is measured. Since the difference V is the difference between the thus-generated V and the measurement signal V, it has a width equal to or less than the reference clock period T. Therefore, in the present embodiment, the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock period T, so that the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved. T1 delay signal V T1D and the above-described measurement signal V T2 is measured. The difference V FN is the difference between the thus-generated V FN and the measurement signal V T1D and thus has a width equal to or less than the reference clock period T. Therefore, in the present embodiment, the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock period T, so that the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved. T2 reference clock period T CLK and thus has a width equal to or less than the reference clock period T. Therefore, in the present embodiment, the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock period T, so that the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved. CLK and thus has a width equal to or less than the reference clock period T. Therefore, in the present embodiment, the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock period T, so that the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved.

[0088] <<5. Second Embodiment>> Next, by modifying the TDC 200 according to the first embodiment as described below, the high-resolution ADC 106 can be made unnecessary, and the counter 508 (see FIG. 18) can be shared between the coarse measurement unit 204 and the fine measurement unit 210, thereby making the circuit configuration of the TDC 200 compact and suppressing an increase in manufacturing cost. Hereinafter, such an embodiment will be described as the second embodiment of the present disclosure.

[0089] <5.1 Configuration Example of TDC200> First, referring to FIG. 18, a configuration example of the TDC200 according to the present embodiment will be described. FIG. 18 is an explanatory diagram for explaining the configuration example of the TDC200 according to the present embodiment. Specifically, the TDC200 according to the second embodiment of the present disclosure mainly includes a pulse generator 202, a Coarse measurement unit 204, a delay evaluation unit 206, a delay signal generation unit 208, a fine measurement unit 210, and an arithmetic unit 212, similar to the first embodiment. Further, the Coarse measurement unit 204 includes a selector 502, a synchronization circuit 504, an AND circuit 506, and a counter 508. The fine measurement unit 210 includes a TV conversion unit (TAC) 500, a selector 502 shared with the Coarse measurement unit 204, a synchronization circuit 504, an AND circuit 506, and a counter 508. Hereinafter, each component of the TDC200 will be sequentially described, but the description of the parts common to the first embodiment will be omitted here.

[0090] (TAC500) The TAC500 includes two TV conversion circuits 600a and 600b and a comparator 602 (see FIG. 19), and expands the difference V FN to implement the Fine measurement mode. Specifically, the delay signal V T1D from the pulse generator 202 and the signal to be measured V T2 are input to the TAC500, and the difference V T1D between the above-described delay signal V T2 and the above-described signal to be measured V FN (difference time) is expanded to generate an expanded difference FN (see FIG. 20). Details of the TAC500 will be described later.

[0091] (selector 502) The selector 502 selects either the signal from the pulse generator 202 (the pulse V to be measured T2-T1 ) or the signal from the TAC500 (the expanded difference FN) (see FIG. 20) according to whether to perform Coarse mode measurement or fine measurement mode, and outputs it to the synchronization circuit 504 described later.

[0092] (synchronization circuit 504) The synchronization circuit 504 uses the signal from the selector 502 (the measured pulse V T2-T1 , the amplified difference FN) to trigger at the clock period T CLK of the reference clock signal CLK, generates a digital timing signal V CS , and outputs it to the AND circuit 506 described later.

[0093] (AND circuit 506) The AND circuit 506 receives the reference clock signal CLK and the signal output from the synchronization circuit 504, and outputs a signal to the counter 508 when both inputs are HIGH.

[0094] (Counter 508) The counter 508 counts the signal output from the AND circuit at the clock period T CLK , and outputs the count result to the delay evaluation unit 206 and the calculation unit 212. In this embodiment, the counter 508 counts the signal from the pulse generator 202 (the measured pulse V T2-T1 ) in the Coarse mode measurement, and counts the signal from the TAC500 (the amplified difference FN) in the fine mode measurement. That is, in this embodiment, the counter 508 is shared between the Coarse measurement unit 204 and the fine measurement unit 210.

[0095] <5.2 Configuration example of TAC500> Next, with reference to FIG. 19, a configuration example of the TAC500 according to this embodiment will be described. FIG. 19 is an explanatory diagram for explaining the configuration example of the TAC500 according to this embodiment. Specifically, as shown in FIG. 19, the TAC500 includes two TV conversion circuits 600a, 600b and a comparator 602. Each component of the TAC500 will be sequentially described below.

[0096] (TV conversion circuits 600a, 600b) Each of the TV conversion circuits 600a and 600b includes an integrator composed of Gm amplifiers 604a and 604b and capacitors 606a and 606b, has different integration slopes (S1, S2) (see Fig. 20), and outputs voltages at different timings. Specifically, in the TV conversion circuit 600a, a delay signal V T1D is input from the pulse generator 202, and a voltage V IM corresponding to the change in the input signal is output. Also, in the TV conversion circuit 600b, a signal-under-measurement V T2 is input from the pulse generator 202, and a voltage V IP corresponding to the change in the input signal is output. Note that the Gm amplifiers 604a and 604b may be charge pumps (not shown) composed of a current source and a switch.

[0097] (Comparator 602) The comparator 602 compares the voltage V IM output from the above-described TV conversion circuits 600a and 600b with the voltage V IP , and when the voltage V IM is smaller than the voltage V IP , a signal (amplified difference) FN is output (see Fig. 20), and the difference V FN can be amplified. In this embodiment, it is preferable to design the input width (dynamic range) of the comparator 602 to be within a predetermined range.

[0098] Note that the comparator 602 may malfunction when noise or the like from a power supply (not shown) is input after initialization. Even if the malfunction is about several nanoseconds, an offset or variation occurs in the signal (amplified difference) FN, which causes a ranging error. Therefore, in order to prevent such a malfunction of the comparator 602, the startup (rise) of the comparator 602 after initialization is controlled by the input delay signal V T1DIt is preferable to control the comparator 602 using a reference clock signal CLK or the like so that the time point is delayed by a predetermined time from the rising time point. By doing so, the comparator 602 can secure sufficient time until it is started after initialization, so it shifts to a stable state and is started from such a stable state, making it less susceptible to the influence of noise or the like. As a result, in the present embodiment, malfunction of the comparator 602 can be prevented, so it is difficult for an offset or variation to occur in the signal (amplified difference) FN, and it is possible to avoid the occurrence of ranging errors.

[0099] <Operation Example of 5.3 TAC500> Next, with reference to FIG. 20, the operation of the TAC500 according to the present embodiment will be described. FIG. 20 is an example of a timing chart of the TAC500 according to the present embodiment. In FIG. 20, the difference in the rising time or falling time of the two measured signals V T1 , V T2 is defined as T FN .

[0100] First, the delay signals V shown in the first and second rows from the top of FIG. 20 and the measured signal V are input to each of the TV conversion circuits 600a and 600b of the TAC500. Then, the TV conversion circuit 600a outputs a voltage V having a slope of the integration slope S1 and a voltage difference (height) ΔV in response to the change of the input delay signal V T1D (third row from the top of FIG. 20). Further, the TV conversion circuit 600b outputs a voltage V having a slope of the integration slope S2 and a voltage difference (height) ΔV in response to the change of the input measured signal V T2 (fourth row from the top of FIG. 20). T1D (third row from the top of FIG. 20). Also, the TV conversion circuit 600b outputs a voltage V having a slope of the integration slope S2 and a voltage difference (height) ΔV in response to the change of the input measured signal V IM (third row from the top of FIG. 20). Also, the TV conversion circuit 600b outputs a voltage V having a slope of the integration slope S2 and a voltage difference (height) ΔV in response to the change of the input measured signal V T2 (fourth row from the top of FIG. 20). Ip (fourth row from the top of FIG. 20).

[0101] Further, the comparator 602 compares the voltage V output from the above-described TV conversion circuits 600a and 600b IM with the voltage V IPCompare them and output a signal (amplified difference) FN (the fifth row from the top in FIG. 20). Then, the time width T of the output FN FNINC is counted by the clock period T by the synchronization circuit 504 and the counter 508 of the Coarse measurement unit 204 described above CLK .

[0102] Based on the formula (1), the measurement target T FN can be expressed as shown in the following formula (7).

[0103]

Equation

[0104] Then, the time width T of the amplified difference FN FNINC can be expressed as shown in the following formula (8) based on the formula (1) and the formula (7).

[0105]

Equation

[0106] Furthermore, since the time width T of the amplified difference FN FNINC is counted by the clock period T CLK , it can be expressed by the following formula (9).

[0107]

Equation

[0108] Then, according to the formula (8) and the formula (9), since the measurement target T FN can be expressed by the following formula (10), the time width T of the amplified difference FN FNINC can be calculated thereby.

[0109]

Equation

[0110] Also, as can be seen from Equation (10), the measurement target T FN is measured with a resolution determined from the integration slopes S1, S2 and the clock period T CLK and, specifically, with the following high resolution based on the reference clock period T CLK It will be measured with high resolution. And since the resolution is determined by the ratio of the integration slopes S1, S2 according to Equation (10), it can be seen that the resolution is robust against voltage fluctuations and temperature fluctuations.

[0111] As described above, in the present embodiment, instead of the TV conversion circuit 100 and the ADC 106 of the fine measurement unit 210 of the TDC 200 according to the above-described first embodiment, two TV conversion circuits 600a, 600b and the comparator 602, and the Coarse measurement unit 204 are used, whereby the high-resolution ADC 106 can be made unnecessary. Further, in the present embodiment, the fine measurement unit 210 shares a counter circuit with the Coarse measurement unit 204. As a result, in the present embodiment, the circuit configuration of the TDC 200 can be made compact and an increase in manufacturing cost can be suppressed.

[0112] Furthermore, in the present embodiment, since the measurement resolution of the measurement target T FN is determined by the ratio of the integration slopes S1, S2, it can be seen that the resolution is robust against voltage fluctuations and temperature fluctuations. Also, in the present embodiment, the measurement in the fine measurement mode is not performed by directly measuring the measurement target T FN but by expanding and measuring it to the time width T FNINC of the amplified difference FN.

[0113] Note that, also in this embodiment, a generator 410 that can generate a delay signal with fine increments using both the rising edge and the falling edge of a reference clock signal (CLK) as shown in FIG. 14 may be used. In this case, for example, the configurations of the synchronous circuit 504, the AND circuit 506, and the counter 508 shown in FIG. 18 are divided into two configurations: a block that uses the rising edge of the reference clock signal CLK and a block that uses the falling edge of the reference clock signal CLK. Also, in order not to deteriorate the measurement accuracy, the increment of a counter (not shown) that counts based on the rising edge of the reference clock signal CLK and the increment of a counter (not shown) that counts based on the falling edge of the reference clock signal CLK are preferably made to match the Duty of the reference clock signal CLK. Further, the Duty of the reference clock signal CLK can be measured by measuring the rising edge and the falling edge of a calibration pulse signal (details will be described later) generated by the delay signal generation unit 208.

[0114] <5.4 Variation> Furthermore, this embodiment may be modified as shown in FIG. 21. FIG. 21 is an example of a timing chart of the TAC500 according to a variation of this embodiment.

[0115] Specifically, in this variation, each of the TV conversion circuits 600a and 600b has different integration slopes (S1, S2) (see FIG. 20), and as shown in FIG. 21, unlike the above-described second embodiment, they may be started simultaneously. By doing so, according to this variation, since the number of switches of the circuits constituting the TDC200 can be reduced, high-speed measurement can be realized.

[0116] Specifically, based on Equation (7), the time width T of the enlarged difference FN FNINC can be expressed as in the following Equation (11).

[0117]

Equation

[0118] Then, according to Equation (9), the measurement target T FN can be expressed by the following Equation (12). Therefore, the time width T of the extended difference FN FNINC can be calculated by this.

[0119]

Number

[0120] Also, in this modified example, as can be seen from Equation (12), although the resolution of the measurement target T FN is deteriorated compared to this embodiment, since it is measured with a resolution determined from the integration slopes S1, S2 and the clock period T CLK , it will be measured with a high resolution below the reference clock period T CLK . And in this modified example, since the measurement resolution of the measurement target T FN is determined by the ratio of the integration slopes S1, S2, it can be seen that the resolution is robust against voltage fluctuations and temperature fluctuations. In this modified example, it is preferable that the integration slope S1 is sufficiently larger than the integration slope S2, and by doing so, the resolution can be further improved.

[0121] <<6. Third Embodiment>> In the above-described first and second embodiments, in order to improve the measurement accuracy of the TDC200, it is preferable to perform calibration of the TDC200. Therefore, with reference to FIGS. 22 to 24, as a third embodiment of the present disclosure, calibration of the TDC200 will be described. FIG. 22 is a flowchart for explaining the calibration method according to this embodiment, and FIGS. 23 and 24 are explanatory diagrams for explaining the calibration method according to this embodiment.

[0122] Specifically, in this embodiment, the time widths of a plurality of known pulse signals (pulse signals for calibration) are measured, and based on the measurement results, calibration of the TDC200 is performed. As shown in FIG. 22, the calibration method according to this embodiment includes a plurality of steps from step S301 to step S318. Details of each step included in the calibration method according to this embodiment will be described below.

[0123] Here, it is assumed that a generator 410 capable of generating a delay signal with fine increments using both the rising edge and the falling edge of the reference clock signal CLK as shown in FIG. 14 is used. Note that this embodiment is not limited to using such a generator 410.

[0124] First, for example, in the calibration method described below, the time widths of at least two known pulse signals generated using the reference clock signal CLK are measured. For example, the T in FIG. 23 generated by the generator 410 R(N) signal is input to the fine measurement unit 210 as the signal to be measured V T2 and, when the T in FIG. 23 generated by the generator 410 R(N-1) signal is input to the fine measurement unit 210 as the signal to be measured V T1 a pulse signal having a time width of 0.5 cycle of the clock period T CLK can be measured. Further, for example, when the T in FIG. 23 R(N) signal is input to the fine measurement unit 210 as the signal to be measured V T2 and the T in FIG. 23 R(N-2) signal is input to the fine measurement unit 210 as the signal to be measured V T1 a pulse signal having a time width of 1 cycle of the clock period T CLK can be measured. Therefore, the calibration according to this embodiment is, for example, the clock period T CLKMeasure four pulse signals having a time width from 0.5 period to 2 periods. In the present embodiment, a pulse signal to be measured for calibration is generated using the output from the flip-flop circuit on the subsequent stage or the final stage of the generator 410 that is not used in the measurement. Therefore, according to the present embodiment, by electrically connecting the flip-flop circuit to the selector 400b, the load of each flip-flop circuit included in the generator 410 is equalized, so that the accuracy of the intervals (differences between delay signals) of the plurality of generated delay signals can be further improved.

[0125] And the TDC 200 measures a signal having a pulse width of 0.5 period of the clock period T CLK First, the TDC 200 sets the calibration count N to 1 (step S301). Then, the TDC 200 generates a pulse width of 0.5 period of the clock period T CLK of the reference clock signal CLK, and measures (counts) the time width of the generated pulse width (calibration 1) (step S302). Based on the result measured here (count output value CNT1), the coordinates (ΔT1, ΔT out1 ) plotted on the graph shown in FIG. 24 will be calculated.

[0126] Furthermore, the TDC200 determines whether the number of calibration times N is greater than a predetermined value set in advance (step S303). In the present embodiment, it is preferable to repeat the calibration until it becomes greater than the predetermined value, and for example, by adopting the average value of the values obtained by the calibration, the accuracy of the calibration can be improved. Therefore, it is preferable that the predetermined value is set large, but if it is set too large, the calibration time will become long, so it is preferably adjusted appropriately according to the required ranging accuracy and the like. When the number of calibration times N is greater than the predetermined value (step S303: Yes), the TDC200 proceeds to the process of step S305, and when the number of calibration times N is not greater than the predetermined value (step S303: No), the TDC200 proceeds to the process of step S304. Then, the TDC200 increments the number of calibration times N by 1 and returns to step S302 (step S304).

[0127] Next, the TDC200 measures a signal having a pulse width of 1.5 cycles of the clock period T CLK Steps S305 to S308 in FIG. 22 are the same as steps S301 to S304 described above except that the time width is measured (counted) for the pulse width of 1.5 cycles of the clock period T CLK , so the description is omitted here. Based on the result measured here (count output value CNT2), the coordinates (ΔT2, ΔT out2 ) plotted on the graph shown in FIG. 24 will be calculated.

[0128] Then, the TDC200 measures a signal having a pulse width of 1 cycle of the clock period T CLK Steps S309 to S312 in FIG. 22 are the clock period T CLKExcept for measuring (counting) the time width with respect to the pulse width for one period, it is the same as steps S301 to S304 described above, so the description is omitted here. Based on the result measured here (count output value CNT3), the coordinates (ΔT3, ΔT out3 ) plotted on the graph shown in FIG. 24 will be calculated.

[0129] Furthermore, the TDC200 performs measurement on a signal having a pulse width for two periods of the clock period T CLK Except for measuring (counting) the time width with respect to the pulse width for two periods of the clock period T, it is the same as steps S301 to S304 described above, so the description is omitted here. Based on the result measured here (count output value CNT4), the coordinates (ΔT4, ΔT CLK ) plotted on the graph shown in FIG. 24 will be calculated. out4 ) will be calculated.

[0130] Next, the TDC200 calculates the average value of the count output values CNT n obtained from the results of multiple measurements (step S317). Furthermore, the TDC200 calculates the slope TG (time gain) shown in FIG. 24 and the offset time T offset as an error (step S318). The slope TG (time gain) and the offset time T offset calculated in this way can be used when correcting (calibrating) the measurement results of the TDC200. Specifically, ΔT outn in FIG. 24 can be obtained from the average value of each count output value CNT n by the following formula (13).

[0131]

Equation

[0132] And the slope TG (time gain) is calculated by the following formula (14) for each count output value CNTn can be obtained from the average value.

[0133]

Number

[0134] Furthermore, the offset time T offset can be obtained from the average value of each count output value CNT n by the following mathematical formula (15).

[0135]

Number

[0136] Then, the calibration method according to this embodiment is terminated. In this embodiment, the measurement of the time width of the pulse signal does not need to be in the order described above (the mathematical formulas (13) to (15) described so far follow the order of the above-described measurement). Also, in this embodiment, it is not limited to measuring the time widths of four known pulse signals. For example, it may measure the time widths of three known pulse signals, and is not particularly limited as long as it measures the time widths of at least two known pulse signals.

[0137] In this way, in this embodiment, by measuring the time widths of a plurality of known pulse signals (pulse signals for calibration) and performing calibration of the TDC200 based on the measurement results, the measurement accuracy of the TDC200 can be improved.

[0138] <<7. Fourth Embodiment>> In the above description, the TDC200 has been described as being used in the distance measuring device 1, but the TDC200 is not limited to such use. For example, in a CMOS image sensor (not shown), a column signal processing unit (not shown) common to a plurality of pixels arranged in the column direction is provided. The column signal processing unit has an integrating ADC that performs signal processing such as A / D (Analog - Digital) conversion on the pixel signals output from the pixels and outputs an output signal (for example, the above Patent Document 2).

[0139] Specifically, the above integrating ADC can be configured as shown in FIG. 25, for example. FIG. 25 is an explanatory diagram for explaining a configuration example of the ADC700 according to the present embodiment. As shown in FIG. 25, the ADC700 includes a comparator 702, a ripple counter 704 as a counter, a TDC 706, and a transfer bus 708. The comparator 702 compares the voltage of a ramp waveform (RAMP) whose voltage value linearly changes with time with the input voltage VSL, and outputs a signal VCO having a level corresponding to the comparison result to the ripple counter 704 and the TDC 706. Further, the ripple counter 704 counts the time width of the signal based on the reference clock signal CLK. Further, the TDC 706 can be the TDC200 in the present embodiment, and measures the time width of the signal with a resolution finer than the clock period T of the reference clock signal CLK. Further, the ripple counter 704 and the TDC 706 output their respective measurement results to the transfer bus 708. CLK As described above, the TDC200 according to the present embodiment can be used in the column signal processing unit (not shown) of a CMOS image sensor (not shown). Note that the TDC200 is not limited to such use, and may be provided in other devices as long as it is a device that requires high - resolution time measurement.

[0140]

[0141] <<8. Summary>> ​As described above, in each embodiment of the present disclosure, the time resolution of the TDC200 can be improved. Specifically, in the present embodiment, the fine measurement unit 210 delays the measured signal V T2-T1 by an amount proportional to the width of the measured pulse V (RG value) multiplied by the reference clock period T CLK to obtain a numerical value, and measures the difference V T1 between the delayed signal V T1D generated by delaying the measured signal V T2 and the measured signal V FN described above. Since the difference V FN is the difference between the thus-generated V T1D and the measured signal V T2 , it has a width of less than or equal to the reference clock period T CLK . Therefore, in the present embodiment, since the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width less than or equal to the reference clock period T CLK , the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC200 can be improved.

[0142] <<9. Supplementary>> Each step in the time measurement method according to the above-described embodiment does not necessarily need to be processed in the described order. For example, each step may be processed with the order changed as appropriate. Also, each step may be processed partially in parallel or individually instead of being processed in time series. Furthermore, the processing of each step does not necessarily need to be processed according to the described method, and for example, it may be processed by another method using other functional blocks.

[0143] Furthermore, at least a part of the time measurement method according to the above embodiment can be configured as software as an information processing program that causes a computer to function. When configured as software, a program that realizes at least a part of these methods may be stored in a recording medium and read and executed by the distance measuring device 1 or the like, or another device connected to the distance measuring device 1. Further, a program that realizes at least a part of the time measurement method may be distributed via a communication line (including wireless communication) such as the Internet. Furthermore, the program may be distributed in an encrypted, modulated, or compressed state via a wired or wireless line such as the Internet or stored in a recording medium.

[0144] As described above, the preferred embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, but the technical scope of the present disclosure is not limited to such examples. It is obvious that those having ordinary knowledge in the technical field of the present disclosure can conceive of various modification examples or correction examples within the scope of the technical idea described in the claims, and these are also naturally understood to belong to the technical scope of the present disclosure.

[0145] Also, the effects described in this specification are merely illustrative or exemplary and not restrictive. That is, the technology according to the present disclosure can exhibit other effects obvious to those skilled in the art from the description of this specification, together with or instead of the above effects.

[0146] Note that the present technology can also have the following configuration. (1) A first counter unit that obtains a difference time between a first measured signal and a second measured signal as a first measurement result by counting based on a reference clock signal, A delay signal generation unit that generates a delay signal by delaying the first measured signal based on the first measurement result fed back from the first counter unit, A measurement unit that measures a difference time between the delay signal and the second measured signal as a second measurement result, An arithmetic unit that performs arithmetic operations using the first and second measurement results, A time measurement device comprising: (2) The first counter unit acquires, as the first measurement result, a difference time between a rising time or a falling time of the first measurement signal, which is a substantially rectangular wave, and a rising time or a falling time of the second measurement signal, which is a substantially rectangular wave. The time measurement device according to (1) above. (3) The measurement unit measures, as the second measurement result, a difference time between a rising time or a falling time of the delay signal, which is a substantially rectangular wave, and a rising time or a falling time of the second measurement signal. The time measurement device according to (2) above. (4) The delay signal generation unit generates the delay signal based on a delay amount proportional to the value of the first measurement result. The time measurement device according to any one of (1) to (3) above. (5) The delay signal generation unit Comprises a plurality of flip-flop circuits arranged in a row and equally spaced on a semiconductor substrate, The time measurement device according to any one of (1) to (4) above. (6) The delay signal generation unit Comprises a plurality of latch circuits arranged in a row and equally spaced on a semiconductor substrate, The time measurement device according to any one of (1) to (4) above. (7) Each of the plurality of flip-flop circuits is electrically connected to a wiring branched in a tournament shape from a reference clock signal source. The time measurement device according to (5) above. (8) The delay signal generation unit generates the delay signal using a rising edge or a falling edge of the reference clock signal, which is a substantially rectangular wave. The time measurement device according to (7) above. (9) The time measurement device according to (7) above, wherein the delay signal generation unit generates the delay signal by using the rising edge and the falling edge of the reference clock signal, which is substantially a rectangular wave. (10) The time measurement device according to (7) above, wherein the delay signal generation unit generates a calibration signal by using the reference clock signal. (11) The time measurement device according to any one of (1) to (10) above, wherein the measurement unit includes a time-voltage conversion circuit and an analog-digital conversion circuit. (12) The time measurement device according to any one of (1) to (10) above, wherein the measurement unit includes a first time-voltage conversion circuit and a second time-voltage conversion circuit having different slopes from each other, a comparator, and a second counter unit. (13) The comparator expands the differential time between the delay signal and the second signal to be measured based on the output signals from the first and second time-voltage conversion circuits to which the delay signal and the second signal to be measured are input. The second counter unit measures by counting the expanded differential time based on the reference clock signal. The time measurement device according to (12) above. (14) The time measurement device according to (12) or (13) above, wherein the measurement unit includes the first counter unit that functions as the second counter unit. (15) The time measurement device according to any one of (12) to (14) above, wherein the first time-voltage conversion circuit and the second time-voltage conversion circuit are activated at different timings. (16) The time measurement device according to any one of (12) to (14) above, wherein the first time-voltage conversion circuit and the second time-voltage conversion circuit are activated simultaneously. (17) By counting based on the reference clock signal, the differential time between the first signal to be measured and the second signal to be measured is obtained as a first measurement result. Based on the fed-back first measurement result, delay the first measured signal to generate a delayed signal, measure the difference time between the delayed signal and the second measured signal as a second measurement result, perform an operation using the first and second measurement results, including a time measurement method. (18) A distance measurement device using the ToF method including a time measurement device, wherein the time measurement device includes a first counter unit that obtains the difference time between the first measured signal and the second measured signal as a first measurement result by counting based on a reference clock signal, a delay signal generation unit that delays the first measured signal to generate a delayed signal based on the first measurement result fed back from the first counter unit, a measurement unit that measures the difference time between the delayed signal and the second measured signal as a second measurement result, an operation unit that performs an operation using the first and second measurement results, including a distance measurement device. (19) The distance measurement device according to (18) above, which is an indirect ToF type distance measurement device that measures distance based on a phase difference.

Explanation of symbols

[0147] 1 Distance measurement device 20 Irradiation unit 30 Light receiving unit 40 Control unit 60 Processing unit 100, 600a, 600b TV conversion circuit 102, 202 Pulse generator 104 Integrator 106, 700 ADC 108 Delay device 200, 706 TDC 204 Coarse measurement unit 206 Delay evaluation unit 208 Delay signal generation unit 210 fine measurement unit 212 Calculation unit 300 Pixel drive pulse generator 302, 312, 322 Terminals 310 Laser drive pulse generator 320 Pixel unit 400a, 400b, 502 Selectors 410 Generator 420 Reference clock signal source 430 Decoder / Selector 500 TAC 504 Synchronization circuit 506 AND circuit 508 Counter 602, 702 Comparators 604a, 604b Gm amplifiers 606a, 606b Capacitors 704 Ripple counter 708 Transfer bus 800 Object 802a, 802b Regions

Claims

1. A first counter unit that acquires, as a first measurement result, a count result of the number of clock signals of the reference clock signal obtained by counting the width of a pulse signal indicating the differential time between a first measured signal and a second measured signal based on the reference clock signal; A delay signal generation unit that generates a delay signal by delaying the first measured signal based on the multiplication of a delay amount obtained based on the value of the first measurement result fed back from the first counter unit and the period of the reference clock signal; A measurement unit that measures, as a second measurement result, the differential time between the delay signal and the second measured signal; An arithmetic unit that calculates, with high precision, the differential time between the first measured signal and the second measured signal using the first and second measurement results; Comprising: The delay signal generation unit: Consists of a plurality of flip-flop circuits arranged in a row and evenly on a semiconductor substrate; Each of the plurality of flip-flop circuits is electrically connected to a wiring branched in a tournament shape from a reference clock signal source; The delay signal generation unit generates a calibration signal using the reference clock signal; A time measurement device.

2. The time measurement device according to claim 1, wherein the first counter unit acquires, as the differential time between the first measured signal and the second measured signal, the differential time between the rising time or the falling time of the first measured signal, which is a substantially rectangular wave, and the rising time or the falling time of the second measured signal, which is a substantially rectangular wave.

3. The time measurement device according to claim 2, wherein the measurement unit measures, as the second measurement result, the differential time between the rising time or the falling time of the delay signal, which is a substantially rectangular wave, and the rising time or the falling time of the second measured signal.

4. The time measurement device according to any one of claims 1 to 3, wherein the delay signal generation unit generates the delay signal based on a delay amount proportional to the value of the first measurement result.

5. A first counter unit that acquires, as a first measurement result, a count result of the number of clock signals of the reference clock signal obtained by counting the width of a pulse signal indicating the differential time between a first measured signal and a second measured signal based on the reference clock signal; A delay signal generation unit that delays the first signal to be measured based on the multiplication of the delay amount obtained based on the value of the first measurement result fed back from the first counter unit and the period of the reference clock signal to generate a delay signal; A measurement unit that measures the difference time between the delay signal and the second signal to be measured as a second measurement result; An arithmetic unit that calculates the difference time between the first signal to be measured and the second signal to be measured with high precision using the first and second measurement results; Comprising; The delay signal generation unit Consists of a plurality of flip-flop circuits arranged in a row and evenly on a semiconductor substrate, Each of the plurality of flip-flop circuits is electrically connected to a wiring branched in a tournament shape from a reference clock signal source, The measurement unit includes a time-voltage conversion circuit and an analog-digital conversion circuit, Time measurement device.

6. A first counter unit that acquires, as a first measurement result, a count result of the number of clock signals of the reference clock signal obtained by counting the width of a pulse signal indicating the difference time between the first signal to be measured and the second signal to be measured based on the reference clock signal; A delay signal generation unit that delays the first signal to be measured based on the multiplication of the delay amount obtained based on the value of the first measurement result fed back from the first counter unit and the period of the reference clock signal to generate a delay signal; A measurement unit that measures the difference time between the delay signal and the second signal to be measured as a second measurement result; An arithmetic unit that calculates the difference time between the first signal to be measured and the second signal to be measured with high precision using the first and second measurement results; Comprising; The measurement unit includes a first time-voltage conversion circuit and a second time-voltage conversion circuit with different slopes from each other, a comparator, and a second counter unit, Time measurement device.

7. The comparator expands the difference time between the delay signal and the second signal to be measured based on the output signals from the first and second time-voltage conversion circuits to which the delay signal and the second signal to be measured are input, The second counter unit measures by counting the expanded difference time based on the reference clock signal, The time measurement device according to claim 6.

8. The time measurement device according to claim 6 or 7, wherein the measurement unit includes the first counter unit that functions as the second counter unit.

9. The time measuring device according to any one of claims 6 to 8, wherein the first time-voltage conversion circuit and the second time-voltage conversion circuit are activated at different timings.

10. The time measuring device according to any one of claims 6 to 8, wherein the first time-voltage conversion circuit and the second time-voltage conversion circuit are activated simultaneously.

11. A distance measuring device of the ToF method including a time measuring device, wherein the time measuring device acquires, as a first measurement result, a count result of the number of clock pulses of a reference clock signal obtained by counting the width of a pulse signal indicating a difference time between a first measurement signal corresponding to light radiated from the distance measuring device to a measurement object and a second measurement signal corresponding to light reflected by the measurement object, based on the reference clock signal, a first counter unit; a delay signal generation unit that generates a delay signal by delaying the first measurement signal based on a multiplication of a delay amount obtained based on the value of the first measurement result fed back from the first counter unit and the period of the reference clock signal; a measurement unit that measures, as a second measurement result, a difference time between the delay signal and the second measurement signal; an arithmetic unit that obtains a distance measurement result by calculating, with high precision, a difference time between the first measurement signal and the second measurement signal using the first and second measurement results; including wherein the delay signal generation unit is composed of a plurality of flip-flop circuits arranged in a row and evenly on a semiconductor substrate, each of the plurality of flip-flop circuits is electrically connected to a wiring branched in a tournament shape from a reference clock signal source, the delay signal generation unit generates a calibration signal using the reference clock signal, distance measuring device.

12. The distance measuring device according to claim 11, which is an indirect ToF method distance measuring device that measures distance based on a phase difference.

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