Wiring Substrate, Semiconductor Device, and Method of Manufacturing Wiring Substrate

Abstract

To provide a wiring board, a semiconductor device, and a method for manufacturing the wiring board that can suppress voids.SOLUTION: A wiring board has an insulating layer stacked on a substrate and a rectangular frame-shaped dam member formed on the insulating layer. The corner portion of the dam member has an inclined portion that slopes downward from the inner wall to the surface of the insulating layer at the bottom that contacts the surface of the insulating layer, and a vertical portion that is perpendicular to the surface of the insulating layer at the top that is away from the surface of the insulating layer.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a wiring board, a semiconductor device, and a method for manufacturing a wiring board.

Background Art

[0002] In a semiconductor device, for example, it is formed by mounting electronic components such as a Si interposer and a die on a mounting area of a wiring board. In an intermediate portion between the electronic component and the mounting area, for example, a sealing resin called underfill is poured to enhance connection reliability, and a connection terminal portion that electrically connects between the electronic component and the mounting area is protected. However, when pouring underfill into the intermediate portion, bleed-out may occur where the underfill flows out from the intermediate portion to an unnecessary portion. Therefore, in order to avoid bleed-out of the underfill, a dam member formed on the surface of a solder resist layer is known to surround the periphery of the mounting area with an insulating layer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in conventional dam members, for example, when the installation angle of the inner wall surface of each corner portion of the dam member is a right angle or an acute angle as viewed from the surface of the solder resist layer, the underfill flowing into the mounting area does not sufficiently reach the corner portions, and voids are generated in the underfill. Further, due to the influence of the shape of the dam member described above, voids tend to remain in the underfill. Furthermore, it is conceivable that cracks may occur in the vicinity of the solder resist layer or the dam member formed of a resin material due to the thermal expansion of the generated voids.

[0005] The disclosed technology has been made in view of such points, and an object thereof is to provide a wiring board, a semiconductor device, and a method for manufacturing a wiring board capable of suppressing voids.

Means for Solving the Problems

[0006] The wiring board disclosed in the present application, in one aspect, has an insulating layer laminated on a substrate and a rectangular frame-shaped dam member formed on the insulating layer. The corner portion of the dam member includes an inclined portion that slopes downward from the inner wall surface to the insulating layer surface at a lower portion in contact with the insulating layer surface, and a vertical portion perpendicular to the insulating layer surface at an upper portion away from the insulating layer surface.

Effects of the Invention

[0007] According to one aspect of the wiring board disclosed in the present application, for example, since the underfill flowing into the mounting area spreads to the corner portions along the inclined portions, the generation of voids can be suppressed.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

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Figure 8

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Figure 10

Figure 11

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Figure 13

Figure 14

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Figure 16

Figure 17

BEST MODE FOR CARRYING OUT THE INVENTION

[0009] Hereinafter, embodiments of a wiring board, a semiconductor device, and a method of manufacturing a wiring board disclosed in the present application will be described in detail with reference to the drawings. Note that the present invention is not limited by this embodiment.

EXAMPLE

[0010] FIG. 1 is an explanatory diagram showing an example of the semiconductor device 1A of this embodiment. The semiconductor device 1A shown in FIG. 1 includes a wiring substrate 1 and an electronic component 5. The wiring substrate 1 is, for example, a build-up substrate. The wiring substrate 1 includes a resin substrate 2, a wiring layer 3, a first solder resist (SR) layer 4, and a dam member 6. And hereinafter, as shown in FIG. 1, the resin substrate 2 is the lowermost layer and the first SR layer 4 is the uppermost layer for explanation, but the wiring substrate 1 may be used, for example, upside down and may be used in any posture. Note that the wiring layer 3 is held at a predetermined position on the resin substrate 2. The resin substrate 2 and the wiring layer 3 are covered by the first SR layer 4.

[0011] The first SR layer 4 is a layer that covers and protects the wiring layer 3 disposed on the surface of the resin substrate 2. Note that the first SR layer 4 is a kind of insulating layer. An opening 4A is provided in the first SR layer 4 in the mounting area 4B where the electronic component 5 is mounted, and the connection bump 8 in the opening 4A electrically connects the wiring layer 3 and the electronic component 5. The electronic component 5 includes a Si interposer 5A and a die 5B such as a semiconductor chip mounted on the Si interposer 5A.

[0012] FIG. 2 is an explanatory diagram showing an example of the dam member 6 in the wiring substrate 1, and FIG. 3 is a schematic plan view showing an example of the dam member 6. The dam member 6 surrounds the periphery of the rectangular mounting area 4B where the electronic component 5 of the first SR layer 4 is mounted, and is a rectangular frame-shaped dam member that dams up the underfill 7 filled in the mounting area 4B when the electronic component 5 is mounted. The dam member 6 includes an inner wall surface 6A that is a wall surface of the dam body on the mounting area 4B side, an outer wall surface 6B that is a wall surface of the dam body on the side opposite to the mounting area 4B, and an upper surface 6C of the dam body. Since the dam member 6 is in a rectangular frame shape, it has four straight portions 6E on the sides and four corner portions 6D at the corners.

[0013] FIG. 4 is a schematic cross-sectional view taken along line A-A showing an example of a corner portion 6D of the dam member 6. On the inner wall surface 6A of each corner portion 6D shown in FIG. 4, at an upper portion away from the surface of the first SR layer 4, there is a vertical portion 14 perpendicular to the surface of the first SR layer 4, and at a lower portion in contact with the surface of the first SR layer 4, there is a trailing shape inclined portion 11 that slopes downward from the inner wall surface 6A to the surface of the first SR layer 4 toward the mounting area 4B. Since the inclined portion 11 slopes downward from one end of the inner wall surface 6A toward the mounting area 4B, the underfill 7 that fills the corners of the corner portion 6D will spread evenly. The maximum height dimension B between the inclined portion 11 and the surface of the first SR layer 4 is set to be within 20% of the maximum height dimension A between the upper surface 6C and the surface of the first SR layer 4. The installation angle of the inclined portion 11 with respect to the surface of the first SR layer 4 is, for example, within 20 degrees. The height dimension of the vertical portion 14 is, for example, the difference between (height dimension A - height dimension B). The outer wall surface 6B of the corner portion 6D has an undercut-shaped recessed portion 12 formed at the lower portion of the outer wall surface 6B in contact with the surface of the first SR layer 4. Since the recessed portion 12 is recessed inside the outer wall surface 6B, when, for example, the wiring board 1 is sealed, the sealing resin filled will flow into the recessed portion 12, thereby obtaining a sufficient anchor effect.

[0014] FIG. 5 is a schematic cross-sectional view taken along line B-B showing an example of a straight portion 6E of the dam member 6. The inner wall surface 6A of the straight portion 6E shown in FIG. 5 has an undercut-shaped recessed portion 13 formed at the lower portion of the inner wall surface 6A in contact with the surface of the first SR layer 4. Since the recessed portion 13 is recessed inside the inner wall surface 6A, when the underfill 7 filled flows into the recessed portion 13, a sufficient anchor effect can be obtained.

[0015] Next, the manufacturing process of the semiconductor device 1A will be described. FIG. 6 is a flowchart showing an example of the procedure of the manufacturing process of the semiconductor device 1A. In FIG. 6, as the manufacturing process of the wiring board 1, a wiring layer forming process of forming a wiring layer 3 on a resin substrate 2 is executed (step S11). As the manufacturing process, after executing the wiring layer forming process, a first SR forming process of forming a first SR layer 4 on the resin substrate 2 and the wiring layer 3 is executed (step S12).

[0016] Furthermore, as a manufacturing process, after performing the first SR formation process, an opening formation process of forming an opening 4A in the mounting area 4B on the first SR layer 4 is executed (step S13). Note that the opening 4A is, for example, an opening for forming a via for connecting to the wiring layer 3. As a manufacturing process, after executing the opening formation process, a second SR layer formation process of forming a second SR layer 21 on the first SR layer 4 is executed (step S14).

[0017] Furthermore, as a manufacturing process, after executing the second SR layer formation process, a dam formation process of forming a dam member 6 with the second SR layer 21 around the mounting area 4B on the first SR layer 4 is executed (step S15). As a manufacturing process, after executing the dam formation process, a barrier layer formation process of forming a barrier layer 3A on the wiring layer 3 exposed from the opening 4A of the first SR layer 4 is executed (step S16).

[0018] As a manufacturing process, after executing the barrier layer formation process, a bump formation process of forming a connection bump 8 on the barrier layer 3A of the opening 4A of the first SR layer 4 is executed (step S17). Furthermore, as a manufacturing process, after executing the bump formation process, an electronic component 5 is mounted on the connection bump 8 in the mounting area 4B, and underfill 7 is poured into the mounting area 4B. Then, by pouring the underfill 7, a mounting process of mounting the electronic component 5 in the mounting area 4B of the first SR layer 4 is executed (step S18). Note that even if the underfill 7 is poured into the mounting area 4B, in the dam member 6, the underfill 7 spreads to the corner portion 6D due to the inclined portion 11 of the corner portion 6D, so bleed-out can be prevented while suppressing the generation of voids.

[0019] FIG. 7 is an explanatory diagram showing an example of the wiring layer formation process. In the wiring layer formation process of step S11, as shown in FIG. 7, for example, a wiring layer 3 is formed on the resin substrate 2. Specifically, a photosensitive resin layer is formed on the resin substrate 2 and exposed and developed. Thereby, a plating resist pattern is formed on the resin substrate 2. Further, by performing an electrolytic copper plating process on the resin substrate 2 after the plating resist pattern is formed, a copper plating layer is formed on the resin substrate 2 exposed from the plating resist pattern. Then, by removing the plating resist pattern from the resin substrate 2, for example, the wiring layer 3 is formed on the resin substrate 2.

[0020] FIG. 8 is an explanatory diagram showing an example of the first SR formation process. In the first SR formation process of step S12, as shown in FIG. 8, a first SR layer 4 is formed on the resin substrate 2 on which the wiring layer 3 is formed. Specifically, for example, an insulating photosensitive resin such as an acrylic resin or a polyimide resin is laminated and deposited on the resin substrate 2 to form the first SR layer 4 on the resin substrate 2. The thickness dimension of the first SR layer 4 is, for example, in the range of 10 μm to 30 μm. Note that, although an insulating photosensitive resin is exemplified for the first SR layer 4, it may be formed using an insulating non-photosensitive resin such as an epoxy resin.

[0021] FIG. 9 is an explanatory diagram showing an example of the opening formation process. In the opening formation process of step S13, as shown in FIG. 9, an opening 4A is formed in the first SR layer 4. Specifically, for example, after the acrylic resin or polyimide resin is cured, the opening 4A is formed at a predetermined position on the first SR layer 4 by laser processing or photolithography. The opening 4A formed on the first SR layer 4 exposes a part of the underlying wiring layer 3. Note that the aperture dimension of the opening 4A is, for example, in the range of 10 μm to 100 μm.

[0022] FIG. 10 is an explanatory diagram showing an example of the second SR formation process of the wiring board 1. In the second SR formation process of step S14, as shown in FIG. 10, a second SR layer 21 is formed on the first SR layer 4 in which the opening 4A is formed. Specifically, for example, an insulating photosensitive resin such as an acrylic resin or a polyimide resin is laminated and deposited on the first SR layer 4, whereby the second SR layer 21 is formed on the first SR layer 4. The thickness dimension of the second SR layer 21 is, for example, within the range of 10 μm to 30 μm. Incidentally, the second SR layer 21 may be formed using an insulating non-photosensitive resin such as an epoxy resin.

[0023] FIG. 11 is an explanatory diagram showing an example of the dam formation process. In the dam formation process of step S15, as shown in FIG. 11, using the second SR layer 21, a dam member 6 is formed on the first SR layer 4 so as to surround the mounting area 4B in the first SR layer 4. Specifically, for example, through a process of exposure, development, and curing of an acrylic resin or the like, the dam member 6 is formed on the first SR layer 4 using the second SR layer 21. The first exposure amount of the inner wall surface 6A of the corner portion 6D of the dam member 6 is adjusted to be larger than the second exposure amount of the straight portion 6E, and by exposing with the first exposure amount, an inclined portion 11 is formed on the inner wall surface 6A of the corner portion 6D. Further, the second exposure amount of the outer wall surface 6B of the corner portion 6D is adjusted to be lower than the first exposure amount, and by exposing with the second exposure amount, a recessed portion 12 is formed at the lower part of the outer wall surface 6B. As a result, on the inner wall surface 6A of the dam member 6, a downward inclined portion 11 with an inclination angle of 20 degrees or less with respect to the surface of the first SR layer 4 is formed. Incidentally, the width dimension of the upper surface 6C of the dam member 6 is, for example, 100 μm to 1000 μm, the length dimension of the inclined portion 11 is, for example, within 30 μm, and the depth dimension (undercut length) of the recessed portion 12 is, for example, within 30 μm. Also, the distance dimension from the end of the mounting area 4B to the inclined portion 11 is, for example, within the range of 50 μm to 5 mm.

[0024] FIG. 12 is an explanatory diagram showing an example of a barrier layer formation process. In the barrier layer formation process of step S16, as shown in FIG. 12, a barrier layer 3A is formed on the wiring layer 3 exposed at each opening 4A within the mounting area 4B. Specifically, the barrier layer 3A is formed by forming an organic film for oxidation prevention or electroless NiPdAu plating or the like.

[0025] FIG. 13 is an explanatory diagram showing an example of a bump formation process. In the bump formation process of step S17, after performing the barrier layer formation process, as shown in FIG. 13, connection bumps 8 are formed in the openings 4A within the first SR layer 4. Note that the connection bumps 8 are formed, for example, by the same manufacturing method as the wiring layer 3.

[0026] FIG. 14 is an explanatory diagram showing an example of a mounting process. A semiconductor device 1A is configured by mounting an electronic component 5 on the wiring board 1 shown in FIG. 14. The electrodes on the lower surface of the electronic component 5 are to be joined to the connection bumps 8 with solder or the like. Further, the joint between the electrodes of the electronic component 5 within the mounting area 4B and the connection bumps 8 on the wiring board 1 is sealed with an underfill 7, and the electronic component 5 is mounted on the wiring board 1. The dam member 6 is to block the underfill 7 even when the underfill 7 is poured into the mounting area 4B. By pouring the underfill 7 into the intermediate portion between the mounting area 4B and the Si interposer 5A, the connection bumps 8 can be protected. At this time, since there is an inclined portion 11 at the corner portion 6D of the dam member 6, the underfill 7 can sufficiently spread to every corner of the corner portion 4D, suppressing the generation of voids. Note that the underfill material used here is a general liquid curable resin (epoxy resin as the main component).

[0027] FIG. 15 is an explanatory diagram showing an example of the semiconductor device 1A. The external connection terminal 31 and the insulating layer 32 are provided on the pad P on the lower surface side of the resin substrate 2 at the lower part of the semiconductor device 1A shown in FIG. 14. The insulating layer 32 is formed by laminating on the lower surface side of the resin substrate 2 at the same timing as forming the first SR layer 4, and an opening is provided in the insulating layer 32 so that the pad P on the lower surface side of the resin substrate 2 is exposed. By forming the external connection terminal 31 using a solder ball or the like, the semiconductor device 1A shown in FIG. 15 is formed.

[0028] FIG. 16 is an explanatory diagram showing an example of the semiconductor device 100 of the comparative example. Incidentally, the difference between the wiring substrate of the semiconductor device 100 of the comparative example and the wiring substrate 1 of the semiconductor device 1A of the embodiment is, for example, that the installation angle of the inner wall surface 111A of the corner portion of the dam member 111 with respect to the surface of the first SR layer 4 is a right angle. In the wiring substrate of the semiconductor device 100 of the comparative example shown in FIG. 16, since the installation angle of the inner wall surface 111A with respect to the surface of the first SR layer 4 is a right angle, it is conceivable that voids are generated without the underfill 7 spreading to the corner portion of the inner wall surface 111A. On the other hand, in the wiring substrate 1 of the present embodiment, the inclined portion 11 that slopes downward from the inner wall surface 6A of the corner portion 6D of the dam member 6 surrounding the periphery of the mounting area 4B to the surface of the first SR layer 4 is provided. As a result, since the underfill 7 spreads sufficiently to the corner portion 6D of the inner wall surface 6A, void generation can be prevented.

[0029] FIG. 17 is an explanatory diagram showing an example of a semiconductor device 100A of a comparative example. Note that the difference between the wiring board of the semiconductor device 100A of the comparative example and the wiring board 1 of the semiconductor device 1A of the embodiment is, for example, that the installation angle of the inner wall surface 121A of the corner portion of the dam member 121 with respect to the surface of the first SR layer 4 is an acute angle. Since the installation angle of the inner wall surface 121A of the wiring board of the semiconductor device 100A of the comparative example shown in FIG. 17 with respect to the surface of the first SR layer 4 is an acute angle, voids may be generated at the corner portion of the inner wall surface 121A without the underfill 7 reaching there. On the other hand, in the wiring board 1 of the present embodiment, there is an inclined portion 11 that slopes downward from the inner wall surface 6A of the corner portion 6D of the dam member 6 surrounding the periphery of the mounting area 4B to the surface of the first SR layer 4. As a result, since the underfill 7 sufficiently reaches the corner portion 6D of the inner wall surface 6A, void generation can be prevented.

[0030] Further, even when the dam member surrounding the periphery of the mounting area has a tapered shape in which the installation angle of the inner wall surface exceeds 90 degrees as viewed from the mounting area, voids may be generated at the corner portion of the inner wall surface of the dam member without the underfill reaching there. On the other hand, in the wiring board 1 of the present embodiment, there is an inclined portion 11 that slopes downward from the inner wall surface 6A of the corner portion 6D of the dam member 6 surrounding the periphery of the mounting area 4B to the surface of the first SR layer 4. As a result, since the underfill 7 sufficiently reaches the corner portion 6D of the inner wall surface 6A, void generation can be prevented.

[0031] In the wiring board 1 of the present embodiment, the inner wall surface 6A of each corner portion 6D of the dam member 6 has an inclined portion 11 that slopes downward from the inner wall surface 6A toward the mounting area 4B to the surface of the first SR layer 4. By forming the inclined portion 11 on the inner wall surface 6A of the corner portion 6D, the underfill 7 poured into the mounting area 4B spreads along the inclined portion 11 to each corner portion 6D. As a result, the generation of voids can be suppressed.

[0032] The inner wall surface 6A of the straight portion 6E of the dam member 6 has a recessed portion 13 formed at the lower part of the inner wall surface 6A that contacts the surface of the first SR layer 4. As a result, since the underfill 7 to be filled flows into the recessed portion 13, a sufficient anchor effect can be obtained. Moreover, since the generated bubbles flow to the corner portion 6D, the concern of voids staying is reduced.

[0033] The outer wall surface 6B of each corner portion 6D of the dam member 6 has a recessed portion 12 formed at the lower part of the outer wall surface 6B that contacts the surface of the first SR layer 4. As a result, for example, since the sealing resin filled when sealing the wiring board 1 flows into the recessed portion 12, a sufficient anchor effect can be obtained.

[0034] The maximum height dimension B between the inclined portion 11 and the surface of the first SR layer 4 is within 20% of the maximum height dimension A between the upper surface 6C of the dam member 6 and the surface of the first SR layer 4. As a result, an inclined portion 11 with a downward slope from the inner wall surface 6A to the surface of the first SR layer 4 can be formed so that the underfill 7 spreads evenly within the corner portion 6D.

[0035] The dam member 6 is formed of the same material as the first SR layer 4. As a result, in order to improve the bonding strength between the dam member 6 and the first SR layer 4, crack generation between the first SR layer 4 and the dam member 6 can be suppressed.

[0036] Since the lower part of the inner wall surface 6A of the dam member 6 is a curved inclined portion 11, air can escape more easily compared to the case where the inner wall surface 6A is straight or reverse-tapered. That is, by reducing the installation angle of the inner wall surface 6A of the dam member 6 with respect to the surface of the first SR layer 4 as in the present application, air can escape more easily and the effect of suppressing voids is enhanced.

[0037] In the dam forming process for forming the dam member 6, the inner wall surface 6A and the outer wall surface 6B are formed using the second SR layer 21. Further, in the dam forming process, using the second SR layer 21, an inclined portion 11 that slopes downward from the inner wall surface 6A of each corner portion 6D of the dam member 6 to the surface of the first SR layer 4 is formed on the inner wall surface 6A of each corner portion 6D toward the mounting area 4B. As a result, the bonding strength between the dam member 6 and the surface of the first SR layer 4 can be improved using the second SR layer 21 made of the same material as the first SR layer 4.

[0038] In the dam forming process, the inclined portion 11 is formed with a first exposure amount with respect to the inner wall surface 6A of the corner portion 6D, and a recessed portion 12 is formed at the lower part of the outer wall surface 6B in contact with the first SR layer 4 with a second exposure amount smaller than the first exposure amount with respect to the outer wall surface 6B. By changing the exposure amount, the inclined portion 11 and the recessed portion 12 can be formed.

[0039] Although it is necessary to provide a margin between the opening 4A of the mounting area 4B for mounting the electronic component 5 and the dam member 6, when both the inner wall surface and the outer wall surface of the dam member are tapered, the margin between the opening 4A and the dam member becomes narrow and the design is restricted. On the other hand, in the dam member 6 of this embodiment, since the inclined portion 11 is provided only at the corner portion 6D, a margin between the opening 4A and the dam member 6 can be secured, and there are few design restrictions.

[0040] Incidentally, for the sake of convenience of explanation, the case where the dam member 6 is formed of an SR material is exemplified. However, for example, there are also coverlay materials (adhesive film materials) and liquid insulating materials (high-viscosity materials). In the case of a coverlay material, the material opened by punching may be aligned and pasted on the substrate. In the case of a liquid insulating material, for example, it may be applied and formed into a dam shape with a width / height of several hundred mm to several mm. Incidentally, when formed of an SR material, the alignment position accuracy of the inclined portion 11 is good, and the dimensional accuracy of the dam member 6 is high.

[0041] Also, although the structure in which the inclined portion 11 is provided on the inner wall surface 6A of each corner portion 6D as the dam member 6 has been exemplified, it is not necessarily required to provide the inclined portion 11 on the inner wall surface 6A of all the corner portions 6D. For example, depending on the injection direction and flow of the underfill 7, it is also possible to suppress voids in the underfill 7 by having the inclined portion 11 on the inner wall surface 6A of at least one corner portion 6D.

[0042] As the electronic component 5, the case having the Si interposer 5A and the die 5B has been exemplified, but the die 5B may be mounted on the mounting area 4B and can be changed as appropriate.

Explanation of reference numerals

[0043] 1 Wiring board 1A Semiconductor device 2 Resin substrate 3 Wiring layer 4 First SR layer 4B Mounting area 5 Electronic component 6 Dam member 6A Inner wall surface 6B Outer wall surface 6D Corner portion 6E Straight portion 8 Connection bump 11 Inclined portion 12 Depression portion 13 Depression portion 14 Vertical portion

Claims

1. A substrate having a wiring layer, an insulating layer covering the wiring layer and laminated on the substrate, connection bumps penetrating the insulating layer and formed on the wiring layer, a rectangular frame-shaped dam member formed on the insulating layer and arranged to surround the connection bumps, and having, the corner portion of the dam member, at the lower part in contact with the surface of the insulating layer, an inclined portion that slopes downward from the inner wall surface to the surface of the insulating layer, at the upper part away from the surface of the insulating layer, a vertical portion perpendicular to the surface of the insulating layer, and a recessed portion formed on the outer wall surface of the corner portion, where the lower part of the outer wall surface in contact with the surface of the insulating layer is recessed, A wiring substrate characterized by comprising the above.

2. The wiring substrate according to claim 1, further comprising a recessed portion formed on the inner wall surface of the straight portion of the dam member, where the lower part of the inner wall surface in contact with the surface of the insulating layer is recessed.

3. The maximum height dimension between the inclined portion and the insulating layer, is within 20% of the maximum height dimension between the upper surface of the dam member and the insulating layer. The wiring substrate according to claim 1 or 2 is characterized by this.

4. The dam member, is formed of the same material as the insulating layer. The wiring substrate according to any one of claims 1 to 3 is characterized by this.

5. The inclined portion, is inclined in a curved shape toward the surface of the insulating layer. The wiring substrate according to claim 1 is characterized by this.

6. The recessed portion, is an undercut-shaped recess that curves and recesses inside the outer wall surface of the corner portion. The wiring substrate according to claim 1 is characterized by this.

7. The inclined portion, is in a state of protruding from the inner wall surface and slopes downward from the inner wall surface to the surface of the insulating layer. The wiring substrate according to claim 1 is characterized by this.

8. A substrate having a wiring layer, an insulating layer covering the wiring layer and laminated on the substrate, connection bumps penetrating the insulating layer and formed on the wiring layer, an electronic component mounted so as to be electrically connected to the connection bumps, a rectangular frame-shaped dam member arranged around the mounting area where the electronic component is mounted, and an underfill filled in the mounting area, and having, the corner portion of the dam member, at the lower part in contact with the surface of the insulating layer, an inclined portion that slopes downward from the inner wall surface to the surface of the insulating layer, at the upper part away from the surface of the insulating layer, a vertical portion perpendicular to the surface of the insulating layer, A recessed portion formed on an outer wall surface of the corner portion, the lower portion of the outer wall surface that contacts the surface of the insulating layer being recessed; A semiconductor device characterized by comprising the same. **Claim 9** A step of forming a first solder resist layer on a substrate; A step of forming a second solder resist layer on the first solder resist layer; A step of forming a rectangular frame-shaped dam member by exposing and developing the second solder resist layer, the method having: The step of forming the dam member includes: Exposing an inner wall surface of a corner portion of the dam member with a first exposure amount; Exposing an outer wall surface of the corner portion of the dam member with a second exposure amount smaller than the first exposure amount, forming an inclined portion that slopes downward from the inner wall surface of the corner portion of the dam member to the surface of the first solder resist layer, and forming a recessed portion in the outer wall surface where the lower portion of the outer wall surface that contacts the surface of the first solder resist layer is recessed; A method for manufacturing a wiring substrate, characterized by the above.

Images