Directive selective deposition

Abstract

An exemplary processing method can include forming a plasma of a silicon-containing precursor. The method can include depositing a flowable film on a semiconductor substrate using plasma effluents of the silicon-containing precursor. The processing region can be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate rests. A bias power can be applied to the substrate support from a bias power supply. The method can include forming a plasma of a hydrogen-containing precursor in the processing region of the semiconductor processing chamber. The method can include etching the flowable film from a sidewall of a feature in the semiconductor substrate using plasma effluents of the hydrogen-containing precursor. The method can include densifying the remaining flowable film in the feature defined in the semiconductor substrate using plasma effluents of the hydrogen-containing precursor.

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the benefit of U.S. Patent Application No. 17 / 469,529, filed on September 8, 2021, the entire disclosure of which is incorporated herein by reference for all purposes.

[0002] This technology relates to semiconductor processing. More particularly, this technology relates to methods for depositing, etching, and transforming materials that include a flowable film.

Background Art

[0003] Integrated circuits are enabled by a process that creates a complexly patterned layer of material on a substrate surface. To create a patterned material on a substrate, a method for controlling the formation and removal of the exposed material is needed. As device sizes continue to shrink, the material formation can affect subsequent operations. For example, in a gap - filling operation, material may be formed or deposited to fill trenches or other features formed on a semiconductor substrate. These filling operations can be difficult because the features may be characterized by a higher aspect ratio and a reduction in critical dimensions. For example, since deposition may occur along the top and sidewalls of the feature, continued deposition may cause the feature to pinch off, including between the sidewalls within the feature, and voids may be created within the feature. This can affect device performance and subsequent processing operations.

[0004] Accordingly, there is a need for improved systems and methods that can be used to manufacture high - quality devices and structures. These and other needs are addressed by this technology.

Summary of the Invention

[0005] An exemplary processing method can include forming a plasma of a silicon-containing precursor. The plasma of the silicon-containing precursor may be formed at a first power level from a plasma power source. The method can include depositing a flowable film on a semiconductor substrate using the plasma emissions of the silicon-containing precursor. The semiconductor substrate may be housed within a processing region of a semiconductor processing chamber. The semiconductor substrate may define features within the semiconductor substrate. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is placed. Bias power may be applied from a bias power source to the substrate support. The method can include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The plasma of the hydrogen-containing precursor may be formed at a second power level from the plasma power source. The bias power may be applied from the bias power source to the substrate support at a third power level higher than the second power level. The method can include etching and / or modifying the flowable film from sidewalls of features within the semiconductor substrate and / or densifying remaining flowable film within features defined within the semiconductor substrate using the plasma emissions of the hydrogen-containing precursor.

[0006] In some embodiments, the features in the substrate may be characterized by an aspect ratio of about 5:1 or greater. The features may be characterized by a width across the feature of about 10 nm or less. The bias power supply can be operated in a pulsed mode with a pulse frequency of about 1 kHz or less during both deposition and etching. During etching, the plasma power supply can be operated in a continuous wave mode, while the bias power supply is operated in a pulsed mode. The bias power supply can be operated with a duty cycle of about 50% or less during both deposition and etching. The bias power supply may operate subsequent to the operation of the plasma power supply. Densification can include reducing the hydrogen content of the fluid film to about 30 atomic % or less. The method can include forming a plasma of a conversion precursor subsequent to densification. The method can include converting the fluid film into a modified film. The conversion precursor can include a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor. The method may be repeated in a second cycle. The temperature of the semiconductor substrate may be maintained at a temperature of about 20 °C or less during the method.

[0007] Some embodiments of the present technology can include a processing method. The method can include forming a plasma of a silicon-containing precursor. The plasma of the silicon-containing precursor may be formed at a first power level from a plasma power source. The method can include depositing a flowable film on a semiconductor substrate using the plasma emission of the silicon-containing precursor. The semiconductor substrate may be housed within a processing region of a semiconductor processing chamber. The semiconductor substrate can define features within the semiconductor substrate. Bias power may be applied from a bias power source to a substrate support. The method can include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The plasma of the hydrogen-containing precursor can be formed at a second power level for the plasma power source. The bias power may be applied from the bias power source to the plasma of the hydrogen-containing precursor at a third power level. The method can include etching the flowable film from sidewalls of features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor. The method can include densifying remaining flowable film within features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor.

[0008] In some embodiments, the plasma power source supplying the second power level can be operated continuously while the bias power source is operating in a pulse mode at a frequency of about 1 kHz or less during etching. The bias power source can be operated at a duty cycle of about 25% or less between each of deposition and etching. The etching can completely remove the flowable film from sidewalls of features above a base fill of the features. The method can include, following densification, forming a plasma of a conversion precursor. The method can include converting the flowable film to a modified film. The conversion precursor can include a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor. The modified film may be or may include silicon nitride, silicon oxide, or silicon carbide.

[0009] Some embodiments of the present technology can include a processing method. The method can include forming a plasma of a silicon-containing precursor using pulsed source power and pulsed bias power. The method can include depositing a flowable film on a semiconductor substrate using the plasma emissions of the silicon-containing precursor. The semiconductor substrate may be housed within a processing region of a semiconductor processing chamber. The semiconductor substrate can define features within the semiconductor substrate. The method can include forming a plasma of a hydrogen-containing precursor within a processing region of a semiconductor processing chamber using pulsed source power and pulsed bias power. The method can include etching a flowable film from sidewalls of features defined within the semiconductor substrate using the plasma emissions of the hydrogen-containing precursor. The method can include densifying remaining flowable film within features defined within the semiconductor substrate using the plasma emissions of the hydrogen-containing precursor. The method can include forming a plasma of a conversion precursor. The method can include converting the flowable film into a modified film. In some embodiments, the modified film may be or may include silicon and one or more of nitrogen, oxygen, or carbon.

[0010] Such technology can provide numerous benefits over conventional systems and techniques. For example, by performing processing during deposition, the quality of the material generated from the bottom within the feature is improved, thereby enabling differentiation in quality from the material on the sidewalls. Further, by performing an etching operation according to an embodiment of the present technology, sidewall coverage can be selectively etched with respect to a higher quality processed material. These and other embodiments will be described in more detail in conjunction with the following description and the accompanying drawings, along with many of their advantages and features.

[0011] A further understanding of the nature and advantages of the disclosed technology can be realized by reference to the remainder of the specification and drawings.

Brief Description of the Drawings

[0012]

Figure 1

Figure 2

Figure 3A

Figure 3B

Figure 3C

[0013] Some of the drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes only and should not be considered to be to scale unless expressly stated to be so. In addition, as schematic diagrams, the figures are provided to aid understanding and may not include all aspects or information compared to a realistic representation, and may include exaggerated materials for the purpose of illustration.

[0014] In the accompanying drawings, like components and / or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label with a letter to distinguish similar components. If only the first reference label is used herein, the description is applicable to any one of the similar components having the same first reference label, regardless of the letter.

[0015] Amorphous silicon may be used in semiconductor device manufacturing for some structures and processes, such as as a sacrificial material, for example as a dummy gate material, or as a trench fill material. In a gap filling operation, some processes can utilize a fluidized film formed under process conditions to limit the conformality of deposition, which may enable the deposited material to better fill features on the substrate. The fluidized silicon material may be characterized by a relatively large amount of hydrogen and may be less dense than other formed films. As a result, subsequent processing operations may be performed to cure the resulting film. In the prior art, a UV curing process may be utilized to remove hydrogen and treat the film. However, with UV curing, the film may shrink significantly, which can not only cause voids to form within the structure but also stress in the features.

[0016] As the feature size continues to shrink, the fluidic membrane may challenge narrow features that can be further characterized by a higher aspect ratio. For example, due to deposition on the sidewalls of the feature, pinching of the feature may occur more readily, which may further limit the flow into additional features and potentially create voids when the feature size is small. Additionally, in the case of processes where the conversion of amorphous silicon may occur, access into the feature may be further limited by the expansion of the sidewall material during conversion. The present technology can overcome these limitations by performing a directional treatment on the material formed within the feature, which may not be performed on the material deposited on the sidewalls. Further, the present technology can perform selective etching and / or modification of the formed membrane during a curing operation, thereby removing lower quality material on the sidewalls while maintaining a higher density of material within the feature. This can limit or prevent sidewall coverage during trench filling and enable an improved filling operation. Additionally, a conversion operation can be performed following curing, thereby further reducing the restriction of flow within the feature. After describing the general aspects of a chamber according to some embodiments of the present technology where plasma treatment operations can be performed, a specific methodology can be described. It should be understood that the technology described is not intended to be limited to the specific membranes, chambers, or processes described, as the technology may be used to improve several film formation processes and may be applicable to various processing chambers and operations.

[0017] FIG. 1 shows a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology. The figure can show an overview of a system incorporating one or more aspects of the present technology and / or a system capable of performing one or more deposition or other processing operations in accordance with embodiments of the present technology. Further details of the chamber 100 or the method to be performed may be further described below. The chamber 100 may be utilized to form a film layer according to some embodiments of the present technology, but it should be understood that the method may be performed similarly in any chamber in which film formation can be performed. The processing chamber 100 can include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 within a processing volume 120. The substrate 103 may be provided to the processing volume 120 through an opening 126, and the opening 126 may be conventionally sealed for processing using a slit valve or a door. The substrate 103 may be placed on the surface 105 of the substrate support during processing. The substrate support 104 may be rotatable along an axis 147 where the shaft 144 of the substrate support 104 can be located, as indicated by arrow 145. Alternatively, the substrate support 104 may be lifted to rotate as needed during the deposition process.

[0018] To control the plasma distribution over the entire substrate 103 disposed on the substrate support 104, a plasma profile modulator 111 can be disposed within the processing chamber 100. The plasma profile modulator 111 can include a first electrode 108 disposed adjacent to the chamber body 102 and separable from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or a separate sidewall electrode. The first electrode 108 may be an annular or ring-shaped member or a ring electrode. The first electrode 108 may be a continuous loop around the outer periphery of the processing chamber 100 surrounding the processing volume 120 or may be discontinuous at selected positions as desired. The first electrode 108 may also be a perforated electrode such as a perforated ring or a mesh electrode or, for example, a plate electrode such as a secondary gas distributor.

[0019] One or more isolators 110a, 110b, which may be a dielectric material such as ceramic or metal oxide, for example, aluminum oxide and / or aluminum nitride, contact the first electrode 108 and can electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 can define an aperture 118 for distributing a processing precursor into the processing volume 120. The gas distributor 112 can be coupled to a first power source 142 such as an RF generator, an RF power supply, a DC power supply, a pulsed DC power supply, a pulsed RF power supply, or any other power source that can be coupled to the processing chamber. In some embodiments, the first power source 142 may be an RF power supply.

[0020] The gas distributor 112 may be a conductive gas distributor or a non - conductive gas distributor. The gas distributor 112 may also be formed from conductive and non - conductive components. For example, the body of the gas distributor 112 may be conductive while the faceplate of the gas distributor 112 may be non - conductive. The gas distributor 112 may be powered by a first power source 142 as shown in FIG. 1, or in some embodiments, the gas distributor 112 may be coupled to ground.

[0021] The first electrode 108 may be coupled to a first tuning circuit 128 that can control the ground path of the processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or include a variable capacitor or other circuit element. The first tuning circuit 128 may be or include one or more inductors 132. The first tuning circuit 128 may be any circuit that enables a variable or controllable impedance under plasma conditions existing within the processing volume 120 during processing. In some embodiments as shown, the first tuning circuit 128 can include a first circuit section and a second circuit section coupled in parallel between ground and the first electronic sensor 130. The first circuit section can include a first inductor 132A. The second circuit section can include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be disposed between the first electronic controller 134 and a node connecting both the first and second circuit sections to the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to the first electronic controller 134, thereby enabling some degree of closed - loop control of the plasma conditions inside the processing volume 120.

[0022] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104, or may be coupled to the surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and may be coupled to the second tuning circuit 136 by a conduit 146, such as a cable having a selected resistance, such as 50 ohms, disposed within the shaft 144 of the substrate support 104. The second tuning circuit 136 can include a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to provide further control over the plasma conditions within the processing volume 120.

[0023] A third electrode 124, which may be a bias electrode and / or an electrostatic chuck electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 via a filter 148, which may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, a pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 may be RF bias power.

[0024] The lid assembly 106 and the substrate support 104 of FIG. 1 may be used with any processing chamber for plasma or heat treatment. In operation, the processing chamber 100 can provide real-time control of plasma conditions within the processing volume 120. The substrate 103 may be disposed on the substrate support 104, and process gas may flow through the lid assembly 106 using the inlet 114 according to any desired flow plan. The inlet 114 can include a supply from the remote plasma source unit 116 and can be fluidly coupled with a bypass 117 for a process gas supply that cannot flow through the chamber and, in some embodiments, the remote plasma source unit 116. The gas can exit the processing chamber 100 through the outlet 152. Power can be coupled to the gas distributor 112 to establish a plasma within the processing volume 120. The substrate may, in some embodiments, be electrically biased using a third electrode 124.

[0025] When a plasma is excited within the processing volume 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Then, the flow characteristics of the ground path represented by the two tuning circuits 128 and 136 can be adjusted using the electronic controllers 134, 140. Set points can be supplied to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In embodiments where both electronic controllers may be variable capacitors, the electronic sensors can independently adjust the variable capacitors to maximize the deposition rate and minimize thickness non-uniformity.

[0026] Each of the tuning circuits 128, 136 can have a variable impedance that can be adjusted using respective electronic controllers 134, 140. If the electronic controllers 134, 140 are variable capacitors, the capacitance range of each variable capacitor, as well as the inductance of the first inductor 132A and the second inductor 132B, can be selected to provide a range of impedances. This range may depend on the frequency and voltage characteristics of the plasma and may have a minimum value for the capacitance range of each variable capacitor. Therefore, when the capacitance of the first electronic controller 134 is at a minimum or maximum, the impedance of the first tuning circuit 128 becomes high, and as a result, a plasma shape is obtained in which the aerial or lateral coverage on the substrate support is minimized. As the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma becomes maximum, and the entire working area of the substrate support 104 can be effectively covered. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may contract from the chamber wall, and the aerial coverage of the substrate support may decrease. Since the second electronic controller 140 can vary the capacitance of the second electronic controller 140, it can have a similar effect and can increase or decrease the spatial coverage of the plasma on the substrate support.

[0027] The electronic sensors 130, 138 can be used to adjust the respective circuits 128, 136 in a closed loop. Depending on the type of sensor used, a setpoint of current or voltage may be installed in each sensor, and the sensor may be provided with control software that determines the adjustment to each of the respective electronic controllers 134, 140 so as to minimize the deviation from the setpoint. As a result, the plasma shape can be selected and dynamically controlled during processing. It should be understood that the foregoing discussion is based on the electronic controllers 134, 140, which may be variable capacitors, but that tuning circuits 128 and 136 having adjustable impedances can be provided using any electronic component having adjustable characteristics.

[0028] In some embodiments of the present technology, the processing chamber 100 may be utilized in a processing method that may include the formation, processing, etching, or conversion of materials for semiconductor structures. It should be understood that the chambers described should not be considered limiting, and any chamber that can be configured to perform the operations as described may be used as well. FIG. 2 shows exemplary operations in a processing method 200 according to some embodiments of the present technology. The method can be performed in various processing chambers, including the processing chamber 100 described above, and on one or more mainframes or tools. The method 200 can include some optional operations that may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many of the operations are described to provide a broader range of structure formation, but are not important for the present technology or may be performed by alternative methodologies that are readily understood. The method 200 can describe the operations schematically shown in FIGS. 3A-3C, the description of which is provided in connection with the operations of the method 200. It should be understood that the figures show only partial schematics, and the substrate can include any number of additional materials and features having various characteristics and aspects as shown in the figures.

[0029] Method 200 may include additional operations before the start of the enumerated operations. For example, the additional processing operations may include forming a structure on a semiconductor substrate, which may include both forming and removing materials. For example, a transistor structure, a memory structure, or any other structure may be formed. The pre-processing operations may be performed in a chamber in which method 200 can be executed, or the processing may be performed in one or more other processing chambers before supplying the substrate into a semiconductor processing chamber in which method 200 can be executed. In any case, method 200 can include supplying a semiconductor substrate to a processing region of a semiconductor processing chamber such as processing chamber 100 described above, or another chamber that can include the components described above. The substrate may be placed on a substrate support, which may be a pedestal such as pedestal 104, and can be present within the processing region of the chamber such as the processing volume 120 described above.

[0030] The substrate on which some operations have been performed may be substrate 305 of structure 300, and structure 300 can show a partial view of the substrate on which semiconductor processing can be performed. It should be understood that structure 300 may show only some of the top layers during processing for purposes of illustrating aspects of the present technology. Substrate 305 can include a material in which one or more features 310 can be formed. Substrate 305 can be any number of materials used in semiconductor processing. The substrate material may be silicon, germanium, a dielectric material including silicon oxide or silicon nitride, a metal material, or any number of combinations of these materials, or may include them, and may be the material formed within substrate 305 or structure 300. Features 310 may be characterized by any shape or configuration according to the present technology. In some embodiments, the feature may be or include a trench structure or an aperture formed within substrate 305.

[0031] Feature 310 may be characterized by any shape or size, but in some embodiments, Feature 310 may be characterized by a higher aspect ratio, i.e., the ratio of the depth of the feature to the width across the feature. For example, in some embodiments, Feature 310 may be characterized by an aspect ratio of about 5:1 or greater, about 10:1 or greater, about 15:1 or greater, about 20:1 or greater, about 25:1 or greater, about 30:1 or greater, about 40:1 or greater, about 50:1 or greater, or greater. Additionally, the feature may be characterized by a narrow width or diameter across the feature, including between two sidewalls, such as a dimension of about 20 nm or less, about 15 nm or less, about 12 nm or less, about 10 nm or less, about 9 nm or less, about 8 nm or less, about 7 nm or less, about 6 nm or less, about 5 nm or less, or less than that across the feature.

[0032] In some embodiments, method 200 can include any processing operations, such as a pre-treatment, that can be performed to prepare the surface of substrate 305 for deposition. Once prepared, method 200 can include supplying one or more precursors to a processing region of a semiconductor processing chamber that houses structure 300. The precursors can include one or more silicon-containing precursors, as well as one or more diluents or carrier gases, such as an inert gas or other gas supplied with the silicon-containing precursor. In operation 205, a plasma can be formed from a deposition precursor that includes a silicon-containing precursor. The plasma may be formed within the processing region, thereby making it possible to deposit a deposition material onto the substrate. For example, in some embodiments, a capacitively coupled plasma can be formed within the processing region by applying a plasma output to the faceplate as described above.

[0033] In operation 210, a silicon-containing material can be deposited onto a substrate from a plasma discharge of a silicon-containing precursor. The material may, in some embodiments, be a flowable silicon-containing material, which may be, or may include, amorphous silicon. The deposited material can at least partially flow into features on the substrate, providing bottom-up gap filling. As shown in FIG. 3A, the material 315 can be deposited onto the substrate 305 and can flow into a trench or feature 310. As shown, the deposited material 315 can flow into the bottom of the feature, although, as shown by material 317, some amount of material may remain on the sidewalls of the substrate, and, as shown by material 319, material may remain on or between features. The deposition amount may be relatively small, but the material remaining on the sidewalls can potentially limit subsequent flow. Further, when the deposited material is conventionally converted, such as to silicon nitride, the conversion involves expansion of the film. In the case of features with reduced dimensions, the residual material formed on the sidewalls can be converted and spread outwardly toward the opposite sidewall. This can cause the feature to pinch off, potentially forming voids within the feature.

[0034] The power applied during deposition can be a lower-power plasma that can limit dissociation and maintain the amount of hydrogen incorporated into the deposited material. This incorporated hydrogen can contribute to the fluidity of the deposited material. Additionally, unlike the prior art, the present technology can incorporate a bias process that can perform a treatment on the deposited film during the deposition operation. This process can include utilizing source power that is coupled to a faceplate or showerhead as described above, as well as utilizing bias power that is applied through a substrate support as described above. The source power can be used to perform a controlled dissociation of the silicon-containing precursor, which may result in limited dissociation and the possibility of forming longer material chains. When these materials contact the substrate, the fluidity of the longer-chain silicon-containing materials is improved, which may improve bottom-up filling.

[0035] The source power may be pulsed and the duty cycle may be reduced, which in some embodiments can further reduce the effective plasma output. For example, the source power may be applied at any higher frequency such as about 10 MHz or more, about 13 MHz or more, about 15 MHz or more, about 20 MHz or more, or higher. The plasma power supply can supply a plasma output of about 300 W or less to the faceplate, and can supply power of about 250 W or less, about 200 W or less, about 150 W or less, about 100 W or less, about 50 W or less, or less. Additionally, the source power may be pulsed at a pulse frequency of 20 kHz or less, for example, about 15 kHz or less, about 12 kHz or less, about 10 kHz or less, about 8 kHz or less, or less. Further, the pulse duty cycle may be applied at about 50% or less, and may be applied at about 40% or less, about 30% or less, about 20% or less, about 10% or less, about 5% or less, about 1% or less. This may limit the dissociation of the silicon precursor and improve long-chain formation.

[0036] In some embodiments, to facilitate dissociation and deposition, the deposition precursor can include one or more inert gases such as argon and / or helium that can help improve dissociation. Further, in some embodiments, the deposition precursor can include diatomic hydrogen, which may be flowed to facilitate the processing during deposition and may be assisted by the supply of bias power. For example, hydrogen may be supplied with a silicon-containing precursor at a flow rate ratio of hydrogen to silicon-containing precursor of about 0.5:1 or more, about 1:1 or more, about 1.5:1 or more, about 2:1 or more, about 2.5:1 or more, about 3.0:1 or more, about 3.5:1 or more, about 4.0:1 or more, or more.

[0037] Hydrogen may also be dissociated in the generated plasma and may be further activated by utilizing a bias power supply. For example, in some embodiments, the bias power supply can be operated at a frequency lower than the source power, and can be operated at about 10 MHz or less, about 5 MHz or less, about 2 MHz or less, or less. The power supply can be operated at a power of about 500 W or less, about 450 W or less, about 400 W or less, or less. The bias power can create some directivity in the movement of the emissions, and the lighter hydrogen radicals can further dissociate argon and / or helium. More specifically, argon and / or helium can be directed downward of the structure. The lower frequency power can also impart additional energy to the ions as they move to the substrate in a more linear path.

[0038] These radical nuclides of hydrogen and inert gases can transfer energy to materials along the bottom of the feature, such as materials 315 and 319, and materials along the top of the feature, such as materials along the surface perpendicular to the direction of progress. The energy can help release excess hydrogen, which may densify the film at these locations. As shown in Figure 3B, the material 317 along the sidewall may be unaffected or have limited changes, while materials 315 and 319 can be densified, thereby improving the quality of the materials. Therefore, in some embodiments, the materials along the top and bottom of the structure can be characterized by high quality, including a higher density than materials that may have been deposited along the sidewalls of the feature.

[0039] However, by utilizing bias power, the deposition plasma may be characterized by an increase in power, which may further dissociate the silicon-containing precursor and reduce fluidity. Therefore, to limit this effect, the bias power may be pulsed at a pulse frequency of about 10 kHz or less, and may be pulsed at a frequency of about 5 kHz or less, about 1 kHz or less, about 500 Hz or less, about 100 Hz or less, about 50 Hz or less, about 10 Hz or less, or less. In addition, the duty cycle can be operated at about 50% or less, about 40% or less, about 30% or less, about 20% or less, about 10% or less, about 5% or less, or about 1%, thereby further reducing the impact of the bias power. By operating the bias power at a very low pulse frequency and duty cycle, the bias power can be utilized to improve the film quality at the top of the structure and the bottom of the feature while limiting the impact on the deposition characteristics. In addition, by using low power, hydrogen may not be energized enough to cause etching of the deposited material or lead to sputtering of the material based on the impact of inert gas emissions.

[0040] Following a certain amount of deposition, in some embodiments of the present technology, an etching and / or modification process configured to selectively etch back the formed material and modify the remaining material may be performed. This process may be performed in the same chamber as the deposition, and may be performed in a cyclic process to fill the features. In some embodiments, the flow of the silicon-containing precursor can be stopped and the processing region can be purged. The flow of an inert gas such as argon and / or helium may also be stopped. Following the purge, a hydrogen-containing precursor can be flowed into the processing region of the processing chamber. In some embodiments, the modification process can include only a hydrogen-containing precursor which may be diatomic hydrogen in some embodiments. In operation 215, a modification plasma may be formed, which may also be a capacitively coupled plasma formed within the processing region, although in some embodiments, an inductively coupled plasma may be equally applicable.

[0041] Similar to the deposition process, during the etching operation, an additional power source can be engaged and coupled to the substrate support as described above to supply a bias to the plasma generated above the substrate. Thus, the etching process may include both source power and bias power. Thereby, the plasma emissions may be attracted to the substrate, impacting the film and densifying the deposited material, particularly the material that has already been at least partially improved by the processes performed during deposition. Any hydrogen-containing material can be used, although in some embodiments, diatomic hydrogen can be used as the hydrogen-containing precursor for generating the etching plasma. Hydrogen radicals and ions can easily penetrate into the material formed within the trench and can release the incorporated hydrogen from the film to densify it. The applied bias power may be relatively low in order to suppress sputtering of the generated film and to suppress the possibility of damage to the structure. Additionally, by adjusting the applied source power and bias power, the etching operation may be performed, thereby reducing the sidewall coverage of the deposited material while limiting the impact on the previously processed material.

[0042] Plasma can be generated in the processing region by supplying power from a plasma power source to the panel using diatomic hydrogen or any other hydrogen-containing material. The plasma output in some embodiments may be greater than the plasma output used during deposition by both the source power and the bias power. For example, the supplied plasma source power may be about 100 W or more, about 200 W or more, about 300 W or more, about 400 W or more, about 500 W or more, or even more. By increasing the plasma output during the formation of the processing plasma, a larger amount of plasma emissions can be generated. However, as the plasma output increases, the amount of material etched from the bottom of the structure may also increase. Thus, in some embodiments, the plasma source power may be maintained at about 500 W or less, about 400 W or less, about 300 W or less, or even less. Additionally, the mode of the bias power may also be adjusted. For example, in some processing operations, the bias power may be higher than the plasma source power, which can supply sufficient power to the plasma to ensure that etching of lower-quality materials, such as materials along sidewalls that may not have been processed during the deposition operation, occurs.

[0043] By applying a larger bias power, the ability of hydrogen to etch the deposited material can be enhanced. The bias power during deposition can be decreased to limit the etching effect, but during the modification operation, the bias power, which can be any of the above frequencies, can be increased to about 500 W or more, to about 800 W or more, about 1000 W or more, about 1200 W or more, about 1400 W or more, about 1600 W or more, about 1800 W or more, or even more. However, since the bias power can impart directivity, the bias power may be pulsed as described below, thereby providing etching of low-quality materials while maintaining the previously processed material, and the material can be modified and / or densified. Then, the plasma emissions can etch the fluid film in operation 220 and remove the fluid film from the sidewalls of the trench. At the same time, beneficially, the more directionally supplied plasma emissions can penetrate into the remaining film formed at the bottom of the feature and, in an optional operation 225, reduce hydrogen uptake and densify the film. As shown in FIG. 3C, the material 317 can be removed from the sidewalls and overhang regions of the substrate 305, whereby the deposited material can be maintained at the bottom region of the feature and along the top region of the structure. As an additional advantage, the densified material 319 at the top of the structure can also protect the underlying material from damage by suppressing the impact on the material. This process can also reduce hydrogen uptake in the remaining material, such as to about 40 atomic % or less, to about 35 atomic % or less, about 30 atomic % or less, about 25 atomic % or less, about 20 atomic % or less, about 15 atomic % or less, about 10 atomic % or less, about 5 atomic % or less, or even less.

[0044] Additional adjustments can be made to further increase the etching of the material deposited along the sidewalls of the feature by adjusting one or more characteristics of the supplied plasma output or bias power. For example, in some embodiments, both the plasma power supply and the bias power supply can be operated in continuous wave mode. Additionally, one or both of the power supplies can be operated in pulse mode. In some embodiments, the source power may be operated in continuous wave mode while the bias power is operated in pulse mode. The pulse frequency of the bias power can be any of the pulse frequencies described above. The duty cycle of the bias power can be 75% or less, and the bias power can be operated at a duty cycle of 70% or less, 60% or less, 50% or less, 40% or less, 30% or less, 20% or less, 10% or less, 5% or less, or less than that. Operating the bias power at a reduced duty cycle, such as an on-time duty of 50% or less, allows for more time per cycle, such as during the off-time, to perform more isotropic etching within the feature, thereby better removing material from the sidewalls.

[0045] The additional power configuration can also include the synchronization amount between the source power and the bias power in a master / slave relationship. For example, both power supplies can be operated in a pulsing orientation, and the bias power can be synchronously applied after the source power is applied in each pulse. The inter-level pulse method may also be applied. For example, while the duty of the bias power is on, the source power can be operated with a first plasma output. During the remaining cycles when the bias power is off, the source power can be operated with a second plasma output that may be larger than the first plasma output. Thereby, not only can isotropic etching be enhanced by eliminating the bias-induced orientation, but the etching characteristics of isotropic etching can also be improved. The deposition and etching processes may be repeated any number of times in a cycle to fill the features in the embodiments of the present technology, and the features can be filled with amorphous silicon.

[0046] In addition, in some embodiments where it may be required that silicon be converted within the features, the cycle can also include a conversion operation. By converting during each cycle, the problem of penetration into the features can be completely solved. Also, by performing the conversion operation following curing and etching / modification, the deposited material can be removed from the sidewalls before conversion, which, as described above, can limit the trench between the sidewalls or the lateral film expansion within the features. The conversion may be performed in a chamber different from that for deposition and processing, but in some embodiments, two or more operations including all operations can be performed in a single processing chamber. Thereby, the waiting time can be shortened compared to the conventional process.

[0047] Method 200 may also optionally include converting the amorphous silicon to another material. For example, following etching and densification, one or more conversion precursors can be supplied to the processing region of the chamber. For example, a nitrogen-containing precursor, an oxygen-containing precursor, and / or a carbon-containing precursor may be supplied to the processing region of the chamber with any carrier gas or diluent gas. A plasma may be formed from the conversion precursor and can then contact the amorphous silicon material within the feature. In any operation 230, the plasma emissions of the conversion precursor interact with the amorphous silicon material within the trench and convert this material to silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon oxycarbide, silicon carbonitride, or silicon oxycarbonitride, along with any other material that can be used to convert the amorphous silicon film. The plasma output may be similar to the power described above, for example, in the case of a capacitively coupled system it may be from about 100 W to a maximum of about 1,000 W or more, and in the case of an inductively coupled plasma system it may be up to 10 kW or more, although any type of conversion can be performed.

[0048] Deposition may be formed up to several nanometers or more, but by performing an etching process as described above, the thickness of the densified material may be controlled to be about 500 Å or less, about 450 Å or less, about 400 Å or less, about 350 Å or less, about 300 Å or less, about 250 Å or less, about 200 Å or less, about 150 Å or less, about 100 Å or less, about 50 Å or less, or less. By controlling the thickness of the deposited material, conversion can be more easily performed across the entire thickness, and problems of penetration common in conventional processes can be solved. After converting the deposited material, this process can be repeated sufficiently to continue generating the material converted through the feature.

[0049] Regarding the deposition precursors used during any of the forming operations, in the present technology, any number of precursors can be used. Silicon-containing precursors that can be used during silicon formation, silicon oxide formation, or silicon nitride formation include silane (SiH4), disilane (Si2H6), trisilane, or other organosilanes including cyclohexasilane, silicon tetrafluoride (SiF4), silicon tetrachloride (SiCl4), dichlorosilane (SiH2Cl2), tetraethyl orthosilicate (TEOS), and any other silicon-containing precursors that can be used in silicon-containing film formation, but are not limited thereto. By utilizing higher-order silanes, longer material chains may be generated, which may improve fluidity in some embodiments. The silicon-containing material may, in some embodiments, not contain nitrogen, not contain oxygen, and / or not contain carbon. Oxygen-containing precursors used in any of the operations described throughout the present technology can include O2, N2O, NO2, O3, H2O, and any other oxygen-containing precursors that can be used in silicon oxide film formation or other film formation. Nitrogen-containing precursors used in any of the operations may include N2, N2O, NO2, NH3, N2H2, and any other nitrogen-containing precursors that can be used in silicon nitride film formation. The carbon-containing precursor may be any carbon-containing material such as any hydrocarbon or any other precursor containing carbon, or may include it. In any of the operations, one or more additional precursors may be included, such as inert precursors that may include Ar, He, Xe, Kr, or other materials such as nitrogen, ammonia, hydrogen, or other precursors.

[0050] Temperature and pressure can also affect the operation of the present technology. For example, in some embodiments to promote membrane fluidity, the process may be carried out at a temperature of about 20°C or less, or at a temperature of about 0°C or less, about -20°C or less, about -50°C or less, about -75°C or less, about -100°C or less, or less. The temperature may be maintained within any of these ranges throughout the overall method including processing and etching, as well as during conversion. The pressure within the chamber may similarly be kept relatively low for any of the processes, such as a chamber pressure of about 20 Torr or less, and the pressure may be maintained at about 15 Torr or less, about 10 Torr or less, about 5 Torr or less, about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, about 0.1 Torr or less, or less. By carrying out the process according to some embodiments of the present technology, improved filling of narrow features can be produced using silicon-containing materials.

[0051] In the foregoing description, for purposes of explanation, numerous details have been set forth in order to provide an understanding of the various embodiments of the present technology. However, it will be apparent to one skilled in the art that certain embodiments can be practiced without some of these details or with additional details.

[0052] Although some embodiments have been disclosed, it will be recognized by those skilled in the art that various modifications, alternative configurations, and equivalents can be used without departing from the spirit of the embodiments. Additionally, to avoid unnecessarily obscuring the present technology, some well-known processes and elements have not been described. Therefore, the above description should not be construed as limiting the scope of the present technology. Additionally, it should be understood that although a method or process may be described sequentially or stepwise, the operations may be performed simultaneously or in an order different from the recited order.

[0053] When a range of values is provided, each intervening value, to the minimum fraction of the unit of the lower limit, between the upper and lower limits of that range is also specifically disclosed, unless the context clearly dictates otherwise. Any recited value or intervening value within the recited range, and any narrower range between any other recited value or intervening value within the recited range, is included. The upper and lower limits of these smaller ranges may independently be included or excluded from the range, and each range that includes any one of the limits, none of the limits, or both limits of the smaller range is also included within the scope of the technology, subject to any specifically excluded limitations within the recited range. When the recited range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

[0054] As used in this specification and the appended claims, the singular forms "a", "an", and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, reference to "a precursor" includes a plurality of such precursors, reference to "the layer" includes reference to one or more layers and their equivalents known to those skilled in the art, and the like.

[0055] Also, the words "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including", when used in this specification and the following claims, are intended to specify the presence of the stated feature, integer, component, or operation, but do not preclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. A processing method comprising: forming a plasma of a silicon-containing precursor, wherein the plasma of the silicon-containing precursor is formed from a plasma power source at a first power level; depositing a flowable film on a semiconductor substrate using the plasma emission of the silicon-containing precursor, wherein the semiconductor substrate is housed within a processing region of a semiconductor processing chamber, the semiconductor substrate defines features within the semiconductor substrate, the processing region is at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is placed, and bias power is applied from a bias power source to the substrate support; forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber, wherein the plasma of the hydrogen-containing precursor is formed from the plasma power source at a second power level, and bias power is applied from the bias power source to the substrate support at a third power level greater than the second power level; etching the flowable film from sidewalls of the features within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor; densifying remaining flowable film within the features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor; and a processing method comprising the above.

2. The processing method according to claim 1, wherein the features within the substrate are characterized by an aspect ratio of 5:1 or greater and are characterized by a width across the features of 10 nm or less.

3. The processing method according to claim 1, wherein the bias power source operates in a pulse mode with a pulse frequency of 1 kHz or less between both the deposition and the etching.

4. The processing method according to claim 3, wherein during the etching, the plasma power source operates in a continuous wave mode, while the bias power source operates in the pulse mode.

5. The processing method according to claim 3, wherein the bias power source operates with a duty cycle of 50% or less between both the deposition and the etching.

6. The processing method according to claim 1, wherein the bias power source operates subsequent to the operation of the plasma power source.

7. The processing method according to claim 1, wherein the densifying comprises reducing the hydrogen content of the flowable film to 30 atomic % or less.

8. Subsequent to the densification, forming a plasma of a conversion precursor; converting the fluidity film into a modified film; The processing method according to claim 1, further comprising.

9. The processing method according to claim 8, wherein the conversion precursor includes a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor.

10. The processing method according to claim 8, wherein the method is repeated in a second cycle.

11. The processing method according to claim 8, wherein the temperature of the semiconductor substrate is maintained at a temperature of 20 °C or less during the method.

12. A processing method comprising: forming a plasma of a silicon-containing precursor, wherein the plasma of the silicon-containing precursor is formed from a plasma power source at a first power level; depositing a fluidity film on a semiconductor substrate using the plasma emission of the silicon-containing precursor, wherein the semiconductor substrate is housed within a processing region of a semiconductor processing chamber, the semiconductor substrate defining features within the semiconductor substrate, and bias power is applied from a bias power source to a substrate support; forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber, wherein the plasma of the hydrogen-containing precursor is formed at a second power level of the plasma power source, and bias power is applied from the bias power source to the plasma of the hydrogen-containing precursor at a third power level; etching the fluidity film from sidewalls of the features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor; densifying the remaining fluidity film within the features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor; A processing method comprising.

13. The processing method according to claim 12, wherein the plasma power source supplying the second power level operates continuously while the bias power source operates in a pulse mode at a frequency of 1 kHz or less during the etching.

14. The processing method according to claim 13, wherein the bias power source operates at a duty cycle of 25% or less during each of the deposition and the etching.

15. The processing method according to claim 12, wherein the etching completely removes the fluidity film from the sidewalls of the features above the base fill of the features.

16. Subsequent to the densification, forming a plasma of a conversion precursor, converting the fluidity film into a modified film, The processing method according to claim 12, further comprising.

17. The processing method according to claim 16, wherein the conversion precursor includes a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor.

18. The processing method according to claim 17, wherein the modified film includes silicon nitride, silicon oxide, or silicon carbide.

19. A processing method, forming a plasma of a silicon-containing precursor using pulse source power and pulse bias power, depositing a fluidity film on a semiconductor substrate using the plasma emission of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, and depositing a fluidity film that defines features within the semiconductor substrate, forming a plasma of a hydrogen-containing precursor in the processing region of the semiconductor processing chamber using pulse source power and pulse bias power, etching the fluidity film from sidewalls of the features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor, densifying the remaining fluidity film within the features defined within the semiconductor substrate using the plasma emission of the hydrogen-containing precursor, forming a plasma of a conversion precursor, converting the fluidity film into a modified film, A processing method comprising.

20. The processing method according to claim 19, wherein the modified film includes silicon and one or more of nitrogen, oxygen, or carbon.

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