Semiconductor processing chamber for accommodating parasitic plasma formation

Abstract

An exemplary processing system may include a chamber body. The system may include a pedestal configured to support a semiconductor substrate. The system may include a faceplate. The chamber body, pedestal, and faceplate may define a processing region. The faceplate may be connected to an RF power source. The system may include a remote plasma unit. The remote plasma unit may be connected to an electrical ground. The system may include a discharge tube extending from the remote plasma unit toward the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically connected to each of the faceplate and the remote plasma unit. The discharge tube may include ferrite extending around the central aperture of the discharge tube.

Description

Technical Field

[0001] Cross - Reference to Related Applications

[0001] This application claims the benefit and priority of U.S. Patent Application No. 17 / 078,520, filed on October 23, 2020, entitled "SEMICONDUCTOR PROCESSING CHAMBER TO ACCOMMODATE PARASITIC PLASMA FORMATION", which is incorporated herein by reference in its entirety.

[0002]

[0002] This technology relates to semiconductor processing. More specifically, this technology relates to systems and methods for depositing and processing materials including a flowable film.

Background Art

[0003]

[0003] Integrated circuits are enabled by a process that creates complexly patterned material layers on a substrate surface. To create patterned materials on a substrate, a controlled method of forming and removing exposed materials is required. As device sizes shrink, material formation can affect subsequent processes. For example, in a gap - filling process, materials can be formed or deposited to fill trenches and other features formed on a semiconductor substrate. Since the features can be characterized by a high aspect ratio and reduced critical dimensions, these filling processes can be challenging. For example, deposition can occur at the top of the feature and along the sidewalls, and if deposition continues, the feature can be pinched off, including between the sidewalls within the feature, and voids can occur within the feature. Therefore, it can affect the performance of the device and subsequent processing steps.

[0004]

[0004] Accordingly, there is a need for improved systems and methods that can be used to manufacture high - quality devices and structures. This technology addresses these and other needs.

Summary of the Invention

[0005]

[0005] An exemplary processing system may include a chamber body. The system may include a pedestal configured to support a semiconductor substrate. The system may include a faceplate. The chamber body, the pedestal, and the faceplate may define a processing region. The faceplate may be connected to an RF power source. The system may include a remote plasma unit. The remote plasma unit may be connected by electrical grounding. The system may include a discharge tube extending from the remote plasma unit toward the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically connected to each of the faceplate and the remote plasma unit. The discharge tube may include a ferrite extending around the central aperture of the discharge tube.

[0006]

[0006] In some embodiments, the discharge tube may be conductive. The ferrite may generate an inductance of about 50 Ω or more along the discharge tube. The ferrite may include at least one ferrite ring extending around the central aperture of the discharge tube. The discharge tube may define an annular volume within the discharge tube and around the central aperture. The ferrite may be disposed within the annular volume. The system may include an insulator disposed within the annular volume. The system may include a capacitor electrically connected to the discharge tube across the ferrite. The system may include an output manifold disposed between the discharge tube and the faceplate. The output manifold may define a central aperture axially aligned with the central aperture of the discharge tube. The output manifold may define one or more bypass channels passing through the output manifold and fluidly separated from the central aperture. Each inlet to the one or more bypass channels defined by the output manifold may include an orifice sized to increase the pressure delta at the inlet by about 5 Torr or more. The RF power source may be a high-frequency plasma source connected to the faceplate. Also, the system may include a low-frequency plasma source connected to the pedestal. The pedestal may be an electrostatic chuck or may include an electrostatic chuck. Also, the semiconductor processing system may include a DC power source connected to the pedestal. The low-frequency plasma source may be configured to operate at about 2 MHz or less. The high-frequency plasma source may be configured to operate at about 13.56 MHz or more at a pulsing frequency of about 200 kHz or less. The high-frequency plasma source may be configured to operate at a pulsing frequency of about 20 kHz or less at a duty cycle of about 20% or less. The high-frequency plasma source may be configured to generate plasma with an effective power of about 5 W or less. The system may further include a first L-C filter configured to be connected to the pedestal and to virtually ground the high-frequency plasma source through the pedestal. The system may include a second L-C filter configured to be connected to the faceplate and to virtually ground the low-frequency plasma source to the chamber body.

[0007]

[0007] Some embodiments of the present technology may include a processing method. The method may include forming a plasma of a silicon-containing precursor. The method may include depositing a flowable film on a semiconductor substrate using the plasma emission of the silicon-containing precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing apparatus chamber. The semiconductor substrate may define features within the semiconductor substrate. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is placed. The method may include forming a processing plasma within the processing region of the semiconductor processing chamber. The processing plasma may be formed at a first power level from a first power source. A second power level may be applied to the substrate support from a second power source. The method may include densifying the flowable film within the features defined within the semiconductor substrate using the plasma emission of the processing plasma.

[0008]

[0008] In some embodiments, the semiconductor processing chamber can be part of a semiconductor processing system. The system can include a chamber body. The system can include a pedestal configured to support a semiconductor substrate. The system can include a faceplate. The chamber body, the pedestal, and the faceplate can define a processing region. The system can include a remote plasma unit. The system can include a discharge tube extending from the remote plasma unit toward the faceplate. The discharge tube can define a central opening. The discharge tube can include a ferrite extending around the central aperture of the discharge tube. The system can include a high-frequency plasma source connected to the faceplate. The system can include a low-frequency plasma source connected to the pedestal. The system can further include a first L-C filter connected to the pedestal and configured to virtually ground the high-frequency plasma source through the pedestal. The system can include a second L-C filter connected to the faceplate and configured to virtually ground the low-frequency plasma source to the chamber body. The system can include an output manifold disposed between the discharge tube and the faceplate. The output manifold can define a central opening axially aligned with the central aperture of the discharge tube. The output manifold can define one or more bypass channels passing through the output manifold that are fluidly separated from the central opening.

[0009]

[0009] Such techniques can provide a number of advantages over conventional systems and techniques. For example, by performing a curing or processing step within a deposition chamber, throughput can be improved while limiting or controlling sidewall coverage and void formation in small features can be limited. Further, by utilizing a chamber structure that incorporates a ferrite, plasma generation can be controlled and can preferentially occur in the processing region of the chamber. These and other embodiments will be described in more detail, along with many of their advantages and features, in conjunction with the following description and the accompanying drawings.

[0010]

[0010] The nature and advantages of the disclosed technology can be further understood by referring to the remainder of this specification and the drawings.

Brief Description of the Drawings

[0011]

Figure 1

[0011] A schematic cross-sectional view of an exemplary processing chamber according to some embodiments of the present technology is shown.

Figure 2

[0012] A schematic partial cross-sectional view of a chamber according to some embodiments of the present technology is shown.

Figure 3

[0013] Exemplary operations in a processing method according to some embodiments of the present technology are shown.

Figure 4

[0014] Exemplary Paschen curves of a gas according to some embodiments of the present technology are shown.

Figure 5

[0015] A schematic cross-sectional view of an exemplary processing system according to some embodiments of the present technology is shown.

Figure 6

[0016] A schematic cross-sectional view of components of an exemplary processing system according to some embodiments of the present technology is shown.

Modes for Carrying Out the Invention

[0012]

[0017] Some of the drawings are included as schematic views. It should be understood that the drawings are for illustrative purposes only and should not be considered to be to scale unless expressly stated to be so. Further, as schematic views, the drawings are provided to assist understanding and may not include all aspects or information compared to a realistic depiction, and may include materials emphasized for illustrative purposes.

[0013]

[0018] In the accompanying drawings, similar components and / or features may have the same reference numerals. Further, various components of the same type may be distinguished according to the reference numerals by letters that distinguish between similar components. If only a first reference numeral is used herein, the description is applicable to any of the similar components having the same first reference numeral, regardless of the letters.

[0014]

[0019] Amorphous silicon can be used in several structures and processes in semiconductor device manufacturing, such as as a sacrificial material, e.g., a dummy gate material, or as a trench fill material. In a gap fill operation, some processes can utilize a flowing film formed under process conditions that limit the conformality of the deposition, allowing the deposited material to better fill features on the substrate. The flowing silicon material is characterized by a relatively large amount of hydrogen and may be less dense than other formed films. As a result, subsequent processing steps may be performed to cure the manufactured film. The prior art may utilize a UV curing process to remove hydrogen and treat the film. However, UV curing causes significant shrinkage of the film, which not only stresses the features but also has the potential to generate voids within the structure. Further, since the treatment is formed in a chamber separate from the deposition chamber, the treatment time will be long and the throughput will decrease.

[0015]

[0020] As the size of the feature continues to shrink, the fluidity film for narrow features can become an issue, which can be further characterized by a higher aspect ratio. For example, as the feature deposits on the sidewall, it becomes easier to pinch the feature, and at a small feature size, the flow into the feature is further restricted, and voids may occur. Some conventional fluidity film formations can be performed by generating radicals in a remote capacitively coupled plasma region or a remote plasma source unit coupled to the chamber. However, for periodic formation in high aspect ratio features, this process can provide unreliable deposition. For example, when radicals pass through chamber components such as the faceplate, recombination can make it difficult to provide a consistent supply of radical wastewater. Furthermore, the remote plasma source may not be able to limit the deposition amount within features with a small pitch. As a result, over-deposition occurs within the feature, and then complete penetration of the process wastewater may be restricted or inhibited. This can cause damage during subsequent processing and lead to substrate discard.

[0016]

[0021] The present technology can overcome these limitations by separating high-frequency and low-frequency power supplies and utilizing a trigger sequence to enable reproducible plasma generation at low power in a short period of time. This not only allows the deposition during trench filling to be limited to a precisely controlled amount, but also ensures complete processing during subsequent processing steps. Also, by including chamber components for controlling the effects of pressure and gap length within the processing chamber, the operation can be controlled to generate plasma within a selected region of the processing chamber. After describing the general aspects of the chamber according to some embodiments of the present technology in which the plasma processing steps described later can be performed, specific chamber configurations and methodologies can be described. It will be understood that the techniques described are used to improve some film formation processes for any number of materials and can be applied to various processing chambers and operations, and thus the present technology is not intended to be limited to the specific films, chambers, or processes described.

[0017]

[0022] FIG. 1 shows a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology. This figure can show an overview of a system that incorporates one or more aspects of the present technology and / or that can perform one or more deposition or other processing steps according to embodiments of the present technology. Additional details of the chamber 100 or the method being performed can be further described below. Chamber 100 can be utilized to form a film layer according to some embodiments of the present technology, although it will be understood that the method can be similarly performed in any chamber in which film formation can occur. Processing chamber 100 can include a chamber body 102, a substrate support 104 disposed inside the chamber body 102, and a lid assembly 106 connected to the chamber body 102 and surrounding the substrate support 104 in a processing space 120. Substrate 103 can be provided into the processing space 120 through an opening 126, which can be conventionally sealed for processing using a slit valve or a door. Substrate 103 can be placed on a surface 105 of the substrate support during processing. Substrate support 104 can be rotatable along an axis 147 where a shaft 144 of the substrate support 104 can be located, as indicated by arrow 145. Alternatively, substrate support 104 can be lifted so as to rotate as needed during the deposition process.

[0018]

[0023] The plasma profile modulator 111 can be disposed within the processing chamber 100 to control the plasma distribution across the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 can include a first electrode 108 disposed adjacent to the chamber body 102 and separable from the other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or a separate sidewall electrode. The first electrode 108 is an annular or ring-shaped member and can be a ring electrode. The first electrode 108 may be a continuous loop around the outer periphery of the processing chamber 100 surrounding the processing space 120 and may be discontinuous at selected locations if desired. Also, the first electrode 108 may be a perforated electrode such as a perforated ring or mesh electrode, or a flat electrode such as a secondary gas distributor, for example.

[0019]

[0024] One or more isolators 110a, 110b, which can be a dielectric material such as a ceramic or metal oxide, such as aluminum oxide and / or aluminum nitride, for example, can contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 can define an aperture 118 for distributing the process precursor into the processing space 120. The gas distributor 112 can be connected to a first power source 142 such as an RF generator, an RF power supply, a DC power supply, a pulsed DC power supply, a pulsed RF power supply, or any other power supply that can be connected to the processing chamber. In some embodiments, the first power source 142 can be an RF power supply.

[0020]

[0025] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. Also, the gas distributor 112 can be formed from conductive and non-conductive components. For example, while the body of the gas distributor 112 is conductive, the faceplate of the gas distributor 112 may be non-conductive. The gas distributor 112 may be powered by a first power source 142 as shown in FIG. 1, or in some embodiments, the gas distributor 112 may be coupled with ground.

[0021]

[0026] The first electrode 108 can be connected to a first tuning circuit 128 that can control the ground path of the processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be or include a variable capacitor or other circuit element. The first tuning circuit 128 can be or include one or more inductors 132. The first tuning circuit 128 can be any circuit that enables a variable or controllable impedance under plasma conditions existing in the processing space 120 during processing. In some embodiments as shown, the first tuning circuit 128 can include a first circuit leg and a second circuit leg connected in parallel between ground and the first electronic sensor 130. The first circuit leg can include a first inductor 132A. The second circuit leg can include a second inductor 132B connected in series with the first electronic controller 134. The second inductor 132B can be disposed between the first electronic controller 134 and a node that couples both the first and second circuit legs to the first electronic sensor 130. The first electronic sensor 130 is a voltage or current sensor, is connected to the first electronic controller 134, and can permit a degree of closed-loop control of the plasma conditions inside the processing space 120.

[0022]

[0027] The second electrode 122 can be connected to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104 or may be connected to the surface of the substrate support 104. The second electrode 122 can be a plate, a perforated plate, a mesh, a wire screen, or other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and can be connected to the second tuning circuit 136, for example, by a conduit 146 such as a cable having a selected resistance, such as 50 ohms, disposed within the shaft 144 of the substrate support 104. The second tuning circuit 136 can have a second electronic sensor 138 and a second electronic controller 140, where this second electronic controller 140 may be a second variable capacitor. The second electronic sensor 138 is a voltage or current sensor and is connected to the second electronic controller 140 and can provide further control over the plasma conditions within the processing space 120.

[0023]

[0028] A third electrode 124, which can be a bias electrode and / or an electrostatic chuck electrode, can be connected to the substrate support 104. The third electrode is coupled to a second power source 150 through a filter 148, where the filter 148 can be an impedance matching circuit. The second power source 150 can be DC power, pulsed DC power, RF bias power, a pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 can be RF bias power.

[0024]

[0029] The lid assembly 106 and the substrate support 104 of FIG. 1 can be used with any processing chamber for plasma or heat treatment. In operation, the processing chamber 100 can allow real-time control of plasma conditions within the processing space 120. The substrate 103 is disposed on the substrate support 104, and process gas can be flowed through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gas can exit the processing chamber 100 through the outlet 152. Power can be connected to the gas distributor 112 to establish a plasma within the processing space 120. The substrate can receive an electrical bias using a third electrode 124 in some embodiments.

[0025]

[0030] When the plasma within the processing space 120 is excited, a potential difference can be established between the plasma and the first electrode 108. Also, a potential difference can be established between the plasma and the second electrode 122. Next, the electronic controllers 134, 140 can be used to adjust the flow characteristics of the ground path represented by the two tuning circuits 128, 136. Set points can be provided to the first tuning circuit 128 and the second tuning circuit 136 to perform independent control of the deposition rate and independent control of the uniformity of the plasma density from the center to the edge. In embodiments where both electronic controllers can be variable capacitors, the electronic sensor can independently adjust the variable capacitor to maximize the deposition rate and minimize the thickness non-uniformity.

[0026]

[0031] Each of the tuning circuits 128, 136 may have a variable impedance that can be adjusted using respective electronic controllers 134, 140. When the electronic controllers 134, 140 are variable capacitors, the capacitance range of each variable capacitor, and the inductance of the first inductor 132A and the second inductor 132B can be selected to provide an impedance range. This range depends on the frequency characteristics and voltage characteristics of the plasma, and there may be a minimum value in the capacitance range of each variable capacitor. Therefore, when the capacitance of the first electronic controller 134 is minimum or maximum, the impedance of the first tuning circuit 128 becomes high, and a plasma shape with a minimum aerial or lateral coverage on the substrate support may be brought about. As the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma grows to a maximum and may effectively cover the entire working area of the substrate support 104. When the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may contract from the chamber wall and the aerial coverage of the substrate support may decrease. The second electronic controller 140 has a similar effect, and since the capacitance of the second electronic controller 140 can be changed, the aerial coverage of the plasma on the substrate support can be increased or decreased.

[0027]

[0032] The electronic sensors 130, 138 may be used to adjust respective circuits 128, 136 in a closed loop. Depending on the type of sensor used, a setpoint of current or voltage is set in each sensor, and control software that determines the adjustment to each respective electronic controller 134, 140 to minimize the deviation from the setpoint may be provided to the sensor. As a result, during processing, the plasma shape can be selected and dynamically controlled. The foregoing discussion is based on the electronic controllers 134, 140 that may be variable capacitors, but it will be understood that any electronic component with adjustable characteristics may be used to provide tuning circuits 128, 136 with adjustable impedance.

[0028]

[0033] Figure 2 shows a schematic partial cross-sectional view of a processing chamber 200 according to some embodiments of the present technology. Chamber 200 may include any features, components, or characteristics of the processing chamber 100 described above, and may illustrate additional features of the chamber, including a specific power source connected to the chamber. For example, chamber 200 may include a chamber body 205. The chamber may include a substrate support 210, which may be configured to support a substrate during semiconductor processing. The chamber may include a faceplate 215, which, together with the pedestal and the chamber body, may define a processing region above the substrate to be processed.

[0029]

[0034] Some conventional processing systems may generate plasma in the processing region by applying power to the faceplate while grounding the pedestal, or by applying source power to the pedestal and grounding the faceplate. In some systems, additional bias power may be connected to the pedestal to enhance the directivity of the plasma emissions. A separate DC power source for electrostatic chucking may be connected to the pedestal as described above for the processing chamber 100, which is understood to be operable to further bias the generated plasma in the processing chamber in addition to chucking the substrate. The present technology may differ from conventional configurations by connecting two separate plasma output sources to the showerhead and the pedestal, as illustrated. For example, a first plasma output source 220 may be connected to the showerhead, and a second plasma output source 230 may be connected to the pedestal. In some embodiments, the first plasma output source 220 may be a high-frequency plasma output source, and the second plasma output source 230 may be a low-frequency plasma output source. In some embodiments, the low-frequency plasma output source 230 may be separated from a DC power source that may be used to electrostatically couple the substrate to the pedestal.

[0030]

[0035] The low-frequency plasma output source operates at a first frequency of about 2 MHz or less, and can operate at a frequency of about 1.5 MHz or less, about 1.0 MHz or less, about 800 kHz or less, about 600 kHz or less, about 500 kHz or less, about 400 kHz or less, about 350 kHz or less, about 300 kHz or less, about 250 kHz or less, about 200 kHz or less, or less than this. The high-frequency plasma output source operates at a second frequency of about 2 MHz or more, and can operate at a frequency of about 10 MHz or more, about 13 MHz or more (such as 13.56 MHz), about 15 MHz or more, about 20 MHz or more, about 40 MHz or more, or higher than this.

[0031]

[0036] An additional aspect of the plasma source can be used to further condition the generated plasma within the processing region. For example, a chamber according to an embodiment of the present technology is used for filling high aspect ratio features, and a discreet amount of deposition can be generated to limit void formation within the filled features. Conventional chambers may have limited plasma output reduction based on the inability to generate a reproducible low-power plasma within a limited period. The present technology can be used to generate a material layer characterized by a thickness of about 10 nm or less per cycle. To achieve such limited deposition, the deposition period can be limited or the power used during deposition can be reduced. Conventional systems may not be able to reduce the plasma output to 100 W or less, and the amount of deposited material may increase. Shortening the formation period to accommodate this high power may limit the ability to generate a reproducible plasma during several cycles of deposition.

[0032]

[0037] This technique overcomes these problems by generating low-power deposition plasma. This low-power deposition plasma is characterized by an effective plasma output of about 20 W or less, and can be characterized by an effective plasma output of about 15 W or less, about 10 W or less, about 8 W or less, about 6 W or less, about 5 W or less, about 4 W or less, about 3 W or less, or less than this. To generate this low-power plasma during the deposition operation, the system operates the high-frequency plasma output at a pulse frequency of about 200 kHz or less, and can operate the plasma output at a pulse frequency of about 150 kHz or less, about 100 kHz or less, about 80 kHz or less, about 70 kHz or less, about 60 kHz or less, about 50 kHz or less, about 40 kHz or less, about 30 kHz or less, about 20 kHz or less, about 10 kHz or less, or less than this. In addition, at any of the indicated pulse frequencies, the high-frequency plasma output source can operate at a reduced duty cycle. This duty cycle is about 50% or less, and can be about 45% or less, about 40% or less, about 35% or less, about 30% or less, about 25% or less, about 20% or less, about 15% or less, about 10% or less, about 5% or less, or less than this.

[0033]

[0038] In some embodiments, as the pulse frequency and duty cycle decrease, it can become difficult to generate plasma in a consistent manner. Once the low-power plasma is generated, it can generate a slow deposition to limit the deposition per cycle, but ignition can become difficult. Therefore, in some embodiments, the plasma output can operate in a trigger sequence to facilitate plasma generation during deposition. For example, as described above, in some embodiments, the deposition operation can be performed without a low-frequency plasma output source. However, in some embodiments during the deposition operation, the low-frequency plasma output source can operate to facilitate ignition. Furthermore, the low-frequency plasma output source may not be operated, and a power spike may be applied to the high-frequency plasma output source to facilitate ignition. The power spike may be applied directly by power management or through the operation between the levels of the high-frequency plasma output source.

[0034]

[0039] The low-frequency plasma output source can also operate to control plasma formation and ion directionality during processing. By supplying the low-frequency plasma output through the pedestal, the plasma sheath formed at this output electrode provides an advantage in the directionality of ions into the feature to be densified. The low-frequency plasma output source can operate at either of the power levels or pulse frequencies described above, but in some embodiments, the second power source 230 can operate with a greater plasma output than the first power source 220 during the processing operation. For example, during operation, the plasma output supplied by the second power source is about 50 W or more, about 100 W or more, about 200 W or more, about 300 W or more, about 400 W or more, about 500 W or more, about 600 W or more, about 700 W or more, about 800 W or more, or can exceed this. By increasing the plasma output of the low-frequency power source during processing plasma formation, a greater amount of plasma emissions can be generated. By applying greater low-frequency power from the pedestal, the supply directionality perpendicular to the plane across the substrate can be increased.

[0035]

[0040] By adjusting one or more characteristics of the supplied plasma output or bias power, additional adjustments can be made to further increase the etching of the deposited material along the sidewalls of the feature. For example, in some embodiments, both the plasma output source and the bias power supply can operate in continuous wave mode. Additionally, one or both of the power supplies can operate in a pulsed mode. In some embodiments, the high-frequency source power can operate in continuous wave mode or pulsed mode, while the low-frequency power can operate in pulsed mode during processing. The pulse frequency of the low-frequency plasma output source is 1,000 Hz or less, 900 Hz or less, 800 Hz or less, 700 Hz or less, 600 Hz or less, 500 Hz or less, 400 Hz or less, 300 Hz or less, 200 Hz or less, 100 Hz or less, or can be below this. The duty cycle of the second power supply is 50% or less, and the low-frequency plasma output can operate at a duty cycle of 45% or less, 40% or less, 35% or less, 30% or less, 25% or less, 20% or less, 15% or less, 10% or less, 5% or less, or below this. By operating the low-frequency power at a reduced duty cycle such as an on-time duty of 50% or less, as the time per cycle becomes longer, more isotropic etching is performed within the feature based on the operation of the high-frequency power supply, and material can be removed better from the sidewalls during high-density operation.

[0036]

[0041] The first plasma output source 220 can be virtually connected to ground through the pedestal. For example, as shown, the first L-C filter 225 is connected to the pedestal and can virtually ground the high-frequency plasma source through the pedestal. Similarly, the second plasma output source 230 can be connected to ground through the chamber. For example, the second L-C filter can be connected to the faceplate and can sometimes virtually ground the low-frequency plasma source to the chamber body or external ground. Separating the high-frequency power supply from the low-frequency power supply can provide an improvement in plasma generation and operation.

[0037]

[0042] The processing chamber 100 and / or the processing chamber 200 can be utilized in a processing method that may include, in some embodiments of the present technology, the formation, etching, or curing of materials for semiconductor structures. It should be understood that the chambers described are not to be considered limiting, and any chamber configured to perform the operations as described can be used as well. FIG. 3 shows exemplary steps in a processing method 300 according to some embodiments of the present technology. The method can be executed in various processing chambers and on one or more mainframes or tools including the above-described processing chamber 100 or processing chamber 200. The method 300 can include a number of optional steps that may or may not be particularly relevant to some embodiments of the method according to the present technology. For example, many of the steps are described to provide a broader scope of structure formation, but are not important for the present technology or may be performed by alternative methodologies that will be readily understood.

[0038]

[0043] The method 300 may include additional steps before the start of the enumerated steps. For example, the additional processing steps may include forming a structure on a semiconductor substrate, which can include both the formation and removal of materials. For example, a transistor structure, a memory structure, or any other structure can be formed. The pre-processing steps may be performed in a chamber in which the method 300 can be executed, or the processing may be performed in one or more other processing chambers before the substrate is loaded into a semiconductor processing chamber or chamber in which the method 300 can be executed. In any case, the method 300 can optionally include supplying a semiconductor substrate to a processing region of a semiconductor processing chamber such as the above-described processing chamber 200, or a processing region of another chamber that may include the above-described components. The substrate can be a pedestal such as the substrate support 210 and can be deposited on the substrate support and placed within the processing region of the chamber such as the above-described processing space 120.

[0039]

[0044] The substrate to be processed can be or can include any number of materials used in semiconductor processing. The substrate material can be or can include silicon, germanium, a dielectric material including silicon oxide or silicon nitride, a metal material, or any number of combinations of these materials, which can be the substrate or a material formed on the structure. The features can be characterized by any shape or configuration according to the present technology. In some embodiments, the features can be or can include trench structures or apertures formed within the substrate. The features can be characterized by any shape or size, but in some embodiments, the features can be characterized by a higher aspect ratio, or the ratio of the depth of the feature to the width across the feature. For example, in some embodiments, the features can be characterized by an aspect ratio of about 5:1 or greater, about 10:1 or greater, about 15:1 or greater, about 20:1 or greater, about 25:1 or greater, about 30:1 or greater, about 40:1 or greater, about 50:1, or an aspect ratio greater than this. Further, the features can be characterized by a narrow width or diameter across the feature, including between two sidewalls, such as a dimension of about 20 nm or less, about 15 nm or less, about 12 nm or less, about 10 nm or less, about 9 nm or less, about 8 nm or less, about 7 nm or less, about 6 nm or less, about 5 nm or less, or a width across the feature less than this.

[0040]

[0045] In some embodiments, method 300 may include optional processing steps, such as a pre-treatment, that may be performed to prepare the surface of the substrate for deposition. Once prepared, method 300 may include supplying one or more precursors to a processing region of a semiconductor processing chamber that houses the structure. The precursors may include one or more silicon-containing precursors, as well as a carrier gas such as one or more diluents or inert gases supplied with the silicon-containing precursor. Although the method is described in connection with the manufacture of a flowable silicon film, it will be understood that the described method and / or chamber may be used for the manufacture of any number of materials according to embodiments of the present technology. In step 305, a plasma may be formed from a deposition precursor that includes a silicon-containing precursor. The plasma is formed within the processing region, thereby enabling the deposition material to be deposited onto the substrate. For example, in some embodiments, a capacitively coupled plasma may be formed within the processing region by applying a plasma output to the faceplate as described above. For example, a radio frequency power source as described above may operate at a reduced effective plasma output to deposit material within features on the substrate.

[0041]

[0046] The silicon-containing material may be deposited onto the substrate in step 310 from the plasma effluent of the silicon-containing precursor. The material may, in some embodiments, be a flowable silicon-containing material, which may or may not include amorphous silicon. The deposited material may at least partially flow into features on the substrate to provide bottom-up type gap filling. The deposited material may flow into the bottom of the feature, although as shown, some amount of material may remain on the sidewalls of the substrate. The amount deposited may be relatively small, although the material remaining on the sidewalls may potentially limit subsequent flow.

[0042]

[0047] The power applied during deposition is a lower-power plasma, which limits dissociation and allows the amount of hydrogen incorporated in the deposited material to be maintained. This incorporated hydrogen can contribute to the fluidity of the deposited material. Thus, in some embodiments, the plasma output source supplies a plasma output of about 100 W or less to the faceplate, and can supply a plasma output of about 90 W or less, about 80 W or less, about 70 W or less, about 60 W or less, about 50 W or less, or less than this. This power is further attenuated by operating the high-frequency power source at a pulse frequency and duty cycle, as described above, thereby generating an effective power of about 10 W or less, and can generate an effective power of about 5 W or less, as described above.

[0043]

[0048] Following the amount of deposition, in some embodiments of the present technology, a process or curing process configured to densify the formed material is formed, which can beneficially clean or etch again the material on the sidewalls of the feature. This process is performed in the same chamber as the deposition and can be executed in a periodic process to fill the feature. In some embodiments, the silicon-containing precursor flow can be stopped and the processing region purged. After purging, the processing precursor can flow into the processing region of the processing chamber. The processing precursor can be or can include hydrogen, helium, argon, or another inert substance that does not chemically react with the film. A processing plasma is formed in step 315, which can also be a capacitively coupled plasma formed within the processing region. The formed deposition plasma is formed by applying a high-frequency plasma output to the faceplate or showerhead, and in some embodiments, may not include another power source to be engaged. The processing can utilize both a high-frequency power source and a low-frequency power source connected to the plate support, as described above. During operation, the high-frequency power source operates at a first power level and the low-frequency power source operates at a second power level, and in embodiments of the present technology, the two power levels may be similar or different.

[0044]

[0049] The high-frequency power supply operates with pulsed and low-effect power during deposition plasma, but operates in a continuous-wave configuration during processing, which can be any of the plasma outputs described above. The low-frequency power supply may operate in pulse mode during processing, which can be in operation at any of the pulse frequencies and / or duty cycles as described above.

[0045]

[0050] During the deposition operation, the low-frequency power supply may not be operated. As described above, in order to enable reproducible plasma generation with low power, a trigger sequence can be utilized to ensure plasma generation during each deposition operation. The trigger sequence includes a first period and a second period, which can together form a deposition period. In order to limit deposition in some embodiments, the deposition period is about 30 seconds or less, about 20 seconds or less, about 15 seconds or less, about 10 seconds or less, about 8 seconds or less, about 6 seconds or less, about 5 seconds or less, about 4 seconds or less, or less than this. The first period is less than the second period, and the first period can be used to ensure plasma generation while limiting the impact on the deposition process. Thus, in some embodiments, the first period is about 2 seconds or less, about 1 second or less, about 0.5 seconds or less, about 0.4 seconds or less, about 0.3 seconds or less, about 0.2 seconds or less, about 0.1 seconds or less, about 0.09 seconds or less, about 0.08 seconds or less, about 0.07 seconds or less, about 0.06 seconds or less, about 0.05 seconds or less, or less than this.

[0046]

[0051] In some embodiments, the first power is applied by a high-frequency power source during a first period, and this first power may be higher than a second power applied by the high-frequency power source during a second period. For example, during the first period, the first power may be about 50 W or more, about 80 W or more, about 100 W or more, about 120 W or more, about 140 W or more, about 160 W or more, about 180 W or more, about 200 W or more, or higher. Thereafter, the high-frequency power source may apply power at any of the above-described effective powers for the remainder of the deposition time during the second period. Further, the high-frequency power source may operate consistently during the deposition time, but during the first period, the low-frequency power source may be applied at any of the above-described power levels to ensure ignition. In another example, the high-frequency power source may operate in a multi-level pulse generation configuration during the first period before switching to the desired effective power during the second period. The multi-level pulse generation may include several pulses, each of which is less than 0.1 second (e.g., about 50 microseconds or less, about 40 microseconds or less, about 30 microseconds or less, about 20 microseconds or less, or less), and all occur during the first period. The pulses may include a high initial pulse for a first fraction of the pulse, and then a low second pulse for a second fraction of the pulse. The two parts of the pulse may occur at any of the above-described power levels.

[0047]

[0052] During the processing step, the plasma emission may optionally at least partially etch the flowable film in step 320 and remove the flowable film from the sidewalls of the trench. Simultaneously or additionally, the more directionally supplied plasma emission may penetrate the remaining film formed at the bottom of the feature and reduce the incorporation of hydrogen for densifying the film in step 325.

[0048]

[0053] The deposition can be formed to be several nanometers or more, but by performing the etching process as described above, the thickness of the densified material is controlled to be about 100 Å or less, about 90 Å or less, about 80 Å or less, about 70 Å or less, about 60 Å or less, about 50 Å or less, about 40 Å or less, about 30 Å or less, about 20 Å or less, about 10 Å or less, or less than this. By controlling the thickness of the deposited material, the conversion across the entire thickness can be more easily performed, and the permeability problems common to conventional processes can be solved. Thereafter, the process can be completely repeated any number of cycles to continue generating the densified material across the feature.

[0049]

[0054] Regarding the deposition precursor used during any of the forming steps, any number of precursors can be used in this technology. The silicon-containing precursors that can be used during that time include silane (SiH4), disilane (Si2H6), or other organic silanes including cyclohexasilane, silicon tetrafluoride (SiF4), silicon tetrachloride (SiCl4), dichlorosilane (SiH2Cl2), tetraethyl orthosilicate (TEOS), and any other silicon-containing precursors that can be used in silicon-containing film formation, but are not limited thereto. The silicon-containing material can be nitrogen-free, oxygen-free, and / or carbon-free in some embodiments. In any step, one or more additional precursors can be included, such as an inert precursor that can include other materials such as Ar, diatomic hydrogen, He, or nitrogen, ammonia, or other precursors.

[0050]

[0055] Temperature and pressure can also affect the processes of the present technology. For example, in some embodiments for promoting the flow of the film, the process is carried out at a temperature of about 20 °C or lower, and can be carried out at a temperature of about 10 °C or lower, about 0 °C or lower, about -10 °C or lower, about -20 °C or lower, about -30 °C or lower, or below this. The temperature can be maintained within any of these ranges throughout the method including during processing and densification. The pressure within the chamber is similarly maintained relatively low (such as a chamber pressure of about 10 Torr or lower) for any of the processes, and the pressure can be maintained at about 8 Torr or lower, about 6 Torr or lower, about 5 Torr or lower, about 4 Torr or lower, about 3 Torr or lower, about 2 Torr or lower, about 1 Torr or lower, or below this. Further, in some embodiments, the pressure can be maintained at different levels during deposition and processing. For example, the pressure is maintained at about 1 Torr or higher, such as about 2 Torr or higher, about 3 Torr or higher, or higher during deposition, and the pressure is maintained at about 1 Torr or lower, such as about 0.8 Torr or lower, about 0.5 Torr or lower, about 0.1 Torr or lower, or below this during processing. By carrying out the process according to some embodiments of the present technology, improved filling of narrow features using silicon-containing materials or other flowable materials can be produced.

[0051]

[0056] When the pressure is maintained relatively low during processing, ensuring plasma discharge within the processing region can be a challenge. For example, FIG. 4 shows exemplary Paschen curves for plasma generation for various gases in the processing region of a chamber according to some embodiments of the present technology. Location B can exemplify the effective pressure-gap length product within the processing region such as during the processing step. Location A can exemplify the effective pressure-gap length product upstream of the processing region during the processing step, such as within the gas box inlet, within the output manifold, within the discharge tube from the remote plasma source unit, etc. In some chamber configurations, many of these components are electrically connected, and thus, in the case of a charged showerhead, the gas box can also be charged and plasma of the supplied precursor can be generated.

[0052]

[0057] As described above, several precursors can be used during the processing step and the deposition step. Considering the processing step, the precursor can include argon, helium, hydrogen, or any number of other gases that can be used to process the film formed as described above. As shown, line 403 represents the Paschen curve of argon, indicating that during processing, plasma generation can preferentially occur within the processing region when a lower voltage may be required to collide with the plasma. However, line 405 exemplifies helium, and as shown, the voltage required to generate plasma can be higher at position B (indicated at position 410) than the voltage required to generate plasma at position A (indicated at position 415). Hydrogen is exemplified by line 417 and can collide with the plasma at position A more favorably than other gases. The formation of these parasitic plasmas can reduce or prevent generation in the processing region. When such a situation occurs, once colliding with the plasma, the voltage drops for the plasma matching network to maintain the plasma, and thus the plasma may not collide at all in the processing region. Due to the distance across the chamber, radical recombination and loss may occur, and in each processing step, the processing may not be fully carried out, and in some steps of the process, no processing may be carried out at all.

[0053]

[0058] To overcome these problems, the present technology may employ one or more modifications to the chamber components, thereby shifting the operating position along the Paschen curve further to the right to ensure that plasma generation within the processing region becomes better. Further, the present technology includes chamber components that can limit or remove the electric field in the region of the chamber, thereby also forming a setup favorable for discharge in the processing region during the processing step to prevent the plasma from colliding.

[0054]

[0059] FIG. 5 shows a schematic cross-sectional view of an exemplary processing system 500 according to some embodiments of the present technology. The processing system 500 can include any of the features, components, or characteristics of any of the systems or chambers described above, including the aforementioned chamber 100 or chamber 200. For example, the system 500 can include the high-frequency plasma source and the low-frequency plasma source described above, as well as any of the aforementioned filters or other components or characteristics. The processing system 500 can also show further details of any of those chambers, which can be included to facilitate plasma generation within the processing region of the chamber. As shown, the processing system 500 includes a processing chamber 505, which can include a faceplate 507 as part of a component lid stack. The chamber 505 can also include a pedestal 510, which can extend within an internal volume defined by the chamber and be configured to support a substrate within the chamber. The faceplate 507 and the pedestal 510, together with the chamber body 515, define a processing region 520 as described above, within which plasma can be formed for deposition, processing, or any other process, etc.

[0055]

[0060] The processing chamber 505 includes additional components, any of which may be included in some embodiments of the present technology. For example, a gas box 509 may be placed to overlap the faceplate, and this gas box 509 may operate at least partially as a lid of the chamber and provide fluid access to the chamber. A remote plasma source unit 525 may be included in the system, which may enable remote generation of plasma species in some embodiments for cleaning processes or other remote plasma generation processes. There may be a discharge tube 530 between the gas box and the remote plasma unit, and this discharge tube 530 may extend from the remote plasma unit to supply plasma emissions to the processing chamber. The discharge tube may define a central aperture 532 that extends through the discharge tube. The output manifold 535 may be positioned between the discharge tube 530 and the gas box 509. The output manifold 535 may also define a central aperture 537. This central aperture 537 is axially aligned with the central channel of the discharge tube, extends to an opening defined in the gas box, and may provide fluid access to the processing chamber. The output manifold may define one or more additional bypass channels 540 that are fluidly separated from the central aperture. The bypass channels 540 may provide access to one or more process precursors or other process gases, including any of the gases or fluids described above.

[0056]

[0061] As shown, the faceplate 507 is connected to the illustrated power supply, operates as a plasma generation electrode within the chamber, and may generate capacitively coupled plasma in the processing region 520 with respect to the grounded pedestal or chamber body. Since some of the other lid stack components may be in contact with the faceplate, they may also be connected to the power supply, and thus, for example, the gas box 509 may also operate as part of a hot electrode in some embodiments. The remote plasma source unit 525 may also be maintained at electrical ground as shown.

[0057]

[0062] In many prior arts, the discharge tube 530 is made of a dielectric material and can limit the short circuit from the gas box to the remote plasma source unit. However, this may enable plasma to ignite in the discharge tube or the output manifold based on the electric field formed through the discharge tube between components with respect to the processing area, based on the above-mentioned pressure-gap length. In some embodiments of the present technology, the discharge tube can be formed of a metal or a conductive material. The thickness of the discharge tube is greater than the skin depth of the RF outer plate, and the RF field may not penetrate the discharge tube. Therefore, by using a metal or conductive discharge tube, the electric field is removed, and parasitic plasma may not be generated in the discharge tube. However, by incorporating a metal or conductive discharge tube, a grounding path from the charged lid stack to the grounded remote plasma source unit can be provided. Therefore, in some embodiments of the present technology, the discharge tube is incorporated and configured to be characterized by an inductance greater than the inductance in the processing area, which can thus limit the current transmitted to the grounded remote plasma source unit. In this way, sufficient current may flow to the processing area plasma, and the system can ensure that each processing step forms plasma in the processing area without forming parasitic plasma upstream of the faceplate.

[0058]

[0063] FIG. 6 shows a schematic cross-sectional view of the components of an exemplary processing system 500 according to some embodiments of the present technology, and may show additional details of the discharge tube and the output manifold as described above. The components of system 500 may be included in any of the previously described chambers or systems, and it will be understood that system 500 may similarly include any of the above features, components, or aspects. As shown, system 500 may include a remote plasma source unit 525, a discharge tube 530 that may define a central aperture 532, and an output manifold 535 that may define a central aperture 537 that may be axially aligned with the central aperture of the discharge tube. Output manifold 535 may also define one or more bypass channels 540 through the components. The system may also include a facility plate or mounting plate 605 on which the discharge tube may be placed. Manifold adapter 610 may be placed within a recess formed within output manifold 535 and may provide a receiving portion that passes through mounting plate 605 for receiving cylindrical protrusion 615 of discharge tube 530, as will be further described below.

[0059]

[0064] As described above, by using a conductive discharge tube, the electric field for colliding with parasitic plasma can be restricted or eliminated. However, if it does not decay, the tube can provide a path to ground for the plasma generation electrode. Thus, in some embodiments, the discharge tube 530 can include a ferrite 620 extending into the discharge tube. The ferrite can increase the inductance across the discharge tube and restrict the flow of current to a grounded remote plasma source unit. The ferrite 620 can be included as a rod of ferrite extending into the discharge tube, a block of ferrite placed within the discharge tube, or any other arbitrary shape and dimension of ferrite that can be included. For example, as illustrated, the discharge tube 530 can define an internal space 625 formed within the tube. As illustrated, the remote plasma source unit 525 is placed at a first end of the discharge tube, and the internal space can be formed to extend from a second end of the discharge tube placed on a mounting plate. The annular space extends partially through the discharge tube and can extend any distance. In some embodiments, as illustrated, the internal space is annular and can extend around a cylindrical protrusion 615. The cylindrical protrusion 615 can define a central aperture 532. As illustrated, in some embodiments, the cylindrical protrusion 615 extends through a second end of the discharge tube 530, at least partially through the mounting plate 605, and into a receptacle formed by the manifold adapter 610. Thereby, the connection along the channel from the remote plasma source unit is improved, and the flow of radical species through the gaps between components can be restricted.

[0060]

[0065] Ferrite 620 is disposed within internal space 625 and can extend around protrusion 615 and central aperture 532. The ferrite may be an annular block or, as illustrated, a ring of ferrite. Only one ring may be included, but in some embodiments, several ferrite rings may be included within the internal space and may be stacked within the space. Insulator 630 can be positioned between ferrite 620 and the second end of the discharge tube, as illustrated. Any amount of ferrite may be included in discharge tube 530, but in some embodiments, the amount of ferrite included can be such that the inductance along the discharge tube is high enough compared to the entire processing region to limit the flow of current to the grounded remote plasma source unit. For example, the current across the electrical path is a function of the inductance, and thus, the higher the inductance along the discharge tube, the less the generated current flow can be.

[0061]

[0066] The inductance across the processing region is about 20 Ω or less, about 15 Ω or less, about 12 Ω or less, about 10 Ω or less, about 8 Ω or less, about 6 Ω or less, or can be below this. To ensure limited current loss across the discharge tube, the amount of ferrite included is sufficient to generate an inductance across the discharge tube of about 50 Ω or more, about 60 Ω or more, about 70 Ω or more, about 80 Ω, about 90 Ω or more, about 100 Ω or more, about 110 Ω or more, about 120 Ω or more, about 130 Ω or more, about 140 Ω or more, about 150 Ω or more, about 160 Ω or more, about 170 Ω or more, about 180 Ω or more, about 190 Ω or more, about 200 Ω or more, or can be sufficient to generate an inductance above this. As a result, the inductance across the discharge tube can be about 2 times or more, about 5 times or more, about 8 times or more, about 10 times or more, about 12 times or more, about 15 times or more, about 20 times or more, or more than this of the inductance across the processing region. Thereby, while the current loss across the discharge tube is reliably limited, due to the finite inductance, plasma generation within the processing region of the chamber can be made possible.

[0062]

[0067] In some embodiments, an additional external capacitor 635 may be included around the ferrite 620 of the discharge tube 530. By including the external capacitor 635, a parallel resonance circuit is formed, which can further increase the impedance across the components during resonance. This can also further reduce the impact on tuning and the loss to the RF match without reducing the loss of the ferrite. By including any of these components, the parasitic capacitance through the discharge tube can be reduced or eliminated.

[0063]

[0068] Since the bypass channel 540 may be included between the gas box and the discharge tube, the effect caused by the ferrite may have a limited impact on the opportunity for a parasitic plasma to form across the inlet of the bypass channel 540 of the output manifold. As described above, instead of removing the electric field using a conductive discharge tube or the like, the operating position along the Paschen curve can be adjusted by changing the product of the pressure-gap length. For example, in some embodiments, an orifice 640 or an orifice plate may be included to generate an increased pressure at the inlet of the output manifold bypass channel. The orifice can limit the inlet diameter to about 5.0 mm or less, and can limit the inlet diameter to about 4.5 mm or less, about 4.0 mm or less, about 3.5 mm or less, about 3.0 mm or less, about 2.5 mm or less, about 2.0 mm or less, about 1.5 mm or less, about 1.0 mm or less, or less than this. Thereby, a pressure delta across the orifice of about 2 Torr or more is generated, and a pressure delta across the orifice of about 3 Torr or more, about 4 Torr or more, about 5 Torr or more, about 6 Torr or more, about 7 Torr or more, about 8 Torr or more, about 9 Torr or more, about 10 Torr or more, about 12 Torr or more, about 15 Torr or more, about 20 Torr or more, or more than this can be generated. By increasing the product of the pressure-gap length through the outlet manifold, the voltage for colliding with the parasitic plasma can be increased to an amount greater than the voltage for colliding with the plasma in the processing region. As a result, by incorporating the components and features according to the embodiments of the present technology, plasma generation can be maintained within the processing region during each process, and the processing and the uniformity of the processing according to the embodiments of the present technology can be improved.

[0064]

[0069] In the above description, for purposes of explanation, numerous details have been presented in order to facilitate understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that some of these details may be absent or additional details may be present and still enable the implementation of a particular embodiment.

[0065]

[0070] Although several embodiments have been disclosed, it will be recognized by those skilled in the art that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Further, some well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present technology. Accordingly, the above description should not be construed as limiting the scope of the present technology. Additionally, although a method or process may be described sequentially or stepwise, it should be understood that the operations may be performed simultaneously or in an order different from that recited.

[0066]

[0071] Where a range of values is given, each intervening value between the upper and lower limits of that range is specifically disclosed as being understood to be included down to the smallest unit of the lower limit's unit, unless the context clearly dictates otherwise. Any narrower range between any of the recited values or intervening values of the recited range, and any other recited value or intervening value of that recited range, is also included. The upper and lower limits of such narrower ranges may be individually included in or excluded from the range. Each range where either, neither, or both of the limiting values are included in the narrower range, is also included in the present technology, subject to any specifically excluded limiting values within the recited range. Where the recited range includes one or both of the limiting values, ranges excluding either or both of those included limiting values are also included.

[0067]

[0072] As used in this specification and the claims, the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, when reference is made to "a precursor", a plurality of such precursors is included, and when reference is made to "a channel", reference is included to one or more channels and equivalents well known to those skilled in the art, and the same is true for other forms.

[0068]

[0073] Also, the terms "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including", as used in this specification and the claims, are intended to specify the presence of the stated feature, integer, component, or operation, but do not preclude the presence or addition of one or more other features, integers, components, operations, activities, or groups.

Claims

1. A chamber body, A pedestal configured to support a semiconductor substrate, A faceplate, wherein the chamber body, the pedestal, and the faceplate define a processing region, and the faceplate is connected to an RF power source, A remote plasma unit connected by electrical grounding, A discharge tube extending from the remote plasma unit toward the faceplate, the discharge tube defining a central aperture and an annular space within the discharge tube and around the central aperture, the discharge tube having a first end closer to the remote plasma unit and a second end closer to the faceplate, and being electrically connected to each of the remote plasma unit and the faceplate, the discharge tube comprising a ferrite disposed within the annular space and extending around the central aperture, An insulator disposed within the annular space and positioned between the ferrite and the second end of the discharge tube A semiconductor processing system comprising the same.

2. The semiconductor processing system according to claim 1, wherein the discharge tube is conductive, and the ferrite generates an inductance of about 50 Ω or more along the discharge tube.

3. The semiconductor processing system according to claim 1, wherein the ferrite comprises at least one ferrite ring extending around the central aperture of the discharge tube.

4. The semiconductor processing system according to claim 1, further comprising a capacitor electrically connected to the discharge tube across the ferrite.

5. An output manifold disposed between the discharge tube and the faceplate, the output manifold defining a central aperture aligned with the central aperture of the discharge tube, and the output manifold defining one or more bypass channels passing through the output manifold and fluidly separated from the central aperture, the semiconductor processing system according to claim 1 further comprising the output manifold.

6. The semiconductor processing system according to claim 5, wherein an inlet to each of the one or more bypass channels defined by the output manifold includes an orifice sized to increase a pressure delta at the inlet by about 5 Torr or more.

7. The RF power supply is a high-frequency plasma source connected to the front panel, and the system further includes a low-frequency plasma source connected to the pedestal. The semiconductor processing system according to claim 1.

8. The pedestal includes an electrostatic chuck, and the semiconductor processing system further includes a DC power supply connected to the pedestal. The semiconductor processing system according to claim 7.

9. The low-frequency plasma source is configured to operate at about 2 MHz or less. The semiconductor processing system according to claim 7.

10. The high-frequency plasma source is configured to operate at about 13.56 MHz or more at a pulse frequency of about 200 kHz or less. The semiconductor processing system according to claim 7.

11. The high-frequency plasma source is configured to operate at a pulse frequency of about 20 kHz or less at a duty cycle of about 20% or less. The semiconductor processing system according to claim 10.

12. The high-frequency plasma source is configured to generate plasma with an effective power of about 5 W or less. The semiconductor processing system according to claim 11.

13. The semiconductor processing system according to claim 7 further includes a first L-C filter configured to be connected to the pedestal and virtually ground the high-frequency plasma source through the pedestal.

14. The semiconductor processing system according to claim 13 further includes a second L-C filter configured to be connected to the front panel and virtually ground the low-frequency plasma source to the chamber body.

Images