Multilayer ceramic electronic components
By adjusting the lead-to-body width ratio in multilayer ceramic capacitors to 0.3≦w2/w1≦0.5, the capacitors achieve low ESL and enhanced reliability, addressing moisture resistance issues and enabling reduced mounting area.
Patent Information
- Application Number
- JP2020103174
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-06-26
- Filing Date
- 2020-06-15
- Publication Date
- 2025-08-13
- Estimated Expiration
- 2040-06-15
AI Technical Summary
Thin multilayer ceramic capacitors face challenges in maintaining reliability, particularly moisture resistance, while also experiencing increased equivalent series resistance (ESR) and equivalent series inductance (ESL) due to reduced lead portion widths to enhance moisture resistance.
Adjusting the ratio (w2/w1) of the lead width (w2) to the body width (w1) of internal electrodes to 0.3≦w2/w1≦0.5, ensuring optimal electrical characteristics and reliability, thereby reducing ESR and ESL.
Achieves low ESL and improved reliability, allowing two conventional capacitors to be replaced by one, thus reducing mounting area and maintaining reliability even in thin designs.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a multilayer ceramic electronic component, and more particularly to a multilayer ceramic electronic component with excellent reliability. [Background technology]
[0002] In recent years, with the increasing mounting density of circuit boards, there is an increasing need to reduce the mounting area of multilayer ceramic capacitors. In addition, there is an increasing demand for products in which the thickness of multilayer ceramic capacitors is reduced to embed them in the circuit board or mounted as an LSC type at the bottom of APs.
[0003] In the above cases, the mounting area is not only reduced, but the ESL generated within the board is also significantly reduced, which is why demand for thin multilayer ceramic capacitor products is increasing.
[0004] Thin multilayer ceramic capacitors have the problem of low reliability in terms of moisture resistance.
[0005] In the past, to prevent such a decrease in moisture resistance reliability, a pattern was applied in which the width of the lead portion, which is the area where the internal electrode is exposed to the outside of the ceramic body, was made smaller than the width of the body portion, which contributes to the formation of capacitance.
[0006] However, if the width of the lead portion, which is the area where the internal electrode is exposed to the outside of the ceramic body, is made smaller than the width of the body portion, which contributes to the formation of capacitance, in order to prevent a decrease in moisture resistance reliability, this has the side effect of increasing the equivalent series resistance (ESR) and equivalent series inductance (ESL).
[0007] Therefore, in order to ensure low equivalent series resistance (ESR) and equivalent series inductance (ESL) characteristics and also improve reliability, it is necessary to determine the ratio of the width of the lead portion to the width of the body portion, which contributes to the formation of capacitance, in the first and second internal electrodes. [Prior art documents] [Patent documents]
[0008] [Patent Document 1] Korean Patent Publication No. 2014-0085097 Summary of the Invention [Problem to be solved by the invention]
[0009] The present invention relates to a multilayer ceramic electronic component, and more particularly to a multilayer ceramic electronic component with excellent reliability. [Means for solving the problem]
[0010] One embodiment of the present invention is a multilayer ceramic electronic component including a ceramic body including a dielectric layer, and a first internal electrode and a second internal electrode arranged to face each other with the dielectric layer sandwiched therebetween, the ceramic body having a first surface and a second surface facing each other, a third surface and a fourth surface connected to the first surface and the second surface and facing each other, and a fifth surface and a sixth surface connected to the first to fourth surfaces and facing each other; and a first external electrode arranged on the outside of the ceramic body and electrically connected to the first internal electrode and a second external electrode electrically connected to the second internal electrode, the ceramic bodies being arranged to face each other with the dielectric layer sandwiched therebetween. the first internal electrode includes a main body portion that contributes to the formation of the capacitance and a lead portion that has a width smaller than that of the main body portion and one end of which is exposed on the sixth surface; the second internal electrode includes a main body portion that contributes to the formation of the capacitance and a lead portion that has a width smaller than that of the main body portion and one end of which is exposed on the sixth surface; and a ratio (w2 / w1) of a width (w1) of the lead portion to a width (w2) of the main body portion of the first and second internal electrodes satisfies 0.3≦w2 / w1≦0.5. [Effects of the Invention]
[0011] According to one embodiment of the present invention, by adjusting the ratio (A / B) of the lead width (A) to the body width (B) that contributes to the formation of capacitance in the first and second internal electrodes, it is possible to replace two or more chips with one chip, achieve low equivalent series inductance (ESL), and obtain a multilayer ceramic electronic component with excellent reliability. [Brief explanation of the drawings]
[0012] [Figure 1] 1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment of the present invention; [Figure 2]1 is a schematic diagram illustrating a ceramic body according to an embodiment of the present invention. [Figure 3] FIG. 3 is an exploded perspective view of FIG. 2. [Figure 4] FIG. 2 is a schematic plan view showing one first internal electrode and one second internal electrode stacked. [Figure 5] 2 is a cross-sectional view taken along II' of FIG. 1 according to one embodiment of the present invention. [Figure 6] FIG. 2 is a top plan view seen from direction B in FIG. DETAILED DESCRIPTION OF THE INVENTION
[0013] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, the embodiments of the present invention are provided to more completely explain the present invention to those having average knowledge in the art. Therefore, the shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.
[0014] Furthermore, throughout the specification, unless specifically stated to the contrary, "comprising" a certain element means that it may further include other elements, rather than excluding other elements.
[0015] In order to clearly explain the present invention, parts not relevant to the explanation are omitted in the drawings, thicknesses are enlarged to clearly show various layers and regions, and components having the same function within the same concept are described using the same reference symbols.
[0016] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
[0017] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to one embodiment of the present invention.
[0018] FIG. 2 is a schematic diagram showing a ceramic body according to one embodiment of the present invention.
[0019] FIG. 3 is an exploded perspective view of FIG.
[0020] FIG. 4 is a schematic plan view showing one first internal electrode and one second internal electrode stacked.
[0021] 1 to 4, a multilayer ceramic electronic component according to an embodiment of the present invention includes a ceramic body 110 including a dielectric layer 111, and a first internal electrode 121 and a second internal electrode 122 disposed to face each other with the dielectric layer 111 sandwiched therebetween, the ceramic body having first and second surfaces S1 and S2 facing each other, third and fourth surfaces S3 and S4 connected to the first and second surfaces S1 and S2 and facing each other, and fifth and sixth surfaces S5 and S6 connected to the first to fourth surfaces S1 to S2 and facing each other; a first external electrode 131 disposed outside a ceramic body 110 and electrically connected to the first internal electrode 121, and a second external electrode 132 electrically connected to the second internal electrode 122, wherein the ceramic body 110 includes the first internal electrode 121 and the second internal electrode 122 disposed opposite each other with the dielectric layer 111 interposed therebetween, and includes an active portion A in which capacitance is formed, and cover portions C1 and C2 formed on the upper and lower parts of the active portion A.
[0022] In the following description of a multilayer ceramic electronic component according to an embodiment of the present invention, a multilayer ceramic capacitor will be particularly taken as an example, but the present invention is not limited thereto.
[0023] In the multilayer ceramic capacitor according to one embodiment of the present invention, the "length direction" is defined as the "L" direction in Fig. 1, the "width direction" is defined as the "W" direction, and the "thickness direction" is defined as the "T" direction. Here, the "thickness direction" can be used in the same concept as the direction in which the dielectric layers are stacked, i.e., the "stacking direction."
[0024] In one embodiment of the present invention, the shape of the ceramic body 110 is not particularly limited, but may be a hexahedron as shown in the drawing.
[0025] The ceramic body 110 may have a first surface S1 and a second surface S2 facing each other, a third surface S3 and a fourth surface S4 connecting the first surface S1 and the second surface S2, and a fifth surface S5 and a sixth surface S6 connected to the first to fourth surfaces S1 to S2 and facing each other.
[0026] The first surface S1 and the second surface S2 can be defined as surfaces facing each other in the thickness direction of the ceramic body 110, the third surface S3 and the fourth surface S4 can be defined as surfaces facing each other in the length direction, and the fifth surface S5 and the sixth surface S6 can be defined as surfaces facing each other in the width direction.
[0027] The shape of the ceramic body 110 is not particularly limited, but may be a rectangular parallelepiped shape as shown in the drawing.
[0028] The plurality of internal electrodes 121 and 122 formed inside the ceramic body 110 have one end exposed to the fifth surface S5 or the sixth surface S6 of the ceramic body.
[0029] The internal electrodes 121 and 122 may be a pair of a first internal electrode 121 and a second internal electrode 122 having different polarities.
[0030] One end of the first internal electrode 121 may be exposed to the fifth surface S5, and one end of the second internal electrode 122 may be exposed to the sixth surface S6.
[0031] The other end of the first internal electrode 121 is formed at a predetermined distance from the sixth surface S6.
[0032] The other end of the second internal electrode 122 is spaced apart from the fifth surface S5, as will be described in more detail later.
[0033] A first external electrode 131 may be formed on a fifth surface S5 of the ceramic body and may be electrically connected to the first internal electrode 121. A second external electrode 132 may be formed on a sixth surface S6 of the ceramic body and may be electrically connected to the second internal electrode 122.
[0034] The first internal electrode 121 and the second internal electrode 122 may have a thickness of 0.4 μm or less.
[0035] According to one embodiment of the present invention, the raw material for forming the dielectric layer 111 is not particularly limited as long as it can obtain a sufficient capacitance, and may be, for example, barium titanate (BaTiO3) powder.
[0036] The material forming the dielectric layer 111 may be a powder of barium titanate (BaTiO3) or the like, to which various ceramic additives, organic solvents, plasticizers, binders, dispersants, etc. may be added depending on the purpose of the present invention.
[0037] The ceramic body 110 may be composed of an active portion A that contributes to forming the capacitance of the capacitor, and an upper cover portion C1 and a lower cover portion C2 that are formed above and below the active portion A, respectively, as upper margin portions.
[0038] The active portion A can be formed by repeatedly stacking a plurality of first and second internal electrodes 121 and 122 with a dielectric layer 111 sandwiched therebetween.
[0039] The upper and lower cover portions C1, C2 may have the same material and structure as the dielectric layer 111, except that they do not include internal electrodes.
[0040] That is, the upper and lower cover parts C1 and C2 may include a ceramic material, for example, a barium titanate (BaTiO3) based ceramic material.
[0041] The upper cover part C1 and the lower cover part C2 may be formed by stacking a single dielectric layer or two or more dielectric layers in the vertical direction on the upper and lower surfaces of the active part A, respectively, and basically serve to prevent damage to the internal electrodes due to physical or chemical stress.
[0042] The material for forming the first and second internal electrodes 121, 122 is not particularly limited, and may be formed using a conductive paste containing one or more of silver (Ag), lead (Pb), platinum (Pt), nickel (Ni), and copper (Cu), for example.
[0043] The multilayer ceramic capacitor according to an embodiment of the present invention may include a first external electrode 131 electrically connected to the first internal electrode 121 and a second external electrode 132 electrically connected to the second internal electrode 122.
[0044] The first and second external electrodes 131 and 132 may be electrically connected to the first and second internal electrodes 121 and 122 to form capacitance, and the second external electrode 132 may be connected to a different potential than the first external electrode 131.
[0045] The first and second internal electrodes 121 and 122 are arranged to face each other with the dielectric layer 111 interposed therebetween, and may be alternately exposed to a fifth surface S5 or a sixth surface S6 in the width direction of the ceramic body 110.
[0046] The first internal electrode and the second internal electrode 121, 122 are alternately exposed on the fifth surface S5 or the sixth surface S6 in the width direction of the ceramic body 110, thereby realizing a RGC (Reverse Geometry Capacitor) or a LICC (Low Inductance Chip Capacitor).
[0047] That is, the length of the ceramic body 110 is the distance between the third surface S3 and the fourth surface S4, the width of the ceramic body 110 is the distance between the fifth surface S5 and the sixth surface S6, and the first internal electrode 121 and the second internal electrode 122 are alternately exposed to the fifth surface S5 and the sixth surface S6.
[0048] In a typical multilayer ceramic electronic component, external electrodes may be disposed on end surfaces of a ceramic body that face each other in the longitudinal direction.
[0049] In this case, when an AC current is applied to the external electrodes, a larger current loop may be formed due to the longer current path, which may increase the magnitude of the induced magnetic field and the inductance.
[0050] To solve the above problem, according to one embodiment of the present invention, first and second external electrodes 131, 132 may be arranged on fifth and sixth surfaces S5, S6, respectively, facing each other in the width direction of the ceramic body 110, in order to reduce the current path.
[0051] In this case, the current path is shortened because the gap between the first and second external electrodes 131 and 132 is small, which reduces the number of current loops and reduces inductance.
[0052] 3 and 4, in the multilayer ceramic capacitor according to an embodiment of the present invention, the first internal electrode 121 includes a body portion 121a that contributes to the formation of capacitance and a lead portion 121b that has a width smaller than that of the body portion 121a and one end exposed to the fifth surface S5. The second internal electrode 122 includes a body portion 122a that contributes to the formation of capacitance and a lead portion 122b that has a width smaller than that of the body portion 122a and one end exposed to the sixth surface S6. In this case, the ratio (w2 / w1) of the width w2 of the lead portions 121b and 122b to the width w1 of the body portions 121a and 122a of the first and second internal electrodes 121 and 122 satisfies 0.3≦w2 / w1≦0.5.
[0053] Typically, to prevent a decrease in moisture resistance reliability, a pattern is applied in which the width of the lead portion, which is the area where the internal electrode is exposed to the outside of the ceramic body, is smaller than the width of the body portion, which contributes to the formation of capacitance.
[0054] However, if the width of the lead portion, which is the area where the internal electrode is exposed to the outside of the ceramic body, is made smaller than the width of the body portion, which contributes to the formation of capacitance, in order to prevent a decrease in moisture resistance reliability, this has the side effect of increasing the equivalent series resistance (ESR) and equivalent series inductance (ESL).
[0055] According to one embodiment of the present invention, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted to satisfy 0.3≦w2 / w1≦0.5, thereby realizing low equivalent series inductance (ESL) and obtaining a highly reliable multilayer ceramic electronic component.
[0056] That is, according to one embodiment of the present invention, in order to prevent a decrease in moisture resistance reliability, a pattern is applied in which the width of the lead portions 121b, 122b, which are the areas of the first and second internal electrodes 121, 122 exposed to the outside of the ceramic body 110, is made smaller than the width of the main portions 121a, 122a, which contribute to the formation of capacitance. However, in order to prevent a side effect that may occur as a result of this, such as an increase in equivalent series resistance (ESR) and equivalent series inductance (ESL), the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted.
[0057] If the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is less than 0.3, there is a problem that the equivalent series resistance (ESR) and equivalent series inductance (ESL) are too high.
[0058] On the other hand, if the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 exceeds 0.5, there is a problem in that the moisture resistance reliability decreases.
[0059] In particular, when the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5, a low equivalent series inductance (ESL) can be achieved, reliability can be improved, and two or more chips can be replaced with one chip.
[0060] That is, the length and width of the multilayer ceramic electronic component 100 according to an embodiment of the present invention may be 1.0±0.1 mm and 0.5±0.1 mm (1005 size), respectively.
[0061] In the case of a typical multilayer ceramic capacitor with a length and width of 0.6mm and 0.3mm, respectively, the equivalent series inductance (ESL) value is about 160pH and the equivalent series resistance (ESR) value is about 20mΩ.
[0062] When the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the body portions 121a, 122a of the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5, even if the length and width of the multilayer ceramic electronic component 100 according to an embodiment of the present invention are 1.0±0.1 mm and 0.5±0.1 mm, respectively, an equivalent series inductance (ESL) value of 80 pH or less and an equivalent series resistance (ESR) value of 10 mΩ or less can be realized.
[0063] That is, when the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5, the multilayer ceramic electronic component 100 according to one embodiment of the present invention can obtain electrical characteristics that replace two conventional 0603 size multilayer ceramic capacitors.
[0064] Therefore, according to one embodiment of the present invention, two conventional multilayer ceramic capacitors can be replaced with one, which has the effect of reducing the mounting area of the board.
[0065] FIG. 5 is a cross-sectional view taken along II' of FIG. 1 according to one embodiment of the present invention.
[0066] Referring to FIG. 5, the first and second external electrodes 131 and 132 may be arranged on a fifth surface S5 and a sixth surface S6 in the width direction of the ceramic body 110, respectively, and may be arranged to extend to a first surface S1 and a second surface S2 in the thickness direction of the ceramic body 110.
[0067] The first and second external electrodes 131, 132 may include first electrode layers 131a, 132a disposed outside the ceramic body 110 and including a first conductive metal, and plating layers 131b, 132b disposed on the first electrode layers 131a, 132a and including a second conductive metal.
[0068] Referring to FIG. 5, the plating layers 131b and 132b are shown to be composed of one layer, but this is not limited thereto, and for example, the plating layers may be arranged in at least two layers.
[0069] The first electrode layers 131a and 132a may include a first conductive metal and glass.
[0070] To form capacitance, the first and second external electrodes 131 and 132 may be formed on a fifth surface S5 and a sixth surface S6 in the width direction of the ceramic body 110, respectively, and the first electrode layers 131a and 132a included in the first and second external electrodes 131 and 132 may be electrically connected to the first and second internal electrodes 121 and 122.
[0071] The first electrode layers 131a and 132a may be formed of the same conductive material as the first and second internal electrodes 121 and 122, but are not limited thereto and may include, for example, one or more first conductive metals selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof.
[0072] The first electrode layers 131a and 132a may be formed by applying a conductive paste prepared by adding glass frit to the first conductive metal powder, and then firing the paste.
[0073] According to an embodiment of the present invention, the first and second external electrodes 131 and 132 may include plating layers 131b and 132b disposed on the first electrode layers 131a and 132a and including a second conductive metal.
[0074] The second conductive metal is not particularly limited, but may be, for example, one or more selected from the group consisting of copper (Cu), nickel (Ni), tin (Sn), and alloys thereof.
[0075] Meanwhile, according to an embodiment of the present invention, the multilayer ceramic capacitor 100 may have a thickness T of 100 μm or less.
[0076] In recent years, the mounting density of circuit boards has increased, and the demand for thin multilayer ceramic capacitors with a thickness of 100 μm or less is increasing. However, there is a problem in that they have low reliability in terms of moisture resistance.
[0077] According to one embodiment of the present invention, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted to satisfy 0.3≦w2 / w1≦0.5, thereby preventing a decrease in moisture resistance reliability.
[0078] This makes it possible to prevent a decrease in reliability even when a thin cover is disposed on a thin multilayer ceramic capacitor having a thickness of 100 μm or less.
[0079] Referring to FIG. 5, the thickness t c can satisfy 1 / 40 or less of the length L of the multilayer ceramic electronic component and 1 / 5 or less of the thickness T of the multilayer ceramic electronic component.
[0080] The thickness t of the cover parts C1 and C2 c However, if the thickness is 1 / 40 or less of the length L of the multilayer ceramic electronic component or 1 / 5 or less of the thickness T of the multilayer ceramic electronic component, the reliability may be reduced.
[0081] However, according to an embodiment of the present invention, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted to satisfy 0.3≦w2 / w1≦0.5, thereby reducing the thickness t c However, even when the thickness is 1 / 40 or less of the length L of the multilayer ceramic electronic component and 1 / 5 or less of the thickness T of the multilayer ceramic electronic component, a decrease in reliability can be prevented.
[0082] According to one embodiment of the present invention, the thickness of the dielectric layer 111 is 0.4 μm or less, and the thickness of the first and second internal electrodes 121, 122 is 0.4 μm or less, thereby providing an ultra-small and high-capacity multilayer ceramic capacitor.
[0083] In the case of one embodiment of the present invention, when thin dielectric layers and internal electrodes are used, in which the thickness of the dielectric layer 111 is 0.4 μm or less and the thickness of the first and second internal electrodes 121, 122 is 0.4 μm or less, reliability may be poor.
[0084] However, in one embodiment of the present invention, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted to satisfy 0.3≦w2 / w1≦0.5, thereby improving reliability.
[0085] However, the meaning of "thin film" does not mean that the thickness of the dielectric layer 111 and the first and second internal electrodes 121, 122 is 0.4 μm or less, but can be understood as a concept including a dielectric layer and internal electrodes that are thinner than those of conventional products.
[0086] FIG. 6 is a top plan view seen from the direction B in FIG.
[0087] Referring to FIG. 6, the areas of the first and second external electrodes 131 and 132 arranged on the first and second surfaces S1 and S2 in the thickness direction of the ceramic body 110 may occupy 50% or more of the areas of the first and second surfaces S1 and S2 of the ceramic body 110, respectively.
[0088] When the area of the first and second external electrodes 131 and 132 arranged on the first surface S1 and the second surface S2 in the thickness direction of the ceramic body 110 occupies 50% or more of the area of each of the first surface S1 and the second surface S2 of the ceramic body 110, a low equivalent series inductance (ESL) can be realized.
[0089] Hereinafter, a method for manufacturing a multilayer ceramic electronic component according to an embodiment of the present invention will be described, but the present invention is not limited thereto.
[0090] In a method for manufacturing a multilayer ceramic electronic component according to an embodiment of the present invention, a plurality of ceramic green sheets are prepared by first coating a slurry containing powder such as barium titanate (BaTiO) on a carrier film and drying the slurry, and then dielectric layers can be formed using the ceramic green sheets.
[0091] The ceramic green sheet can be produced by mixing ceramic powder, a binder, and a solvent to prepare a slurry, and then forming the slurry into a sheet having a thickness of several μm using a doctor blade method.
[0092] Next, a conductive paste for internal electrodes containing 40 to 50 parts by weight of nickel powder with an average nickel particle size of 0.1 to 0.2 μm can be prepared.
[0093] The conductive paste for the internal electrodes is applied to the green sheets by screen printing to form internal electrodes, and then the green sheets on which the internal electrode patterns are arranged are stacked to manufacture the ceramic body 110.
[0094] The internal electrode pattern was fabricated after firing according to one embodiment of the present invention so that the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a in the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5.
[0095] Next, a first electrode layer including a first conductive metal and glass may be formed on the exterior of the ceramic body.
[0096] The first conductive metal is not particularly limited, but may be, for example, one or more selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof.
[0097] The glass is not particularly limited, and a material having the same composition as that of glass used in the manufacture of external electrodes of a conventional multilayer ceramic capacitor can be used.
[0098] The first electrode layers may be formed on upper and lower surfaces and end portions of the ceramic body, and may be electrically connected to the first and second internal electrodes, respectively.
[0099] The first electrode layer may contain 5% by volume or more of glass relative to the first conductive metal.
[0100] Next, a plating layer containing a second conductive metal can be formed on the first electrode layer.
[0101] The second conductive metal is not particularly limited, but may be, for example, one or more selected from the group consisting of copper (Cu), nickel (Ni), tin (Sn), and alloys thereof.
[0102] According to one embodiment of the present invention, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted to satisfy 0.3≦w2 / w1≦0.5.
[0103] As shown in Table 1 below, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 was varied, and then the frequency of crack occurrence depending on the thickness of the cover portion was measured.
[0104] [Table 1]
[0105] In Table 1 above, samples 1 to 5, which are comparative examples, are cases in which the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 exceeds 0.5, resulting in a problem of reduced moisture resistance reliability.
[0106] On the other hand, in the comparative examples, samples 9 and 10, the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is less than 0.3, which results in a problem that the equivalent series resistance (ESR) and equivalent series inductance (ESL) values are too high.
[0107] In contrast, samples 6 to 8, which are examples of the present invention, are cases in which the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 is adjusted to satisfy 0.3≦w2 / w1≦0.5, thereby achieving a low equivalent series inductance (ESL) and obtaining a multilayer ceramic electronic component with excellent reliability.
[0108] In particular, samples 6 to 8, which are embodiments of the present invention, are cases in which the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5, thereby achieving low equivalent series inductance (ESL), improving reliability, and enabling two or more chips to be replaced by one chip.
[0109] That is, in the case of a conventional multilayer ceramic capacitor with a 0603 size, whose length and width are 0.6 mm and 0.3 mm, respectively, the equivalent series inductance (ESL) value is about 160 pH and the equivalent series resistance (ESR) value is about 20 mΩ.
[0110] However, in samples 6 to 8 in which the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main bodies 121a, 122a of the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5, an equivalent series inductance (ESL) value of 80 pH or less and an equivalent series resistance (ESR) value of 10 mΩ or less can be achieved.
[0111] That is, when the ratio (w2 / w1) of the width w2 of the lead portions 121b, 122b to the width w1 of the main body portions 121a, 122a of the first and second internal electrodes 121, 122 satisfies 0.3≦w2 / w1≦0.5, the multilayer ceramic electronic component 100 according to one embodiment of the present invention can obtain electrical characteristics that replace two conventional 0603 size multilayer ceramic capacitors.
[0112] Therefore, according to one embodiment of the present invention, two conventional multilayer ceramic capacitors can be replaced with one, which has the effect of reducing the mounting area of the board.
[0113] The present invention is not limited by the above-described embodiments and the accompanying drawings, but is limited by the scope of the appended claims. Therefore, various substitutions, modifications, and changes can be made by those skilled in the art without departing from the technical spirit of the present invention as defined in the claims, and these also fall within the scope of the present invention. [Explanation of symbols]
[0114] 110 Ceramic body 111 Dielectric layer 121, 122 First and second internal electrodes 131, 132 First and second external electrodes 131a, 132a 1st electrode layer 131b, 132b plating layer
Claims
1. a ceramic body including a dielectric layer, and a first internal electrode and a second internal electrode disposed to face each other with the dielectric layer sandwiched therebetween, the ceramic body having a first surface and a second surface facing each other in a thickness direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a length direction, and a fifth surface and a sixth surface connected to the first surface, the second surface and the fourth surface and facing each other in a width direction; a first external electrode disposed on the fifth surface and electrically connected to the first internal electrode, and a second external electrode disposed on the sixth surface and electrically connected to the second internal electrode, the first external electrode being disposed on an outer side of the ceramic body; the ceramic body includes a first internal electrode and a second internal electrode disposed to face each other with the dielectric layer interposed therebetween, an active portion in which capacitance is formed, and cover portions formed above and below the active portion, the first internal electrode includes a main body portion that contributes to the formation of capacitance, and a lead portion having a width smaller than that of the main body portion, one end of which is exposed on the fifth surface and connected to the first external electrode, and the other end of which is connected to the main body portion; the lead portion included in the first internal electrode has a trapezoidal shape with the one end exposed on the fifth surface and connected to the first external electrode and the other end connected to the main body portion as opposite sides that are parallel to each other, and the width of the one end is smaller than the width of the other end; the second internal electrode includes a main body portion that contributes to the formation of capacitance, and a lead portion having a width smaller than that of the main body portion, one end of which is exposed on the sixth surface and connected to the second external electrode, and the other end of which is connected to the main body portion; the lead portion included in the second internal electrode has a trapezoidal shape with the one end exposed on the sixth surface and connected to the second external electrode and the other end connected to the main body portion as opposite sides that are parallel to each other, and the width of the one end is smaller than the width of the other end; A multilayer ceramic electronic component, wherein the ratio (w2 / w1) of the width (w2) of the lead portion to the width (w1) of the main body portion of the first internal electrode and the second internal electrode satisfies 0.3≦w2 / w1≦0.
5.
2. 2. The multilayer ceramic electronic component according to claim 1, wherein the length and width of the multilayer ceramic electronic component are 1.0±0.1 mm and 0.5±0.1 mm, respectively.
3. 3. The multilayer ceramic electronic component according to claim 1, wherein the multilayer ceramic electronic component has a thickness of 100 [mu]m or less.
4. 4. The multilayer ceramic electronic component according to claim 1, wherein the thickness of the cover portion is equal to or less than 1 / 40 of the length of the multilayer ceramic electronic component.
5. 5. The multilayer ceramic electronic component according to claim 1, wherein the thickness of the cover is equal to or less than 1 / 5 of the thickness of the multilayer ceramic electronic component.
6. 6. The multilayer ceramic electronic component according to claim 1, wherein a length of the ceramic body is the distance between the third surface and the fourth surface, a width of the ceramic body is the distance between the fifth surface and the sixth surface, and the first internal electrodes and the second internal electrodes are alternately exposed on the fifth surface and the sixth surface.
7. 7. The multilayer ceramic electronic component according to claim 1, wherein the first external electrode and the second external electrode are disposed on a fifth surface and a sixth surface of the ceramic body, respectively, and extend to the first surface and the second surface, and the areas of the first external electrode and the second external electrode disposed on the first surface and the second surface of the ceramic body account for 50% or more of the areas of the first surface and the second surface of the ceramic body, respectively.
8. 8. The multilayer ceramic electronic component according to claim 1, wherein the first internal electrodes and the second internal electrodes have a thickness of 0.4 [mu]m or less.
9. 8. The multilayer ceramic electronic component according to claim 1, wherein the dielectric layers have a thickness of 0.4 μm or less.
10. 8. The multilayer ceramic electronic component according to claim 1, wherein the dielectric layers have a thickness of 0.4 μm or less, and the first internal electrodes and the second internal electrodes have a thickness of 0.4 μm or less.
Citation Information
Patent Citations
Laminated ceramic capacitor
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High capacitance multilayer with high voltage capability
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