Image forming device
The detection mechanism addresses the challenge of detecting external board connections with low power consumption by using a connector, measurement resistor, and switch control unit to manage current flow, enabling efficient connection state detection with reduced power usage.
Patent Information
- Application Number
- JP2021209658
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-12-23
- Publication Date
- 2025-08-13
- Estimated Expiration
- 2041-12-23
AI Technical Summary
Existing technologies cannot simultaneously detect the connection state of an external board connected to a board and reduce power consumption.
A detection mechanism that includes a connector, a measurement resistor, a measurement unit, a determination unit, a switch, and a switch control unit to detect the connection state of an external board while minimizing power consumption by controlling current flow through the measurement resistor.
The detection mechanism can determine the connection state of an external board while achieving low power consumption, providing a simple and cost-effective solution for connection detection.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a detection mechanism and an image forming apparatus. [Background technology]
[0002] Patent Document 1 listed below discloses a configuration that can detect an ON state, an OFF state, and a fault state with a simple configuration, with the aim of configuring an expensive misconnection detection switch in an inexpensive system. Summary of the Invention [Problem to be solved by the invention]
[0003] However, the technology of Patent Document 1 cannot simultaneously detect the connection state of an external board connected to a board and reduce power consumption.
[0004] In order to solve the above-mentioned problems of the conventional technology, the present invention aims to provide a detection mechanism that can detect the connection state of an external board connected to a board while also achieving low power consumption. [Means for solving the problem]
[0005] In order to solve the above-mentioned problems, a detection mechanism according to one embodiment includes a connector provided on a substrate to which an external substrate is connected, a measurement resistor connected to the connector, a measurement unit that measures the potential difference across the measurement resistor, a determination unit that determines the connection state of the external substrate to the connector based on the potential difference measured by the measurement unit, a switch connected to the measurement resistor and capable of interrupting the current flowing through the measurement resistor, and a switch control unit that controls the switch. [Effects of the Invention]
[0006] According to one embodiment of the detection mechanism, it is possible to provide a detection mechanism that can detect the connection state of an external board connected to a board while also achieving low power consumption. [Brief explanation of the drawings]
[0007] [Figure 1] FIG. 1 is a diagram illustrating a configuration of a detection mechanism according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of a monitoring circuit included in a detection mechanism according to an embodiment; [Figure 3] FIG. 1 is a diagram illustrating an example of the functional configuration of an IC included in a detection mechanism according to an embodiment. [Figure 4] 1 is a flowchart showing an example of a processing procedure by an IC included in a detection mechanism according to an embodiment. [Figure 5] FIG. 10 is a diagram illustrating a modified example of a monitoring circuit included in the detection mechanism according to the embodiment. [Figure 6] 10 is a flowchart showing a modified example of a processing procedure by an IC included in a detection mechanism according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0008] Hereinafter, an embodiment will be described with reference to the drawings.
[0009] (Configuration of detection mechanism 10) Fig. 1 is a diagram showing the configuration of a detection mechanism 10 according to one embodiment. As shown in Fig. 1, the detection mechanism 10 includes a control board 12, an IC (Integrated Circuit) 14, and memory boards 20-1 to 20-n.
[0010] The control board 12 is an example of a "board" and is a flat member having a rectangular shape in a plan view. The control board 12 has connectors 12A1 to 12An provided on one side of the rectangle. The connectors 12A1 to 12An are an example of a "connector." For example, the connectors 12A1 to 12An are female connectors.
[0011] Each of the memory boards 20-1 to 20-n is an example of an "external board" and has a rectangular shape in a plan view, with a connector 20A provided on one side of the rectangular shape facing the control board 12. The connector 20A is an example of an "external connector." For example, the connector 20A is a male connector. This allows each of the memory boards 20-1 to 20-n to be connected to a corresponding connector 12A among the connectors 12A1 to 12An provided on the control board 12 at the connector 20A. By being connected to the control board 12, each of the memory boards 20-1 to 20-n can function as, for example, an expansion memory for the control board 12.
[0012] The IC 14 is mounted on the control board 12. The IC 14 performs various controls of the detection mechanism 10. For example, the IC 14 can determine the connection state of each of the memory boards 20-1 to 20-n to the control board 12. The IC 14 is configured by, for example, a microcomputer, a control ASIC (Application Specific Integrated Circuit), etc.
[0013] (Configuration example of monitoring circuit 16) Fig. 2 is a diagram showing an example of the configuration of the monitoring circuit 16 included in the detection mechanism 10 according to one embodiment. As shown in Fig. 2, the detection mechanism 10 according to one embodiment has the monitoring circuit 16 provided on the control board 12. The monitoring circuit 16 shown in Fig. 2 is configured to be able to determine the connection state of one memory board 20.
[0014] The monitoring circuit 16 is provided on the control board 12 between the connector 12A and ground (GND). The monitoring circuit 16 has a pull-down resistor 16A and a switch 16B connected in series. The pull-down resistor 16A is an example of a "measurement resistor." The pull-down resistor 16A has a resistance component Ra. The monitoring circuit 16 also has a measurement point 16C between the connector 12A and the pull-down resistor 16A.
[0015] In the monitoring circuit 16, a DC voltage Vp is applied to the pull-down resistor 16A from the memory board 20 via the connector 20A and the connector 12A. In the monitoring circuit 16, an IC 14 is connected to a measurement point 16C between the connector 12A and the pull-down resistor 16A. This allows the IC 14 to measure the potential difference Vout across the pull-down resistor 16A. The IC 14 can then determine the connection state of the memory board 20 based on the measured potential difference Vout across the pull-down resistor 16A.
[0016] For example, when the connection state between the connector 20A and the connector 12A is "normal", the resistance value of the connector resistance component Rc is approximately 0 [Ω] (0 [Ω] or a value close to 0 [Ω]).
[0017] Furthermore, for example, when the connection state between the connector 20A and the connector 12A is "incomplete" (partial insertion / poor contact state), the resistance value of the connector resistance component Rc is R [Ω].
[0018] Also, for example, when the connector 20A and the connector 12A are "unconnected," the resistance value of the connector resistance component Rc is ∞ [Ω].
[0019] The potential difference Vout across the pull-down resistor 16A is calculated by the following formula (1), and varies depending on the resistance value of the connector resistance component Rc.
[0020] Vout = Vp × Ra / (Ra + Rc) (1)
[0021] Therefore, by measuring the potential difference Vout across the pull-down resistor 16A, the IC 14 can determine whether the connection status of the memory board 20 is "normal," "incomplete," or "unconnected" based on the potential difference Vout.
[0022] If a current always flows through the monitoring circuit 16, the amount of power and heat generation may increase. Therefore, the detection mechanism 10 according to one embodiment includes a switch 16B between the pull-down resistor 16A in the monitoring circuit 16 and ground (GND). This allows the detection mechanism 10 according to one embodiment to switch between a state in which a current flows through the monitoring circuit 16 and a state in which a current does not flow through the monitoring circuit 16 by switching the switch 16B between an ON state and an OFF state. The detection mechanism 10 according to one embodiment switches the switch 16B to the ON state under the control of a control signal CNT1 from the IC 14, allowing the IC 14 to measure the potential difference Vout across the pull-down resistor 16A and determine the connection state of the memory board 20.
[0023] The switch 16B may be, for example, a transistor or a field effect transistor (FET). When a transistor is used for the switch 16B, a simple and inexpensive switch configuration can be achieved. On the other hand, when a FET is used for the switch 16B, a simple switch configuration can be achieved and the power consumption of the switch 16B can be reduced.
[0024] (An example of IC14 functional configuration) FIG. 3 is a diagram showing an example of the functional configuration of the IC 14 included in the detection mechanism 10 according to one embodiment.
[0025] As shown in FIG. 3, the IC 14 includes a switch control unit 14A, a measurement unit 14B, a determination unit 14C, and a notification unit 14D.
[0026] The switch control unit 14A outputs a control signal CNT1 to the switch 16B to control switching of the switch 16B between the ON state and the OFF state.
[0027] For example, when the image forming apparatus, which is a higher-level apparatus than the detection mechanism 10, is switched to the "normal mode", the switch control unit 14A outputs a control signal CNT1 to the switch 16B, thereby switching the switch 16B to the ON state.
[0028] Furthermore, for example, when the image forming apparatus, which is a higher-level apparatus than the detection mechanism 10, is switched to the "energy saving mode", the switch control unit 14A outputs a control signal CNT1 to the switch 16B, thereby switching the switch 16B to the OFF state.
[0029] The measuring unit 14B measures the potential difference Vout across the pull-down resistor 16A when the switch 16B is in the ON state under the control of the switch control unit 14A.
[0030] The determination unit 14C determines the connection state of the memory board 20 based on the potential difference Vout measured by the measurement unit 14B. For example, the determination unit 14C can determine whether the connection state of the memory board 20 is "normal," "incomplete," or "unconnected" based on the potential difference Vout measured by the measurement unit 14B.
[0031] If the determination result by the determination unit 14C is not "normal", the notification unit 14D notifies the user of a warning by a predetermined notification method (for example, a warning display, a warning sound, etc.).
[0032] Each function of IC 14 can be realized by one or more processing circuits. Here, the term "processing circuit" as used herein includes a processor programmed to perform each function by software, such as a processor implemented by electronic circuits, as well as devices such as an ASIC (Application Specific Integrated Circuit), DSP (Digital Signal Processor), FPGA (Field Programmable Gate Array), and conventional circuit modules designed to perform each of the functions described above.
[0033] (An example of processing procedures by IC14) FIG. 4 is a flowchart showing an example of a processing procedure by the IC 14 included in the detection mechanism 10 according to an embodiment.
[0034] First, when the power supply of the image forming apparatus, which is a host apparatus of the detection mechanism 10, is switched to the ON state (step S401), the switch control unit 14A outputs a control signal CNT1 to the switch 16B, thereby switching the switch 16B to the ON state (step S402).
[0035] Next, the IC 14 determines whether the image forming apparatus has been switched to the "energy saving mode" (step S403).
[0036] In step S403, if it is determined that the image forming apparatus has been switched to the "energy saving mode" (step S403: Yes), the switch control unit 14A outputs a control signal CNT1 to the switch 16B to switch the switch 16B to the OFF state (step S404). After that, the IC 14 ends the series of processes shown in FIG.
[0037] On the other hand, if it is determined in step S403 that the image forming apparatus has not been switched to the "energy saving mode" (step S403: No), the measurement unit 14B measures the potential difference Vout across the pull-down resistor 16A (step S405).
[0038] Then, the determining unit 14C determines the connection state of the memory board 20 based on the potential difference Vout measured in step S405 (step S406).
[0039] Furthermore, the IC 14 determines whether the determination result in step S406 is "normal" (step S407).
[0040] In step S407, if it is determined that the determination result in step S406 is "normal" (step S407: Yes), the IC 14 returns the process to step S403.
[0041] On the other hand, if it is determined in step S407 that the determination result in step S406 is not "normal" (step S407: No), the notification unit 14D notifies the user of a warning by a predetermined notification method (for example, a warning display, a warning sound, etc.) (step S408). After that, the IC 14 ends the series of processes shown in FIG. 4.
[0042] (One Modification of the Monitoring Circuit 16) Fig. 5 is a diagram showing a modified example of the monitoring circuit 16 included in the detection mechanism 10 according to one embodiment. As shown in Fig. 5, the detection mechanism 10 according to one embodiment has a monitoring circuit 16-2, which is a modified example of the monitoring circuit 16, provided on the control board 12. The monitoring circuit 16-2 shown in Fig. 5 is configured to be able to determine the connection state of each of the multiple memory boards 20 (20-1 to 20-n).
[0043] In the monitoring circuit 16-2, the pull-down resistor 16A is connected to each of the multiple connectors 12A (12A1 to 12An). In the monitoring circuit 16-2, a DC voltage Vp is applied to the pull-down resistor 16A from each of the multiple memory boards 20 via the connector 20A and the connector 12A. In the monitoring circuit 16-2, a measurement point 16C is provided between each of the multiple connectors 12A and the pull-down resistor 16A. This allows the IC 14 to measure the potential difference Vout across the pull-down resistor 16A. Then, the IC 14 can determine the connection state of each of the multiple memory boards 20 based on the measured potential difference Vout across the pull-down resistor 16A.
[0044] In the monitoring circuit 16-2, the potential difference Vout across the pull-down resistor 16A is calculated by the following formula (2), that is, it varies depending on the resistances Rx (Rx_1 to Rx_n) of the multiple memory boards 20 (20-1 to 20-n) and the multiple connector resistance components Rc (RC_1 to Rc_n).
[0045] Vout=Vp×Ra / (Ra+1 / Ry) (2)
[0046] However, 1 / Ry is calculated by the following formula (3).
[0047]
number
[0048] For example, when the connection status of all memory boards 20 is "normal," the combined parallel resistance value of the preset resistors Rx of the multiple memory boards 20 is 1 / Ry [Ω]. Therefore, the potential difference Vout corresponds to 1 / Ry [Ω].
[0049] On the other hand, when the connection state of any of the memory substrates 20 is "incomplete" or "unconnected," the combined parallel resistance value of the resistors Rx of the multiple memory substrates 20 varies from 1 / Ry [Ω]. Therefore, the potential difference Vout varies from the value corresponding to 1 / Ry [Ω].
[0050] In this embodiment, the multiple memory substrates 20 have resistors Rx with different resistance values among the multiple memory substrates 20. Therefore, in this embodiment, when the connection state of any of the memory substrates 20 is "incomplete" or "unconnected," the combined parallel resistance value of the resistors Rx of the multiple memory substrates 20 and the potential difference Vout across the pull-down resistor 16A fluctuate by an amount corresponding to the resistance value of the resistor Rx of that memory substrate 20.
[0051] Therefore, by measuring the potential difference Vout across the pull-down resistor 16A, the IC 14 can determine which memory board 20 is in an "incomplete" or "unconnected" state based on the amount of fluctuation in the potential difference Vout.
[0052] For example, when three memory boards 20 are connected, the parallel combined resistance value is calculated using the following formula.
[0053] 1 / Ry =1 / (Rx_1+Rc_1)+1 / (Rx_2+Rc_2)+1 / (Rx_3+Rc_3) =((Rx_2+Rc_2)(Rx_3+Rc_3)+(Rx_1+Rc_1)(Rx_3+Rc_3)+(Rx_1+Rc_1)(Rx_2+Rc_2)) / (Rx_1+Rc_1) (Rx_2+Rc_2) (Rx_3+Rc_3)
[0054] Ry=(Rx_1+Rc_1) (Rx_2+Rc_2) (Rx_3+Rc_3) / ((Rx_2+Rc_2)(Rx_3+Rc_3)+(Rx_1+Rc_1)(Rx_3+Rc_3)+(Rx_1+Rc_1)(Rx_2+Rc_2))
[0055] Therefore, if different resistance values are set in advance for Rx_1, Rx_2, and Rx_3, the resistance value will fluctuate in the event of a connection abnormality, causing the potential difference across the pull-down resistor 16A to fluctuate as well. By comparing the detected potential difference Vout with the preset parameter, it is possible to identify the memory board 20 in which a connection abnormality has occurred.
[0056] 5 also includes a switch 16B between the pull-down resistor 16A and ground (GND). This allows the detection mechanism 10 according to an embodiment to switch between a state in which a current flows through the monitoring circuit 16-2 and a state in which no current flows through the monitoring circuit 16-2 by switching the switch 16B between an ON state and an OFF state. The detection mechanism 10 according to an embodiment switches the switch 16B to the ON state under the control of a control signal CNT1 from the IC 14, which allows the IC 14 to measure the potential difference Vout across the pull-down resistor 16A and determine the connection state of each of the multiple memory boards 20.
[0057] (A modified example of the processing procedure by IC14) 6 is a flowchart showing a modified example of the processing procedure by the IC 14 included in the detection mechanism 10 according to the embodiment. The series of processing shown in FIG. 6 corresponds to the monitoring circuit 16-2 shown in FIG.
[0058] First, when the power supply of the image forming apparatus, which is a host apparatus of the detection mechanism 10, is switched to the ON state (step S601), the switch control unit 14A outputs a control signal CNT1 to the switch 16B, thereby switching the switch 16B to the ON state (step S602).
[0059] Next, the IC 14 determines whether the image forming apparatus has been switched to the "energy saving mode" (step S603).
[0060] In step S603, if it is determined that the image forming apparatus has been switched to the "energy saving mode" (step S603: Yes), the switch control unit 14A outputs a control signal CNT1 to the switch 16B to switch the switch 16B to the OFF state (step S604). After that, the IC 14 ends the series of processes shown in FIG.
[0061] On the other hand, if it is determined in step S603 that the image forming apparatus has not been switched to the "energy saving mode" (step S603: No), the measurement unit 14B measures the potential difference Vout across the pull-down resistor 16A (step S605).
[0062] Then, the determination unit 14C determines the connection state of the memory board 20 based on the potential difference Vout measured in step S605 (step S606). Here, the determination unit 14C determines the connection state of the memory board 20 as either "normal," "incomplete," or "unconnected."
[0063] Furthermore, the IC 14 determines whether the determination result in step S606 is "normal" (step S607).
[0064] In step S607, if it is determined that the determination result in step S606 is "normal" (step S607: Yes), the IC 14 returns the process to step S603.
[0065] On the other hand, if it is determined in step S607 that the judgment result in step S606 is not "normal" (step S607: No), the judgment unit 14C determines, based on the potential difference Vout measured in step S605, which of the multiple memory boards 20 has a connection state that is not "normal" (step S608).
[0066] Furthermore, the notification unit 14D notifies the user of a warning by a predetermined notification method (for example, a warning display, a warning sound, etc.) (step S608). At this time, the notification unit 14D may notify the user of the memory board 20 whose connection status is determined to be not "normal" in step S608.
[0067] After that, the IC 14 ends the series of processes shown in FIG.
[0068] (effect) As described above, the detection mechanism 10 according to one embodiment is provided on the control board 12 and includes a connector 12A to which the memory board 20 is connected, a pull-down resistor 16A connected to the connector 12A, a measurement unit 14B that measures the potential difference Vout across the pull-down resistor 16A, a determination unit 14C that determines the connection state of the memory board 20 to the connector 12A based on the potential difference Vout measured by the measurement unit 14B, a switch 16B that is connected to the pull-down resistor 16A and is capable of interrupting the current flowing through the pull-down resistor 16A, and a switch control unit 14A that controls the switch 16B.
[0069] As a result, the detection mechanism 10 according to one embodiment can determine the connection state of the memory board 20 to the connector 12A with a relatively simple configuration, and can also control the switch 16B to cut off the current flowing through the pull-down resistor 16A when it is not necessary to measure the potential difference Vout. Therefore, the detection mechanism 10 according to one embodiment can simultaneously detect the connection state of the memory board 20 connected to the control board 12 and achieve low power consumption.
[0070] Furthermore, the detection mechanism 10 according to one embodiment includes a plurality of connectors 12A to which a plurality of memory boards 20 are connected, and a pull-down resistor 16A connected to each of the plurality of connectors 12A, and the determination unit 14C determines the connection state of the plurality of memory boards 20 to the plurality of connectors 12A based on the potential difference Vout measured by the measurement unit 14B.
[0071] As a result, the detection mechanism 10 according to one embodiment can determine the connection states of the multiple memory boards 20 to the multiple connectors 12A with a relatively simple configuration, and can also control the switch 16B to cut off the current flowing through the pull-down resistor 16A when it is not necessary to measure the potential difference Vout. Therefore, the detection mechanism 10 according to one embodiment can simultaneously detect the connection states of the multiple memory boards 20 connected to the control board 12 and achieve low power consumption.
[0072] Furthermore, in the detection mechanism 10 according to one embodiment, the multiple memory boards 20 have different resistance values among the multiple memory boards 20, and the judgment unit 14C individually judges the connection status of the multiple memory boards 20 to the connector 12A based on the potential difference Vout measured by the measurement unit 14B.
[0073] As a result, the detection mechanism 10 according to one embodiment can individually determine the connection states of the multiple memory boards 20 to the multiple connectors 12A with a relatively simple configuration.
[0074] Furthermore, the detection mechanism 10 according to the embodiment includes a notification unit 14D that issues a warning to the user when the determination result by the determination unit 14C is not normal.
[0075] As a result, the detection mechanism 10 according to the embodiment can prompt the user to properly connect the memory board 20 by notifying the user of a warning.
[0076] In addition, in the detection mechanism 10 according to one embodiment, the switch 16B is a transistor.
[0077] As a result, the detection mechanism 10 according to the embodiment can provide the switch 16B with a simple and inexpensive switch configuration.
[0078] In addition, in the detection mechanism 10 according to one embodiment, the switch 16B is a FET.
[0079] As a result, in the detection mechanism 10 according to the embodiment, the switch 16B can have a simple switch configuration, and the amount of power consumed by the switch 16B can be reduced.
[0080] Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to these embodiments, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims. [Explanation of symbols]
[0081] 10 Detection mechanism 12 Control board (board) 12A, 12A1 to 12An connectors 14 IC 14A Switch control section 14B Measuring part 14C Judgment section 14D Notification Department 16,16-2 Monitoring circuit 16A pull-down resistor (measurement resistor) 16B switch 16C measurement point 20-1 to 20-n Memory board (external board) 20A connector (external connector) CNT1 control signal GND Ground Vout Potential difference [Prior art documents] [Patent documents]
[0082] [Patent Document 1] Special Publication No. 11-283456
Claims
1. An image forming apparatus having an energy saving mode and equipped with a detection mechanism, The detection mechanism includes: a connector provided on the board to which an external board is connected; a measuring resistor connected to the connector; a measuring unit for measuring a potential difference between both ends of the measuring resistor; a determination unit that determines a connection state of the external board with respect to the connector based on the potential difference measured by the measurement unit; a switch connected to the measuring resistor and capable of interrupting a current flowing through the measuring resistor; a switch control unit that controls the switch; Equipped with the switch control unit turns the switch to an OFF state when the image forming apparatus is switched to the energy saving mode; the measurement unit measures a potential difference across the measurement resistor when the image forming apparatus is not switched to the energy saving mode; The determining unit determines the connection state of the external board to the connector as either "normal," "incomplete," or "unconnected." An image forming apparatus characterized by:
2. The detection mechanism a plurality of connectors to which the plurality of external boards are connected; the measuring resistor connected to each of the plurality of connectors; Equipped with The determination unit The connection states of the plurality of external boards to the plurality of connectors are determined based on the potential differences measured by the measurement unit.
2. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.
3. the plurality of external substrates have different resistance values among the plurality of external substrates, The determination unit The connection states of the plurality of external boards to the plurality of connectors are individually determined based on the potential differences measured by the measurement unit.
3. The image forming apparatus according to claim 2, wherein the image forming apparatus is a recording medium.
4. The detection mechanism A notification unit is provided to notify a user of a warning when the determination result by the determination unit is not normal.
4. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.
5. The switch is a transistor.
5. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.
6. The switch is a FET.
5. The image forming apparatus according to claim 1, wherein the image forming apparatus is a recording medium.
Citation Information
Patent Citations
Information processor
JP1993289778A
Card information read-out method, card, host device, and drive device
JP1999119863A
Switch, information detection device having the same, and connected state detection device for connector
JP1999283456A