Multilayer electronic components

Abstract

To provide a laminated electronic component capable of improving reliability and maintaining a high relative dielectric constant even if it is made thin.SOLUTION: A laminated electronic component includes an element body formed by alternately laminating dielectric layers and internal electrode layers. In the laminated electronic component, molar ratio of MgO to SiO2 in the dielectric layer is 1 to 5, molar ratio of MgO to MnO in the dielectric layer is 5 to 13. The element body contains a segregation phase, and if assuming that a total content of MgO, NiO, MnO, and Cr2O3 in the segregation phase is 100 molar parts, a content of MgO in the segregation phase is 63.0 to 99.5 molar parts, and a content of MnO in the segregation phase is 0.5 to 12.6 molar parts.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a laminated electronic component. [Background technology]

[0002] Patent Document 1 discloses a multilayer electronic component that aims to improve mechanical strength and reliability, and in this multilayer electronic component, needle-like segregations containing Mg and Cr as main components are present at the interface between the dielectric layer and the internal electrode layer.

[0003] Furthermore, Patent Document 2 discloses a dielectric ceramic composition that exhibits good characteristics even when the dielectric layer is thinned, and the dielectric ceramic composition contains a predetermined amount of Mg and a predetermined amount of Mn. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 5251993 [Patent Document 2] Patent No. 5541318 Summary of the Invention [Problem to be solved by the invention]

[0005] The present invention has been made in view of the above circumstances, and has as its object to provide a laminated electronic component that can improve reliability and maintain a high relative dielectric constant even when the layers are made thinner. [Means for solving the problem]

[0006] In order to achieve the above object, a laminated electronic component according to the present invention comprises: an element body including dielectric layers and internal electrode layers alternately stacked; The dielectric layer has a main component represented by the general formula ABO3 and a subcomponent, the A site contains at least one selected from the group consisting of Ba, Ca, and Sr; the B site contains at least one selected from the group consisting of Ti and Zr; The auxiliary components include MgO, SiO2, and MnO, the molar ratio of MgO to SiO2 (MgO / SiO2) in the dielectric layer is 1 to 5; the molar ratio of MgO to MnO (MgO / MnO) in the dielectric layer is 5 to 13; the element body includes a segregation phase, When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase is taken as 100 parts by mole, the content of MgO in the segregation phase is 63.0 to 99.5 molar parts, The content of MnO in the segregation phase is 0.5 to 12.6 parts by mole.

[0007] The laminated electronic component according to the present invention can improve reliability and maintain a high relative dielectric constant even when the layers are thinned. This is believed to be due to the fact that the laminated electronic component according to the present invention contains a segregated phase having a predetermined Mg-Mn-O composition.

[0008] The Mg-Mn-O-based segregation phase formed in the present invention has a predetermined composition, so the ratio of long grains to short grains is kept within a predetermined range, resulting in a nearly spherical shape and a sufficiently short long grain size compared to the thickness of the dielectric layer. That is, the Mg-Mn-O-based segregation phase is small compared to the thickness of the dielectric layer and is dispersed throughout the dielectric layer. This prevents the Mg-Mn-O-based segregation phase from bridging between adjacent internal electrode layers. Furthermore, a large number of particles can be secured in the lamination direction of the dielectric layer. As a result, the multilayer electronic component according to the present invention is believed to have improved reliability. Note that reliability can be determined by ±PTV failure rate, etc.

[0009] Furthermore, according to the present application, the appearance of the segregation phase can be suppressed. Since the segregation phase has a low dielectric constant, by suppressing the appearance of the segregation phase, the ratio of ABO3 (main component) having a high dielectric constant can be increased, and the relative dielectric constant of the multilayer electronic component can be increased.

[0010] Also, in the present invention, Mg contained as an element constituting the sub-component of the dielectric layer can suppress the grain growth of the dielectric particles containing the main component. Thus, in the present invention, since the relative dielectric constant can be improved while suppressing the particle diameter of the dielectric particles (crystalline particles) containing the main component to be small, it can be suitably used for a thin-layer multilayer electronic component.

[0011] For the above reasons, according to the multilayer electronic component according to the present invention, reliability can be improved and a high relative dielectric constant can be maintained even when the layer is thinned.

[0012] When the long particle diameter of the segregation phase is DL, When the short particle diameter of the segregation phase is DS, Preferably, DL and DS satisfy the relationship of 1 < DL / DS < 2.

[0013] Thereby, reliability can be further improved, and a higher relative dielectric constant can be maintained even when the layer is thinned.

[0014] When the thickness of the dielectric layer is Td, When the long particle diameter of the segregation phase is DL, Preferably, Td / DL is greater than 1.4.

[0015] Thereby, reliability can be further improved, and a higher relative dielectric constant can be maintained even when the layer is thinned.

[0016] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase is 100 mol parts, The content of NiO in the segregation phase may be 0 to 36 mol parts.

[0017] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase is taken as 100 parts by mole, The content of Cr2O3 in the segregation phase may be 0 to 0.1 parts by mole.

[0018] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase is taken as 100 parts by mole, The content of SiO2 in the segregation phase may be 0 to 0.01 parts by mole.

[0019] When the content of the main component in the dielectric layer is 100 parts by mole, The content of R2O3 in the dielectric layer may be 0.4 to 2.0 parts by mole, The R may be at least one selected from Y, Dy, Ho and Yb.

[0020] When the content of the main component in the dielectric layer is 100 parts by mole, The content of MgO in the dielectric layer may be 0.5 to 2.0 parts by mole.

[0021] When the content of the main component in the dielectric layer is 100 parts by mole, The content of MnO in the dielectric layer may be 0.01 to 0.20 parts by mole.

[0022] When the content of the main component in the dielectric layer is 100 parts by mole, The content of SiO2 in the dielectric layer may be 0.18 to 2.95 parts by mole.

[0023] Preferably, the segregation phase has an equivalent circle diameter (Da) of 0.12 to 1.0 μm.

[0024] This allows for further improvement in reliability and maintains a higher relative dielectric constant even when the layers are made thinner. Furthermore, when Da is within the above range, the high-temperature accelerated life can be extended and the strength of the laminated electronic component can be improved compared to when Da exceeds the above range.

[0025] The segregation phase located in a capacitance region that contributes to capacitance is defined as a capacitance region segregation phase, The segregation phase located in the lead-out region that does not contribute to capacitance is defined as a lead-out region segregation phase, an area ratio of the capacitance region segregation phase in a predetermined range of the capacitance region is defined as S1; When the area ratio of the pull-out region segregation phase in a predetermined range of the pull-out region is S2, Preferably, S1 / S2 is smaller than 1.

[0026] This makes it possible to further improve reliability and maintain a higher relative dielectric constant even when the layer is made thinner. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a cross-sectional view of a multilayer ceramic capacitor according to one embodiment of the present invention. [Figure 2] FIG. 2 is an enlarged view of part II in FIG. [Figure 3] FIG. 3 is an enlarged view of part III in FIG. [Figure 4] FIG. 4 is an enlarged cross-sectional view of a capacitance region of a conventional multilayer ceramic capacitor. [Figure 5] FIG. 5 is a graph in which the x-axis represents the particle size [μm] of the dielectric particles and the y-axis represents the relative dielectric constant. DETAILED DESCRIPTION OF THE INVENTION

[0028] As an embodiment of the ceramic electronic component according to the present invention, the overall configuration of a multilayer ceramic capacitor will be described below. Fig. 1 shows a cross-sectional view of a typical multilayer ceramic capacitor 2.

[0029] The multilayer ceramic capacitor 2 has inner dielectric layers 10 (dielectric ceramic composition) and internal electrode layers 12 that are substantially parallel to a plane including the X-axis and Y-axis, and has an element body 4 in which the inner dielectric layers 10 and the internal electrode layers 12 are alternately stacked along the Z-axis direction.

[0030] Here, "substantially parallel" means that most of the portions are parallel, but there may be some portions that are not parallel, and the inner dielectric layer 10 and the internal electrode layer 12 may be slightly uneven or tilted.

[0031] In this embodiment, the X-axis, Y-axis, and Z-axis are perpendicular to each other. In addition, in this embodiment, the "inner" refers to the side closer to the center of the multilayer ceramic capacitor 2, and the "outer" refers to the side farther from the center of the multilayer ceramic capacitor 2.

[0032] In this embodiment, one of the alternately stacked internal electrode layers 12 is electrically connected to the inside of the external electrode 6A formed on the outside of one end in the X-axis direction of the element body 4. The other of the alternately stacked internal electrode layers 12 is electrically connected to the inside of the external electrode 6B formed on the outside of the other end in the X-axis direction of the element body 4.

[0033] As shown in FIG. 1, the multilayer ceramic capacitor 2 according to this embodiment has an element body 4 and external electrodes 6A and 6B.

[0034] The portion of the element body 4 where the inner dielectric layers 10 and the internal electrode layers 12 are alternately stacked is the interior region 13. On the other hand, the portions formed on both end faces of the element body 4 in the stacking direction Z (Z-axis) are the exterior region 11. The exterior region 11 is formed by stacking a plurality of outer dielectric layers that are thicker than the inner dielectric layers 10 that constitute the interior region 13. Note that, hereinafter, the inner dielectric layers 10 and the outer dielectric layers may be collectively referred to as "dielectric layers."

[0035] The alternately stacked internal electrode layers 12 are arranged at a first end portion in the X-axis direction of the element body 4. The other alternately stacked internal electrode layer 12 also has an extraction region internal electrode layer 125A electrically connected to the inside of the external electrode 6B formed outside the second end of the element body 4 in the X-axis direction. The lead-out region has an internal electrode layer 125B electrically connected to the lead-out region.

[0036] The internal electrode layer 12 also has a capacitance region internal electrode layer 124 inside the lead region internal electrode layers 125A and 125B.

[0037] The interior region 13 has a capacitance region 14 and lead regions 15A and 15B. The capacitance region 14 is a region where the capacitance region internal electrode layers 124 of the internal electrode layers 12 are stacked with the inner dielectric layer 10 sandwiched between them along the stacking direction.

[0038] The lead region 15A is a region where lead region internal electrode layers 125A of the internal electrode layers 12 connected to the external electrode 6A are stacked with the inner dielectric layer 10 sandwiched therebetween along the stacking direction.

[0039] The lead region 15B is a region where lead region internal electrode layers 125B of the internal electrode layer 12 connected to the external electrode 6B are stacked with the inner dielectric layer 10 sandwiched therebetween along the stacking direction.

[0040] The capacitance region 14 and the lead-out regions 15A, 15B can also be expressed as follows. That is, the capacitance region 14 is a region in which the capacitance region internal electrode layers 124 electrically connected to the external electrode 6A and the capacitance region internal electrode layers 124 electrically connected to the external electrode 6B are alternately stacked with the internal dielectric layer 10 sandwiched therebetween. The lead-out region 15A is a region in which the lead-out region internal electrode layers 12A connected to the external electrode 6A and the internal dielectric layer 10 are alternately stacked. The lead-out region 15B is a region in which the lead-out region internal electrode layers 12B connected to the external electrode 6B and the internal dielectric layer 10 are alternately stacked.

[0041] The capacitance region 14 is a region that contributes to the capacitance, while the lead-out regions 15A and 15B are regions that do not contribute to the capacitance.

[0042] In this embodiment, the shape and dimensions of the element body 4 are not particularly limited. The shape may be an elliptical cylinder, a circular cylinder, or another rectangular pillar shape. The length L0 of the element body 4 in the X-axis direction may be, for example, 0.6 to 5.7 mm. The length W0 of the element body 4 in the Y-axis direction may be, for example, 0.3 to 5.0 mm. The length T0 of the element body 4 in the Z-axis direction may be, for example, 0.3 to 2.0 mm.

[0043] There are no particular limitations on the thickness of the inner dielectric layer 10. For example, the thickness Td of the inner dielectric layer 10 sandwiched between the internal electrode layers 12 is preferably 30 μm or less, more preferably 15 μm or less, and even more preferably 10 μm or less. Since the multilayer ceramic capacitor 2 according to this embodiment can be thinned, the thickness of the inner dielectric layer 10 can be thinned to about 0.5 μm.

[0044] The number of laminations in the inner dielectric layer 10 is not particularly limited, but is preferably 20 or more, more preferably 50 or more, and even more preferably 100 or more.

[0045] The material of the dielectric layer is not particularly limited, but in this embodiment, the dielectric layer contains a perovskite compound represented by ABO3 as a main component.

[0046] The phrase "the dielectric layer contains a perovskite compound represented by ABO3 as a main component" means that the content of the perovskite compound represented by ABO3 in the dielectric layer is 90 mass % or more.

[0047] The perovskite compound represented by ABO3 according to this embodiment contains at least one element selected from the group consisting of Ba, Ca, and Sr at the A site, and at least one element selected from the group consisting of Ti and Zr at the B site. That is, the perovskite compound represented by ABO3 may contain, for example, (Ba1-a-b Sr a Ca b ) m (Ti 1-c-d Zr c Hf d )O3 is a perovskite-type compound.

[0048] m indicates the element ratio between A and B sites, e.g., 0.94 <m<1.1である。

[0049] a represents the element ratio of Sr, and is, for example, 0≦a≦1, preferably 0≦a<1, and more preferably 0≦a≦0.5.

[0050] b represents the element ratio of Ca, and is 0≦b≦1, preferably 0≦b<1, and more preferably 0≦b≦0.5.

[0051] c represents the element ratio of Zr, and is 0≦c≦1, preferably 0≦c<1, and more preferably 0≦c≦0.15.

[0052] d represents the element ratio of Hf, and satisfies 0≦d≦1, preferably 0≦d<1, and more preferably 0≦d≦0.05.

[0053] The element ratio of oxygen (O) in the above composition formula may deviate slightly from the stoichiometric composition.

[0054] The dielectric layer according to this embodiment includes auxiliary components in addition to these main components. The auxiliary components according to this embodiment include MgO, SiO2, and MnO. In addition, the auxiliary components according to this embodiment may include R2O3, NiO, and Cr2O3. R is a rare earth element, and although R is not particularly limited, it is at least one selected from Y, Dy, Ho, and Yb, and more preferably Y or Dy. The rare earth element may be one type or two or more types. Furthermore, the auxiliary components according to this embodiment may include at least one element selected from V, Ta, Nb, Mo, and W.

[0055] In this embodiment, the molar ratio of MgO to SiO2 (MgO / SiO2) in the dielectric layer is 1-5.

[0056] When the MgO / SiO2 ratio is within the above range, the formation of the Mg-Si-O segregated phase can be suppressed compared to when the MgO / SiO2 ratio is below the above range, and as a result, the desired Mg-Mn-O segregated phase 18 can be easily obtained.

[0057] When the MgO / SiO2 ratio is within the above range, SiO2 functions more easily as a sintering aid than when the MgO / SiO2 ratio exceeds the above range, thereby improving the strength of the multilayer ceramic capacitor 2.

[0058] In this embodiment, the molar ratio of MgO to MnO (MgO / MnO) in the dielectric layer is 5-13.

[0059] When the MgO / MnO ratio is within the above range, Mn and Ni constituting the internal electrode layer 12 do not easily react with each other and the discontinuous portions 121 are less likely to occur than when the MgO / MnO ratio is below the above range, making it easier to suppress electrode discontinuities.

[0060] When the MgO / MnO ratio is within the above range, the reduction resistance of MnO is more likely to function than when the MgO / MnO ratio exceeds the above range, resulting in an improved high-temperature accelerated life.

[0061] In this embodiment, when the content of the main component in the dielectric layer is taken as 100 parts by mol, the content of R2O3 in the dielectric layer is 0.4 to 2.0 parts by mol.

[0062] In this embodiment, when the content of the main component in the dielectric layer is taken as 100 parts by mol, the content of MgO in the dielectric layer is 0.5 to 2.0 parts by mol.

[0063] In this embodiment, when the content of the main component in the dielectric layer is taken as 100 parts by mol, the content of MnO in the dielectric layer is 0.01 to 0.20 parts by mol.

[0064] In this embodiment, when the content of the main component in the dielectric layer is taken as 100 parts by mol, the content of SiO2 in the dielectric layer is 0.18 to 2.95 parts by mol.

[0065] The dielectric layer includes dielectric particles, grain boundaries (not shown) formed between adjacent dielectric particles, and a segregation phase (described later). In this embodiment, the dielectric particles may be crystal grains of the main component (ABO3) alone, or may be grains in which a secondary component element is dissolved (diffused) in the main component.

[0066] The particle size of the dielectric particles is not particularly limited, but is preferably 0.1 to 0.5 μm.

[0067] The conductive material contained in the internal electrode layer 12 is not particularly limited, but preferable examples include Ni, Ni-based alloys, Cu, and Cu-based alloys. Note that Ni, Ni-based alloys, Cu, and Cu-based alloys may contain various trace components such as P in an amount of about 0.1 mass% or less. When the internal electrode layer 12 is mainly composed of Ni or a Ni-based alloy, it may contain one or more subcomponents selected from Mn, Cu, Cr, Fe, and the like. The Ni-based alloy is preferably an alloy of Ni with one or more elements selected from Mn, Cr, Co, and Al, and the Ni content in the alloy is preferably 95 mass% or more.

[0068] The thickness of the internal electrode layer 12 may be determined appropriately depending on the application, etc., but is usually preferably about 0.1 to 3 μm, and particularly preferably about 0.2 to 2.0 μm.

[0069] The external electrodes 6A, 6B of this embodiment are formed on the element body 4 so as to be electrically connected to at least a part of the internal electrode layer 12.

[0070] The conductive materials contained in the external electrodes 6A and 6B are not particularly limited. For example, known conductive materials such as Ni, Cu, Sn, Ag, Pd, Pt, Au, or alloys thereof, and conductive resins may be used. The thickness of the external electrodes 6A and 6B may be appropriately determined according to the application or the like, but usually, it is preferably about 10 to 50 μm.

[0071] FIG. 2 is an enlarged view of part II of FIG. 1. As shown in FIG. 2, the element body 4 according to the present embodiment has a segregation phase 18. The position of the segregation phase 18 is not particularly limited, and for example, it is included in the layer where the inner dielectric layer 10 is formed. Further, the segregation phase 18 may be in contact with the internal electrode layer 12, or may be in contact with the internal electrode layer 12 so as to be embedded therein. Furthermore, the segregation phase 18 may be present at the discontinuous portion 121 of the internal electrode layer 12. That is, the discontinuous portion 121 of the internal electrode layer 12 is composed of the components of the inner dielectric layer 10, and the segregation phase 18 may be present therein. Furthermore, the segregation phase 18 may be included in the exterior region 11.

[0072] In the cross section shown in FIG. 2, the internal electrode layer 12 appears to be discontinuous due to the discontinuous portion 121, but the discontinuous portion 121 is scattered on the main surface of the internal electrode layer 12. Therefore, even if the internal electrode layer 12 is discontinuous in the cross section shown in FIG. 2, it is continuous in other cross sections, and the electrical continuity of the internal electrode layer 12 is ensured. Each internal electrode layer 12 exists not only along the X-axis direction but also along the Y-axis direction.

[0073] FIG. 3 is an enlarged view of part III of FIG. 2. As shown in FIG. 3, in the present embodiment, when the long particle diameter of the segregation phase 18 is DL and the short particle diameter of the segregation phase 18 is DS, it is preferable that DL and DS satisfy the relationship of 1 < DL / DS < 2, and more preferably satisfy 1 ≦ DL / DS ≦ 1.5.

[0074] Further, in the present embodiment, when the thickness of the inner dielectric layer 10 is Td and the long particle diameter of the segregation phase 18 is DL, it is preferable that Td / DL is greater than 1.4, and more preferably satisfies 1.4 ≦ Td / DL ≦ 4.7.

[0075] In this embodiment, the segregation phase 18 preferably has an equivalent circle diameter (Da) of 0.12 to 1.0 μm. The equivalent circle diameter (Da) refers to the diameter of a circle having the same area as the area of the shape. When Da is within the above range, the high-temperature loaded life can be increased and the strength of the multilayer ceramic capacitor 2 can be improved compared to when Da exceeds the above range.

[0076] The segregation phase 18 located in the capacity region 14 is referred to as a capacity region segregation phase 184. The area ratio of the capacity region segregation phase 184 in a predetermined range of the capacity region 14 is referred to as S1. The segregation phase 18 located in the pull-out region 15 is referred to as a pull-out region segregation phase 185. The area ratio of the pull-out region segregation phase 185 in a predetermined range of the pull-out region 15 is referred to as S2. In this embodiment, S1 / S2 is preferably smaller than 1, and more preferably satisfies 0.2≦S1 / S2≦1.0. That is, in this embodiment, there are more segregation phases 18 in the pull-out region 15 than in the capacity region 14.

[0077] The predetermined range is not particularly limited, but may be, for example, a rectangular range with one side measuring 20 to 100 μm.

[0078] The long grain size (DL) and short grain size (DS) of the segregated phase 18, the circle equivalent diameter (Da) of the pull-out region segregated phase 185, the area ratio (S1) of the volume region segregated phase 184, and the area ratio (S2) of the pull-out region segregated phase 185 can be analyzed by cross-sectional observation using an electron probe microanalyzer (EPMA).

[0079] First, a backscattered electron image and an elemental image map are collected simultaneously using an EPMA. Next, a scale bar and the outline of the segregated phase 18 in the backscattered electron image are traced using drawing software and a pen tablet.

[0080] Based on the relationship between the length of the scale bar obtained by tracing and the number of pixels, the length per pixel is used as the calibration value.

[0081] Next, the number of pixels corresponding to the long grain size (DL) and the number of pixels corresponding to the short grain size (DS) of the segregation phase 18 obtained by tracing are collected using analysis software. Using the calibration value, the number of pixels corresponding to the long grain size (DL) is converted to length. Also, using the calibration value, the number of pixels corresponding to the short grain size (DS) is converted to length. This allows the lengths of the long grain size (DL) and the short grain size (DS) to be determined.

[0082] In addition, the number of pixels within the outline of the segregation phase 18 obtained by tracing is collected using analysis software. Using the calibration value, the number of pixels within the outline is converted into an area. This allows the area of the segregation phase 18 to be determined. The circle equivalent diameter (Da) can be determined from the area of the segregation phase 18 obtained.

[0083] Furthermore, the area ratio (S1) of the capacitance region segregation phase 184 or the area ratio (S2) of the pull-out region segregation phase 185 can be calculated from the sum of the area of the observation field and the area of the segregation phase 18 in the observation field.

[0084] The composition of the segregation phase 18 can be measured by performing component analysis using an EPMA or the like when observing the cross section. It is preferable to perform component analysis at at least three locations and calculate the composition of the segregation phase 18 from the average value of the measurement results. In this embodiment, when performing component analysis using an EPMA, an EDS (energy dispersive spectroscope) or a WDS (wavelength dispersive spectroscope) can be used as the X-ray spectroscope.

[0085] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase 18 is taken as 100 parts by mol, the content of MgO in the segregation phase 18 is preferably 63.0 to 99.5 parts by mol.

[0086] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase 18 is taken as 100 parts by mol, the content of MnO in the segregation phase 18 is preferably 0.5 to 12.6 parts by mol.

[0087] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3, and SiO2 in the segregation phase 18 is taken as 100 parts by mol, the content of NiO in the segregation phase 18 is preferably 0 to 36 parts by mol. The segregation phase 18 may be a solid solution of Mg, Mn, and Ni constituting the internal electrode layer 12.

[0088] In this embodiment, when the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase 18 is taken as 100 parts by mol, the content of Cr2O3 in the segregation phase 18 is preferably 0 to 0.1 parts by mol.

[0089] When the total content of MgO, NiO, MnO, Cr2O3 and SiO2 in the segregation phase 18 is taken as 100 parts by mol, the content of SiO2 in the segregation phase 18 is preferably 0 to 0.01 parts by mol.

[0090] Next, an example of a method for manufacturing the multilayer ceramic capacitor 2 shown in FIG. 1 will be described.

[0091] First, a raw material powder of the main component (ABO3) constituting the dielectric ceramic composition and a gel-like compound slurry of the elements contained in the subcomponents or a solution of the elements are prepared. The gel-like compound is not particularly limited, and gel-like hydroxide, gel-like carbide, gel-like oxide, etc. are preferred, but in this embodiment, gel-like hydroxide is prepared.

[0092] The solution of the element contained in the subcomponent is not particularly limited, but is preferably an aqueous solution of the element contained in the subcomponent. In this embodiment, an aqueous solution of the element is prepared. When preparing the aqueous solution, the metal salt is preferably used in the form of acetate, citrate, succinate, or the like. In this embodiment, acetate is used.

[0093] However, for Si, a gel slurry using ethanol as a solvent or an aqueous dispersion of Si particles (aqueous dispersion) is prepared. The aqueous dispersion of Si particles is prepared by dispersing silica colloid in water.

[0094] The raw material powder of the main component is not particularly limited, and oxides of the above-mentioned components, mixtures thereof, and composite oxides can be used. In addition, various compounds that become the above-mentioned oxides or composite oxides upon firing, such as carbonates, oxalates, nitrates, hydroxides, and organometallic compounds, can also be appropriately selected and mixed for use.

[0095] The raw materials for the main components can be produced by various methods, including the so-called solid phase method as well as various liquid phase methods (e.g., the oxalate method, hydrothermal synthesis method, alkoxide method, sol-gel method, etc.).

[0096] Furthermore, the entire amount of the metal elements contained in the subcomponents does not have to be added in the form of a gel hydroxide slurry or an aqueous solution. For example, the dielectric ceramic composition according to this embodiment may be produced using a gel hydroxide slurry of Mg and an oxide powder of Mg.

[0097] The hydroxide particles in the gel hydroxide slurry are very fine, for example, with a particle diameter of about 5 to 10 nm. The hydroxide particles in the gel hydroxide slurry are uniformly dispersed together with the main component raw material powder in the mixing step described below, and will coat the surfaces of the main component particles (ABO3 particles) after drying. In addition, the elements dissolved in the aqueous solution will also coat the surfaces of the main component particles after drying.

[0098] Next, in this embodiment, the raw material powder of the main component and the gel-like hydroxide slurry or aqueous solution of the subcomponent element obtained above are pre-dispersed together with water. This pre-dispersion is performed to lightly disperse the raw material powder of the main component and the gel-like hydroxide slurry, and is not intended to crush the raw material powder of the main component. The pre-dispersion is performed, for example, using a ball mill for about 1 to 2 hours. At this time, a mixer such as a disperser other than a ball mill may also be used.

[0099] Next, the mixture after pre-dispersion is dispersed using a media-agitation type disperser to obtain a raw material mixture. In this embodiment, a bead mill is used as the media-agitation type disperser. The conditions for dispersion and mixing are not particularly limited, but it is preferable to use a medium with a diameter of 0.1 mm or less, for example.

[0100] In this dispersion, the raw material powder of the main component is crushed while the raw material powder of the main component and the elements constituting the subcomponent (gel hydroxide or added metal elements in an aqueous solution) are uniformly dispersed. As a result, after drying, the surfaces of the main component particles can be coated with gel hydroxide or the like. In addition, in this dispersion, it is preferable to add a hydrophilic dispersant to further enhance the dispersibility of the raw material mixture. Examples of hydrophilic dispersants include polycarboxylic acid-based dispersants.

[0101] The obtained raw material mixture is dried. In the raw material mixture after drying, the surfaces of the main component particles are coated with the added metal elements in the gel hydroxide slurry or aqueous solution. In other words, the elements added as the gel hydroxide slurry or aqueous solution are physically adsorbed onto the main component particles to coat them.

[0102] The drying method is not particularly limited, and may be appropriately selected from static drying, spray drying, freeze drying, etc. The drying temperature is also not particularly limited, and may be any temperature that can remove the solvent from the raw material mixture.

[0103] By preparing the raw material mixture through such processes, damage to the main component particles can be minimized, the crystallinity of the main component particles can be maintained, and the main component particles can be uniformly coated with the elements that make up the secondary components.

[0104] Therefore, in order to maintain the crystallinity of the main component particles, it is preferable that the specific surface area of the coated main component raw material powder contained in the dried raw material mixture be 1.4 times or less the specific surface area of the main component raw material powder before pre-dispersion, as measured by the BET method.

[0105] Subsequently, the dried raw material mixture is heat-treated. This heat treatment allows the additive component elements coated on the surfaces of the main component particles to be more firmly fixed to the particles. For example, a rotary kiln, a tunnel furnace, or a batch furnace can be used for this heat treatment. The holding temperature in the heat treatment is preferably in the range of 400 to 900°C. The holding time is preferably 0.2 to 3.0 hours. The drying and heat treatment of the raw material mixture may be carried out simultaneously. An example of a method for carrying out these simultaneously is spray pyrolysis.

[0106] Since the raw material mixture is aggregated after the heat treatment, it may be crushed to the extent that the aggregates are broken down. This crushing may be performed when preparing the dielectric layer paste described below.

[0107] The particle size of the raw material mixture (ceramic raw material powder) after the heat treatment is usually about 0.1 to 1 μm on average. Next, the ceramic raw material powder is made into a paint to prepare a dielectric layer paste. The dielectric layer paste may be an organic paint in which the dielectric raw material (ceramic raw material powder) is kneaded with an organic vehicle, or may be a water-based paint.

[0108] The organic vehicle is a binder dissolved in an organic solvent. The binder used in the organic vehicle is not particularly limited and may be appropriately selected from various common binders such as ethyl cellulose, polyvinyl butyral, etc. The organic solvent used is also not particularly limited and may be appropriately selected from various organic solvents such as terpineol, butyl carbitol, acetone, toluene, etc. depending on the method used, such as a printing method or a sheet method.

[0109] When the dielectric layer paste is a water-based paint, the dielectric raw material is kneaded with an aqueous vehicle in which a water-soluble binder, dispersant, etc. are dissolved in water. The water-soluble binder used in the aqueous vehicle is not particularly limited, and examples thereof include polyvinyl alcohol, cellulose, and water-soluble acrylic resin.

[0110] The internal electrode layer paste is prepared by kneading the conductive material made of the various conductive metals or alloys described above, or various oxides, organometallic compounds, etc. that become the conductive material after firing, with the organic vehicle described above. The internal electrode layer paste may also contain a co-material. The co-material is not particularly limited, but it is preferable that it has the same composition as the main component.

[0111] The external electrode paste may be prepared in the same manner as the internal electrode layer paste described above.

[0112] There are no particular restrictions on the content of the organic vehicle in each of the above pastes, and typical contents, such as about 1 to 5 mass% for the binder and about 10 to 50 mass% for the solvent, may be used. Furthermore, each paste may contain additives selected from various dispersants, plasticizers, dielectrics, insulators, etc., as needed. The total content of these is preferably 10 mass% or less.

[0113] When the printing method is used, the dielectric layer paste and the internal electrode layer paste are printed and laminated on a substrate such as PET, cut into a predetermined shape, and then peeled off from the substrate to form a green chip.

[0114] When the sheet method is used, a green sheet is formed using a dielectric layer paste, and an internal electrode layer paste is printed thereon to form an internal electrode pattern, and then these are laminated to form a green chip.

[0115] Before firing, the green chip is subjected to a binder removal treatment. The binder removal conditions are a temperature increase rate of preferably 5 to 300°C / hour, a holding temperature of preferably 180 to 400°C, and a temperature holding time of preferably 0.5 to 24 hours. The binder removal atmosphere is air or a reducing atmosphere.

[0116] In firing the green chip, the temperature rise rate is preferably 500 to 2000°C / hour. In this embodiment, by setting the temperature rise rate relatively fast, the reaction between Mg and Si can be suppressed, and the segregation phase 18 containing predetermined amounts of Mg and Mn can be easily formed.

[0117] The temperature held during firing is preferably 1300° C. or lower, more preferably 1100 to 1250° C., and the holding time is preferably 0.5 to 8 hours, more preferably 1 to 3 hours.

[0118] The firing atmosphere is preferably a reducing atmosphere, and the atmospheric gas may be, for example, a humidified mixed gas of N2 and H2.

[0119] In addition, the oxygen partial pressure during firing may be appropriately determined depending on the type of conductive material in the internal electrode layer paste. When a base metal such as Ni or a Ni-based alloy is used as the conductive material, the oxygen partial pressure in the firing atmosphere is set to 10 -14 ~10 -10 The temperature drop rate is preferably 50 to 2000°C / hour.

[0120] After firing in a reducing atmosphere, it is preferable to anneal the element body 4. Annealing is a treatment for reoxidizing the dielectric layer, which can significantly extend the IR life (insulation resistance life), thereby improving reliability.

[0121] The oxygen partial pressure in the annealing atmosphere is 10 -9 ~10 -5 It is preferable to set it to MPa.

[0122] The holding temperature during annealing is preferably 1100°C or less, particularly 900 to 1100°C. The temperature holding time is preferably 0 to 20 hours, more preferably 2 to 4 hours, and the temperature drop rate is preferably 50 to 500°C / hour, more preferably 100 to 300°C / hour. The atmospheric gas used for annealing is preferably, for example, humidified N2 gas.

[0123] In this embodiment, the two-stage annealing facilitates the formation of the segregation phase 18 containing predetermined amounts of Mg and Mn. The two-stage annealing is an annealing in which, after the temperature-raising step of the first stage annealing, the temperature is maintained at a temperature T°C lower than that of the first stage annealing, and preferably, T is greater than 0 and 200 or less.

[0124] In the above-mentioned binder removal treatment, firing and annealing, N2 gas or mixed gas can be humidified using a wetter, etc. In this case, the water temperature is preferably about 5 to 75°C.

[0125] The binder removal treatment, firing, and annealing may be carried out consecutively or independently.

[0126] The element body 4 obtained as described above is subjected to end surface polishing, for example, by barrel polishing or sandblasting, and then external electrode paste is applied and fired to form the external electrodes 6A, 6B. Then, if necessary, a coating layer is formed on the surfaces of the external electrodes 6A, 6B by plating or the like.

[0127] The multilayer ceramic capacitor 2 of this embodiment manufactured in this manner is mounted on a printed circuit board by soldering or the like, and is used in various electronic devices.

[0128] The multilayer ceramic capacitor 2 according to this embodiment can improve reliability and maintain a high relative dielectric constant even when the layers are thinned. This is thought to be due to the fact that the multilayer ceramic capacitor 2 according to this embodiment contains the segregation phase 18 having a predetermined Mg-Mn-O-based composition.

[0129] Conventional multilayer ceramic capacitors tend to form needle-shaped segregation phases 18, as shown in Figure 4. The needle-shaped segregation phases 18 are Mg-Si-O-based or Mg-Cr-O-based segregation phases. The needle-shaped segregation phases 18 tend to grow large and have long grain sizes. As a result, they may form to bridge one internal electrode layer 12 and the other internal electrode layer 12 adjacent to the inner dielectric layer 10. This is thought to be one of the causes of reduced reliability and an increased initial failure rate.

[0130] Furthermore, since the needle-like segregation phases 18 tend to grow large, if the thickness of the inner dielectric layer 10 is reduced, there will be locations in which the particles become a single grain in the stacking direction of the inner dielectric layer 10, making this unsuitable for reducing the thickness of the multilayer ceramic capacitor 2.

[0131] In contrast, in this embodiment, as shown in FIGS. 2 and 3 , Mg-Mn-O-based segregation phases 18 are formed. The Mg-Mn-O-based segregation phases 18 are unlikely to grow large. Therefore, the ratio of long grain size to short grain size of the Mg-Mn-O-based segregation phases 18 is kept within a predetermined range, the Mg-Mn-O-based segregation phases 18 have a nearly spherical shape, and the long grain size (DL) is sufficiently short compared to the thickness (Td) of the inner dielectric layer 10. That is, the Mg-Mn-O-based segregation phases 18 are small and scattered throughout the inner dielectric layer 10. This prevents the phases from bridging between one internal electrode layer 12 and the other internal electrode layer 12 adjacent to the inner dielectric layer 10. Furthermore, a large number of particles can be secured in the stacking direction of the inner dielectric layer 10. As a result, this embodiment is believed to improve the reliability of the multilayer ceramic capacitor 2.

[0132] Furthermore, according to the multilayer ceramic capacitor 2 of this embodiment, the dielectric constant can be improved while the particle size of the dielectric particles is kept small, making it suitable for use in thin-layer multilayer ceramic capacitors 2. This is thought to be due to Mg contained as an element constituting the minor component of the inner dielectric layer 10. The inclusion of Mg as an element constituting the minor component of the inner dielectric layer 10 can suppress grain growth of the dielectric particles containing the major component. This is thought to make it possible to keep the particle size of the dielectric particles small. Furthermore, it is possible to suppress the formation of a segregated phase, which is a paraelectric, and increase the proportion of ferroelectrics (dielectric particles containing the major component represented by ABO3) in the dielectric layer, which is thought to increase the dielectric constant of the dielectric layer as a whole.

[0133] The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the present invention.

[0134] For example, the multilayer electronic component of the present invention is not limited to multilayer ceramic capacitors and can be applied to other multilayer electronic components, including any electronic component having a dielectric layer, such as a bandpass filter, a multilayer three-terminal filter, a piezoelectric element, a PTC thermistor, an NTC thermistor, and a varistor.

[0135] In this embodiment, the inner dielectric layer 10 and the internal electrode layer 12 are stacked in the Z-axis direction, but the stacking direction may be the X-axis direction or the Y-axis direction. In this case, the external electrodes 6A, 6B may be formed to match the exposed surfaces of the internal electrode layers 12. Furthermore, the element body 4 does not have to be a laminate, but may be a single layer. Furthermore, the internal electrode layer 12 may be drawn to the outer surface of the element body 4 via a through-hole electrode, in which case the through-hole electrode and the external electrodes 6A, 6B are electrically connected.

[0136] In addition, in the above embodiment, a paste for a dielectric layer is obtained using a raw material mixture in which elements contained in the sub-components are fixed to raw material powder of the main component by a coating method. However, instead of the above raw material mixture, a calcined powder of the main component and a calcined powder containing elements that constitute the segregation phase 18 may be prepared.

[0137] However, from the viewpoint of improving reliability and the relative dielectric constant, it is preferable to obtain a dielectric layer paste using the raw material mixture fixed by the coating method in the above embodiment.

[0138] One of the purposes of adding the secondary component Mg is to suppress the grain growth of dielectric particles containing the main component. In the coating method of the above embodiment, the main component particles are coated in advance with elements constituting the secondary components, including Mg. This coating physically prevents the main component particles from directly adhering to each other and growing into grains.

[0139] On the other hand, when the auxiliary component is calcined and added, the dispersion state of the auxiliary component is inferior compared to the coating method, and therefore grain growth of the dielectric particles containing the main component is likely to proceed. Therefore, compared to the case where the auxiliary component is calcined, when the coating method is used, grain growth of the dielectric particles containing the main component is less likely to proceed, and variation in crystal grain size is suppressed. As a result, it is thought that variation in electrical properties such as the dielectric constant is also suppressed, and reliability and the dielectric constant are also improved.

[0140] Furthermore, as described above, the coating method makes it easy to suppress the grain growth of the dielectric particles containing the main component, and as a result, it is easy to reduce the grain size of the dielectric particles, so that it can be suitably used for thin-layer multilayer ceramic capacitors. [Example]

[0141] The present invention will be described in more detail below with reference to examples of the present invention, but the present invention is not limited to these examples.

[0142] (Examples 1 to 3, Comparative Examples 1 and 2) Elements constituting the main components and elements constituting the subcomponents were prepared so as to have the composition shown in Table 1, and a raw material mixture was prepared by fixing the elements by a coating method, to obtain a dielectric layer paste.

[0143] Then, a green sheet was formed on a PET film using the dielectric layer paste prepared above, and a green sheet was formed by screen printing the internal electrode layer paste.

[0144] A plurality of green sheets were stacked and pressure-bonded to form a green laminate, and this green laminate was cut to a predetermined size to obtain a green chip.

[0145] Next, the obtained green chip was subjected to a binder removal treatment, firing, and annealing under the following conditions to obtain a sintered body (element body 4).

[0146] The binder removal treatment conditions were as follows: Only in Example 3, the atmosphere was air. Holding temperature: 200~900℃ Atmospheric gas: Humidified N2 + H2 mixed gas Oxygen partial pressure: 10 -12 MPa

[0147] The firing conditions were as follows: Heating rate: See Table 2 Atmospheric gas: Humidified N2 + H2 mixed gas Oxygen partial pressure: 10 -12 MPa

[0148] The annealing conditions were as follows: Holding temperature: 850~1081℃ Atmospheric gas: Humidified N2 gas Oxygen partial pressure: 10 -7 MPa

[0149] A wetter was used to humidify the atmospheric gas during firing and annealing.

[0150] Next, the end surface of the obtained element body 4 was barrel polished by sandblasting. After that, Cu was applied as external electrodes 6A and 6B, and then baked in nitrogen gas to obtain a capacitor sample of the multilayer ceramic capacitor 2 shown in FIG.

[0151] The size of the element body 4 of the obtained capacitor sample 2 was L0×W0×T0=2.0 mm×1.25 mm×1.25 mm. The number of inner dielectric layers 10 sandwiched between the internal electrode layers 12 was 360.

[0152] < Observation of the capacity area > The cross section of the obtained capacitor sample was observed in a field of view of 6 μm × 6 μm in the capacitance region 14, and the longest grain size of the capacitance region segregation phase 184 was defined as the long grain size (DL), and the shortest grain size of the capacitance region segregation phase 184 was defined as the short grain size (DS). DL / DS was calculated for each field of view, and the maximum DL / DS and minimum DL / DS are shown in Table 2.

[0153] DL / Td was calculated from the longest grain size (DL) of all the capacitance region segregated phases 184 observed in each field of view and the average thickness (Td) of the inner dielectric layer 10 in each field of view. The results are shown in Table 2.

[0154] The average equivalent circle diameter (Da) of the volume region segregated phase 184 observed in each of the above fields of view was determined. The results are shown in Table 2. The shaded areas indicate areas not measured.

[0155] The area ratio (S1) of the volume region segregation phase 184 to the area of each of the above fields of view was determined, and the average value was calculated.

[0156] < Observation of the withdrawal area > In the cross section of the obtained capacitor sample, a 6 μm × 6 μm field of view of the pull-out region 15 was observed, and the longest grain size of the pull-out region segregation phase 185 observed within one field of view was defined as the long grain size (DL), and the shortest grain size of the pull-out region segregation phase 185 was defined as the short grain size (DS). DL / DS was calculated for each field of view, and the maximum and minimum DL / DS values are shown in Table 2.

[0157] The DL / Td was calculated from the longest long grain size (DL) of all the pull-out region segregated phases 185 observed in each field of view and the average thickness (Td) of the inner dielectric layer 10 in each field of view. The results are shown in Table 2.

[0158] The average equivalent circle diameter (Da) of the pullout region segregated phase 185 observed in each of the above fields of view was determined. The results are shown in Table 2. The shaded areas indicate areas not measured.

[0159] The area ratio (S2) of the pull-out region segregation phase 185 to the area of each of the above fields of view was determined, and the average value was calculated.

[0160] < S1 / S2 > S1 / S2 was calculated from S1 and S2 calculated as above. The results are shown in Table 2. The shaded areas indicate areas not measured.

[0161] < Dielectric particle size > The element body 4 was cut in the lamination direction of the inner dielectric layer 10 and the internal electrode layer 12, and the average area of the dielectric particles in the cross section was measured, and the diameter was calculated as the circle equivalent diameter. The results are shown in Table 3.

[0162] < Relative permittivity (ε) > The capacitance of the capacitor samples was measured at a reference temperature of 20°C using a digital LCR meter (Agilent Technologies 4278A) under conditions of a frequency of 1 kHz and an input signal level (measurement voltage) of 1.0 Vrms, and the relative dielectric constant (no unit) was calculated. The results are shown in Table 3.

[0163] < ±PTV defect rate index > The ±PTV defect rate was calculated by applying a voltage equal to or higher than the rated voltage to all capacitor samples in the production lot. Evaluation was performed using an index with Comparative Example 2 set to 100. The results are shown in Table 3.

[0164] [Table 1]

[0165] [Table 2]

[0166] [Table 3]

[0167] 5 is a graph based on Table 3, with the particle size [μm] of the dielectric particles on the x-axis and the relative dielectric constant on the y-axis. ■ indicates Example 1, ◆ indicates Example 2, ▲ indicates Example 3, × indicates Comparative example 1, and + indicates Comparative example 2. The line L satisfies y=20000x-1500.

[0168] From Tables 1 to 3 and FIG. 5, it was confirmed that when the molar ratio of MgO to SiO2 in the dielectric layer (MgO / SiO2) was 1 to 5, the molar ratio of MgO to MnO in the dielectric layer (MgO / MnO) was 5 to 13, and the total content of MgO, NiO, MnO, Cr2O3, and SiO2 in the segregation phase was taken as 100 molar parts, the content of MgO in the segregation phase was 63.0 to 99.5 molar parts and the content of MnO in the segregation phase was 0.5 to 12.6 molar parts (Examples 1 to 3), as these were located to the left of line L in FIG. 5, it was possible to improve the dielectric constant while keeping the particle size of the dielectric particles small.

[0169] From Tables 1 to 3, it was confirmed that when the molar ratio of MgO to SiO2 in the dielectric layer (MgO / SiO2) was 1 to 5, the molar ratio of MgO to MnO in the dielectric layer (MgO / MnO) was 5 to 13, and the total content of MgO, NiO, MnO, Cr2O3, and SiO2 in the segregation phase was taken as 100 molar parts, the ±PTV defect index was lower and the reliability was higher when the MgO content in the segregation phase was 63.0 to 99.5 molar parts and the MnO content in the segregation phase was 0.5 to 12.6 molar parts (Examples 1 to 3) than when the MnO content in the segregation phase was 0 molar part (Comparative Examples 1 and 2). [Explanation of symbols]

[0170] 2... Multilayer ceramic capacitor (capacitor sample) 4... Element body 6A,6B… External electrode 10... Inner dielectric layer 11…Exterior area 12… Internal electrode layer 121... Discontinuity 124...Capacitive region internal electrode layer 125A, 125B… Extraction area internal electrode layer 13… Interior area 14… Capacity area 15A,15B…Drawer area 18… segregated phase 184… Capacity region segregated phase 185… Pull-out region segregated phase

Claims

1. an element body including dielectric layers and internal electrode layers alternately stacked; The dielectric layer has the general formula ABO 3 and a subcomponent, the A site contains at least one element selected from the group consisting of Ba, Ca, and Sr; the B site contains at least one selected from the group consisting of Ti and Zr; The auxiliary components are MgO and SiO 2 and MnO, SiO in the dielectric layer 2 The molar ratio of MgO to SiO 2 ) is 1 to 5, the molar ratio of MgO to MnO (MgO / MnO) in the dielectric layer is 5 to 13; the element body includes a segregation phase, MgO, NiO, MnO, Cr in the segregation phase 2 O 3 and SiO 2 When the total content is 100 parts by mole, the content of MgO in the segregation phase is 63.0 to 99.5 parts by mole; The content of MnO in the segregation phase is 0.5 to 12.6 parts by mole.

2. The long grain size of the segregation phase is DL, When the short grain size of the segregation phase is DS, 2. The laminated electronic component according to claim 1, wherein the DL and the DS preferably satisfy the relationship 1<DL / DS<2.

3. The thickness of the dielectric layer is Td, When the long grain size of the segregation phase is DL, 3. The laminated electronic component according to claim 1, wherein Td / DL is preferably greater than 1.

4.

4. MgO, NiO, MnO, Cr in the segregation phase 2 O 3 and SiO 2 When the total content is 100 parts by mole, 4. The laminated electronic component according to claim 1, wherein the content of NiO in the segregation phase is 0 to 36 parts by mole.

5. MgO, NiO, MnO, Cr in the segregation phase 2 O 3 and SiO 2 When the total content is 100 parts by mole, Cr in the segregation phase 2 O 3 5. The laminated electronic component according to claim 1, wherein the content of the formula (I) is 0 to 0.1 parts by mole.

6. MgO, NiO, MnO, Cr in the segregation phase 2 O 3 and SiO 2 When the total content is 100 parts by mole, SiO in the segregation phase 2 6. The laminated electronic component according to claim 1, wherein the content of is 0 to 0.01 parts by mole.

7. The subcomponent is R 2 O 3 Including, When the content of the main component in the dielectric layer is 100 parts by mole, R in the dielectric layer 2 O 3 The content of is 0.4 to 2.0 parts by mole, 7. The laminated electronic component according to claim 1, wherein said R is at least one selected from the group consisting of Y, Dy, Ho and Yb.

8. When the content of the main component in the dielectric layer is 100 parts by mole, 8. The laminated electronic component according to claim 1, wherein the content of MgO in the dielectric layers is 0.5 to 2.0 parts by mole.

9. When the content of the main component in the dielectric layer is 100 parts by mole, 9. The laminated electronic component according to claim 1, wherein the content of MnO in the dielectric layers is 0.01 to 0.20 parts by mole.

10. When the content of the main component in the dielectric layer is 100 parts by mole, SiO in the dielectric layer 2 10. The laminated electronic component according to claim 1, wherein the content of

11. 11. The laminated electronic component according to claim 1, wherein the segregation phase has an equivalent circle diameter (Da) of 0.12 to 1.0 μm.

12. The segregation phase located in a capacitance region that contributes to capacitance is defined as a capacitance region segregation phase, The segregation phase located in the lead-out region that does not contribute to capacitance is defined as a lead-out region segregation phase, an area ratio of the capacitance region segregation phase in a predetermined range of the capacitance region is defined as S1; When the area ratio of the pull-out region segregation phase in a predetermined range of the pull-out region is S2, 12. The laminated electronic component according to claim 1, wherein S1 / S2 is smaller than 1.

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