Device with adjustable resistance element - Patent Application 20070122967

Abstract

The device includes at least one adjustable resistive element. Each adjustable resistive element has a first terminal, a second terminal, and a dielectric layer disposed between the first and second terminals. The device is configured to apply at least one electrical set pulse to the resistive element to form a conductive filament having a plurality of oxygen vacancies in the dielectric layer. The device is configured to apply at least one electrical reset pulse to displace a subset of the oxygen vacancies in the conductive filament. The at least one electrical reset pulse includes a first portion adapted to increase the temperature of the conductive filament and increase the mobility of the oxygen vacancies in the conductive filament, and a second portion configured to displace the subset of oxygen vacancies in the conductive filament.

Description

[Technical Field]

[0001] The present disclosure is notably directed to devices comprising one or more adjustable resistive elements. The present disclosure also relates to methods for programming adjustable resistive elements, neuromorphic networks, and computer program products for operating devices comprising one or more adjustable resistive elements. [Background technology]

[0002] Nanoscale memory devices, whose resistance depends on the history of applied electrical signals, have the potential to become important building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. One leading solution is resistive RAM (RRAM). It involves the formation of filaments of oxygen vacancies in a dielectric, such as HfO2, using a process called soft breakdown. The filaments can then be closed (SET) or widened (RESET) during operation. Strongly reducing metals, such as titanium, can be used as one of the electrodes to enhance the formation of the filaments. Summary of the Invention

[0003] Embodiments of the present disclosure include methods for programming tunable resistive elements, neuromorphic networks, and computer program products for operating devices comprising one or more tunable resistive elements.

[0004] According to some embodiments of the present disclosure, a device includes one or more adjustable resistive elements. The adjustable resistive elements include a first terminal, a second terminal, and a dielectric layer disposed between the first and second terminals. The device is configured to apply one or more electrical set pulses to the one or more resistive elements to form a conductive filament having a plurality of oxygen vacancies in the dielectric layer, and apply one or more electrical reset pulses to displace a subset of the oxygen vacancies in the conductive filament. The electrical reset pulses include a first portion adapted to increase a temperature of the conductive filament and increase the mobility of the oxygen vacancies in the conductive filament, and a second portion configured to displace the subset of the oxygen vacancies in the conductive filament.

[0005] According to another embodiment of the present disclosure, a method is used to program an adjustable resistive element. The adjustable resistive element includes a first terminal, a second terminal, and a dielectric layer between the first and second terminals. The method includes applying one or more electrical set pulses to one or more resistive elements to form a conductive filament having a plurality of oxygen vacancies in the dielectric layer, and applying one or more electrical reset pulses to displace a subset of the oxygen vacancies in the conductive filament. The electrical reset pulse includes a first portion adapted to increase the temperature of the conductive filament and increase the mobility of the oxygen vacancies in the conductive filament. The electrical reset pulse further includes a second portion configured to displace the subset of oxygen vacancies in the conductive filament.

[0006] According to another embodiment of the present disclosure, a computer program product is used to operate a device including one or more adjustable resistive elements. The adjustable resistive elements include a first terminal, a second terminal, and a dielectric layer disposed between the first and second terminals. The computer program product includes a computer-readable storage medium having program instructions embodied therewith. The program instructions are executable by a control unit of the device to cause the control unit to execute a method including applying one or more electrical set pulses to the one or more resistive elements to form a conductive filament having a plurality of oxygen vacancies in the dielectric layer, and applying one or more electrical reset pulses to displace a subset of the oxygen vacancies in the conductive filament. The electrical reset pulses include a first portion adapted to increase the temperature of the conductive filament and increase the mobility of the oxygen vacancies in the conductive filament, and a second portion configured to displace the subset of oxygen vacancies in the conductive filament.

[0007] Embodiments of the present disclosure are described in more detail below by way of illustrative and non-limiting examples with reference to the accompanying drawings, in which: [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram of a device according to some embodiments of the present disclosure. [Figure 2] 1 is a schematic cross-sectional view of a tunable resistance element according to some embodiments of the present disclosure. [Figure 3A] FIG. 2 is a schematic cross-sectional view of a tunable resistance element in a first reset resistance state according to some embodiments of the present disclosure. [Figure 3B] FIG. 2 is a schematic cross-sectional view of a tunable resistive element in a first set resistance state according to some embodiments of the present disclosure. [Figure 3C] FIG. 2 is a schematic cross-sectional view of a tunable resistive element in a second set resistance state according to some embodiments of the present disclosure. [Figure 3D]FIG. 10 is a schematic cross-sectional view of a tunable resistive element in a third set resistance state according to some embodiments of the present disclosure. [Figure 3E] FIG. 2 is a schematic cross-sectional view of a tunable resistance element in a second, reset resistance state according to some embodiments of the present disclosure. [Figure 3F] FIG. 10 is a schematic cross-sectional view of a tunable resistance element in a third reset resistance state according to some embodiments of the present disclosure. [Figure 3G] FIG. 2 is a diagram of a tunable resistance element in a first reset resistance state according to some embodiments of the present disclosure. [Figure 4] FIG. 10 depicts current and voltage characteristics of a tunable resistance element according to some embodiments of the present disclosure. [Figure 5] 1 depicts an illustrative example of a resistance curve of a resistive element according to some embodiments of the present disclosure. [Figure 6] FIG. 10 depicts an illustrative reset pulse according to some embodiments of the present disclosure. [Figure 7] FIG. 10 depicts another illustrative reset pulse according to some embodiments of the present disclosure. [Figure 8] FIG. 10 depicts an example of a set pulse according to some embodiments of the present disclosure. [Figure 9] FIG. 1 depicts a neuromorphic network according to some embodiments of the present disclosure. [Figure 10] FIG. 1 depicts an illustrative flow chart of a method for programming a tunable resistance element according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Throughout the drawings, the same or similar reference numbers represent the same or similar elements.

[0010] While the embodiments described in the present invention are susceptible to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It is to be understood, however, that the particular embodiments described are not to be taken in a limiting sense. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the scope of the present disclosure.

[0011] Aspects of the present disclosure relate generally to the field of computing, and in particular to devices comprising one or more adjustable resistive elements. The present disclosure is not necessarily limited to such applications, and various aspects of the present disclosure may be understood through a discussion of various examples using this context.

[0012] While setting the low resistance state has been shown to be well controlled using the current compliance of the set signal, resetting the cell to a higher resistance is much less flexible. More specifically, simply resetting to a specific high resistance state (HRS) is usually feasible. Thus, there is a need for further improvements in resistive elements and related devices.

[0013] With reference to Figures 1-10, some general aspects and terminology of embodiments of the present disclosure will be described.

[0014] According to some embodiments of the present disclosure, a resistive material may be defined as a material having an electrical resistance that can be changed by applying an electrical signal thereto. The electrical signal may be, for example, a current flowing through the device or a voltage applied to the resistive material. The current and / or voltage may be applied to the resistive element, for example, in the form of a pulse. As a result, the electrical resistance of the resistive element depends on the history of the electrical signal applied to the resistive memory element.

[0015] Resistive materials may be used, in particular, as memory elements. Resistive memory elements are thus based on a physical phenomenon that occurs in a material that changes its resistance under the application of an electric current or an electric field. The change is usually nonvolatile and reversible. Several classes of resistive memory elements are known, ranging from metal oxides to chalcogenides. A typical resistive memory element is a metal / insulator / metal structure in which the metal component serves as the electrode, and the insulator is the resistive switching material. Such resistive memory elements exhibit excellent performance in terms of power consumption, potential integration density, retention, and endurance.

[0016] One particularly promising example of a resistive memory device is resistive random access memory (RRAM). This is a nonvolatile memory technology in which the basic storage unit ("cell") comprises an RRAM material located between a pair of electrodes. The RRAM material in such cells is an electrically insulating matrix that typically exhibits high resistance to electrical current. However, due to the properties of the RRAM matrix, or the combination of matrix and electrode materials, a particular feature of RRAM cells is that a conductive path can be formed within the highly resistive matrix by applying an appropriate electrical signal, specifically a voltage, to the electrodes. This conductive path extends through the matrix in the direction between the electrodes. The conductive path can be broken or eliminated by applying another "RESET" signal to the electrodes, returning the cell to a high-resistance RESET state. Thus, by appropriate application of SET and RESET pulses in one or more data write operations, individual cells can be programmed to states with somewhat different resistance values. The programmed cell state can be determined in a read operation using the cell resistance as a metric for the cell state. When a read voltage is applied to the electrodes, the current that flows through the cell depends on the resistance of the cell, allowing the cell current to be measured to determine the cell state. The read voltage is typically much lower than the write voltage used for programming, so that the read operation does not disturb the programmed cell state.

[0017] While conductive paths can generally be formed within an RRAM cell by any of several different mechanisms, embodiments of the present disclosure employ, among other things, the formation of conductive paths by oxygen vacancies resulting from the migration of oxygen ions in an insulating matrix.

[0018] The term "set pulse" generally refers to a pulse, or more generally an electrical signal, which, among other things, lowers the electrical resistance of a resistive element by forming a filament of oxygen vacancies between the electrodes / terminals of the resistive element.

[0019] The term "reset pulse" generally refers to a pulse, or more generally an electrical signal, that increases the electrical resistance of a resistive element by, among other things, decreasing the size or resistivity of the conductive filament.

[0020] The term "reset resistance state of a resistive element" generally refers to the resistance state after application of one or more reset pulses. The reset resistance state may also be commonly referred to as a high resistance state (HRS).

[0021] The term "set resistance state of a resistive element" generally refers to the resistance state after application of one or more set pulses. The set resistance state may also be commonly referred to as a low resistance state (LRS).

[0022] According to an embodiment of the present disclosure, the reset pulse has a different polarity than the set pulse.

[0023] FIG. 1 depicts a simplified schematic block diagram of a resistive device 10. In at least some embodiments of the present disclosure, the resistive device 10 may be a resistive memory device 10. The memory device 10 includes a multilevel resistive memory 11 for storing data in one or more integrated arrays of resistive memory elements, as described below. Reading and writing data to the memory 11 is performed by a control unit 12. The control unit 12 includes circuitry of generally known form for programming the resistive memory elements during data write operations and for producing read measurements for detecting element states during data read operations. During these operations, the control unit 12 can address individual resistive memory elements by applying appropriate control signals to the arrays of word and bit lines in the resistive memory 11. User data input to the device 10 may undergo some form of write processing, such as coding for error correction purposes, before being provided to the resistive memory 11 as write signals, specifically write voltages. Similarly, the read signals received from the resistive memory 11 may be processed by a read processing module of the control unit 12 for, for example, code and word detection and / or error correction, to recover the original input user data.

[0024] 2 depicts a simplified cross-sectional view of a tunable resistance element 20 according to at least one embodiment of the present disclosure. The tunable resistance element 20 comprises a first terminal 21, a second terminal 22, and a dielectric layer 23. The dielectric layer 23 may comprise a metal oxide material. The metal oxide material may be, among others, a transition metal oxide. According to at least one embodiment, the transition metal oxide may be an ABO 3-δ Perovskites, where A is an alkaline earth metal, a rare earth element, or a combination thereof, and B is a transition metal element. Examples include lanthanum titanate or Titanic acid Strontium or both (La,Sr)TiO 3-δ、 Yttrium titanate or Titanic acid calcium or both (Y,Ca)TiO 3-δ、 Lanthanum manganate or Manganic acid Strontium or both (La,Sr)MnO 3-δ , or praseodymium manganate or Manganic acid Calcium or both (Pr,Ca)MnO 3-δ Further transition metal oxides that may be advantageously used in embodiments of the present disclosure include vanadium oxide or oxidation Chromium or both (V,Cr)2O 3-δ Other materials that can be used to advantage include nickel oxide, NiO 1-δ , titanium oxide TiO 2-δ、 Hafnium oxide or oxidation Zirconium or both (Hf,Zr)O 2-δ and cerium oxide CeO 2-δ Preferably, the metal oxide material has a thermal conductivity of, for example, 10 -9 cm 2 / Vs or higher.

[0025] The first terminal 21 and the second terminal 22 may include or consist of a metal, a metal oxide, or conductive or amorphous carbon. The first terminal 21 and the second terminal 22 may include or consist of Ti, TiN, Ta, TaN, W, Cu, Pt, and some metal oxides such as WO3, RuO2, and ITO, or amorphous C. The dielectric layer 23 may preferably be embodied with a specific thickness in the z-direction of between 1 nm and 50 nm.

[0026] Dielectric layer 23 is configured to form conductive filaments of oxygen vacancies upon application of an electrical programming signal, eg, a current or voltage.

[0027] According to some embodiments of the present disclosure, multiple resistive elements 20 may be implemented in resistive memory 11, and control unit 12 of memory device 10 may be configured to apply one or more write signals, particularly write voltages, to first terminal 21 and second terminal 22 in a write mode to write the resistance states. Additionally, control unit 12 may apply read signals, particularly read voltages, to first terminal 21 and second terminal 22 in a read mode to read the resistance states.

[0028] The write signal may be embodied as, among other things, an electrical set pulse and an electrical reset pulse. By applying an electrical set pulse to the resistive element, one or more conductive filaments of oxygen vacancies can be formed in the dielectric layer 23. This causes a decrease in the electrical resistance of the resistive element 20. Furthermore, by applying one or more electrical reset pulses to the resistive element 20, a subset of the oxygen vacancies of the conductive filaments may be moved, or in other words displaced, reducing the size or resistance of the conductive filaments, thereby increasing the resistance of the resistive element 20.

[0029] According to at least some embodiments of the present disclosure, the control unit 12 may program the resistive state of the resistive element 20 through, among other things, an iterative program and verify procedure.

[0030] Programming the resistance state of resistive element 20 is described in more detail with reference to Figures 3A-3G.

[0031] 3A depicts a schematic cross-sectional view of the tunable resistance element 20 in the first reset resistance state RESET 1. In the first reset resistance state RESET 1, there are no conductive filaments of oxygen vacancies between the first terminal 21 and the second terminal 22, or the previous conductive filaments are at least disrupted (as shown in FIG. 3G).

[0032] The first reset resistance state RESET 1 may be considered to be the initial state of the resistive element 20, meaning that no electric field or electrical programming pulses have been applied to the resistive element 20. Additionally, the first reset resistance state RESET 1 can be reached by applying one or more electrical reset pulses to the resistive element 20. These electrical reset pulses can return the resistive element 20 to its original state.

[0033] The first reset resistance state may also refer to a complete reset state or a full reset state, indicating that no filaments / paths of oxygen vacancies exist between the first terminal 21 and the second terminal 22.

[0034] 3B shows a schematic cross-sectional view of the tunable resistive element 20 in a first set resistance state SET 1. The first set resistance state SET 1 may be reached by applying one or more set pulses. The one or more set pulses form filaments 30b of oxygen vacancies in the dielectric layer 23 between the first terminal 21 and the second terminal 22. The corresponding process for forming the conductive filaments 30b is called soft breakdown.

[0035] Note that although Figures 3B-3G show a single conductive filament 30b-g (collectively referred to as conductive filament 30), the set pulse may also form multiple parallel conductive filaments of oxygen voids depending on the respective device / cell geometry.

[0036] The filament 30b shown in FIG. 3B is relatively small, as shown having an exemplary width w1.

[0037] FIG. 3C shows a schematic cross-sectional view of the tunable resistive element in a second set resistance state SET2. The second set resistance state SET2 may be reached by applying one or more set pulses to the first terminal 21 and the second terminal 22, starting from the first set resistance state SET1. Compared to the conductive filament 30b in the first set resistance state SET1 (illustrated in FIG. 3B), the conductive filament 30c in the second set resistance state SET2 is larger. More specifically, the conductive filament 30c in the second set resistance state includes a larger number of oxygen vacancies than the conductive filament 30b in the first set resistance state. This may result in, among other things, a larger width and a larger cross-section of the conductive filament 30c in the second set resistance state, as illustrated by the exemplary width w2.

[0038] FIG. 3D shows a schematic cross-sectional view of the tunable resistive element in a third set resistance state SET3. The third set resistance state SET3 may be reached by applying one or more set pulses to the first terminal 21 and the second terminal 22, starting from the second set resistance state SET2. Compared to the conductive filament 30c in the second set resistance state SET2 (illustrated in FIG. 3C), the conductive filament 30d is larger. More specifically, the conductive filament 30d in the third set resistance state includes a greater number of oxygen vacancies than the conductive filament 30c in the second set resistance state. This may result in, among other things, a larger width and a larger cross-section of the conductive filament 30d in the third set resistance state, as illustrated by the exemplary width w3.

[0039] Referring now to FIG. 3E , a second reset resistance state, RESET 2, is shown. The second reset resistance state, RESET 2, may be reached by applying one or more reset pulses, starting from the third set resistance state, SET 3. The reset pulse generally displaces a subset of oxygen vacancies in the conductive filament 30 e. Such displacement of oxygen vacancies generally reduces the size of the filament 30 e. In other words, the displacement of oxygen vacancies makes the filament 30 e smaller and / or less conductive. In particular, the reset pulse is configured in accordance with embodiments of the present disclosure to trigger oxygen vacancies to displace away from the first terminal 21. In other words, the reset pulse displaces or moves oxygen vacancies closer to the first terminal 21. More generally, the reset pulse is configured in accordance with embodiments of the present disclosure to trigger oxygen vacancies to displace away from the electrode operating as the anode.

[0040] Thus, the displacement of oxygen vacancies by the reset pulse reduces the size of filament 30e, particularly near first terminal 21. This is illustrated in a simplified exemplary manner in FIG. 3E by filament 30e having a smaller-sized segment 32a near first terminal 21 and a larger-sized segment 32b near second terminal 22. According to an embodiment, segment 32a of filament 30e in the second reset resistance state RESET2 may have a width w2 corresponding to the width w2 of filament 30c in the second set resistance state SET2, and segment 32b of filament 30e in the second reset resistance state RESET2 may have a width w3 corresponding to the width w3 of filament 30d in the third set resistance state SET3. Of course, as already mentioned above, segments 32a and 32b are illustrated in a simplified manner for purposes of explaining the overall operation of a tunable resistance element according to an embodiment of the present disclosure.

[0041] The nominal resistance value of the second reset resistance state RESET2 may correspond to or be close to the nominal resistance value of the second set resistance state SET2.

[0042] 3F, a third reset resistance state RESET 3 is shown. The third reset resistance state RESET 3 may be reached by applying one or more reset pulses, starting from the second reset resistance state RESET 2. The reset pulses are configured in accordance with embodiments of the present disclosure to trigger additional oxygen vacancies to shift away from the first terminal 21. Thus, the reset pulses further reduce the size of the filament 30f in the vicinity of the first terminal 21.

[0043] 3F in a simplified exemplary manner for filament 30f. In the third reset resistance state RESET 3, filament 30f has segment 32a with width w1 corresponding to width w1 of filament 30b in the first set resistance state SET 1, and segment 32b with width w3 corresponding to width w3 of filament 30d in the third set resistance state SET 3. Thus, the nominal resistance value of the third reset resistance state RESET 3 may correspond to or may be close to the nominal resistance value of the first set resistance state SET 1.

[0044] Referring next to FIG. 3G , the adjustable resistive element is again shown in the first (full) reset resistive state RESET 1. The first reset resistive state RESET 1 may be reached by applying one or more reset pulses, starting from the third reset resistive state RESET 3. The reset pulses are configured according to embodiments of the present disclosure to trigger additional oxygen vacancies to shift away from the first terminal 21. Thus, the reset pulses further reduce the size of the filament in the vicinity of the first terminal 21. More specifically, the additional reset pulses widen, or in other words, break, the filament 30g in the region adjacent to or near the first terminal 21. Thus, there is no longer a complete conductive filament between the first terminal 21 and the second terminal 22. Segment 32b of the filament 30g may remain in the region adjacent to or near the second terminal 22, and the rupture of the filament 30g may correspond to a significant increase in the nominal resistance of the resistive element 20. Thus, the nominal resistance states of the resistive element 20 illustrated in FIG. 3A and the resistive element 20 illustrated in FIG. 3G may be substantially similar to each other, and thus they are both commonly referred to as the first reset resistance state RESET 1.

[0045] According to embodiments of the present disclosure, the reset resistance states RESET 1, RESET 2, and RESET 3 may also be referred to as high resistance states HRS 1, HRS 2, and HRS 3, respectively.

[0046] According to embodiments of the present disclosure, the set resistance states SET1, SET2, and SET3 may also be referred to as low resistance states LRS1, LRS2, and LRS3, respectively. In this regard, the term "high resistance state" refers to the state reached after application of a reset signal / reset pulse, and the term "low resistance state" refers to the state reached after application of a set signal / set pulse.

[0047] FIG. 4 depicts current and voltage characteristics of a tunable resistance element according to an embodiment of the present disclosure. In particular, FIG. 4 illustrates the feasibility of obtaining multiple high resistance states. Using a reset signal / reset pulse, three different reset / high resistance states HRS 1, HRS 2, and HRS 3 can be programmed. Furthermore, a single type of set pulse (with current compliance adjusted to 1 in the units of FIG. 4) is used to result in the set / low resistance state LRS 3. The nominal value of the reset resistance state may correspond in part to the nominal value of the set resistance state as noted above.

[0048] FIG. 5 illustrates an example of a resistance curve for a resistive element according to an embodiment of the present disclosure. The y-axis represents resistance, and the x-axis represents the number of set or reset pulses applied to the resistive element. The resistance of the resistive element is in one of the lowest set resistance states, R SETL and the highest one of the multiple reset resistance states R RESET 3A to 3G, the corresponding adjustable resistance element can be varied between the lowest set resistance state R SET3 and the highest reset resistance state R RESET1 may be changed between

[0049] By applying a reset pulse, the resistance can be increased. Conversely, by applying a set pulse, the resistance can be decreased. In this regard, embodiments of the present disclosure may provide non-hysteretic behavior of the resistive element, which facilitates bidirectional programming of the resistance value of the resistive element. In other words, according to embodiments of the present disclosure, the resistive element provides a substantially symmetrical bidirectional resistance curve upon application of a set pulse and a reset pulse. Thus, embodiments of the present disclosure may provide a continuously adjustable resistor as a two-terminal device.

[0050] 6 depicts an example reset pulse 600 in accordance with at least one embodiment of the present disclosure. The horizontal axis represents time t in arbitrary units, and the vertical axis represents the voltage V of the reset pulse 600 in arbitrary units. The reset pulse 600 is configured to decouple the effects of temperature rise and electric field-induced ion drift. The reset pulse 600 includes a first portion 601, or first signal segment 601, extending over a first duration T1, and a second portion 602, or second signal segment 602, extending over a second duration T2.

[0051] The first portion 601 is adapted to increase the temperature of the conductive filament 30 (such as that shown in FIGS. 3B-3G) and increase the mobility of oxygen vacancies in the conductive filament 30. The second portion 602 is configured to displace a subset of the oxygen vacancies in the conductive filament 30. More specifically, the second portion 602 is configured to move the oxygen vacancies away from the terminal acting as the anode. The reset pulse 600 is configured to allow multiple reset resistance states to be programmed, and incremental increases in resistance can be achieved directly without a full reset.

[0052] The first portion 601 of the electrical reset pulse 600 has a first peak amplitude V peak1 and a second portion 602 of the electrical reset pulse 600 has a second peak amplitude V peak2 The first peak amplitude V peak1 is the second peak amplitude V peak2 The first duration T1 is greater than the second duration T2.

[0053] The first portion 601 generally consists of a larger amplitude, shorter duration signal. This signal segment will raise the temperature at / around the conductive filament 30. This increases the mobility of oxygen voids in this region. However, the duration of this first signal segment 601 is selected to be short so that the oxygen voids essentially do not have time to shift and therefore essentially remain in place.

[0054] The second portion 602 is comprised of a signal of lower amplitude and longer duration. This signal segment results in a shift in the oxygen vacancy.

[0055] Resistive elements according to embodiments of the present disclosure take advantage of the fact that the elevated temperature at or around the conductive filament 30 caused by the first signal segment 601 remains for some duration beyond said first signal segment. This may be established, among other things, by the low thermal conductivity of the material of the resistive element. Thus, the temperature at / around the conductive filament 30 and the associated mobility of oxygen vacancies remain high during the second signal segment 602.

[0056] The smaller amplitude of the second signal segment 602, and the accompanying slower rate of displacement and longer duration of the oxygen vacancies, then allows for a well-controlled displacement of the oxygen vacancies. As a result, the resistance state of the resistive element can be incrementally lowered by the set pulse and incrementally increased by the reset pulse. In other words, the resistance state of the resistive element can be modified in a well-controlled manner.

[0057] Resistive elements according to embodiments of the present disclosure may provide higher endurance than conventional RRAM, which requires a full reset to obtain an incremental increase in the resistance of the RRAM cell.

[0058] According to at least one embodiment of the present disclosure, the first peak amplitude V peak1 is the second peak amplitude V peak2 According to at least one embodiment of the present disclosure, the first peak amplitude V peak1 is the second peak amplitude V peak2 According to at least one embodiment of the present disclosure, the first peak amplitude V peak1 is the second peak amplitude V peak2According to at least one embodiment of the present disclosure, the first peak amplitude V peak1 is the second peak amplitude V peak2 is at least five times larger than

[0059] According to at least one embodiment of the present disclosure, the second duration T2 is at least 5 times longer than the first duration T1. According to at least one embodiment of the present disclosure, the second duration T2 is at least 10 times longer than the first duration T1.

[0060] According to at least one embodiment of the present disclosure, the first peak amplitude is in a range between 0.1 volts and 2 volts.

[0061] According to at least one embodiment of the present disclosure, the second peak amplitude is in a range between 0.02 volts and 1 volt.

[0062] In accordance with at least one embodiment of the present disclosure, the first duration is in a range between 1 nanosecond and 100 nanoseconds.

[0063] According to at least one embodiment of the present disclosure, the second duration is in a range between 5 nanoseconds and 1000 nanoseconds.

[0064] 7 depicts an example reset pulse 700 in accordance with at least one embodiment of the present disclosure. The horizontal axis represents time t in arbitrary units, and the vertical axis represents the voltage V of the reset pulse 700 in arbitrary units.

[0065] The reset pulse 700 includes a first portion 701, or first signal segment 701, extending over a first duration T1, and a second portion 702, or second signal segment 702, extending over a second duration T2. ​​The first portion 701 is adapted to increase the temperature of the conductive filament 30 and increase the mobility of oxygen vacancies in the conductive filament 30. The second portion 702 is configured to displace a subset of the oxygen vacancies in the conductive filament 30. More specifically, the second portion 702 is configured to move the oxygen vacancies away from the terminal acting as the anode.

[0066] The first portion 701 of the electrical reset pulse 700 has a first peak amplitude V peak1 The second portion 702 of the electrical reset pulse 700 has a second peak amplitude V peak2 which is the second peak amplitude V of the reset signal 600 peak2 (shown in Figure 6) Lower second peak amplitude V peak2 is compensated by the second duration T2 of the reset signal 700, which is longer than the second duration T2 of the reset signal 600.

[0067] It should be noted that the shapes of the reset pulses 600 and 700 shown in Figures 6 and 7 are merely illustrative examples, and the shapes may be adapted according to the needs of each application. According to other embodiments of the present disclosure, various other shapes may be used to achieve the desired decoupling of temperature rise and oxygen vacancy shift.

[0068] 8 depicts an illustrative example of a signal 800 of a set pulse according to one embodiment of the present disclosure. The set pulse of signal 800 has a constant peak amplitude V peak In accordance with at least one embodiment of the present disclosure, programming the desired set resistance state may involve application of multiple successive set pulses, such as in this example of two set pulses.

[0069] 6, 7, and 8 depict illustrative examples of absolute voltage levels of the reset and set pulses according to embodiments of the present disclosure. As mentioned above, the set and reset pulses have different polarities.

[0070] According to at least one embodiment of the present disclosure, the peak amplitude V of the set pulse peak is the absolute value of the first peak amplitude of the reset pulse V peak1 and the absolute value of the second peak amplitude V peak2 The absolute value of

[0071] FIG. 9 illustrates a neuromorphic network 900 according to at least one embodiment of the present disclosure. The neuromorphic network 900 includes an input layer 910, a hidden layer 920, and an output layer 930. The input layer 910 includes a plurality of input nodes 911, and the output layer 930 includes a plurality of output nodes 931. The hidden layer 920 includes a plurality of neurons 940 and a plurality of synapses 950. Each of the synapses 950 may be embodied as a resistive element, such as the resistive element 20 described above. The adjustable resistive elements according to embodiments of the present disclosure are particularly adapted to function as synapses in light of bidirectional programming enabled by a unique reset pulse. Thus, in such analog neuromorphic networks, a synapse array may be implemented with a single resistive element instead of two resistive elements as in prior art. As a result, the present disclosure facilitates higher density arrays.

[0072] FIG. 10 depicts an example flow chart of a method 1000 for programming a tunable resistance element.

[0073] In operation 1010, the method 1000 includes applying one or more electrical set pulses to one or more resistive elements to form conductive filaments containing a plurality of oxygen vacancies within the dielectric layer, thereby lowering the resistance.

[0074] In operation 1020, the method includes applying one or more electrical reset pulses to displace a subset of oxygen vacancies in the conductive filament, thereby increasing the resistance.

[0075] The present invention may be a system, method, and / or computer program product at any possible level of technical detail of integration. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to perform aspects of the present invention.

[0076] A computer-readable storage medium may be a tangible device capable of retaining and storing instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above. A non-exclusive list of more specific examples of computer-readable storage media includes the following: portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disks (DVDs), memory sticks, floppy disks, mechanically encoded devices such as punch cards or groove-embossed structures having recorded instructions, and any suitable combination of the above. Computer-readable storage media, as used in this disclosure, should not be considered to be transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses passing through fiber optic cable) or electrical signals transmitted through wires.

[0077] The computer-readable program instructions described in this disclosure can be downloaded from a computer-readable storage medium to each computing / processing device, or can be downloaded to an external computer or storage device over a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions within the respective computing / processing device for storage on a computer-readable storage medium.

[0078] Computer-readable program instructions for carrying out the operations of the present invention may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk®, C++, and procedural programming languages ​​such as the “C” programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may execute computer readable program instructions to carry out aspects of the present invention by personalizing the electronic circuitry by utilizing state information of the computer readable program instructions.

[0079] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0080] These computer-readable program instructions may be provided to a processor of a computer or other programmable data processing apparatus to produce a machine, such that the instructions, when executed by the processor of the computer or other programmable data processing apparatus, create means for performing the function(s) / act(s) specified in one or more blocks of the flowchart(s) and / or block diagram(s). These computer-readable program instructions may also be stored on a computer-readable storage medium capable of instructing a computer, programmable data processing apparatus or other device, or combination thereof, to function in a particular way, such that the computer-readable storage medium on which the instructions are stored comprises an article of manufacture containing instructions that implement an aspect of the function(s) / act(s) specified in one or more blocks of the flowchart(s) and / or block diagram(s).

[0081] The computer-readable program instructions may also be loaded into a computer, other programmable data processing apparatus, or other device to cause the computer, other programmable apparatus, or other device to perform a sequence of operational steps to generate a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus, or other device, perform the functions / operations specified in one or more blocks of the flowcharts and / or block diagrams.

[0082] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of an instruction, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions described in the blocks may occur out of the order described in the figures. For example, two blocks shown in succession may actually be accomplished as a single step, may be executed concurrently, may be executed nearly concurrently, may be accomplished in a partially or fully temporally overlapping manner, or the blocks may sometimes be executed in the reverse order, depending on the functionality involved. It should also be noted that each block in the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a dedicated hardware-based system that performs the specified function or operation or executes a combination of dedicated hardware and computer instructions.

[0083] The description of various embodiments of the present invention is presented for illustrative purposes and is not intended to be exclusive or limiting to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein has been selected to best explain the principles of the embodiments, practical applications, or technical improvements to technology found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.

[0084] In general, modifications described with respect to one embodiment may be applied to another embodiment as appropriate.

[0085] In addition to the embodiments described above, other embodiments having fewer, more, or different operational steps are contemplated. Also, some embodiments may perform some or all of the above operational steps in a different order. Furthermore, multiple operations may occur simultaneously or as part of a larger process. The modules are listed and described illustratively according to some embodiments and are not meant to indicate the necessity of any particular module or the exclusivity of other potential modules (or functions / purposes as applied to specific modules).

[0086] In the above description, reference has been made to various embodiments. However, it should be understood that the present disclosure is not limited to the specifically described embodiments. Instead, any combination of the described features and elements, whether in connection with different embodiments or not, is contemplated for implementing and practicing the present disclosure. Many modifications and variations may become apparent to those skilled in the art without departing from the scope of the described embodiments. Moreover, embodiments of the present disclosure may achieve advantages over other possible solutions or over the prior art, but whether or not a particular advantage is achieved by a given embodiment does not limit the present disclosure. Accordingly, the described aspects, features, embodiments, and advantages are merely exemplary and are not considered elements or limitations of the appended claims unless expressly recited in the claims.

[0087] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of various embodiments. As used herein, the singular forms "a," "an," and "the" are intended to include the plural as well, unless the context clearly dictates otherwise. It should be further understood that the terms "includes" and / or "including," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, or components, or combinations thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups or combinations thereof. In the foregoing detailed description of exemplary embodiments of various embodiments, reference is made to the accompanying drawings (in which like numerals represent like elements), which form a part of this specification, and in which are shown, by way of illustration, specific example embodiments in which various embodiments may be practiced. These embodiments have been described in sufficient detail to enable those skilled in the art to practice the embodiments, but other embodiments may be used, and logical, mechanical, electrical, and other changes may be made without departing from the scope of the various embodiments. In the preceding description, numerous specific details have been set forth in order to provide a thorough understanding of various embodiments. However, various embodiments may be practiced without these specific details. In other instances, well-known circuits, structures and techniques have not been shown in detail in order not to obscure the embodiments.

[0088] As used herein, "a number of," when used in reference to an item, means one or more of the items. For example, "several different types of networks" is one or more different types of networks.

[0089] Where different reference numbers include a common digit followed by a different letter (e.g., 100a, 100b, 100c) or followed by a punctuation mark followed by a different digit (e.g., 100-1, 100-2 or 100.1, 100.2), the use of the reference number alone (e.g., 100) without a letter or subsequent digit may refer to the group of elements as a whole, as any subset of the group, or as a representative example of one example of the group.

[0090] Furthermore, the phrase "at least one," when used in conjunction with a list of items, means that different combinations of one or more of the listed items can be used, and that only one of each item in the list may be required. In other words, "at least one" means that any combination of items and any number of items may be used from the list, but not all of the items in the list are required. An item may be a specific object, thing, or category.

[0091] For example, without limitation, "at least one of item A, item B, or item C" may include item A, or may include item A and item B, or may include item B. This example may also include items A, B, and C, or may include items B and C. Of course, any combination of these items may be present. In some illustrative examples, "at least one" may be, for example, without limitation, two of item A, one of item B, and ten of item C, four of item B and seven of item C, or any other suitable combination.

[0092] Different examples of the term "embodiment" as used herein do not necessarily refer to the same embodiment, although they may. Any data and data structures illustrated or described herein are merely examples; other embodiments may use different amounts of data, types of data, fields, number and types of fields, field names, number and types of columns, records, entries, or data organizations. Additionally, any data may be combined with logic, such that a separate data structure may not be required. The foregoing detailed description is therefore not to be taken in a limiting sense.

[0093] While the present disclosure has been described in terms of specific embodiments, it is anticipated that alterations and modifications thereof will become apparent to those skilled in the art. It is therefore intended that the following claims be interpreted to cover all such alterations and modifications as fall within the true scope of the present disclosure.

Claims

1. 1. A device comprising at least one adjustable resistive element, Each adjustable resistance element is a first terminal; a second terminal; and a dielectric layer disposed between the first terminal and the second terminal; applying at least one electrical set pulse to the at least one resistive element to form a conductive filament having a plurality of oxygen vacancies within the dielectric layer; configured to apply at least one electrical reset pulse to the at least one resistive element to displace a subset of the oxygen voids of the conductive filament, the at least one electrical reset pulse comprising: a first portion configured to increase the temperature of the conductive filament to increase the mobility of the oxygen voids in the conductive filament but not to displace the subset of the oxygen voids; a second portion configured to displace the subset of oxygen voids of the conductive filament.

2. the first portion of the at least one electrical reset pulse has a first peak amplitude and a first duration; the second portion of the at least one electrical reset pulse has a second peak amplitude and a second duration; The device of claim 1 , wherein the first peak amplitude is greater than the second peak amplitude and the first duration is less than the second duration.

3. The device of claim 2 , wherein the first peak amplitude is at least two times greater than the second peak amplitude.

4. The device of claim 2 , wherein the second duration is at least five times longer than the first duration.

5. 3. The device of claim 2, wherein the first peak amplitude is in a range between 0.1 volts and 2 volts, the second peak amplitude is in a range between 0.02 volts and 1 volt, the first duration is in a range between 1 nanosecond and 100 nanoseconds, and the second duration is in a range between 5 nanoseconds and 1000 nanoseconds.

6. The at least one adjustable resistance element providing a plurality of set resistance states in response to application of at least one electrical set pulse; The device of claim 1 , configured to provide a plurality of reset resistance states in response to application of at least one electrical reset pulse.

7. The device of claim 1 , wherein the dielectric layer comprises a metal oxide material.

8. The device of claim 7 , wherein the metal oxide material is a transition metal oxide.

9. The device of claim 8 , wherein the metal oxide material is a perovskite transition metal oxide.

10. The metal oxide material is ABO ３－δ A perovskite, wherein A is an alkaline earth metal, a rare earth element, or a combination thereof, and B is a transition metal element. ３－δ Perovskite, Lanthanum titanate and / or strontium titanate (La,Sr)TiO ３－δ、 Yttrium titanate and / or calcium titanate (Y,Ca)TiO ３－δ、 Lanthanum manganate and / or strontium manganate (La,Sr)MnO ３－δ , Praseodymium manganate and / or calcium manganate (Pr,Ca)MnO ３－δ , Calcium manganate CaMnO ３－δ , corundum, Vanadium oxide and / or chromium oxide (V, Cr) ２ O ３－δ , binary transition metal oxides, Nickel oxide NiO １－δ , Titanium oxide TiO ２－δ、 Hafnium oxide and / or zirconium oxide (Hf,Zr)O ２－δ and Cerium oxide CeO ２－δ 8. The device of claim 7, selected from the group consisting of:

11. 10. The device of claim 1, wherein at least one of the first terminal and the second terminal comprises one of a metal, a metal oxide, conductive carbon, and amorphous carbon.

12. 12. The device of claim 11, wherein at least one of the first terminal and the second terminal comprises a material selected from the group consisting of Ti, TiN, Ta, TaN, W, Cu, Pt, and some metal oxides such as WO3, RuO2, and ITO.

13. The device of claim 1 , wherein the dielectric layer has a thickness between 1 nanometer and 50 nanometers.

14. The device of claim 1 , wherein the device is configured to provide a bidirectional resistance curve upon application of a set pulse and a reset pulse.

15. 10. The device of claim 1, wherein the device comprises a control unit for applying the electrical set pulse and the electrical reset pulse as electrical programming pulses to at least one of the first terminal and the second terminal.

16. The device of claim 15 , wherein the control unit is configured to program the resistive state of the resistive element by an iterative program and verify procedure.

17. 16. The device of claim 15, wherein the control unit is configured to apply a read voltage to the first terminal and the second terminal in a read mode to read a resistance state of the one or more resistive elements.

18. The device of claim 1 , wherein the device is configured as a synapse for a neuromorphic network.

19. 1. A method for programming a tunable resistance element, the tunable resistance element comprising a first terminal, a second terminal, and a dielectric layer between the first terminal and the second terminal, the method comprising: applying at least one electrical set pulse to the adjustable resistive element to form a conductive filament having a plurality of oxygen vacancies within the dielectric layer; applying at least one electrical reset pulse to displace a subset of the oxygen voids of the conductive filament, the at least one electrical reset pulse comprising: a first portion configured to increase the temperature of the conductive filament to increase the mobility of the oxygen voids in the conductive filament but not to displace the subset of the oxygen voids; and a second portion configured to displace the subset of the oxygen voids of the conductive filament.

20. 1. A computer program product for operating a device comprising at least one adjustable resistive element, each adjustable resistive element comprising a first terminal, a second terminal, and a dielectric layer disposed between the first terminal and the second terminal, the computer program product comprising a computer-readable storage medium having program instructions embodied therewith, the program instructions comprising: applying at least one electrical set pulse to the at least one resistive element to form a conductive filament having a plurality of oxygen vacancies within the dielectric layer; applying at least one electrical reset pulse to displace a subset of the oxygen voids of the conductive filament, the at least one electrical reset pulse comprising: a first portion configured to increase the temperature of the conductive filament to increase the mobility of the oxygen voids in the conductive filament but not to displace the subset of the oxygen voids; and a second portion configured to displace the subset of the oxygen voids of the conductive filament, the second portion being executable by the control unit to cause the control unit to perform a method comprising:

Images