True Load-Disconnect Reset of Computing Devices

The true load-disconnect reset technique addresses PMIC failures in computing devices by electrically disconnecting and reconnecting power sources, providing rapid fault repair and preventing prolonged device unresponsiveness.

JP7731446B2Active Publication Date: 2025-08-29GOOGLE LLC
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Patent Information

Application Number
JP2023574201
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-06-01
Filing Date
2022-02-24
Publication Date
2025-08-29
Estimated Expiration
2042-02-24

AI Technical Summary

Technical Problem

Modern computing devices with asynchronous computing and unpredictable user input can lead to device failures, such as PMIC failures, which conventional power cycling techniques cannot effectively address, resulting in prolonged device unresponsiveness.

Method used

Implementing a true load-disconnect reset technique where a controller electrically disconnects and reconnects all power sources from the computing device to perform a reset, effectively repairing faults without waiting for battery discharge or physical disconnection.

Benefits of technology

The true load-disconnect reset technique rapidly repairs faults, including PMIC failures, by allowing the device to recover without prolonged downtime or physical cable disconnection.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

One example of the method includes resetting a power management integrated circuit (PMIC) in response to determining that a button on the mobile computing device has been pressed for greater than a first time, and in response to determining that a button on the mobile computing device has been pressed for greater than a second time that is greater than the first time, electrically disconnecting power from the mobile computing device at a first time, and electrically reconnecting the power to the mobile computing device at a second time after the first time.
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Description

[Background technology]

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 195,373, filed June 1, 2021, the entire contents of which are incorporated herein by reference.

[0002] background Modern computing devices have become highly complex, with computing domains, physical sensors, and power systems that operate asynchronously. The unpredictability of asynchronous computing and user input can lead to usage scenarios that are difficult to predict and can result in device failures (reboots, lockups, etc.). In some scenarios, it may be necessary to reset the computing device to repair some failures. Summary of the Invention

[0003] overview This disclosure generally relates to resetting a computing device. One reset technique may involve power cycling (e.g., powering off and then powering on) a computing device's power supply (e.g., a power management integrated circuit (PMIC)). For example, a computing device's controller may initiate a power cycle of the power supply in response to a physical power button on the computing device being pressed for longer than a specified time. However, if the power supply fails, such a reset technique may not be effective in repairing the failure. For example, a PMIC failure may cause the device to become completely unresponsive, rendering the device unusable until the battery is completely depleted and the device is unplugged, which may take hours or even days. Such a delay may be undesirable.

[0004] According to one or more techniques of this disclosure, a computing device may be configured to perform a true load-disconnect reset technique. For example, a controller of the computing device may electrically disconnect and then electrically reconnect all power sources from the computing device. As one example, the controller may open a switch connecting the battery of the computing device to the PMIC of the computing device. As another example, the controller may open a switch connecting a signal line of a Universal Serial Bus (USB) connection through which the PMIC receives power. Thus, the true load-disconnect reset technique may be effective in repairing numerous faults, including PMIC faults, without waiting for the battery to fully discharge or having to unplug the charging cable.

[0005] As an example, the method includes resetting a PMIC of the mobile computing device in response to determining that a physical button on the mobile computing device has been pressed for more than a first time; electrically disconnecting power from the mobile computing device at a first time in response to determining that the physical button on the mobile computing device has been pressed for more than a second time that is longer than the first time; and electrically reconnecting power to the mobile computing device at a second time after the first time.

[0006] As another example, a mobile computing device includes a PMIC configured to provide power to components of the mobile computing device, a physical button, and a controller, wherein the controller is configured to reset the PMIC in response to determining that the physical button is pressed for longer than a first time, and to electrically disconnect power from the mobile computing device at a first time and electrically reconnect power to the mobile computing device at a second time after the first time in response to determining that the physical button of the mobile computing device is pressed for longer than a second time that is longer than the first time.

[0007] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description and drawings, and from the claims. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a conceptual diagram illustrating a device including true load disconnection, in accordance with one or more techniques of this disclosure. [Figure 2] 1 is a flowchart illustrating a technique involving various resets of a computing device in accordance with one or more techniques of this disclosure. [Figure 3] 1 is a flowchart illustrating a technique for true load shedding of a computing device, in accordance with one or more techniques of this disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Detailed Description 1 is a conceptual diagram illustrating a device including true load disconnection in accordance with one or more techniques of this disclosure. As shown in FIG. 1, device 100 may include multiple power sources 102A-102N (collectively "power sources 102"), multiple disconnection modules 104A-104N (collectively "disconnection modules 104"), a power management circuit 106, a load 108, a physical button 110, and a controller 112. Examples of device 100 include, but are not limited to, a mobile phone, a camera device, a tablet computer, a smart display, a laptop computer, a desktop computer, a gaming system, a media player, an e-reader, a television platform, a vehicle infotainment system or head unit, or a wearable computing device (e.g., a computerized watch, a head-mounted device such as a VR / AR headset, computerized eyewear, or computerized gloves).

[0010] Each power source 102 may be any component capable of providing power to other components of device 100, such as power management circuitry 104. Examples of power sources 102 include, but are not limited to, a battery, a solar panel, a physical connector, a wireless charging receiver coil, etc. For example, power source 102A may be an internal battery of device 100, and power source 102B may be a charging cable connecting device 100 to an external power source (e.g., a Universal Serial Bus (USB) connection such as a USB Type-C connection).

[0011] Each disconnect module 104 may be configured to electrically disconnect a corresponding one of the power sources 102. For example, disconnect module 104A may be configured to electrically disconnect power source 102A from power management circuitry 106, ..., and disconnect module 104N may be configured to electrically disconnect power source 102N from power management circuitry 106. A disconnect module 104 may be any component capable of causing an electrical disconnection between a power source and a component of device 100. For example, one of the disconnect modules 104 may include one or more switches that, when open, remove a current path between one of the power sources 102 and the power management circuitry 106. Examples of disconnect modules 104 include, but are not limited to, switches (e.g., transistors), fuses (e.g., resettable fuses), etc.

[0012] The power management circuit 106 may be configured to provide power to various components of the device 100, such as the load 108. In some examples, the power management circuit 106 may be a power management integrated circuit (PMIC). The power management circuit 106 may include one or more power sources, such as a power regulator 114, that provide a power signal to the load 108. The power management circuit 106 may be configured to source power from a variety of power sources. For example, depending on the situation, the power management circuit 106 may source power from one or more power sources 102. As an example, the power management circuit 106 may source power from a battery in the power source 102 if other power sources are unavailable.

[0013] As mentioned above, the power management circuit 106 may include a power regulator 114. Examples of the power regulator 114 include, but are not limited to, a switched-mode power supply (e.g., buck, boost, buck-boost, buck-boost, buck-boost, flyback, low dropout, etc.). The voltage level of the power signal output by the power regulator 114 may be adjustable. For example, the input power regulator 114 may output a DC power signal to the load 108 at a set voltage level, such as a voltage level set by the controller 112. In some examples, the power regulator 114 may include multiple power supplies that provide power signals having different voltage levels (e.g., 5 volts, 3.3 volts, 1.8 volts, etc.).

[0014] The loads 108 may represent various components of the system 100 that consume power. Examples of the loads 108 include, but are not limited to, a display, a memory device, a storage device, a central processing unit (CPU), a graphics processing unit (GPU), a modem, a digital signal processor (DSP), etc.

[0015] Controller 112 may include circuitry configured to control the operation of various components of device 100. Examples of controller 110 include, but are not limited to, one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable logic arrays (FPGAs), systems-on-chips (SoCs), or other equivalent integrated or discrete logic circuits, or analog circuits.

[0016] The physical button 110 may be a button on the device 100 configured to receive user input. For example, the physical button 110 may be a so-called "power button" configured to receive user input for turning the device 100 on or off. The input received via the physical button 110 may be provided to various components of the device 100, such as the controller 112. For example, the controller 112 may receive information indicating the state of the physical button 110 (e.g., pressed or not pressed).

[0017] For various reasons, faults may occur within device 100. For example, asynchronous computing and the unpredictability of user input may result in usage scenarios that are difficult to predict and may result in faults (restarts, lockups, etc.) within device 100. In some scenarios, it may be necessary to reset device 100 to repair some faults.

[0018] One reset technique may include power cycling (e.g., turning off and then back on) a power supply (e.g., a power management integrated circuit (PMIC) of the power management circuit 106 (e.g., power regulator 114)). For example, in response to the physical button 110 being pressed for longer than a specified time, the controller 112 may initiate a power cycle of the power supply of the power management circuit 106. Such a cycle can repair many faults, particularly those occurring in components of the load 108.

[0019] However, if a fault occurs in the power management circuitry 106, such reset techniques may not be effective in repairing the fault. For example, a fault in the power management circuitry 106 may cause the device 100 to become completely unresponsive, rendering the device 100 unusable until the battery is completely depleted and the device 100 is unplugged from its charging cable, which may take hours or days.

[0020] In accordance with one or more techniques of this disclosure, device 100 may be configured to perform a true load-disconnect reset technique. To perform a true load-disconnect reset technique, controller 112 may electrically disconnect and then electrically reconnect all power sources 102 from device 100 (e.g., without actual physical disconnection). For example, controller 112 may output a signal to disconnect module 104 to cause disconnect module 104 to electrically disconnect power sources 102 from power management circuit 106. As one example, if power source 102A is an internal battery of device 100, controller 112 may cause disconnect module 104A to electrically disconnect the internal battery from power management circuit 106 (e.g., so that power management circuit 106 stops receiving power from the battery). As another example, if power source 102B is a USB cable that transmits electrical energy from an external power source to device 100, controller 112 may cause disconnect module 104B to electrically disconnect (e.g., open) the signal line of the USB connection (e.g., so that the external power source stops supplying power to device 100). Thus, the true load disconnect reset technique of this disclosure is effective in repairing a number of faults, including faults in the power management circuitry 106, thereby allowing the device 100 to recover without waiting for the battery to fully discharge and without having to unplug the charging cable.

[0021] 2 is a flowchart illustrating a technique involving various resets of a computing device in accordance with one or more techniques of this disclosure. For purposes of explanation, the technique of FIG. 2 is described with reference to device 100 of FIG. 1. However, other computing devices may also perform the technique of FIG. 2.

[0022] The device 100 may determine whether a physical button has been pressed (202). For example, the controller 112 may determine whether a physical button 110 (e.g., a power button) has been pressed. In response to determining that the physical button has not been pressed (the "No" branch of 202), the device 100 may continue to monitor for a physical button press (202).

[0023] In response to determining that the physical button has been pressed (the “Yes” branch of 202), the device 100 may start a timer (204). For example, the controller 112 may start the timer (e.g., count up). The device 100 may monitor for a release of the physical button (206) and determine whether the timer value is greater than a first time period (208). In some examples, the first time period may be 15 seconds or less (e.g., 5 seconds, 10 seconds, 15 seconds). In response to determining that the physical button is released before the timer exceeds the first time period (the “Yes” branch of 206), the device 100 may continue to monitor for a press of the physical button without performing a reset (202). In response to determining that the physical button is not released before the timer exceeds the first time period (the “Yes” branch of 208), the device 100 may perform a first reset technique (210).

[0024] To implement the first reset technique, device 100 may perform a warm reset. For example, controller 112 may set the output regulation levels of one or more power regulators (e.g., power regulator 114) of power management circuit 106 to default levels without disabling the one or more power regulators. For example, if the default output voltage level of power regulator 114 is 1.4 volts, controller 112 may cause power regulator 114 to output a power signal with a voltage level of 1.4 volts. Thus, if power management circuit 106 is a PMIC, controller 112 may consider resetting the PMIC of device 100 in response to determining that a physical button of device 100 has been pressed for more than a first time period.

[0025] The device 100 may continue to monitor for a physical button release (212) and determine whether the timer value is greater than a second time period that is greater than the first time period (214). In some examples, the second time period may be 25 seconds or less (e.g., 15, 20, 25 seconds). In response to determining that the physical button is released before the timer exceeds the second time period (the "Yes" branch of 212), the device 100 may continue to monitor for a physical button press (202) without performing an additional reset. In response to determining that the physical button is not released before the timer exceeds the second time period (the "Yes" branch of 214), the device 100 may perform a second reset technique (216).

[0026] To perform the second reset technique, device 100 may perform a cold reset. For example, controller 112 may disable one or more power regulators of power management circuit 106. For example, controller 112 may deactivate and then reactivate power regulator 114. Thus, if power management circuit 106 is a PMIC, controller 112 may consider resetting the PMIC of device 100 in response to determining that a physical button on device 100 has been pressed for more than a second period of time.

[0027] The device 100 may continue to monitor for a physical button release (218) and determine whether the timer value is greater than a third time period that is greater than the second time period (220). In some examples, the third time period may be 35 seconds or less (e.g., 25 seconds, 30 seconds, 33 seconds, 35 seconds). In response to determining that the physical button is released before the timer exceeds the third time period (the "Yes" branch of 218), the device 100 may continue to monitor for a physical button press without performing an additional reset (202). In response to determining that the physical button is not released before the timer exceeds the third time period (the "Yes" branch of 220), the device 100 may perform a third reset technique (222).

[0028] According to one or more techniques of this disclosure, to perform the third reset technique, device 100 may perform a true load disconnection procedure. For example, device 100 may electrically disconnect and then reconnect all power sources from device 100. Further details of an example true load disconnection procedure are described below in connection with FIG. 3.

[0029] Device 100 may continue to monitor for a physical button release (224). Device 100 may not move to the beginning of the reset sequence until the physical button is released. Thus, in response to determining that the physical button has not been released since powering down device 100, device 100 may refrain from powering down again. This refraining may provide various advantages. As one example, by refraining from powering down again until the physical button is released, the techniques of this disclosure may inhibit rolling resets.

[0030] It will be appreciated that in some examples, one or both of the first reset technique and / or the second reset technique may be omitted. For example, device 100 may perform a third reset technique in response to determining that a physical button on the mobile computing device has been pressed for more than a third amount of time without performing one or both of the first or second reset techniques.

[0031] 3 is a flowchart illustrating a technique for true load shedding of a computing device in accordance with one or more techniques of this disclosure. For illustrative purposes, the technique of FIG. 3 is described with reference to device 100 of FIG. 1. However, other computing devices may also perform the technique of FIG. 3. The technique of FIG. 3 may be performed as the third reset (222) of FIG. 2.

[0032] Generally, a true load disconnection may result in a disconnection between the power source and the power sink of device 100. After all power sources are disconnected (e.g., electrically removed), the system may be restarted normally (e.g., to provide user feedback that device 100 has been restarted). In response to determining to perform a true load disconnection, the device 100 may electrically disconnect all power sources (302). For example, the controller 112 may electrically disconnect the battery (e.g., open a switch, such as a field effect transistor (FET), that internally connects the battery to a power sink), disable the charging path (e.g., disable wireless charging), and prevent the system voltage from self-discharging (e.g., V sys self-discharge), and electrically disconnect the signal lines of the USB connection (for example, electrically disconnect the configuration channel lines (CC1, CC2) of a USB type-C (registered trademark) connection).

[0033] The device 100 may wait 304 a period of time before electrically reconnecting 306 the power source. The period may be 2, 4, 6, 8, or 10 seconds. After the period has elapsed, the device 100 may electrically reconnect the power source. For example, the controller 112 may electrically reconnect the battery (e.g., close a switch, such as a field effect transistor (FET) that internally connects the battery to a power sink), enable a charging path (e.g., restart wireless charging), and allow the system voltage to self-discharge (e.g., V sys self-discharge), electrically reconnecting the signal lines of the USB connection (reconnecting the configuration channel lines allows the external power source to renegotiate power supply with device 100), etc. Once the power source is electrically reconnected, device 100 can reboot.

[0034] As previously mentioned, electrically disconnecting all power sources when performing a true load disconnection may provide one or more advantages. As an example, if a fault occurs in the PMIC of device 100, simply performing a warm or cold reset may not be sufficient to repair the fault. In such cases, the fault may only be repaired by fully discharging the battery of device 100. If device 100 receives power from one or more external power sources (e.g., via a USB connection), the fault can never be repaired as long as power continues to be received. Thus, by electrically disconnecting all power sources, the techniques of this disclosure can repair many faults without waiting for the battery to discharge and without having to physically unplug the charging cable.

[0035] Although described as user-initiated (e.g., by pressing a button for longer than a specified time), the true load disconnection techniques of this disclosure are not limited to such. As an example, device 100 may automatically trigger true load disconnection in response to the detection of a particular fault. For example, device 100 may include conductors forming a network connected to several components. Controller 112 may monitor this network and trigger execution of true load disconnection (e.g., the technique of FIG. 3) when the network is pulled low (e.g., an open-drain signal).

[0036] The following numbered examples may illustrate one or more aspects of this disclosure. Example 1. A method including: in response to determining that a button on the mobile computing device is pressed for more than a first time, resetting a power management integrated circuit (PMIC) of the mobile computing device; in response to determining that the button on the mobile computing device is pressed for more than a second time that is longer than the first time, electrically disconnecting power from the mobile computing device at a first time; and electrically reconnecting power to the mobile computing device at a second time after the first time.

[0037] Example 2. The method of Example 1, wherein electrically disconnecting the power source includes electrically disconnecting an internal battery of the mobile computing device and, in response to determining that the mobile computing device is connected to an external power source via a Universal Serial Bus (USB) cable, electrically disconnecting a signal line of the USB connection.

[0038] Example 3. The method of Example 2, wherein the USB cable remains physically connected to the mobile computing device between the first time and the second time.

[0039] Example 4. The method of Example 2, wherein the PMIC includes one or more power regulators, and wherein resetting the PMIC includes setting output regulation levels of the one or more power regulators to default levels without disabling the one or more power regulators, and wherein the method further includes disabling the one or more power regulators in response to determining that a button on the mobile computing device has been pressed for more than a third time period that is greater than the first time period and less than the second time period.

[0040] Example 5. The method of Example 1, further comprising refraining from again removing power from the mobile computing device in response to determining that the button has not been released after the first time.

[0041] Example 6. The method of example 1, wherein the second period is 35 seconds or longer. Example 7. The method of example 1, wherein the first period of time is 15 seconds or less.

[0042] Example 8. The method of Example 1, further including, in response to detecting the occurrence of a fault in the mobile computing device, electrically disconnecting the power source from the mobile computing device at a third time, and electrically reconnecting the power source to the mobile computing device at a fourth time after the third time.

[0043] Example 9. A mobile computing device comprising: a power management integrated circuit (PMIC) configured to provide power to components of the mobile computing device; a button; and a controller, wherein the controller is configured to reset the PMIC in response to determining that the button is pressed for more than a first time; and to electrically disconnect power from the mobile computing device at a first time and electrically reconnect power to the mobile computing device at a second time after the first time in response to determining that the button on the mobile computing device is pressed for more than a second time that is longer than the first time.

[0044] Example 10. The mobile computing device of Example 9, wherein, to electrically disconnect the power source, the controller is configured to electrically disconnect an internal battery of the mobile computing device and, in response to determining that the mobile computing device is connected to an external power source via a Universal Serial Bus (USB) cable, electrically disconnect a signal line of the USB connection.

[0045] Example 11. The mobile computing device of Example 10, wherein the USB cable remains physically connected to the mobile computing device between the first time and the second time.

[0046] Example 12. The mobile computing device of Example 10, wherein the PMIC includes one or more power regulators, and wherein to reset the PMIC, the controller is configured to set output adjustment levels of the one or more power regulators to default levels without disabling the one or more power regulators, and wherein the controller is further configured to disable the one or more power regulators in response to determining that a button on the mobile computing device has been pressed for more than a third time period that is greater than the first time period and less than the second time period.

[0047] Example 13. The mobile computing device of Example 9, wherein the controller is further configured to refrain from again disconnecting power from the mobile computing device in response to determining that the button has not been released since the first time.

[0048] Example 14. The mobile computing device of example 9, wherein the second period of time is 35 seconds or greater.

[0049] Example 15. The mobile computing device of example 9, wherein the first time period is 15 seconds or less.

[0050] The techniques described in this disclosure may be implemented, at least in part, in hardware, software, firmware, or any combination thereof. For example, various aspects of the described techniques may be implemented within one or more processors, including one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, and any combination of such components. The terms "processor" or "processing circuitry" may generally refer to any of the foregoing logic circuitry, alone or in combination with other logic circuitry, or any other equivalent circuitry. A control unit including hardware may also perform one or more of the techniques of this disclosure.

[0051] Such hardware, software, and firmware may be implemented within the same device or within separate devices to support the various technologies described in this disclosure. Furthermore, any of the described units, modules, or components may be implemented together or separately as discrete but interoperable logical devices. The depiction of various functions as modules or units is intended to emphasize various functional aspects and does not necessarily imply that such modules or units must be realized by separate hardware, firmware, or software components. Rather, functionality associated with one or more modules or units may be performed by separate hardware, firmware, or software components, or may be integrated within common or separate hardware, firmware, or software components.

[0052] The techniques described in this disclosure may be embodied or encoded within an article of manufacture that includes a computer-readable storage medium encoded with instructions. Instructions embedded or encoded in an article of manufacture that includes an encoded computer-readable storage medium, for example, can cause one or more programmable or other processors to implement one or more of the techniques described herein when the instructions contained in or encoded on the computer-readable storage medium are executed by the one or more processors. Computer-readable storage media may include random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electronically erasable programmable read-only memory (EEPROM), flash memory, hard disk, compact disc ROM (CD-ROM), floppy disk, cassette, magnetic medium, optical medium, or other computer-readable medium. In some examples, an article of manufacture may include one or more computer-readable storage media.

[0053] In some examples, a computer-readable storage medium may include a non-transitory medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or propagated signal. In particular examples, a non-transitory storage medium may store data that may change over time (e.g., in RAM or cache).

[0054] Various aspects have been described in this disclosure. These and other aspects are within the scope of the following claims.

Claims

1. resetting, by a controller of the mobile computing device, a power management integrated circuit (PMIC) of the mobile computing device at a first time in response to determining that a button of the mobile computing device has been pressed for longer than a first time period; in response to determining by the controller that the button on the mobile computing device has not been released since the first time and has been pressed for a period greater than a second time period greater than the first time period, electrically disconnecting the power source from the mobile computing device at a second time period after the first time period by outputting a signal to a disconnection module disposed between the power source and the PMIC to electrically disconnect the power source from the PMIC; electrically reconnecting, by the controller, the power source to the mobile computing device at a third time after the second time; A method comprising:

2. Electrically disconnecting the power source comprises: electrically disconnecting the internal battery of the mobile computing device by outputting, by the controller, a signal to a disconnection module disposed between the PMIC and the internal battery, causing the internal battery to be electrically disconnected from the PMIC; In response to determining by the controller that the mobile computing device is connected to an external power source via a universal serial bus (USB) cable, outputting a signal to a disconnection module disposed between the PMIC and a signal line of a USB connection to cause the signal line of the USB connection to be opened, thereby electrically disconnecting the signal line of the USB connection; The method of claim 1 , comprising:

3. 3. The method of claim 2, wherein the USB cable remains physically connected to the mobile computing device between the second time and the third time.

4. and wherein the PMIC includes one or more power regulators, and resetting the PMIC includes setting, by the controller, output regulation levels of the one or more power regulators to default levels without disabling the one or more power regulators, the method comprising:

4. The method of claim 1, further comprising: disabling, by the controller, the one or more power regulators in response to determining that the button on the mobile computing device has been pressed for more than a third time period that is greater than the first time period and less than the second time period.

5. and refraining, by the controller, from again disconnecting the power source from the mobile computing device in response to determining that the button has not been released after the second time. The method according to any one of claims 1 to 4, further comprising:

6. The method of any one of claims 1 to 5, wherein the second period of time is 35 seconds or more.

7. The method of any one of claims 1 to 6, wherein the first period of time is 15 seconds or less.

8. In response to detecting a fault in the mobile computing device, the controller electrically disconnects the power supply from the mobile computing device at a fourth time by outputting a signal from the controller to the disconnection module disposed between the power supply and the PMIC, the signal causing the power supply to be electrically disconnected from the PMIC; electrically reconnecting, by the controller, the power source to the mobile computing device at a fifth time after the fourth time; The method of any one of claims 1 to 7, further comprising:

9. 1. A mobile computing device, comprising: a power management integrated circuit (PMIC) configured to provide power to components of the mobile computing device; Button and a controller; The controller resetting the PMIC at a first time in response to determining that the button has been pressed for longer than a first time period; in response to determining that the button on the mobile computing device has not been released since the first time and has been pressed for a period longer than a second time period longer than the first time period, electrically disconnecting power from the mobile computing device at a second time period after the first time period by outputting a signal from the controller to a disconnection module disposed between a power source and the PMIC to electrically disconnect the power source from the PMIC; electrically reconnecting the power source to the mobile computing device at a third time after the second time. It is configured as follows: Mobile computing devices.

10. a power management integrated circuit (PMIC) configured to provide power to components of the mobile computing device; Button and A computing device comprising: a controller configured to perform the method of any one of claims 1 to 8.

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