Switching device and switching method

Abstract

To solve the following problem: a desire to further reduce a turn-on power loss is increasing.SOLUTION: A switching device comprises: a first semiconductor switching element of an IGBT electrically connected in parallel, and a second semiconductor switching element different in type from the IGBT; and a control part that turns on the second semiconductor switching element earlier than the first semiconductor switching element. The maximum rated current of the second semiconductor switching element is higher than that of the first semiconductor switching element.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a switching device and a switching method. [Background technology]

[0002] Conventionally, various methods have been proposed to reduce switching loss (see, for example, Patent Document 1). Patent Document 1: Japanese Patent Application Laid-Open No. 4-354156 Patent Document 2: JP 2014-130909 A Summary of the Invention [Problem to be solved by the invention]

[0003] In recent years, there has been an increasing demand for further reduction in turn-on loss. [Means for solving the problem]

[0004] To solve the above problems, a first aspect of the present invention provides a switching device. The switching device may include a first semiconductor switching element of an IGBT and a second semiconductor switching element of a type different from the IGBT, which are electrically connected in parallel. The switching device may include a control unit that turns on the second semiconductor switching element before the first semiconductor switching element. The second semiconductor switching element may have a maximum rated current greater than the maximum rated current of the first semiconductor switching element.

[0005] The control unit may make the time difference between when the first semiconductor switching element is switched on and when the second semiconductor switching element is switched smaller in the case of turn-on than in the case of turn-off.

[0006] In a second aspect of the present invention, there is provided a switching device. The switching device may include a first semiconductor switching element of an IGBT and a second semiconductor switching element of a type different from the IGBT, which are electrically connected in parallel. The switching device may include a controller that controls the first semiconductor switching element and the second semiconductor switching element. The controller may reduce the time difference between when the first semiconductor switching element is switched and when the second semiconductor switching element is switched in the case of turn-on compared to when the second semiconductor switching element is turned off.

[0007] In the case of turn-on, the control unit may set the time difference to zero or a negative value.

[0008] In the case of turn-off, the control unit may set the time difference to a positive value.

[0009] The second semiconductor switching element may be a MOSFET.

[0010] The second semiconductor switching element may be a wide bandgap semiconductor element.

[0011] In a third aspect of the present invention, there is provided a switching method. The switching method may include a control step of turning on a first semiconductor switching element of an IGBT and a second semiconductor switching element of a type different from the IGBT, the second semiconductor switching element being electrically connected in parallel, before the first semiconductor switching element. The second semiconductor switching element may have a maximum rated current greater than the maximum rated current of the first semiconductor switching element.

[0012] In a fourth aspect of the present invention, there is provided a switching method. The switching method may include a control step of controlling a first semiconductor switching element of an IGBT electrically connected in parallel and a second semiconductor switching element of a type different from the IGBT. In the control step, a time difference between when the first semiconductor switching element is switched and when the second semiconductor switching element is switched may be made smaller in the case of turn-on than in the case of turn-off.

[0013] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions. [Brief explanation of the drawings]

[0014] [Figure 1] 1 shows a switching device 1 according to the present embodiment. [Figure 2] The arrangement of the IGBT 11 and the MOSFET 12 is shown. [Figure 3] The operation of the switching device 1 is shown. [Figure 4] 22 illustrates an example computer 2200 in which aspects of the present invention may be embodied, in whole or in part. DETAILED DESCRIPTION OF THE INVENTION

[0015] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0016] 1 shows a switching device 1 according to this embodiment. The switching device 1 includes a first semiconductor switching element 11 and a second semiconductor switching element 12 electrically connected in parallel, and a control unit 15. The switching device 1 may be included in any device that performs internal switching, such as a half-bridge circuit or a chopper circuit.

[0017] The first semiconductor switching element 11 is an IGBT (Insulated Gate Bipolar Transistor), and may also be referred to as an IGBT 11. The IGBT 11 may have a gate terminal G11, a collector terminal C11, and an emitter terminal E11.

[0018] In a steady ON state, the IGBT 11 may have a lower saturation voltage than the second semiconductor switching element 12, and may pass a larger current than the second semiconductor switching element 12. Note that the IGBT 11 has a slower switching speed than the second semiconductor switching element 12, so turn-on loss may be larger, and the turn-off loss may be larger due to the generation of a tail current.

[0019] The IGBT 11 may be a semiconductor element made of a semiconductor material with a small bandgap. Examples of the semiconductor material with a small bandgap include silicon and gallium arsenide. These semiconductor materials are cheaper than semiconductor materials with a large bandgap, which reduces the cost of the switching device 1.

[0020] The second semiconductor switching element 12 is a type of semiconductor switching element different from the IGBT. The second semiconductor switching element 12 may be an element that has a faster switching speed than the IGBT 11 and does not generate a tail current when turned off. In this embodiment, as an example, the second semiconductor switching element 12 is a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), also referred to as MOSFET 12. The MOSFET 12 may have a gate terminal G12, a drain terminal D12, and a source terminal S12.

[0021] The maximum rated current of the MOSFET 12 may be greater than the maximum rated current of the IGBT 11. For example, the maximum rated current of the IGBT 11 and the maximum current rating of the MOSFET 12 may be IGBT:MOS=4:6. Note that the maximum rated current may be the maximum value of the current that can flow in the element, and may increase depending on the size (area, for example) of the element.

[0022] The MOSFET 12 may be a wide bandgap semiconductor element made of a semiconductor material having a wide bandgap, such as SiC, GaN, diamond, a gallium nitride-based material, a gallium oxide-based material, AlN, AlGaN, or ZnO.

[0023] Here, the IGBT 11 and the MOSFET 12 being electrically connected in parallel may mean that the drain terminal D11 of the IGBT 11 and the collector terminal C12 of the MOSFET 12 are electrically connected, and that the emitter terminal E11 of the IGBT 11 and the source terminal S12 of the MOSFET 12 are electrically connected. The IGBT 11 and the MOSFET 12 may be electrically connected in parallel between two external terminals (also referred to as external emitter terminals or external collector terminals) of the switching device 1. In the present embodiment, as an example, the emitter terminal E11 of the IGBT 11 and the source terminal S12 of the MOSFET 12 may be connected to external emitter terminals, and the collector terminal C11 of the IGBT 11 and the drain terminal D12 of the MOSFET 12 may be connected to an external collector terminal.

[0024] The control unit 15 may be connected to the gate terminal G11 of the IGBT 11 and the gate terminal G12 of the MOSFET 12. Also, freewheeling diodes (not shown) may be connected in antiparallel to the IGBT 11 and the MOSFET 12, respectively. These freewheeling diodes may function as freewheeling diodes for currents returning from the emitter side. In addition to this, or instead of this, a body diode (also referred to as a parasitic diode) may be connected in antiparallel to the MOSFET 12.

[0025] The control unit 15 controls the IGBT 11 and the MOSFET 12. The control unit 15 may make the time difference between when the IGBT 11 is switched on and when the MOSFET 12 is switched on smaller than when the MOSFET 12 is turned off.

[0026] For example, when switching the switching device 1, if the time difference between when the IGBT 11 is switched and when the MOSFET 12 is switched is "ΔT", the control unit 15 may control the IGBT 11 and the MOSFET 12 so that the following equation (1) is satisfied.

[0027] ΔT _ON <ΔT _OFF (1) In the formula, the subscript " ON "," OFF " indicates the time difference between when the switching device 1 is turned on and when the switching device 1 is turned off. The "turn-on" case may be when the switching device 1 is turned on, or when the external emitter terminal and the external collector terminal are electrically connected. The "turn-off" case may be when the switching device 1 is turned off, or when the external emitter terminal and the external collector terminal are electrically disconnected.

[0028] The switching timing may be the timing at which the gate voltage exceeds / falls below the threshold voltage of the element. Furthermore, the time difference ΔT may be a positive value when the switching timing of IGBT 11 precedes the switching timing of MOSFET 12, and may be a negative value when the switching timing of IGBT 11 follows the switching timing of MOSFET 12. For example, the time difference ΔT may be a value expressed as ΔT=T2-T1, where "T1" is the switching timing of IGBT 11 and "T2" is the switching timing of MOSFET 12, and may be approximately 1 μsec to 10 μsec or 100 μsec. For example, the time difference ΔT may be 5 μsec when MOSFET 12 switches 5 μsec after IGBT 11 switches.

[0029] Furthermore, control unit 15 may set time difference ΔT to a positive value in the case of turn-off, and may set it to zero or a negative value in the case of turn-on. In other words, control unit 15 may set the switching timing of IGBT 11 to precede the switching timing of MOSFET 12 in the case of turn-off, and may set the switching timing of IGBT 11 to be simultaneous with or after the switching timing of MOSFET 12 in the case of turn-on.

[0030] For example, the control unit 15 may control the IGBT 11 and the MOSFET 12 so that the following formula (2) is further satisfied. ΔT _ON ≦0<ΔT _OFF (2)

[0031] The control unit 15 may control the IGBT 11 and the MOSFET 12 by driving the gates of the IGBT 11 and the MOSFET 12, respectively. The control unit 15 may control the switching timing of the IGBT 11 and the MOSFET 12 based on a turn-on signal and a turn-off signal included in a control signal supplied from an external signal source (not shown). In the present embodiment, as an example, the control signal is a signal common to the IGBT 11 and the MOSFET 12, but may also be a signal specific to each of the IGBT 11 and the MOSFET 12.

[0032] The control unit 15 may digitally control the switching timing of the IGBT 11 and the MOSFET 12. For example, the control unit 15 may be an integrated circuit (IC), and in the present embodiment, may be a microcomputer as an example. In addition, the control unit 15 may control the switching timing of the IGBT 11 and the MOSFET 12 by supplying gate drive signals to the IGBT 11 and the MOSFET 12 via different gate resistors. The gate resistors may be the same for turn-on and turn-off, or may be different.

[0033] According to the switching device 1 described above, the IGBT 11 and the MOSFET 12 are electrically connected in parallel, and the time difference ΔT between when the IGBT 11 is switched and when the MOSFET 12 is switched is smaller when the IGBT 11 is turned on than when the MOSFET 12 is turned off. This reduces current concentration in the IGBT 11, which has a large turn-on loss, during the turn-on period, thereby reducing the turn-on loss.

[0034] Furthermore, in the case of turn-on, the time difference ΔT is set to zero or a negative value, so that MOSFET 12 is turned on simultaneously with IGBT 11 or before IGBT 11. Therefore, compared to when IGBT 11 is turned on before MOSFET 12, it is possible to prevent current from concentrating on IGBT 11, which has a large turn-on loss, during the turn-on period, and therefore it is possible to further reduce turn-on loss.

[0035] Furthermore, in the case of turn-off, the time difference ΔT is set to a positive value, so that the second semiconductor switching element 12 (MOSFET 12 as an example in this embodiment) is turned off after the IGBT 11 is turned off. Therefore, the switching device 1 is turned off by turning off the second semiconductor switching element 12, so the turn-off characteristics of the MOSFET 12 are reflected in the transient characteristics at turn-off. In other words, the turn-off characteristics of the IGBT 11, which has a large turn-off loss due to the tail current, are not expressed. This makes it possible to reduce switching loss.

[0036] Furthermore, since the second semiconductor switching element 12 is a MOSFET that does not generate a tail current when turned off, unlike the IGBT 11, by turning it off later than the IGBT 11, it is possible to reliably reduce switching loss due to the tail current when the IGBT is turned off.

[0037] Furthermore, since the MOSFET 12 is a wide bandgap semiconductor element, the switching speed of the MOSFET 12 can be increased. Therefore, by turning on the MOSFET 12 before the IGBT 11, the turn-on loss can be reduced. Furthermore, by turning off the MOSFET 12 after the IGBT 11, the turn-off loss can be reduced.

[0038] 2 shows the arrangement of the IGBT 11 and the MOSFET 12. The IGBT 11 and the MOSFET 12 may each be formed as a chip with a vertical structure and disposed on a conductive layer 101 provided on the surface of a substrate 100.

[0039] For example, the IGBT 11 may have a collector terminal C11 on its bottom surface (not shown) and a gate terminal G11 and an emitter terminal E11 on its top surface. The collector terminal C11 may be connected to a conductive layer 101 and may be connected to an external collector terminal of the switching device 1 via the conductive layer 101. The gate terminal G11 may be connected to the control unit 15 via a bonding wire 102, and the emitter terminal E11 may be connected to an external emitter terminal of the switching device 1 via the bonding wire 102.

[0040] MOSFET 12 may have a drain terminal D12 on its bottom surface (not shown) and a gate terminal G12 and a source terminal S12 on its top surface. Drain terminal C12 may be connected to conductive layer 101 and may be connected to an external collector terminal of switching device 1 via conductive layer 101. Gate terminal G12 may be connected to control unit 15 via bonding wire 102, and source terminal S12 may be connected to an external emitter terminal of switching device 1 via bonding wire 102.

[0041] The substrate 100, the IGBT 11, and the MOSFET 12 may be disposed in a housing (not shown) and sealed with resin.

[0042] 3 shows the operation of the switching device 1. The switching device 1 performs switching by processing steps S101 to S103.

[0043] In step S101, the control unit 15 turns on the IGBT 11 and the MOSFET 12. The control unit 15 turns on the IGBT 11 and the MOSFET 12 after a preset time difference ΔT _ON More specifically, the control unit 15 may turn on the IGBT 11 and the MOSFET 12 with a time difference ΔT _ON IGBT 11 and MOSFET 12 may be turned on so that the gate voltage of IGBT 11 exceeds the threshold voltage of IGBT 11 and the gate voltage of MOSFET 12 exceeds the threshold voltage of MOSFET 12. This causes the gate voltage of MOSFET 12 to reach its threshold voltage and current to flow through MOSFET 12, and simultaneously with or after this, the gate voltage of IGBT 11 also reaches its threshold voltage and current also flows through IGBT 11.

[0044] Here, the time difference ΔT _ON may be set arbitrarily by trial and error during the development of each element so as to reduce turn-on loss caused by current concentration in IGBT11 during the turn-on period, or may be set based on the device characteristics (for example, the turn-on delay time) described in the element's data sheet (also called a spec sheet).

[0045] In step S103, the control unit 15 turns off the IGBT 11 and the MOSFET 12. The control unit 15 turns off the IGBT 11 and the MOSFET 12 after a preset time difference ΔT _OFF More specifically, the control unit 15 may turn off the IGBT 11 and the MOSFET 12 with a time difference ΔT _OFF IGBT 11 and MOSFET 12 may be turned off so that the gate voltage of IGBT 11 falls below the threshold voltage of IGBT 11 and the gate voltage of MOSFET 12 falls below the threshold voltage of MOSFET 12.

[0046] In this embodiment, as an example, the time difference ΔT _OFFmay be a positive value. As a result, when the gate voltage of IGBT 11 falls below the threshold voltage, the current flowing through IGBT 11 decreases and a tail current is generated, current flows through MOSFET 12, so switching device 1 as a whole is maintained in a steady ON state and no turn-off loss occurs. Then, the gate voltage of MOSFET 12 falls below the threshold voltage, and the current flowing through MOSFET 12 and, ultimately, the current flowing through switching device 1 decreases, causing switching device 1 to turn off.

[0047] Here, the time difference for turn-off is ΔT _OFF is the time difference ΔT when turning on _ON The time difference ΔT _OFF may be arbitrarily set by trial and error during the development of each element so as to reduce the turn-on loss due to the tail current of IGBT11, or may be set based on the device characteristics (for example, the turn-off delay time) described in the data sheet of the element.

[0048] In the above embodiment, the control unit 15 is described as making the time difference ΔT smaller when turning on the MOSFET 12 than when turning off the MOSFET 12. However, in addition to or instead of this, the control unit 15 may turn on the MOSFET 12 before the IGBT 11 as long as the maximum rated current of the MOSFET 12 is greater than the maximum rated current of the IGBT 11. In this case, the MOSFET 12 is turned on before the IGBT 11, which prevents current from concentrating on the IGBT 11, which has large turn-on loss, during the turn-on period, thereby reducing turn-on loss. Furthermore, because the maximum rated current of the MOSFET 12 is greater than the maximum rated current of the IGBT 11, even if the MOSFET 12 is turned on first and a large current flows into the MOSFET 12, it is possible to prevent the current flowing through the MOSFET 12 from reaching saturation current, thereby preventing a decrease in the turn-on speed, thereby reducing switching loss.

[0049] Furthermore, the second semiconductor switching element 12 has been described as a MOSFET, but the second semiconductor switching element 12 may be another type of semiconductor switching element as long as it does not generate a tail current when turned off, unlike an IGBT.

[0050] Various embodiments of the present invention may also be described with reference to flowcharts and block diagrams, where the blocks may represent (1) stages of a process in which operations are performed or (2) sections of an apparatus responsible for performing the operations. Particular stages and sections may be implemented by dedicated circuitry, programmable circuitry provided with computer-readable instructions stored on a computer-readable medium, and / or a processor provided with computer-readable instructions stored on a computer-readable medium. Dedicated circuitry may include digital and / or analog hardware circuitry, and may include integrated circuits (ICs) and / or discrete circuits. Programmable circuitry may include reconfigurable hardware circuitry, including logical AND, OR, XOR, NAND, NOR, and other logic operations, flip-flops, registers, memory elements such as field programmable gate arrays (FPGAs), programmable logic arrays (PLAs), and the like.

[0051] A computer-readable medium may include any tangible device capable of storing instructions that are executed by an appropriate device, such that the computer-readable medium having instructions stored thereon comprises an article of manufacture containing instructions that can be executed to create means for performing the operations specified in the flowcharts or block diagrams. Examples of computer-readable media may include electronic, magnetic, optical, electromagnetic, and semiconductor storage media. More specific examples of computer-readable media may include floppy disks, diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), electrically erasable programmable read-only memory (EEPROM), static random access memory (SRAM), compact disc read-only memory (CD-ROM), digital versatile disc (DVD), Blu-ray (RTM) disc, memory stick, integrated circuit card, and the like.

[0052] The computer readable instructions may include either assembler instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk®, JAVA®, C++, etc., and conventional procedural programming languages ​​such as the “C” programming language or similar programming languages.

[0053] The computer-readable instructions may be provided to a processor or programmable circuitry of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, either locally or over a wide-area network (WAN) such as a local area network (LAN), the Internet, etc., which executes the computer-readable instructions to create means for performing the operations specified in the flowcharts or block diagrams. Examples of processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, etc.

[0054] 4 illustrates an example of a computer 2200 in which aspects of the present invention may be embodied, in whole or in part. Programs installed on the computer 2200 may cause the computer 2200 to function as or perform operations associated with an apparatus or one or more sections of the apparatus according to embodiments of the present invention, and / or to perform a process or steps of a process according to embodiments of the present invention. Such programs may be executed by the CPU 2212 to cause the computer 2200 to perform specific operations associated with some or all of the blocks of the flowcharts and block diagrams described herein.

[0055] A computer 2200 according to this embodiment includes a CPU 2212, a RAM 2214, a graphics controller 2216, and a display device 2218, which are interconnected by a host controller 2210. The computer 2200 also includes input / output units such as a communication interface 2222, a hard disk drive 2224, a DVD-ROM drive 2226, and an IC card drive, which are connected to the host controller 2210 via an input / output controller 2220. The computer also includes legacy input / output units such as a ROM 2230 and a keyboard 2242, which are connected to the input / output controller 2220 via an input / output chip 2240.

[0056] The CPU 2212 operates according to programs stored in the ROM 2230 and RAM 2214, thereby controlling each unit. The graphics controller 2216 acquires image data generated by the CPU 2212 into a frame buffer or the like provided in the RAM 2214 or into the graphics controller 2216 itself, and causes the image data to be displayed on the display device 2218.

[0057] The communication interface 2222 communicates with other electronic devices via a network. The hard disk drive 2224 stores programs and data used by the CPU 2212 in the computer 2200. The DVD-ROM drive 2226 reads programs or data from the DVD-ROM 2201 and provides the programs or data to the hard disk drive 2224 via the RAM 2214. The IC card drive reads programs and data from an IC card and / or writes programs and data to an IC card.

[0058] The ROM 2230 stores therein a boot program or the like that is executed by the computer 2200 upon activation, and / or programs that depend on the hardware of the computer 2200. The input / output chip 2240 may also connect various input / output units to the input / output controller 2220 via a parallel port, a serial port, a keyboard port, a mouse port, etc.

[0059] The programs are provided by a computer-readable medium such as a DVD-ROM 2201 or an IC card. The programs are read from the computer-readable medium, installed in the hard disk drive 2224, RAM 2214, or ROM 2230, which are also examples of computer-readable media, and executed by the CPU 2212. Information processing described in these programs is read by the computer 2200, and brings about cooperation between the programs and the various types of hardware resources described above. An apparatus or method may be configured by realizing information manipulation or processing in accordance with the use of the computer 2200.

[0060] For example, when communication is performed between the computer 2200 and an external device, the CPU 2212 may execute a communication program loaded into the RAM 2214 and instruct the communication interface 2222 to perform communication processing based on the processing described in the communication program. Under the control of the CPU 2212, the communication interface 2222 reads transmission data stored in a transmission buffer processing area provided in the RAM 2214, the hard disk drive 2224, the DVD-ROM 2201, or a recording medium such as an IC card, and transmits the read transmission data to the network, or writes reception data received from the network to a reception buffer processing area or the like provided on the recording medium.

[0061] The CPU 2212 may also cause all or a necessary portion of a file or database stored on an external recording medium such as the hard disk drive 2224, the DVD-ROM drive 2226 (DVD-ROM 2201), an IC card, etc. to be read into the RAM 2214, and perform various types of processing on the data on the RAM 2214. The CPU 2212 then writes back the processed data to the external recording medium.

[0062] Various types of information, such as various types of programs, data, tables, and databases, may be stored on the recording medium and may undergo information processing. The CPU 2212 may perform various types of processing on data read from the RAM 2214, including various types of operations, information processing, conditional judgment, conditional branching, unconditional branching, information search / replacement, etc., as described throughout this disclosure and specified by the instruction sequences of the programs, and write the results back to the RAM 2214. The CPU 2212 may also search for information in a file, database, etc. on the recording medium. For example, if multiple entries each having an attribute value of a first attribute associated with an attribute value of a second attribute are stored on the recording medium, the CPU 2212 may search for an entry that matches a condition specified by the attribute value of the first attribute from among the multiple entries, read the attribute value of the second attribute stored in the entry, and thereby obtain the attribute value of the second attribute associated with the first attribute that satisfies a predetermined condition.

[0063] The above-described programs or software modules may be stored in a computer-readable medium on or near the computer 2200. A recording medium such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet can also be used as a computer-readable medium, thereby providing the programs to the computer 2200 via the network.

[0064] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0065] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]

[0066] 1 Switching device 11 First semiconductor switching element (IGBT) 12 Second semiconductor switching element (MOSFET) 15 Control Unit 100 boards 101 Conductive layer 102 Bonding Wire 2200 Computer 2201 DVD-ROM 2210 host controller 2212 CPU 2214 RAM 2216 Graphics Controller 2218 Display Device 2220 Input / Output Controller 2222 communication interface 2224 hard disk drive 2226 DVD-ROM drive 2230 ROM 2240 I / O chip 2242 keyboard

Claims

1. a first semiconductor switching element which is an IGBT and a second semiconductor switching element which is a type different from the IGBT, which are electrically connected in parallel; a control unit that turns on the second semiconductor switching element before the first semiconductor switching element; Equipped with A switching device, wherein the ratio of the maximum rated current of the second semiconductor switching element to the maximum rated current of the first semiconductor switching element is 3:

2.

2. 2. The switching device according to claim 1, wherein the control unit makes a time difference between when the first semiconductor switching element is switched and when the second semiconductor switching element is switched smaller in the case of turn-on than in the case of turn-off.

3. The switching device according to claim 2 , wherein the control unit sets the time difference to a positive value in the case of turn-off.

4. The switching device according to claim 1 , wherein the second semiconductor switching element is a MOSFET.

5. The switching device according to claim 1 , wherein the second semiconductor switching element is a wide bandgap semiconductor element.

6. a control step of turning on a first semiconductor switching element of an IGBT electrically connected in parallel with a second semiconductor switching element of a type different from the IGBT before turning on the second semiconductor switching element, A switching method, wherein the maximum rated current of the second semiconductor switching element and the maximum rated current of the first semiconductor switching element are in a ratio of 3:2.

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