Semiconductor device and semiconductor system having the semiconductor device

Abstract

Produced is a semiconductor device having at least a high-resistance oxide film, wherein the high-resistance oxide film, which has a resistance of 1.0×106Ω•cm or greater, is positioned along the direction in which current flows, or is positioned between a source electrode and a drain electrode, or is positioned between the source electrode and / or the drain electrode and a substrate, the semiconductor device thus produced being used as a power device.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device useful as a power device, etc. The present invention also relates to a semiconductor system having the semiconductor device, and to a method for manufacturing the semiconductor device. [Background technology]

[0002] As a next-generation switching element that can achieve high breakdown voltage, low loss, and high heat resistance, semiconductor devices using gallium oxide (Ga2O3), which has a large band gap, are attracting attention, and are expected to be applied to power semiconductor devices such as inverters. Furthermore, due to its wide band gap, it is also expected to be applied to light-emitting and receiving devices such as LEDs and sensors. According to Non-Patent Document 1, the band gap of gallium oxide can be controlled by mixing indium and aluminum, either individually or in combination, and it constitutes an extremely attractive material family as an InAlGaO-based semiconductor. Here, InAlGaO-based semiconductors refer to In X Al Y Ga Z O3 (0≦X≦2, 0≦Y≦2, 0≦Z≦2, X+Y+Z=1.5~2.5), and can be viewed as the same material family containing gallium oxide.

[0003] In recent years, gallium oxide-based p-type semiconductors have been investigated. For example, Patent Document 1 describes that a substrate exhibiting p-type conductivity can be obtained by forming β-Ga2O3-based crystals by the FZ method using MgO (a p-type dopant source). Patent Document 2 also describes that a substrate exhibiting p-type conductivity can be obtained by forming α-(Al x Ga 1-x It has been described that a p-type semiconductor is formed by ion-implanting a p-type dopant into a .2O3 single crystal film. However, it is difficult to fabricate a p-type semiconductor using these methods (Non-Patent Document 2), and there have been no reports of successful fabrication of a p-type semiconductor using these methods. Therefore, a feasible p-type oxide semiconductor and a method for manufacturing the same have been eagerly awaited.

[0004] Furthermore, as described in Non-Patent Documents 3 and 4, the use of Rh2O3, ZnRh2O4, etc. as p-type semiconductors has also been investigated. However, when Rh2O3 is used, the raw material concentration becomes particularly low during film formation, which has an effect on film formation, and it has been difficult to produce Rh2O3 single crystals even when organic solvents are used. Furthermore, even when Hall effect measurements are performed, the material is not judged to be p-type, and there is also the problem that measurements cannot be performed at all. Furthermore, for example, the Hall coefficient is below the measurement limit (0.2 cm 3 / C), which posed a practical problem. ZnRh2O4 also has low mobility and a narrow band gap, which means it cannot be used in LEDs or power devices, and these are not necessarily satisfactory.

[0005] As wide band gap semiconductors, various p-type oxide semiconductors other than Rh2O3, ZnRh2O4, etc. are being investigated. Patent Document 3 describes the use of delafossite, oxychalcogenide, etc. as p-type semiconductors. However, these semiconductors have a mobility of 1 cm 2 / V·s or less, which resulted in poor electrical properties and the inability to form a pn junction with next-generation n-type oxide semiconductors such as α-Ga2O3.

[0006] Ir2O3 has been known for some time. For example, Patent Document 4 describes the use of Ir2O3 as an iridium catalyst. Patent Document 5 describes the use of Ir2O3 as a dielectric. Patent Document 6 describes the use of Ir2O3 as an electrode. However, the use of Ir2O3 as a p-type semiconductor was not known, but recently, the present applicants have considered the use of Ir2O3 as a p-type semiconductor and are conducting research and development on it. While power devices such as transistors require low on-resistance and high breakdown voltage, they still face challenges in electrical characteristics such as leakage current. Gallium oxide (Ga2O3) in particular has excellent semiconductor properties, including a breakdown field strength of approximately 10 and low on-resistance. However, these semiconductor properties cannot be fully utilized due to issues with its electrical characteristics. Oxide semiconductors with a band gap of 3 eV or greater also face similar challenges. Specifically, junction leakage current, which is likely to occur during ion implantation, adversely affects the electrical properties of oxide semiconductors. Therefore, there has been a long-awaited need for a semiconductor device that can solve these electrical and other problems and effectively utilizes excellent semiconductor materials such as gallium oxide (Ga2O3) to achieve high breakdown voltage, low loss, and high heat resistance. There has also been a long-awaited need for a method for easily manufacturing semiconductor devices using such semiconductor materials. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-340308 [Patent Document 2] Japanese Patent Application Laid-Open No. 2013-58637 [Patent Document 3] Japanese Patent Application Laid-Open No. 2016-25256 [Patent Document 4] Japanese Patent Application Publication No. 9-25255 [Patent Document 5] Japanese Patent Application Publication No. 8-227793 [Patent Document 6] Japanese Patent Application Publication No. 11-21687 [Non-patent literature]

[0008] [Non-Patent Document 1] Kentaro Kaneko, "Growth and Properties of Gallium Oxide-Based Alloy Thin Films with Corundum Structure," Doctoral Dissertation, Kyoto University, March 2013 [Non-patent document 2] Tatsuya Takemoto, EE Times Japan, “Power Semiconductor Gallium Oxide” Thermal Conductivity, P-Type… Overcoming Challenges for Practical Use [online], February 27, 2014, ITmedia, Inc., [Retrieved June 21, 2016], Internet <URL: http: / / eetimes.jp / ee / articles / 1402 / 27 / news028_2.html> [Non-patent document 3] FPKOFFYBERG et al., "optical bandgaps and electron affinities of semiconducting Rh2O3(I) and Rh2O3(III)", J. Phys. Chem. Solids Vol.53, No.10, pp.1285-1288, 1992 [Non-patent document 4] Hideo Hosono, "Exploring the Functions of Oxide Semiconductors," Physical Properties Research, Vol. 3, No. 1, 031211 (November 2013 - February 2014 Combined Issue) Summary of the Invention [Problem to be solved by the invention]

[0009] One object of the present invention is to provide a semiconductor device having excellent semiconductor characteristics useful as a power device, etc. Another object of the present invention is to provide a method for manufacturing a semiconductor device in an industrially advantageous manner. [Means for solving the problem]

[0010] As a result of extensive research to achieve the above object, the present inventors have found that the 6 Surprisingly, when a high-resistivity oxide film of Ω·cm or more was used, the electrical properties of the fabricated semiconductor device were found to be dramatically improved. After further investigation, the researchers succeeded in creating a high-mobility gallium oxide semiconductor transistor, and found that the resulting transistor could solve the above-mentioned conventional problems. Furthermore, after obtaining the above findings, the present inventors conducted further studies and have now completed the present invention.

[0011] That is, the present invention relates to the following inventions. [1] A semiconductor device having at least a high-resistance oxide film, the high-resistance oxide film being arranged along a direction of current flow, and the resistance of the high-resistance oxide film being 1.0×10 6 A semiconductor device characterized by having a resistivity of Ω·cm or more. [2] A semiconductor device having at least a gate electrode, a source electrode, a drain electrode, and a high-resistance oxide film, wherein the high-resistance oxide film is disposed between the source electrode and the drain electrode, and the resistance of the high-resistance oxide film is 1.0×10 6 A semiconductor device characterized by having a resistivity of Ω·cm or more. [3] A semiconductor device having at least a gate electrode, a source electrode, a drain electrode, a high-resistance oxide film, and a substrate, wherein the high-resistance oxide film is disposed between the source electrode and / or the drain electrode and the substrate, and the resistance of the high-resistance oxide film is 1.0×10 6 A semiconductor device characterized by having a resistivity of Ω·cm or more. [4] The resistance of the high-resistivity oxide film is 1.0 × 10 10 The semiconductor device according to any one of [1] to [3] above, which has a resistivity of Ω·cm or more. [5] The semiconductor device according to any one of [1] to [4], wherein the high-resistance oxide film is a current blocking layer. [6] The semiconductor device according to any one of [1] to [5], wherein the high-resistance oxide film has a corundum structure. [7] The semiconductor device according to any one of [1] to [6] above, wherein the high-resistance oxide film contains Ga2O3. [8] The semiconductor device according to any one of [1] to [7], wherein the high-resistance oxide film contains a p-type dopant. [9] The semiconductor device according to any one of [1] to [8], further comprising a channel formation region, wherein the high-resistance oxide film is disposed below the channel formation region.

[10] Field-effect mobility is 30 cm 2The semiconductor device according to any one of [1] to [9] above, wherein the value is / V·s or more.

[11] The semiconductor device according to any one of [1] to

[10] , further comprising a semiconductor layer and a substrate, wherein the high-resistance oxide film is disposed between the semiconductor layer and the substrate.

[12] The semiconductor device according to any one of [1] to

[10] above, wherein the high-resistance oxide film has an opening and is a vertical device.

[13] The semiconductor device according to any one of [1] to

[12] above, which is a power device.

[14] The semiconductor device according to any one of [1] to

[13] above, which is a MOSFET.

[15] The semiconductor device according to any one of [1] to

[14] above, wherein the on / off ratio is 1000 or more.

[16] The semiconductor device according to any one of [1] to

[15] , which is normally off.

[17] A semiconductor system including a semiconductor device, wherein the semiconductor device is the semiconductor device according to any one of [1] to

[16] above. [Effects of the Invention]

[0012] The semiconductor device of the present invention is useful as a power device or the like, and has excellent semiconductor properties. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a schematic diagram showing the configuration of a film forming apparatus (mist CVD apparatus) that is preferably used in the present invention. [Figure 2] 1A and 1B are diagrams schematically showing a MOSFET according to Example 1, in which (a) is a diagram showing a top surface of the MOSFET, and (b) is a diagram showing a cross section taken along line A-A' in (a). [Figure 3] 1A and 1B are diagrams showing a preferred embodiment of a MOSFET according to the present invention, in which (a) is a diagram showing a top view of the MOSFET and (b) is a diagram showing a cross section of (a). [Figure 4] 1 is a diagram schematically illustrating a preferred embodiment of a MOSFET according to the present invention. [Figure 5] 1A and 1B are diagrams showing a preferred embodiment of a MOSFET according to the present invention as an example, in which FIG. 1A shows a top view of the MOSFET, and FIG. 1B shows a cross section taken along the line B-B' in FIG. 1A. [Figure 6] 1 is a diagram schematically illustrating a preferred embodiment of a MOSFET according to the present invention. [Figure 7] FIG. 1 is a diagram showing the results of IV measurement in an example. [Figure 8] FIG. 1 is a diagram schematically illustrating a preferred example of a power supply system. [Figure 9] FIG. 1 is a diagram schematically illustrating a preferred example of a system device. [Figure 10] FIG. 1 is a diagram schematically illustrating a preferred example of a power supply circuit diagram of a power supply device. DETAILED DESCRIPTION OF THE INVENTION

[0014] A semiconductor device according to an embodiment of the present invention is a semiconductor device having at least a high-resistance oxide film, the high-resistance oxide film being disposed along a direction in which a current flows, and the resistance of the high-resistance oxide film being 1.0×10 6 The resistance of the high-resistance oxide film is characterized by being 1.0×10 or more. Here, the resistance of the high-resistance oxide film means the electrical resistivity [Ω·cm] of the high-resistance oxide film. The semiconductor device of the present invention is a semiconductor device having at least a gate electrode, a source electrode, a drain electrode, and a high-resistance oxide film, wherein the high-resistance oxide film is disposed between the source electrode and the drain electrode, and the resistance of the high-resistance oxide film is 1.0×10 6 The semiconductor device of the present invention is characterized in that it has at least a gate electrode, a source electrode, a drain electrode, a high-resistance oxide film, and a substrate, and the high-resistance oxide film is disposed between the source electrode and / or the drain electrode and the substrate, and the resistance of the high-resistance oxide film is 1.0×10 6 It is characterized by a resistance of Ω·cm or more.

[0015] The high resistance oxide film has a resistance of 1.0×10 6There is no particular limitation as long as the oxide film has a resistance of Ω·cm or more. In an embodiment of the present invention, the resistance of the high-resistance oxide film is 1.0×10 10 Ω·cm or more, and the resistance of the high-resistance oxide film is preferably 1.0×10 12 The resistance is preferably Ω·cm or more. The resistance can be measured by forming a measurement electrode on the high-resistance oxide film and passing a current through the electrode. The upper limit of the resistance is not particularly limited, but is preferably 1.0×10 15 Ω·cm, and more preferably 1.0×10 14 In an embodiment of the present invention, the high-resistivity oxide film is preferably a current-blocking layer. By using the high-resistivity oxide film as a current-blocking layer, better electrical properties can be achieved.

[0016] The material of the high-resistance oxide film is not particularly limited, but in an embodiment of the present invention, it is preferably a crystalline film. The crystalline film may be a polycrystalline film or a single crystalline film. The crystalline structure of the crystalline film is also not particularly limited, but in an embodiment of the present invention, it preferably has a corundum structure. The material of the high-resistance oxide film preferably contains gallium, and more preferably contains Ga2O3. In an embodiment of the present invention, it is preferable that the high-resistance oxide film contains a p-type dopant. Furthermore, according to the present invention, it is preferable that the semiconductor device further includes a channel formation region, and that the high-resistance oxide film is disposed below the channel formation region. According to these preferred ranges, it is preferable that the thickness of the high-resistance oxide film is 30 cm 2 / V·s or more (preferably 60cm 2A high field-effect mobility (V·s or more) can be easily achieved. The field-effect mobility generally refers to the maximum field-effect mobility, which refers to the field-effect mobility of a semiconductor device such as a transistor, calculated using output current data corresponding to the semiconductor device. Furthermore, within the above preferred range, an on / off ratio of 1,000 or more (more preferably 100,000 or more) can be easily achieved. The "on / off ratio" refers to the ratio of the on current to the off current of the semiconductor device. For example, when the semiconductor device includes at least a source electrode and a drain electrode, the off current refers to the current flowing between the source electrode and the drain electrode when the semiconductor device is off, and the on current refers to the current flowing between the source electrode and the drain electrode when the semiconductor device is on.

[0017] The high-resistance oxide film is preferably an oxide semiconductor film containing gallium oxide or its mixed crystal as a main component. The oxide semiconductor film may be a p-type semiconductor film or an n-type semiconductor film. Examples of the gallium oxide include α-Ga2O3, β-Ga2O3, and ε-Ga2O3, with α-Ga2O3 being preferred. The mixed crystal of gallium oxide includes a mixed crystal of gallium oxide and one or more metal oxides. Suitable examples of the metal oxide include aluminum oxide, indium oxide, iridium oxide, rhodium oxide, and iron oxide. The term "main component" refers to, for example, when the oxide semiconductor film contains α-Ga2O3 as a main component, the atomic ratio of gallium among the metal elements of the oxide semiconductor film is 0.5 or more. In this embodiment of the present invention, the atomic ratio of gallium among the metal elements of the oxide semiconductor film is preferably 0.7 or more, more preferably 0.8 or more. Furthermore, for example, when the oxide semiconductor film contains a mixed crystal of α-Ga2O3 and α-Al2O3 as a main component, it is sufficient that the mixed crystal is contained in such a manner that the total atomic ratio of gallium and aluminum among the metal elements of the oxide semiconductor film is 0.5 or more. However, in an embodiment of the present invention, the atomic ratio of gallium among the metal elements of the oxide semiconductor film is preferably 0.5 or more, and more preferably 0.7 or more.

[0018] The thickness of the high-resistance oxide film is not particularly limited and may be 1 μm or less or 1 μm or more, but in an embodiment of the present invention, it is preferably 1 μm or more, more preferably 1 μm to 40 μm, and most preferably 1 μm to 25 μm. The surface area of ​​the semiconductor film is not particularly limited, but is preferably 1 μm or less. 2 May be more than 1 mm 2 The high resistance oxide film may be a single layer film or a multilayer film.

[0019] The high-resistance oxide film is preferably an oxide semiconductor film containing a dopant. The dopant is not particularly limited as long as it does not impede the object of the present invention, and may be any known dopant. Examples of the dopant include p-type dopants such as Mg, Zn, or Ca. The content of the dopant in the composition of the oxide semiconductor film is preferably 0.00001 atomic % or more, more preferably 0.00001 atomic % to 20 atomic %, and most preferably 0.0001 atomic % to 20 atomic %.

[0020] The p-type dopant is not particularly limited as long as it can impart conductivity to the oxide semiconductor film as a p-type semiconductor film, and may be any known dopant. Examples of the p-type dopant include Mg, H, Li, Na, K, Rb, Cs, Fr, Be, Ca, Sr, Ba, Ra, Mn, Fe, Co, Ni, Pd, Cu, Ag, Au, Zn, Cd, Hg, Tl, Pb, N, P, and two or more elements thereof. In an embodiment of the present invention, the p-type dopant is preferably Mg, Zn, or Ca.

[0021] Unlike high-resistance oxide layers formed by conventional ion implantation, the high-resistance oxide film is typically obtained by epitaxial crystal growth, but the formation method is not particularly limited. The epitaxial crystal growth method is not particularly limited and may be any known method as long as it does not impede the objectives of the present invention. Examples of the epitaxial crystal growth method include CVD, MOCVD, MOVPE, mist CVD, mist epitaxy, MBE, HVPE, and pulse growth. In an embodiment of the present invention, the epitaxial crystal growth method is preferably mist CVD or mist epitaxy.

[0022] The method for manufacturing a semiconductor device according to the embodiment of the present invention is 6A method for manufacturing a semiconductor device includes forming a high-resistivity oxide film of Ω·cm or more, characterized in that the high-resistivity oxide film is formed by depositing the film along the direction of current flow. Also, the method for manufacturing a semiconductor device according to an embodiment of the present invention includes forming a gate electrode, a source electrode, a drain electrode, and a 1.0×10 6 A method for manufacturing a semiconductor device includes forming a high-resistance oxide film of Ω·cm or more on a substrate, and the high-resistance oxide film is formed by depositing the high-resistance oxide film between the source electrode and the drain electrode.A method for manufacturing a semiconductor device according to an embodiment of the present invention includes forming at least a gate electrode, a source electrode, a drain electrode, and a high-resistance oxide film on a substrate, either directly or via another layer, and the high-resistance oxide film is formed by depositing the high-resistance oxide film between the source electrode and / or the drain electrode and the substrate.This manufacturing method makes it easy to obtain semiconductor devices with excellent electrical characteristics (e.g., semiconductor devices including oxide semiconductors), which are difficult to achieve by ion implantation.

[0023] The formation of the high-resistance oxide film is preferably carried out by crystal growth, more preferably by lateral crystal growth. In an embodiment of the present invention, the film formation is preferably carried out at 800°C or less, and the high-resistance oxide film has a corundum structure. In an embodiment of the present invention, the formation of the high-resistance oxide film is carried out using a raw material containing gallium, and the high-resistance oxide film preferably contains gallium, more preferably α-Ga2O3. In an embodiment of the present invention, the formation of the high-resistance oxide film is preferably carried out using a raw material containing a p-type dopant, and the high-resistance oxide film preferably contains a p-type dopant. In an embodiment of the present invention, the semiconductor device preferably further includes a channel formation region, and the high-resistance oxide film is disposed below the channel formation region. According to this preferred manufacturing method, the field-effect mobility of the semiconductor device can be increased to 30 cm 2 / V·s or more (preferably 60cm 2 / V·s or more).

[0024] In an embodiment of the present invention, the film formation is preferably carried out by atomizing a raw material solution containing a metal (atomization step), transporting the obtained atomized droplets to the vicinity of the substrate by a carrier gas (transport step), and then thermally reacting the atomized droplets (film formation step).

[0025] (Raw material solution) The raw material solution contains a metal as a film-forming raw material, and is not particularly limited as long as it can be atomized, and may contain an inorganic material or an organic material. The metal may be a simple metal or a metal compound, and is not particularly limited as long as it does not impede the object of the present invention. Examples of the metal include gallium (Ga), iridium (Ir), indium (In), rhodium (Rh), aluminum (Al), gold (Au), silver (Ag), platinum (Pt), copper (Cu), iron (Fe), manganese (Mn), nickel (Ni), palladium (Pd), cobalt (Co), ruthenium (Ru), chromium (Cr), molybdenum (Mo), tungsten (W), tantalum (Ta), zinc (Zn), lead ( Examples of suitable metals include one or more metals selected from the group consisting of Pb, rhenium (Re), titanium (Ti), tin (Sn), gallium (Ga), magnesium (Mg), calcium (Ca), and zirconium (Zr). In an embodiment of the present invention, the metal preferably includes at least one or more metals from periods 4 to 6 of the periodic table, more preferably at least gallium, indium, aluminum, rhodium, or iridium, and most preferably at least gallium. By using such preferred metals, it is possible to form epitaxial films that are suitable for use in semiconductor devices and the like.

[0026] In an embodiment of the present invention, the raw material solution can be preferably prepared by dissolving or dispersing the metal in the form of a complex or salt in an organic solvent or water. Examples of the complex include acetylacetonate complexes, carbonyl complexes, ammine complexes, and hydride complexes. Examples of the salt include organic metal salts (e.g., metal acetates, metal oxalates, and metal citrates), metal sulfides, metal nitrates, metal phosphates, and metal halides (e.g., metal chlorides, metal bromides, and metal iodides).

[0027] The solvent for the raw material solution is not particularly limited as long as it does not impair the object of the present invention, and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In an embodiment of the present invention, the solvent preferably contains water.

[0028] The raw material solution may also contain additives such as hydrohalic acids and oxidizing agents. Examples of hydrohalic acids include hydrobromic acid, hydrochloric acid, and hydroiodic acid. Examples of oxidizing agents include peroxides such as hydrogen peroxide (H2O2), sodium peroxide (Na2O2), barium peroxide (BaO2), and benzoyl peroxide (C6H5CO)2O2, hypochlorous acid (HClO), perchloric acid, nitric acid, ozone water, and organic peroxides such as peracetic acid and nitrobenzene. The proportion of the additives is not particularly limited, but is preferably 0.001% to 50% by volume, and more preferably 0.01% to 30% by volume, relative to the raw material solution.

[0029] The raw material solution may contain a dopant. The dopant is not particularly limited as long as it does not impede the object of the present invention. Examples of the dopant include the above-mentioned n-type dopants and p-type dopants. The concentration of the dopant is usually about 1×10 16 / cm 3 ~1×10 22 / cm 3 Alternatively, the dopant concentration may be, for example, about 1×10 17 / cm 3 Furthermore, according to the present invention, the dopant may be present in a concentration as low as about 1×10 20 / cm 3 It may be contained in a concentration higher than this.

[0030] (Atomization process) The atomization step involves preparing a raw material solution containing a metal, atomizing the raw material solution, and generating atomized droplets. The blending ratio of the metal is not particularly limited, but is preferably 0.0001 mol / L to 20 mol / L relative to the total raw material solution. The atomization method is not particularly limited as long as it can atomize the raw material solution, and any known atomization method may be used. However, in an embodiment of the present invention, an atomization method using ultrasonic vibration is preferred. The atomized droplets (e.g., mist, etc.) used in the present invention are airborne, and more preferably, they are atomized droplets that can be transported while floating in space with an initial velocity of zero, rather than being sprayed like a spray. The droplet size of the atomized droplets is not particularly limited, and may be droplets of about several mm, but is preferably 50 μm or less, more preferably 1 to 10 μm.

[0031] (Transportation process) In the transport step, the atomized droplets are transported to the substrate by the carrier gas. The type of carrier gas is not particularly limited as long as it does not impede the object of the present invention, and suitable examples include oxygen, ozone, an inert gas (e.g., nitrogen, argon, etc.), or a reducing gas (e.g., hydrogen gas, forming gas, etc.). The type of carrier gas may be one type, or two or more types. A dilution gas with a different carrier gas concentration (e.g., a 10-fold dilution gas, etc.) may also be used as a second carrier gas. The number of carrier gas supply locations may be one or more. The flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 LPM, and more preferably 0.1 to 10 LPM.

[0032] (Film forming process) In the film-forming step, the atomized droplets are reacted to form a film on the substrate. The reaction is not particularly limited as long as it forms a film from the atomized droplets; however, in an embodiment of the present invention, a thermal reaction is preferred. The thermal reaction may be any reaction that heat-induced reaction of the atomized droplets, and the reaction conditions are not particularly limited as long as they do not impede the objectives of the present invention. In this step, the thermal reaction is typically carried out at a temperature equal to or higher than the evaporation temperature of the solvent in the raw material solution, but is preferably not too high, more preferably 850°C or lower, and most preferably 650°C or lower. Furthermore, the thermal reaction may be carried out under any of the following conditions: vacuum, oxygen-free atmosphere, reducing gas atmosphere, and oxygen atmosphere, as long as it does not impede the objectives of the present invention. Furthermore, the thermal reaction may be carried out under any of the following conditions: atmospheric pressure, pressurized atmosphere, and reduced pressure. However, in an embodiment of the present invention, atmospheric pressure is preferred because it simplifies the calculation of the evaporation temperature and simplifies the equipment. Furthermore, the film thickness can be set by adjusting the film-forming time.

[0033] (Base) The substrate is not particularly limited as long as it can support the film. The material of the substrate is also not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate, an organic compound, or an inorganic compound. The shape of the substrate may be any shape, and is effective for all shapes, such as a plate-like shape (e.g., a flat plate or a disk), a fiber-like shape, a rod-like shape, a column-like shape, a prism-like shape, a cylindrical shape, a spiral shape, a sphere-like shape, a ring-like shape, etc., but in an embodiment of the present invention, a substrate is preferred. The thickness of the substrate is not particularly limited in an embodiment of the present invention.

[0034] The substrate is not particularly limited as long as it is plate-shaped and serves as a support for the semiconductor film. It may be an insulating substrate, a semiconductor substrate, a metal substrate, or a conductive substrate. However, the substrate is preferably an insulating substrate, and also preferably a substrate having a metal film on its surface. Examples of the substrate include a base substrate containing as its main component a substrate material having a corundum structure, a base substrate containing as its main component a substrate material having a β-gallia structure, or a base substrate containing as its main component a substrate material having a hexagonal crystal structure. Here, "main component" means that the substrate material having the specific crystal structure preferably accounts for 50% or more, more preferably 70% or more, and even more preferably 90% or more, in atomic ratio, of the total components of the substrate material; it may be 100%.

[0035] The substrate material is not particularly limited, and may be any known material, as long as it does not impede the objectives of the present invention. Suitable examples of substrate materials having the corundum structure include α-Al2O3 (sapphire substrate) and α-Ga2O3, with more preferred examples including a-plane sapphire substrates, m-plane sapphire substrates, r-plane sapphire substrates, c-plane sapphire substrates, and α-type gallium oxide substrates (a-plane, m-plane, or r-plane). Examples of base substrates primarily composed of substrate materials having a β-gallium structure include β-Ga2O3 substrates and mixed crystal substrates containing Ga2O3 and Al2O3, with Al2O3 being greater than 0 wt% and less than 60 wt%. Examples of base substrates primarily composed of substrate materials having a hexagonal crystal structure include SiC substrates, ZnO substrates, and GaN substrates.

[0036] In an embodiment of the present invention, an annealing treatment may be carried out after the film formation step. The annealing temperature is not particularly limited as long as it does not impede the object of the present invention, and is usually 300°C to 650°C, and preferably 350°C to 550°C. The annealing time is usually 1 minute to 48 hours, preferably 10 minutes to 24 hours, and more preferably 30 minutes to 12 hours. The annealing may be carried out in any atmosphere as long as it does not impede the object of the present invention, but is preferably carried out in an oxygen-free atmosphere, and more preferably in a nitrogen atmosphere.

[0037] In an embodiment of the present invention, the semiconductor film may be provided directly on the substrate, or may be provided via another layer such as a buffer layer or a stress relief layer. The method for forming each layer is not particularly limited and may be a known method, but in an embodiment of the present invention, a mist CVD method or a mist epitaxy method is preferred.

[0038] A film formation apparatus 19 suitable for use in the mist CVD or mist epitaxy method will now be described with reference to the drawings. The film formation apparatus 19 shown in FIG. 1 includes a carrier gas source 22a for supplying a carrier gas, a flow rate control valve 23a for adjusting the flow rate of the carrier gas output from the carrier gas source 22a, a carrier gas (diluted) source 22b for supplying a carrier gas (diluted), a flow rate control valve 23b for adjusting the flow rate of the carrier gas (diluted) output from the carrier gas (diluted) source 22b, a mist source 24 for containing a raw material solution 24a, a container 25 for containing water 25a, an ultrasonic vibrator 26 attached to the bottom of the container 25, a film formation chamber 30, a quartz supply pipe 27 connecting the mist source 24 to the film formation chamber 30, and a hot plate (heater) 28 installed within the film formation chamber 30. A substrate 20 is placed on the hot plate 28.

[0039] As shown in FIG. 1, the raw material solution 24a is placed in the mist source 24. The substrate 20 is then placed on the hot plate 28, which is then activated to raise the temperature inside the film formation chamber 30. The flow control valves 23 (23a, 23b) are then opened to supply carrier gas from the carrier gas source 22 (22a, 22b) into the film formation chamber 30. The atmosphere in the film formation chamber 30 is then thoroughly replaced with the carrier gas, and the flow rates of the carrier gas and the carrier gas (dilution) are then adjusted. The ultrasonic vibrator 26 is then vibrated, and the vibrations are propagated to the raw material solution 24a through the water 25a, thereby atomizing the raw material solution 24a and generating atomized droplets 24b. The atomized droplets 24b are then introduced into the film formation chamber 30 by the carrier gas and transported to the substrate 20. The atomized droplets 24b then undergo a thermal reaction in the film formation chamber 30 under atmospheric pressure, forming a film on the substrate 20.

[0040] In an embodiment of the present invention, the film obtained in the film formation step may be used in a semiconductor device as is, or may be peeled off from the substrate or the like by a known method before being used in a semiconductor device. The semiconductor device preferably includes a semiconductor layer and a substrate, and the high-resistivity oxide film is disposed between the semiconductor layer and the substrate. Such a preferred semiconductor device provides a lateral semiconductor device with superior electrical characteristics, making it suitable for use as a power device. Furthermore, the semiconductor device is preferably a vertical device in which the high-resistance oxide film has an opening. Such a preferred semiconductor device can provide a horizontal semiconductor device with better electrical characteristics that can achieve high breakdown voltage and large current, and can be more suitably used as a power device.

[0041] The semiconductor device is particularly useful as a power device. Examples of the semiconductor device include transistors, and among these, MOSFETs are preferred. The semiconductor device is preferably normally off.

[0042] The transistor may be, for example, a semiconductor device including at least a high-resistance oxide film, a gate insulating film, a gate electrode, a source electrode, and a drain electrode. In an embodiment of the present invention, the high-resistance oxide film may be used as a semiconductor layer. The semiconductor device preferably includes a channel formation region, and more preferably includes an inversion channel formation region.

[0043] The inversion channel formation region is usually provided between semiconductor regions exhibiting different types of conductivity. For example, when the inversion channel formation region is provided in a p-type semiconductor layer, it is usually provided in the p-type semiconductor layer between semiconductor regions made of n-type semiconductor. When the inversion channel formation region is provided in an n-type semiconductor layer, it is usually provided in the n-type semiconductor layer between semiconductor regions made of p-type semiconductor. The method for forming each semiconductor region may be the same as the method for forming the high-resistance oxide film described above.

[0044] In an embodiment of the present invention, an oxide film containing at least one element from Group 15 of the periodic table is preferably stacked on the inversion channel formation region. Examples of such elements include nitrogen (N) and phosphorus (P). In an embodiment of the present invention, nitrogen (N) or phosphorus (P) is preferred, with phosphorus (P) being more preferred. For example, stacking an oxide film containing at least phosphorus on the inversion channel formation region between the gate insulating film and the inversion channel formation region can prevent hydrogen diffusion into the oxide semiconductor film and further reduce the interface state density, thereby providing semiconductor devices, particularly wide bandgap semiconductor devices, with superior semiconductor characteristics. In an embodiment of the present invention, the oxide film preferably contains at least one element from Group 15 of the periodic table and one or more metals from Group 13 of the periodic table. Examples of such metals include aluminum (Al), gallium (Ga), and indium (In). Among these, Ga and / or Al are preferred, with Ga being more preferred. Furthermore, the oxide film is preferably thin, more preferably 100 nm or less in thickness, and most preferably 50 nm or less in thickness. By stacking such an oxide film, gate leakage can be more effectively suppressed and semiconductor characteristics can be improved. The oxide film can be formed by, for example, known methods, more specifically, dry methods and wet methods, but a surface treatment of the inversion channel region using phosphoric acid or the like is preferred.

[0045] In an embodiment of the present invention, it is preferable that a gate electrode is provided on the inversion channel formation region with a gate insulating film interposed therebetween. However, it is also preferable that a gate electrode is provided on the inversion channel formation region and the oxide film with a gate insulating film interposed therebetween. Such a configuration makes it easier to prevent hydrogen diffusion, etc., and achieves better semiconductor characteristics.

[0046] The gate insulating film is not particularly limited as long as it does not impede the object of the present invention, and may be a known insulating film. Suitable examples of the gate insulating film include oxide films such as SiO2, Si3N4, Al2O3, GaO, AlGaO, InAlGaO, AlInZnGaO4, AlN, Hf2O3, SiN, SiON, MgO, GdO, and oxide films containing at least phosphorus. The gate insulating film may be formed by a known method, such as a dry method or a wet method. Examples of dry methods include sputtering, vacuum deposition, CVD, and PLD. Examples of wet methods include coating methods such as screen printing and die coating.

[0047] The gate electrode may be a known gate electrode, and the electrode material may be either a conductive inorganic material or a conductive organic material. In an embodiment of the present invention, the electrode material is preferably a metal. The metal is not particularly limited, but preferably includes at least one metal selected from Groups 4 to 11 of the periodic table. Examples of metals in Group 4 of the periodic table include titanium (Ti), zirconium (Zr), and hafnium (Hf), with Ti being preferred. Examples of metals in Group 5 of the periodic table include vanadium (V), niobium (Nb), and tantalum (Ta). Examples of metals in Group 6 of the periodic table include one or more metals selected from chromium (Cr), molybdenum (Mo), and tungsten (W). In an embodiment of the present invention, Cr is preferred because it provides better semiconductor properties, such as switching characteristics. Examples of metals in Group 7 of the periodic table include manganese (Mn), technetium (Tc), and rhenium (Re). Examples of metals in Group 8 of the periodic table include iron (Fe), ruthenium (Ru), and osmium (Os). Examples of metals in Group 9 of the periodic table include cobalt (Co), rhodium (Rh), and iridium (Ir). Examples of metals in Group 10 of the periodic table include nickel (Ni), palladium (Pd), and platinum (Pt), with Pt being preferred. Examples of metals in Group 11 of the periodic table include copper (Cu), silver (Ag), and gold (Au). Examples of methods for forming the gate electrode include known methods, more specifically, dry methods and wet methods. Examples of dry methods include known methods such as sputtering, vacuum deposition, and CVD. Examples of wet methods include screen printing and die coating.

[0048] In the embodiments of the present invention, not only a gate electrode but also a source electrode and a drain electrode are typically provided, and the source electrode and the drain electrode may each be a known electrode, similar to the gate electrode, and the electrode formation method may also be a known method.

[0049] Preferred embodiments of the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these.

[0050] (MOSFET) A specific example of the semiconductor device of the present invention is a MOSFET shown in FIG. 2. The MOSFET in FIG. 2 is a lateral MOSFET and includes an n+ type semiconductor layer (n+ type source layer) 1b, an n+ type semiconductor layer (n+ type drain layer) 1c, a high-resistance oxide film 2 as a p-type semiconductor layer, a gate insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9. Note that FIG. 2(a) is a top view of the MOSFET viewed from the zenith direction, and schematically illustrates the top surface of the MOSFET. Also, FIG. 2(b) schematically illustrates a cross section of the MOSFET taken along line A-A' in FIG. 2(a).

[0051] 2, when a voltage is applied between the source electrode 5b and the drain electrode 5c and a positive voltage is applied to the gate electrode 5a with respect to the source electrode 135b, a channel layer is formed between the n+ type semiconductor layer (n+ type source layer) 1b and the n+ type semiconductor layer (n+ type drain layer) 1c, causing the MOSFET to turn on. When the voltage of the gate electrode is set to 0V, no channel layer is formed, causing the MOSFET to turn off.

[0052] As an example of the semiconductor device of the present invention, one embodiment of a MOSFET is shown in FIG. 3. Note that FIG. 3(a) is a top view of the MOSFET as viewed from the zenith direction, and schematically illustrates the top surface of the MOSFET. FIG. 3(b) is a schematic cross-sectional view of the MOSFET in FIG. 3(a). The MOSFET in FIG. 3 is a lateral MOSFET and includes an n+ type semiconductor layer 1, an n- type semiconductor layer 3, an n+ type semiconductor layer (n+ type source layer) 1b, an n+ type semiconductor layer (n+ type drain layer) 1c, a high-resistance oxide film 2, a gate insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9. When a voltage is applied between the source electrode 5b and the drain electrode 5c and a positive voltage is applied to the gate electrode 5a with respect to the source electrode 135b, a channel layer is formed between the n+ type semiconductor layer (n+ type source layer) 1b and the n+ type semiconductor layer (n+ type drain layer) 1c, and the MOSFET is turned on. The current is guided so as to suppress leakage current and the like by the high resistance oxide film 3. In the off state, the voltage of the gate electrode is set to 0V, so that no channel layer is formed, resulting in turn-off.

[0053] As an example of the semiconductor device of the present invention, one embodiment of a MOSFET is shown in FIG. 4. The MOSFET of FIG. 4 is a lateral MOSFET and includes an n+ type semiconductor layer 1, an n- type semiconductor layer 3, an n+ type semiconductor layer (n+ type source layer) 1b, an n+ type semiconductor layer (n+ type drain layer) 1c, a high-resistance oxide film 2, a gate insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9. Compared to the MOSFET of FIG. 3, the MOSFET of FIG. 4 has a mesa-shaped n+ type semiconductor layer (n+ type drain layer) 1c, which has a stepped structure. The n+ type semiconductor layer (n+ type drain layer) 1c is lower on the gate electrode side and higher on the drain electrode side. This configuration makes it possible to realize a semiconductor device with a higher breakdown voltage.

[0054] FIG. 5 shows one embodiment of a MOSFET as an example of a semiconductor device of the present invention. FIG. 5(a) is a top view of the MOSFET viewed from the zenith direction, schematically illustrating the top surface of the MOSFET. FIG. 5(b) is a schematic cross-sectional view of the MOSFET taken along line B-B' in FIG. 5(a). The MOSFET in FIG. 5 is a vertical MOSFET, enabling a semiconductor device that can achieve higher breakdown voltages and larger currents. The MOSFET in FIG. 5 also includes an n+-type semiconductor layer (n+-type source layer) 1b, an n+-type semiconductor layer (n+-type drain layer) 1c, a high-resistance oxide film 2, an n--type semiconductor layer 3, a gate insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9. The high-resistance oxide film 2 has an opening below the gate electrode. Making the opening wider than the gate electrode can further reduce the on-resistance, while making the opening narrower than the gate electrode can further improve the breakdown voltage. The opening can be formed by etching or other known methods. In an embodiment of the present invention, for example, the opening may be formed by etching or the like after forming the high-resistance oxide film, or by forming an n-type semiconductor layer, using a mask to form a high-resistance oxide film where the opening will be, and then removing the mask. An example of a high-resistance oxide film having an opening formed by the latter method is shown in FIG. 6. The MOSFET in FIG. 6 is different from the MOSFET in FIG. 5 in that the opening is located in the n-type semiconductor layer on the gate electrode side. In an embodiment of the present invention, either the MOSFET in FIG. 5 or the MOSFET in FIG. 6 can be suitably used.

[0055] In addition to the above features, the semiconductor device of the present invention can be suitably used as a power module, inverter, or converter using a known method, and further suitably used in, for example, a semiconductor system using a power supply device. The power supply device can be fabricated from or as the semiconductor device by connecting to a wiring pattern or the like using a known method. FIG. 8 shows an example of a power supply system. FIG. 8 shows a power supply system 170 configured using multiple power supply devices 171, 172 and a control circuit 173. As shown in FIG. 9, the power supply system 170 can be used in a system device 180 by combining an electronic circuit 181 and a power supply system 182 (i.e., the power supply system 170 of FIG. 8). An example of a power supply circuit diagram of a power supply device is shown in FIG. 10. 10 shows the power supply circuit of a power supply device consisting of a power circuit and a control circuit, in which DC voltage is switched at high frequency by inverter 192 (comprised of MOSFETs: A to D) and converted to AC, then insulation and transformation are performed by transformer 193, and after rectification by rectifying MOSFETs (A to B'), the voltage is smoothed by DCL 195 (smoothing coils L1, L2) and a capacitor to output a DC voltage. At this time, voltage comparator 197 compares the output voltage with a reference voltage, and PWM control circuit 196 controls inverter 192 and rectifying MOSFET 194 to achieve the desired output voltage. [Example]

[0056] Example 1: Fabrication of the MOSFET shown in FIG. 2 1. Formation of p-type semiconductor layer (high-resistance oxide film) 1-1. Film deposition equipment The film forming apparatus 19 in FIG. 1 was used.

[0057] 1-2. Preparation of raw material solution A 0.1 M aqueous gallium bromide solution was mixed with 20% hydrobromic acid by volume, and Mg was further added at a rate of 10% by volume to prepare a raw material solution.

[0058] 1-3. Preparation for film deposition The raw material solution 24a obtained in 1-2 above was placed in the mist generating source 24. Next, a sapphire substrate was placed on the susceptor 21 as the substrate 20, and the heater 28 was operated to raise the temperature inside the film formation chamber 30 to 520°C. Next, the flow rate control valves 23a and 23b were opened to supply carrier gas from the carrier gas supply sources 22a and 22b, which are carrier gas sources, into the film formation chamber 30. After the atmosphere inside the film formation chamber 30 was sufficiently replaced with the carrier gas, the flow rate of the carrier gas and the flow rate of the carrier gas (diluted) were adjusted to 1 LPM and 1 LPM, respectively. Nitrogen was used as the carrier gas.

[0059] 1-4. Semiconductor film formation Next, ultrasonic vibrator 26 was vibrated at 2.4 MHz, and the vibrations were propagated to raw material solution 24a through water 25a, thereby atomizing raw material solution 24a and generating mist. This mist was introduced into film formation chamber 30 by a carrier gas, and reacted in film formation chamber 30 at atmospheric pressure and 520°C to form a p-type semiconductor layer (high-resistance oxide film) on substrate 20. The film thickness was 0.6 μm, and the film formation time was 15 minutes.

[0060] 1-5.Evaluation The phase of the film obtained in 1-4 above was identified using an XRD diffractometer, and it was found to be α-Ga2O3.

[0061] 2. Formation of n+ type semiconductor region An n+ type semiconductor film was formed on the p-type semiconductor layer obtained in 1. above in the same manner as in 1. above, except that a 0.1 M aqueous gallium bromide solution containing 10% hydrobromic acid and 8% tin bromide by volume was used as the raw material solution, and that the film formation temperature was 580°C and the film formation time was 5 minutes. The phase of the obtained film was identified using an XRD diffractometer, and it was found to be α-Ga2O3.

[0062] 3. Formation of gate insulating film and electrodes The n+ type semiconductor layer in the region corresponding to the gate portion (between 1b and 1c) was etched with phosphoric acid, and then treated with phosphoric acid so that an oxide film containing at least phosphorus was formed on the p-type semiconductor layer. After that, SiO2 was formed as a gate insulating film using TEOS. The resistance of the high-resistance oxide film was measured by forming a measurement electrode on the high-resistance oxide film and passing a current through it, and the resistance was 1.0 × 10 12 The resistivity was Ω·cm or more. Then, the MOSFET was fabricated by photolithography, etching, electron beam deposition, etc., as shown in Figure 2. Ti was used for the electrodes.

[0063] (evaluation) An IV measurement was carried out on the obtained MOSFET. The results of the IV measurement are shown in Figure 7. As is clear from Figure 7, an inversion channel region was formed, and it was demonstrated that a high-mobility gallium oxide semiconductor MOSFET was successfully created, and that it operated well as a transistor. Furthermore, when the Id-Vg characteristics (Vd = 10 V) were evaluated from Figure 7, the field-effect mobility (when Vg was 20 V) was 62.52 cm 2 / V·s, 116.9cm 2 / V·s and 54.55 cm 2 / V·s, and the field-effect mobility (at Vg of 14 V) is 102.5 cm 2 / V·s, 131.6cm 2 / V·s and 36.85 cm 2 / V·s. The gate threshold voltage calculated from the IV characteristics was 7 V or more. The on / off ratio was 10,000,000. [Industrial Applicability]

[0064] The semiconductor device of the present invention can be used in a wide range of fields, including semiconductors (for example, compound semiconductor electronic devices), electronic components, electrical equipment components, optical and electrophotographic related devices, and industrial materials, but is particularly useful as a power device. [Explanation of symbols]

[0065] 1 n+ type semiconductor layer 1b n+ type semiconductor layer (n+ type source layer) 1c n+ type semiconductor layer (n+ type drain layer) 2. High-resistivity oxide film 3 n-type semiconductor layer 4a Gate insulating film 5a Gate electrode 5b Source electrode 5c Drain electrode 9 Substrate 19 Mist CVD equipment 20 Substrate 21 Susceptor 22a Carrier gas supply source 22b Carrier gas (dilution) supply source 23a Flow control valve 23b Flow control valve 24 Mist source 24a Raw material solution 25 Container 25a water 26 Ultrasonic vibrator 27 Supply pipe 28 Heater 29 Exhaust port 170 Power System 171 Power supply 172 Power supply 173 Control Circuit 180 System Unit 181 Electronic circuit 182 Power System 192 inverter 193 Trans 194 Rectifier MOSFET 195 DCL 196 PWM control circuit 197 Voltage Comparator

Claims

1. A semiconductor device having at least a gate electrode, a source electrode, a drain electrode, and a high-resistance oxide film, the semiconductor device being a vertical device, the high-resistance oxide film being disposed between the source electrode and the drain electrode, the high-resistance oxide film being a crystalline growth film, and the resistance of the high-resistance oxide film being 1.0×10 ６ Ω·cm or more, and the high-resistivity oxide film has an opening.

2. The resistance of the high-resistance oxide film is 1.0×10 １０ The semiconductor device according to claim 1 , wherein the resistivity is Ω·cm or more.

3. 3. The semiconductor device according to claim 1, wherein the high-resistance oxide film is a current blocking layer.

4. 4. The semiconductor device according to claim 1, wherein the high-resistance oxide film has a corundum structure.

5. The high resistance oxide film is Ga ２ O ３ The semiconductor device according to any one of claims 1 to 4, comprising:

6. 6. The semiconductor device according to claim 1, wherein said high-resistance oxide film contains a p-type dopant.

7. 7. The semiconductor device according to claim 1, further comprising a channel formation region, and said high-resistance oxide film is disposed below said channel formation region.

8. The field effect mobility is 30 cm ２ 8. The semiconductor device according to claim 1, wherein the capacitance is 0.1 V. / V·s or more.

9. 9. The semiconductor device according to claim 1, which is a power device.

10. 10. The semiconductor device according to claim 1, which is a MOSFET.

11. 11. The semiconductor device according to claim 1, wherein the on / off ratio is 1000 or more.

12. 12. The semiconductor device according to claim 1, which is normally off.

13. The semiconductor device according to claim 1, wherein the high resistance oxide film is an epitaxial film.

14. A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device according to any one of claims 1 to 13.

Images