Manufacturing method for semiconductor optical integrated device

Abstract

The semiconductor optical integrated element (100, 110) of the present disclosure comprises a semiconductor substrate (1), a striped mesa structure (21) provided on the semiconductor substrate (1) with a gap (20) therebetween, a plurality of supporting insulating films (30) periodically formed on both side surfaces of the mesa structure (21) at regular intervals along the stripe direction, with one lower end of the supporting insulating films (30) contacting the semiconductor substrate (1), and a heater electrode (11, 11a) provided on the upper surface of the mesa structure (21) along the stripe direction.

Description

[Technical Field]

[0001] The present disclosure provides: half The present invention relates to a method for manufacturing a semiconductor integrated optical device. [Background technology]

[0002] Along with the progress of digital transformation, which utilizes digital information, there has been remarkable development in communication networks that exchange digital information and data centers that store and process data. Optical communication is used for communication networks and communications within data centers, and has made remarkable progress in recent years in terms of increasing speed and capacity.

[0003] A phase adjuster is one of the key devices in optical communication. One example of a phase adjuster is a method of adjusting the phase by changing the refractive index of an optical waveguide layer or a diffraction grating layer of an optical waveguide structure by heating it with a heater electrode (for example, Patent Document 1).

[0004] In the waveguide structure described in Patent Document 1, an insulating gap extending from one side of the waveguide ridge is provided between the waveguide ridge and the substrate, and the waveguide ridge is supported by vias on the other side. In this waveguide structure, the insulating gap improves the thermal insulation of the waveguide ridge, allowing efficient phase adjustment of light to be achieved by heat from a heater provided above the waveguide ridge. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Special Publication No. 2019-530978 Summary of the Invention [Problem to be solved by the invention]

[0006] However, the waveguide structure described in Patent Document 1 has the problem of being structurally unstable because the waveguide ridge is supported by vias from only one side. Structural instability of the element structure may reduce product yield during manufacturing and reduce product reliability.

[0007] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor optical integrated element that is structurally stable as an element structure and easy to manufacture, and to provide a manufacturing method by which a structurally stable semiconductor optical integrated element can be easily manufactured. [Means for solving the problem]

[0009] A method for manufacturing a semiconductor optical integrated device according to the present disclosure includes: growing at least a sacrificial layer, a first cladding layer, an optical waveguide layer, and a second cladding layer on a semiconductor substrate; forming a pair of mesa grooves by etching, each of which exposes the sacrificial layer at its bottom, to form a mesa structure on the sacrificial layer; The portions on both sides of the mesa structure where the supporting insulating film is not to be formed are covered with a resist, and the sacrificial layer and the insulating film exposed on the bottom surface of the mesa groove are removed in the portion where the supporting insulating film is to be formed. the lower surface of the mesa structure The aforementioned Part of the sacrifice layer By selective etching a removing step; forming an insulating film on both side surfaces of the mesa structure; a step of periodically removing the insulating film in a stripe direction to form a plurality of supporting insulating films; before and removing the remaining sacrificial layer on the lower surface side of the mesa structure by selective etching to form a gap between the mesa structure and the semiconductor substrate. [Effects of the Invention]

[0010] The semiconductor optical integrated device and the method for manufacturing the semiconductor optical integrated device according to this disclosure have the effect of enabling efficient optical phase adjustment and providing a structurally stable semiconductor optical integrated device, and also have the effect of providing a manufacturing method that can easily manufacture a structurally stable semiconductor optical integrated device. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic view of a semiconductor optical integrated device according to a first embodiment. [Figure 2] 1 is a top view of a semiconductor optical integrated device according to a first embodiment. [Figure 3] 3 is a cross-sectional view of the semiconductor optical integrated device according to the first embodiment taken along line CC in FIG. 2. FIG. [Figure 4] 3 is a cross-sectional view of the semiconductor optical integrated device according to the first embodiment taken along the line AA in FIG. 2. FIG. [Figure 5] 3 is a cross-sectional view of the semiconductor optical integrated device according to the first embodiment taken along the line BB in FIG. 2. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 9] 1A to 1C are cross-sectional views illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 10] 1 is a schematic diagram of a semiconductor optical integrated device in which a semiconductor laser is further integrated into the semiconductor optical integrated device according to the first embodiment. [Figure 11] 10A to 10C are cross-sectional views illustrating a method for manufacturing a semiconductor optical integrated device according to a modified example of the first embodiment. [Figure 12] 10A to 10C are cross-sectional views illustrating a method for manufacturing a semiconductor optical integrated device according to a modified example of the first embodiment. [Figure 13] 10A to 10C are cross-sectional views illustrating a method for manufacturing a semiconductor optical integrated device according to a modified example of the first embodiment. [Figure 14] FIG. 10 is a top view of a semiconductor optical integrated device according to a second embodiment. [Figure 15] 15 is a cross-sectional view of the semiconductor optical integrated device according to the second embodiment taken along the line AA in FIG. 14. FIG. [Figure 16]15 is a cross-sectional view of the semiconductor optical integrated device according to the second embodiment taken along the line BB in FIG. 14. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0012] Embodiment 1 Fig. 1 is a schematic view of a semiconductor optical integrated device 100 according to the first embodiment. Fig. 2 is a top view of the semiconductor optical integrated device 100 according to the first embodiment. Fig. 3 is a cross-sectional view of the semiconductor optical integrated device 100 according to the first embodiment taken along line CC in Fig. 2. Fig. 4 is a cross-sectional view of the semiconductor optical integrated device 100 according to the first embodiment taken along line AA in Fig. 2. Fig. 5 is a cross-sectional view of the semiconductor optical integrated device 100 according to the first embodiment taken along line BB in Fig. 2.

[0013] <Structure of semiconductor optical integrated device according to first embodiment> As shown in the overview diagram of FIG. 1, the semiconductor optical integrated device 100 according to the first embodiment includes an n-type InP substrate 1, a striped mesa structure 21 provided on the n-type InP substrate 1 with a gap 20 interposed therebetween, a plurality of supporting insulating films 30 formed on both side surfaces of the mesa structure 21 at predetermined intervals along the stripe direction and having one lower end in contact with the n-type InP substrate 1 to support the mesa structure 21, a surface protective insulating film 31 for protecting the surface of the semiconductor layer, a heater electrode 11 provided on the top surface of the mesa structure 21 along the stripe direction, and a wiring electrode 12 for supplying power to the heater electrode 11.

[0014] 1 because it is covered with the surface protective insulating film 31, but is shown for convenience of explanation. The direction from the surface of the semiconductor optical integrated device 100 toward the surface of the n-type InP substrate 1 is called the downward direction.

[0015] The mesa structure 21 includes an InP first cladding layer 2, an optical waveguide layer 3, an InP second cladding layer 4, and a first current blocking layer 5a and a second current blocking layer 5b formed on both ends of the optical waveguide layer 3. A diffraction grating 2a is provided inside the InP first cladding layer 2. The first current blocking layer 5a and the second current blocking layer 5b are collectively referred to as current blocking layers.

[0016] A pair of mesa grooves 22a, 22b is formed along the stripe direction on both sides of the mesa structure 21. The region other than the mesa structure 21 and the pair of mesa grooves 22a, 22b has a layered structure of a sacrificial layer 10 formed on the n-type InP substrate 1, an InP first cladding layer 2, a first current blocking layer 5a, a second current blocking layer 5b, and an InP second cladding layer 4. The surface of the region including the mesa structure 21 and the pair of mesa grooves 22a, 22b is covered with a surface protective insulating film 31.

[0017] The n-type InP substrate 1 is an example of a semiconductor substrate, and may be a semiconductor substrate other than the n-type InP substrate 1. The conductivity type of the InP substrate may be p-type, or may be semi-insulating.

[0018] Specific examples of the material for forming the optical waveguide layer 3 include quaternary compound semiconductors such as InGaAsP and InGaAlAs. Specific examples of the material for forming the sacrificial layer 10 include In 1-X-Y Ga X Al Y As(0≦X<0.75, Y>0.25).

[0019] An example of a material for the heater electrode 11 is platinum (Pt). An example of a material for the wiring electrode 12 is gold (Au). An example of a material for the supporting insulating film 30 and the surface protective insulating film 31 is silicon dioxide (SiO2).

[0020] Specific examples of the thickness of each layer of the semiconductor optical integrated device 100 according to the first embodiment are given below. The n-type InP substrate 1 has a substrate thickness of 100 μm. The sacrificial layer 10 has a thickness of 0.2 μm. The mesa structure 21, i.e., the mesa width, is 6 μm. The optical waveguide layer 3 has a width of 1.5 μm. The pair of mesa grooves 22 a, 22 b each have an opening width of 10 μm. The void 20 has a thickness of 0.2 μm, which is the same as the thickness of the sacrificial layer 10. The thickness of the void 20, i.e., the thickness of the sacrificial layer 10, is preferably in the range of 0.1 μm to 0.5 μm. This is because a thickness of the void 20 within this range allows sufficient penetration of the etchant for the sacrificial layer 10 and allows for smooth connection of the insulating film formed on the side surface.

[0021] The supporting insulating film 30 and the surface protective insulating film 31 each have a thickness of 0.5 μm. The heater electrode 11 has a width of 4.0 μm, i.e., an electrode width, and a thickness of 0.2 μm. The wiring electrode 12 has a width of 10 μm.

[0022] The numerical values ​​listed above are merely examples and can be changed to suitable numerical values ​​as appropriate.

[0023] 2 is a top view of the semiconductor optical integrated device 100 according to the first embodiment. Note that the supporting insulating film 30 is covered by the surface protective insulating film 31 and is not actually visible from the top view, but is shown for convenience of explanation. A plurality of supporting insulating films 30 are periodically formed at regular intervals along the stripe direction on both side surfaces of the mesa structure 21. A heater electrode 11 is provided on the top surface of the mesa structure 21 along the stripe direction. A wiring electrode 12 for supplying power to the heater electrode 11 is formed in a direction perpendicular to the stripe direction.

[0024] A plurality of supporting insulating films 30 are formed on both side surfaces of the mesa structure 21 to support the mesa structure 21. In the example of the semiconductor optical integrated device 100 according to the first embodiment shown in Fig. 2, two supporting insulating films 30 are provided on each side surface of the mesa structure 21 at a predetermined interval along the stripe direction.

[0025] The two supporting insulating films 30 provided on each side of the mesa structure 21 are provided at opposing positions on both sides of the mesa structure 21. The interval between adjacent supporting insulating films 30, i.e., the preset interval, is, for example, 20 μm. The width of the supporting insulating films 30 in the stripe direction is, for example, 20 μm.

[0026] When three or more supporting insulating films 30 are provided in the stripe direction, the intervals between adjacent supporting insulating films 30 may be set to a constant interval. That is, the supporting insulating films 30 may be provided periodically along the stripe direction.

[0027] Fig. 3 is a cross-sectional view of the semiconductor optical integrated device 100 according to the first embodiment taken along line CC in Fig. 2. The direction along line CC is the stripe direction and also the light waveguide direction.

[0028] 3, the bottom surface of the InP first cladding layer 2 constituting the mesa structure 21 is exposed on the n-type InP substrate 1 via a gap 20. In other words, the lower surface of the mesa structure 21 is positioned opposite the surface of the n-type InP substrate 1 via the gap 20. As described above, the mesa structure 21 has a layered structure of the InP first cladding layer 2, the optical waveguide layer 3, and the InP second cladding layer 4.

[0029] A surface protective insulating film 31 is formed on the surface of the InP second cladding layer 4, i.e., on the upper surface of the mesa structure 21, and a heater electrode 11 is further provided on the surface protective insulating film 31, and a wiring electrode 12 is provided so as to contact a part of the heater electrode 11.

[0030] 4 is a cross-sectional view of the semiconductor optical integrated device 100 according to the first embodiment, taken along line AA in FIG. 2. That is, FIG. 4 shows a cross-sectional view of a region where supporting insulating films 30 are formed on both side surfaces of the mesa structure 21 to support the mesa structure 21. As can be seen from FIG. 4, the mesa structure 21 is supported by having one end of the lower portion of the supporting insulating film 30 formed on both side surfaces of the mesa structure 21 in contact with the n-type InP substrate 1. The surface of the region including the mesa structure 21, the supporting insulating film 30, and the pair of mesa grooves 22a and 22b is covered with a surface protective insulating film 31. The heater electrode 11 is provided on the surface protective insulating film 31 formed on the top surface of the mesa structure 21, along the stripe direction.

[0031] Fig. 5 is a cross-sectional view of the semiconductor optical integrated device 100 according to the first embodiment taken along line BB in Fig. 2. That is, Fig. 5 shows a cross-sectional view of a portion where the supporting insulating film 30 is not formed on both side surfaces of the mesa structure 21. The surface of the region including the mesa structure 21 and the pair of mesa grooves 22a, 22b is covered with a surface protective insulating film 31.

[0032] <Method of Manufacturing Semiconductor Optical Integrated Device According to First Embodiment> Among the manufacturing methods for the semiconductor optical integrated device according to the first embodiment, characteristic manufacturing steps will be described below.

[0033] 6 to 9 are cross-sectional views showing a method for manufacturing the semiconductor optical integrated device 100 according to embodiment 1. Note that all of Fig. 6 to Fig. 9 are cross-sectional views of a portion where the supporting insulating film 30 is formed.

[0034] After the mesa structure 21 is formed, a resist 33 is applied to the surface of the wafer, and openings are formed in the areas where the pair of mesa grooves 22a, 22b are to be formed using photolithography and etching techniques. Etching is performed from the openings in the resist 33 until the surface of the sacrificial layer 10 is exposed, thereby forming the pair of mesa grooves 22a, 22b.

[0035] When the pair of mesa grooves 22a, 22b are formed by wet etching, an etchant is used that etches each layer other than the sacrificial layer 10 but does not etch the sacrificial layer 10. An example of an etchant with such properties is a mixture of hydrochloric acid and phosphoric acid. When dry etching is used, etching is performed using an etching gas with similar properties. Figure 6 is a cross-sectional view after etching.

[0036] Next, a portion of the sacrificial layer 10 is selectively etched. In this case, layers other than the sacrificial layer 10 are not etched, but an etchant or etching gas is used that selectively etches only the sacrificial layer 10. FIG. 7 is a cross-sectional view after the sacrificial layer 10 has been partially etched. One example of an etchant for selectively etching the sacrificial layer 10 is a mixture of tartaric acid and hydrogen peroxide.

[0037] An insulating film is formed on both side surfaces of the mesa structure 21. An example of the insulating film is an SiO2 film. After the insulating film is formed, the insulating film formed on both side surfaces of the mesa structure 21 except for the portions where the supporting insulating film 30 is to be formed is removed by an etching method such as dry etching. Note that the insulating film 30a formed on the portions other than both side surfaces of the mesa structure 21 is not removed but is left as it is. Figure 8 is a cross-sectional view of the mesa structure 21 after the insulating films have been formed on both side surfaces.

[0038] The sacrificial layer 10 on the underside of the mesa structure 21 is completely removed by selective etching. During the selective etching, the etchant enters the underside of the mesa structure 21 from the portions of both sides of the mesa structure 21 where the supporting insulating film 30 is not provided. As a result, the mesa structure 21 is supported by the supporting insulating film 30, and the sacrificial layer 10 can be removed from the entire underside of the mesa structure 21. FIG. 9 is a cross-sectional view of the mesa structure 21 after the sacrificial layer 10 on the underside has been completely removed.

[0039] By completely removing the sacrificial layer 10 on the underside of the mesa structure 21, a gap 20 is formed between the underside of the mesa structure 21 and the surface of the n-type InP substrate 1, and the mesa structure 21 is supported by the supporting insulating film 30, thereby completing the characteristic element structure of the semiconductor optical integrated element 100 according to embodiment 1.

[0040] According to the method for manufacturing a semiconductor optical integrated device of the first embodiment, the sacrificial layer 10 is selectively etched from the portions on both sides of the mesa structure 21 where the supporting insulating film 30 is not provided. This makes it easy to completely remove the sacrificial layer 10 on the underside of the mesa structure 21 while supporting the mesa structure 21 with the supporting insulating film 30, thereby achieving the effect of easily manufacturing the semiconductor optical integrated device 100 of the first embodiment.

[0041] <Operation of the semiconductor optical integrated device according to the first embodiment> The operation of the semiconductor optical integrated device 100 according to the first embodiment will be described below. When power is supplied to the heater electrode 11 from the wiring electrode 12, the heater electrode 11 generates heat. The generated heat is thermally conducted toward the mesa structure 21, and spreads from the InP second cladding layer 4 to the optical waveguide layer 3, the InP second cladding layer 4, and the InP first cladding layer 2.

[0042] When the temperature of the optical waveguide layer 3 rises due to the conducted heat, the optical properties such as the refractive index of the optical waveguide layer 3 change, making it possible to shift the spectrum of the light propagating within the optical waveguide layer 3. In other words, it becomes possible to adjust the phase of the propagating light.

[0043] The greater the temperature change in the optical waveguide layer 3, the greater the change in optical properties such as refractive index. In other words, the degree of phase adjustment increases. In the semiconductor optical integrated device 100 according to the first embodiment, the gap 20 is provided between the mesa structure 21 and the n-type InP substrate 1, so that the heat conducted inside the mesa structure 21 is unlikely to be conducted toward the n-type InP substrate 1. This is because the thermal conductivity of the air in the gap 20 is significantly smaller than that of the semiconductor layer. In other words, the gap 20 functions as a heat insulating structure.

[0044] Therefore, when the void 20 is provided on the underside of the mesa structure 21, the degree of temperature rise of the optical waveguide layer 3 due to the heat from the heater electrode 11 becomes significantly larger than when the void 20 is not provided. This results in a larger change in the optical properties such as the refractive index of the optical waveguide layer 3, and as a result, it becomes possible to largely shift the spectrum of the light propagating in the optical waveguide layer 3. In other words, the configuration of the semiconductor optical integrated device 100 according to the first embodiment has the effect of more efficiently achieving the phase adjustment of the light propagating in the optical waveguide layer 3.

[0045] The semiconductor optical integrated device 100 according to the first embodiment may be combined with, for example, a modulator, a semiconductor laser, etc. to form a single semiconductor optical integrated device as a whole. Fig. 10 is a schematic diagram of a semiconductor optical integrated device 200 in which a semiconductor laser 150 is further integrated into the semiconductor optical integrated device 100 according to the first embodiment.

[0046] <Advantages of First Embodiment> As described above, according to the semiconductor optical integrated device and the method for manufacturing the semiconductor optical integrated device according to the first embodiment, a plurality of supporting insulating films are provided on both side surfaces of the mesa structure at predetermined intervals along the stripe direction, and therefore, a gap can be stably formed on the underside of the mesa structure, thereby achieving an effect of enabling efficient optical phase adjustment and providing a structurally stable semiconductor optical integrated device, and also achieving an effect of facilitating the manufacture of such a semiconductor optical integrated device.

[0047] A variation of the first embodiment. As a modification of the first embodiment, the device structure is the same as that of the semiconductor optical integrated device 100 according to the first embodiment, but a manufacturing method different from that of the semiconductor optical integrated device according to the first embodiment will be described below.

[0048] 11 to 13 are cross-sectional views showing a method for manufacturing a semiconductor optical integrated device according to a modification of embodiment 1. In Fig. 11 to 13, the left-hand figures are cross-sectional views of a region where the supporting insulating film 30 is not formed, and the right-hand figures are cross-sectional views of a region where the supporting insulating film 30 is formed.

[0049] After the mesa structure 21 is formed, a resist is applied to the surface of the wafer, and openings are formed in the areas where the pair of mesa grooves 22a, 22b are to be formed using photolithography and etching techniques. Etching is performed from these openings until the surface of the sacrificial layer 10 is exposed, thereby forming the pair of mesa grooves 22a, 22b. When wet etching is performed, an etchant is used that etches layers other than the sacrificial layer 10 but does not etch the sacrificial layer 10 itself. When dry etching is performed, etching is performed using an etching gas with similar properties.

[0050] After the pair of mesa grooves 22a, 22b are formed, the areas where the supporting insulating film 30 is not to be formed are covered with resist or the like, and the sacrificial layer 10 is partially selectively etched in the areas where the supporting insulating film 30 is to be formed. In this case, layers other than the sacrificial layer 10 are not etched, but an etchant or etching gas is used that selectively etches only the sacrificial layer 10. Figure 11 is a cross-sectional view of each area after partial selective etching of the sacrificial layer 10.

[0051] Next, insulating films are formed on both side surfaces of the mesa structure 21. An example of the insulating film is a SiO2 film. After the insulating film is formed, the insulating film is removed from both side surfaces of the mesa structure 21 except for the portions where the supporting insulating film 30 is to be formed by an etching method such as dry etching. Figure 12 is a cross-sectional view of each portion of the mesa structure 21 after the insulating films have been formed on both side surfaces.

[0052] The sacrificial layer 10 on the underside of the mesa structure 21 is completely removed by selective etching. During selective etching, the etchant enters the underside of the mesa structure 21 from the portions of both sides of the mesa structure 21 where the supporting insulating film 30 is not provided. Therefore, the sacrificial layer 10 can be removed from the entire underside of the mesa structure 21 while the mesa structure 21 is supported by the supporting insulating film 30. FIG. 13 is a cross-sectional view of each portion of the mesa structure 21 after the sacrificial layer 10 on the underside of the mesa structure 21 has been completely removed.

[0053] By completely removing the sacrificial layer 10 on the underside of the mesa structure 21, a gap 20 is formed between the underside of the mesa structure 21 and the surface of the n-type InP substrate 1, and the mesa structure 21 is supported by the supporting insulating film 30, thereby completing the characteristic element structure of the semiconductor optical integrated element 100.

[0054] According to the manufacturing method of the semiconductor optical integrated device according to the modified example of the first embodiment, the sacrificial layer 10 is selectively etched from the portions on both sides of the mesa structure 21 where the supporting insulating film 30 is not provided, so that it is easy to completely remove the sacrificial layer 10 on the underside of the mesa structure 21, thereby achieving the effect of easily manufacturing the semiconductor optical integrated device according to the first embodiment.

[0055] Embodiment 2 The semiconductor optical integrated device 110 according to the second embodiment is characterized by the shape of the heater electrode 11a. The semiconductor optical integrated device 110 according to the second embodiment differs from the semiconductor optical integrated device 100 according to the first embodiment only in the shape of the heater electrode 11a, and therefore the following description will focus on the heater electrode 11a and omit a description of the other components.

[0056] Fig. 14 is a top view of a semiconductor optical integrated device 110 according to the second embodiment. Fig. 15 is a cross-sectional view of the semiconductor optical integrated device 110 according to the second embodiment taken along line AA in Fig. 14. Fig. 16 is a cross-sectional view of the semiconductor optical integrated device 110 according to the second embodiment taken along line BB in Fig. 14. Note that the supporting insulating film 30 is covered with the surface protective insulating film 31 and is therefore not actually visible from the top view, but is shown for convenience of explanation.

[0057] As shown in the top view of Figure 14, the electrode width W1 of the heater electrode 11a in the portion where the supporting insulating film 30 is provided on both side surfaces of the mesa structure 21 is set in advance to be smaller than the electrode width W2 of the heater electrode 11a in the portion where the supporting insulating film 30 is not provided on both side surfaces of the mesa structure 21.

[0058] The electrode width of the heater electrode 11a is changed depending on whether or not the supporting insulating film 30 is present on both sides in order to adjust the amount of heat generated by the heater electrode 11a according to the difference in heat dissipation depending on whether or not the supporting insulating film 30 is present.

[0059] In the region where the supporting insulating film 30 is provided, heat dissipation is difficult due to the presence of the supporting insulating film 30, so the electrode width W1 of the heater electrode 11a is made relatively small to adjust the amount of heat generated to be small. On the other hand, in the region where the supporting insulating film 30 is not provided, heat dissipation is higher than in the region where the supporting insulating film 30 is provided, so the electrode width W2 of the heater electrode 11a is made relatively large to adjust the amount of heat generated to be large.

[0060] This configuration of the heater electrode 11a makes the temperature distribution in the stripe direction in the mesa structure 21 uniform, making it possible to prevent problems such as thermal stress distribution in the stripe direction and non-uniform distribution of the refractive index.

[0061] <Advantages of the Second Embodiment> As described above, the semiconductor optical integrated device according to the second embodiment has the same effect as the semiconductor optical integrated device according to the first embodiment, and in addition, it has the effect of providing a semiconductor optical integrated device that can more efficiently achieve phase adjustment since the temperature distribution in the stripe direction is made uniform.

[0062] While the present disclosure describes various exemplary embodiments, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0063] Therefore, countless variations not illustrated are conceivable within the scope of the technology of the present disclosure, including, for example, cases where at least one component is modified, added, or omitted, and cases where at least one component is extracted and combined with a component of another embodiment. [Explanation of symbols]

[0064] REFERENCE SIGNS LIST 1 n-type InP substrate, 2 InP first cladding layer, 2a diffraction grating, 3 optical waveguide layer, 4 InP second cladding layer, 5a first current blocking layer, 5b second current blocking layer, 10 sacrificial layer, 11, 11a heater electrode, 12 wiring electrode, 20 gap, 21 mesa structure, 22a, 22b mesa groove, 30 supporting insulating film, 30a insulating film, 31 surface protective insulating film, 33 resist, 100, 110, 200 semiconductor optical integrated device, 150 semiconductor laser, W1, W2 electrode width

Claims

1. growing at least a sacrificial layer, a first cladding layer, an optical waveguide layer, and a second cladding layer on a semiconductor substrate; forming a pair of mesa grooves by etching, each of which exposes the sacrificial layer at its bottom, to form a mesa structure on the sacrificial layer; a step of covering with resist portions on both side surfaces of the mesa structure where a supporting insulating film is not to be formed, and removing by selective etching the sacrificial layer exposed at the bottom surface of the mesa groove and a portion of the sacrificial layer on the lower surface side of the mesa structure in the portion where the supporting insulating film is to be formed; forming an insulating film on both side surfaces of the mesa structure; a step of periodically removing the insulating film in a stripe direction to form a plurality of supporting insulating films; removing the remaining sacrificial layer on the lower surface side of the mesa structure by selective etching to form a gap between the mesa structure and the semiconductor substrate; A method for manufacturing a semiconductor optical integrated device comprising:

2. 2. The method for manufacturing a semiconductor optical integrated device according to claim 1, further comprising the step of forming a heater electrode on the top surface of the mesa structure along the stripe direction.

3. 3. The method for manufacturing a semiconductor optical integrated device according to claim 2, wherein an electrode width of the heater electrode at a portion where the supporting insulating film is provided on both side surfaces of the mesa structure is made smaller than an electrode width of the heater electrode at a portion where the supporting insulating film is not provided on both side surfaces of the mesa structure.

4. 4. The method for manufacturing a semiconductor optical integrated device according to claim 1, further comprising the step of forming a current blocking layer on both ends of the optical waveguide layer.

5. A method for manufacturing a semiconductor optical integrated element described in any one of claims 1 to 3, characterized in that the multiple supporting insulating films are arranged at regular intervals along the stripe direction.

6. A method for manufacturing a semiconductor optical integrated element described in any one of claims 1 to 3, characterized in that the multiple supporting insulating films are each provided in opposing positions on both sides of the mesa structure.

7. A method for manufacturing a semiconductor optical integrated element described in any one of claims 1 to 3, characterized in that a diffraction grating is provided inside the first cladding layer.

Images