Display substrate and display device

Abstract

The present disclosure provides a display substrate and a display device, the display substrate including a base substrate, a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction provided on the base substrate, the display substrate including a plurality of sub-pixels, each of the sub-pixels including at least a first opening area and a second opening area spaced apart in the first direction, the second opening area being offset in the second direction relative to the first opening area, and the offset distance is equal to or less than the width of the first opening area in the second direction. The display substrate and the display device according to the embodiments of the present disclosure can improve the continuity of pixel emission and improve the moire defect phenomenon.

Description

[Technical Field]

[0001] The present disclosure relates to the technical field of displays, and more particularly to display substrates and display devices. [Background technology]

[0002] 3D applications based on ultra-high resolution are currently a development trend in 3D display technology, but current 3D modes have technical problems such as moire, one of the causes of moire is discontinuity in pixel light emission. In conventional pixel designs in related technologies, for example, source-drain metal wiring (SD lines), such as data lines, are straight and opaque, and when a screen is displayed, the transmittance at the source-drain metal wiring position is low, resulting in periodic opaque areas between pixels, causing discontinuity in pixel light emission. In 3D display mode, the discontinuous light emission of pixels causes moire. Summary of the Invention [Problem to be solved by the invention]

[0003] The embodiments of the present disclosure provide a display substrate and a display device that can improve the continuity of pixel light emission and reduce the moire defect phenomenon. [Means for solving the problem]

[0004] Technical aspects according to the embodiments of the present disclosure are as follows.

[0005] An embodiment of the present disclosure provides a display substrate including a base substrate and a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction provided on the base substrate, wherein the plurality of data lines and the plurality of gate lines are arranged to intersect with each other to define a plurality of sub-pixels, each of the sub-pixels including at least a first opening area and a second opening area spaced apart in the first direction, the second opening area being offset in the second direction relative to the first opening area, and the offset distance being equal to or less than the width of the first opening area in the second direction.

[0006] Illustratively, the minimum distance between two adjacent first opening areas in the second direction is equal to the offset distance.

[0007] For example, within the same sub-pixel, the first opening area and the second opening area share the same switching element, share the same data line as a signal input line, and share the same gate line as a switching control line for the switching element.

[0008] Exemplarily, one gate line shared by the first opening area and the second opening area located in the same sub-pixel is disposed between the first opening area and the second opening area; Alternatively, one of the gate lines shared by the first opening area and the second opening area located in the same sub-pixel is disposed on a side of the first opening area that is farther from the second opening area, Alternatively, one gate line shared by the first opening area and the second opening area located in the same subpixel is arranged on the side of the second opening area away from the first opening area.

[0009] Illustratively, the data lines are arranged in a zigzag line in the non-aperture areas of the sub-pixels.

[0010] Exemplarily, the sub-pixel includes a first side and a second side opposite to each other, the first side and the second side are used to arrange the data line, the data line includes a plurality of first repeat units sequentially connected along the first direction, and the first repeat units include: a first vertical line segment located on a first side of the first opening area and extending along the first direction, the first vertical line segment including a first end away from the second opening area and a second end close to the second opening area; a second vertical line segment located on a second side of the second opening area and extending along the second direction, the second vertical line segment including a third end close to the first opening area and a fourth end distant from the first opening area; a first oblique line segment connected between the second end of the first vertical line segment and the third end of the second vertical line segment, the first oblique line segment forming a first included angle with the first vertical line segment; a second oblique line segment connected to a first end of the first vertical line segment or a fourth end of the second vertical line segment, the second oblique line segment forming a second included angle with the first vertical line segment;

[0011] For example, the first vertical line segment, the second vertical line segment, the first oblique line segment, and the second oblique line segment may be an integral structure in which they are provided in the same layer and made of the same material, or Alternatively, at least two of the first vertical line segment, the second vertical line segment, the first oblique line segment, and the second oblique line segment are provided to be in different layers and are connected via via holes.

[0012] Exemplarily, the sub-pixel includes a first side and a second side opposite to each other, the first side and the second side are used to arrange the data line, the data line includes a plurality of second repeat units sequentially connected along the first direction, and the second repeat units include: a third vertical line segment located on a first side or a second side of the first opening area, the third vertical line segment including a first end close to the second opening area and a second end distant from the second opening area; a transparent conductive line whose orthogonal projection on the base substrate at least partially overlaps with the orthogonal projection of the second opening area on the base substrate, the transparent conductive line being connected to a first end of the third vertical line segment and whose length in the first direction is equal to or greater than the length of the second opening area in the first direction.

[0013] For example, the transparent conductive line and the third vertical line segment are provided in the same layer but made of different materials; Alternatively, the transparent conductive line and the third vertical line segment are provided in different layers and are insulated from each other, and are connected to each other through a via hole.

[0014] For example, the third vertical line segment is a source / drain metal line, and the transparent conductive line is an indium tin oxide conductive line.

[0015] For example, the display substrate further includes a common electrode layer disposed on the base substrate, the common electrode layer being a non-light-transmitting conductive layer or a light-transmitting conductive layer, and an opening area is provided in the common electrode layer, and the opening area defines the first opening area and the second opening area.

[0016] Exemplarily, the display substrate further includes a plurality of pixel electrodes, and one pixel electrode is provided in each of the sub-pixels.

[0017] Exemplarily, the pixel electrode is a transparent conductive electrode, and the pixel electrode is a first electrode block portion located within the first opening area; a second electrode block portion located within the second open area; a connecting bridge portion connected between the first electrode block portion and the second electrode block portion;

[0018] Illustratively, the shape of the first electrode block portion is adapted to the shape of a space surrounded by data lines disposed on the first and second sides of the corresponding first opening area.

[0019] Exemplarily, the switching element is provided at an intersection of the gate line and the data line. [Effects of the Invention]

[0020] The beneficial effects provided by the embodiments of the present disclosure are as follows: In a display substrate and a display device according to an embodiment of the present disclosure, each subpixel on the display substrate is divided into two pixel openings, i.e., a first opening area and a second opening area, which are spaced apart from each other in a first direction (i.e., the direction in which the data lines extend), and the second opening area is offset from the first opening area in a second direction (i.e., the direction in which the gate lines extend) by an amount equal to or less than the width of the first opening area in the second direction. That is, in the direction in which the data lines extend, the first opening area and the second opening area partially overlap each other, or the second opening area is offset from the first opening area by exactly the width of the first opening area. In this way, the first opening area and the second opening area of ​​each pixel can achieve complementary light-emitting regions, thereby realizing continuous light emission of the pixel and improving moire defects in 3D display. [Brief explanation of the drawings]

[0021] [Figure 1] 1 is a schematic diagram showing transmittance curves at different position points of a single pixel in a conventional pixel structure in a display substrate of the related art; [Figure 2] 1A and 1B are schematic diagrams illustrating the structure of a display substrate according to some embodiments of the present disclosure. [Figure 3] 10A to 10C are schematic diagrams illustrating the structure of a display substrate according to some other embodiments of the present disclosure. [Figure 4] 3 is a schematic diagram showing transmittance curves at different positions of a single pixel in the display substrate in the embodiment shown in FIG. 2, in which the common electrode layer is a non-transparent conductive layer; [Figure 5] 4 is a schematic diagram showing transmittance curves at different positions of a single pixel in the display substrate in the embodiment shown in FIG. 3; [Figure 6]3 is a schematic diagram showing transmittance curves at different positions of a single pixel in the display substrate in the embodiment shown in FIG. 2, in which the common electrode layer is a light-transmitting conductive layer; DETAILED DESCRIPTION OF THE INVENTION

[0022] In order to clarify the objectives, technical aspects and advantages of the embodiments of the present disclosure, the technical aspects of the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings of the embodiments of the present disclosure. Obviously, the embodiments described below are only some of the embodiments of the present disclosure, but not all of the embodiments. Based on the embodiments of the present disclosure described below, other embodiments obtained by those skilled in the art without paying creative labor shall all fall within the scope of protection of the present disclosure.

[0023] Unless otherwise defined, technical or scientific terms used in this disclosure have ordinary meanings that can be understood by those skilled in the art. The terms "first," "second," and similar terms used in this disclosure do not denote any order, quantity, or importance, but are merely used to distinguish between different components. Similar terms such as "comprise" or "comprises" mean that the element or member described before the term includes the component or member listed after the term and its equivalents, but does not exclude other components or members. Similar terms such as "connect" or "couple" are not limited to physical or mechanical connections, but may also include electrical connections, whether directly or indirectly connected. Terms such as "top," "bottom," "left," "right," and the like only indicate relative positional relationships, and if the absolute position of the described object changes, the relative positional relationships may change correspondingly.

[0024] Before describing the display substrate and the display device according to the embodiments of the present disclosure in detail, it is necessary to explain the related art as follows. In related art, 3D display products based on ultra-high resolution have technical problems such as moiré, and one of the causes of the moiré phenomenon is discontinuous pixel light emission. In conventional pixel designs, source-drain metal lines (SD lines), such as data lines, are linear and opaque, and the transmittance at different positions in a single pixel is shown in Figure 1, where the abscissa represents the position within a single pixel in the direction of the gate line, and the ordinate represents the pixel transmittance at the same position. When a screen is displayed, periodic opaque areas (transmittance is 0 at the position where the data line is located) occur between pixels, causing discontinuous pixel light emission. In 3D display mode, the discontinuous pixel light emission causes moiré defects.

[0025] To solve the above problems, the embodiments of the present disclosure provide a display substrate and a display device that can improve the continuity of pixel light emission and reduce the moire defect phenomenon.

[0026] 2 and 3 are front views showing the structure of a display substrate according to an embodiment of the present disclosure, and schematically show only the local structure of a pixel array on the display substrate.

[0027] 2 and 3, the display substrate includes a base substrate and a plurality of data lines 100 and a plurality of gate lines 200 disposed on the base substrate, the data lines 100 extending along a first direction, the gate lines 200 extending along a second direction, and the data lines 100 and the gate lines 200 intersecting each other. The display substrate includes a plurality of pixel units distributed in an array, each pixel unit including at least two sub-pixels 300, each sub-pixel 300 including at least a first opening area 310 and a second opening area 320 spaced apart in the first direction, the second opening area 320 being offset from the first opening area 310 in the second direction by a distance Δd that is equal to or less than the width L of the first opening area 310 in the second direction.

[0028] In the above embodiment, each sub-pixel 300 on the display substrate is divided into two upper and lower pixel openings, i.e., a first opening area 310 and a second opening area 320, which are spaced apart at least in a first direction (i.e., the extension direction of the data line 100), and the second opening area 320 is offset from the first opening area 310 in a second direction (i.e., the extension direction of the gate line 200), and the offset distance Δd is equal to or less than the width L of the first opening area 310 in the second direction. That is, in the extension direction of the data line 100, the first opening area 310 and the second opening area 320 partially overlap each other, or the second opening area 320 is offset from the first opening area 310 by exactly the width of the first opening area 310, and the first opening area 310 and the second opening area 320 are offset in position to be complementary to each other. In this way, the first opening area 310 and the second opening area 320 of each sub-pixel 300 can achieve complementary light-emitting areas, thereby realizing continuous light emission of the sub-pixels 300 and realizing the moire defect phenomenon in 3D display.

[0029] It should be noted that in the above aspect, the first opening area and the second opening area of ​​the sub-pixel refer to opening areas on a light-shielding film layer for defining the size of the opening dimensions of the sub-pixel on the display substrate; for example, the first opening area and the second opening area may be obtained by designing an opening pattern on a pixel definition layer separately provided on the display substrate, or the first opening area and the second opening area may be defined by designing an opening pattern on a light-shielding conductive layer (e.g., a common electrode layer made of a light-shielding metal) on the display substrate.

[0030] In some embodiments, the above-mentioned one Opening Area 3 1 Since the offset distance Δd of the second opening area 320 from 0 is less than the width L of the first opening area 310, the first opening area 310 and the second opening area 320 partially overlap in the second direction.

[0031] In some other embodiments, the above-mentioned embodiment is shown in FIGS. one Opening Area 3 1 0 to two Opening Area 3 2 Since the offset distance Δd of 0 is equal to the width of the first opening area 310 in the second direction, taking the direction shown in the figure as an example, the left edge of the first opening area 310 and the right edge of the second opening area 320 within the same subpixel 300 will be aligned.

[0032] 2 and 3, in some embodiments, the minimum distance D between two adjacent first opening areas 310 in the second direction is equal to the offset distance Δd. Continuing with the example of the direction shown in FIG. 2, the right edge of the first opening area 310 in one subpixel 300 is aligned with the left edge of the second opening area 320 in the adjacent subpixel 300 to the right. This prevents crosstalk between adjacent subpixels 300.

[0033] In addition, in some embodiments of the present disclosure, a plurality of sub-pixels 300 are defined by the intersection of a plurality of gate lines 200 and a plurality of data lines 100 on the display substrate, and a switching element and a pixel electrode 500 are provided within each sub-pixel 300. The switching element may be a thin film transistor (not shown) including a source, a drain and a gate, and the gate line 200 is connected to the gate, the data line 100 is connected to the source, and the drain is connected to the pixel electrode 500, and the gate line 200 serves as a switching control line for the switching element, and the data line 100 serves as a signal input line.

[0034] For example, the switching element is disposed at the intersection of the gate line 200 and the data line 100 .

[0035] In some exemplary embodiments, within the same subpixel 300, the first opening area 310 and the second opening area 320 may share one switching element, one data line 100 as a signal input line, and one gate line 200 as a switching control line for the switching element, thereby ensuring that the light-emitting states of the first opening area 310 and the second opening area 320 within the same subpixel 300 are consistent, and ensuring the continuity of the light-emitting state of the subpixel 300.

[0036] It should be noted that in the related art, a plurality of gate lines 200 and a plurality of data lines 100 intersect on a display substrate to define subpixels 300, and each subpixel 300 is located on one side of the gate line 200 that controls the subpixel 300. However, in the display substrate according to the embodiments of the present disclosure, each subpixel 300 is divided into a first opening area 310 and a second opening area 320, and one gate line 200 needs to be shared between the first opening area 310 and the second opening area 320 of the same subpixel 300. Therefore, in some embodiments, as shown in FIGS. 2 and 3 , the one gate line 200 shared by the first opening area 310 and the second opening area 320 within the same subpixel 300 may be disposed between the first opening area 310 and the second opening area 320. Since the gate line 200 needs to be connected to the switching element, if the gate line 200 is disposed between the first opening area 310 and the second opening area 320, it is advantageous from the spatial layout point of view for the connection between the gate line 200, the switching element, the pixel electrode 500 and the data line 100.

[0037] It should be understood that in some other embodiments, one gate line 200 shared by the first opening area 310 and the second opening area 320 located in the same subpixel 300 is disposed on the side of the first opening area 310 away from the second opening area 320.

[0038] In some other embodiments, one gate line 200 shared by the first opening area 310 and the second opening area 320 located in the same subpixel 300 is disposed on the side of the second opening area 320 away from the first opening area 310.

[0039] Furthermore, in the display substrate according to the present disclosure, the sub-pixel 300 includes a first side and a second side opposite to each other, and the first side and the second side are used to arrange the data line 100. Taking the example shown in the figure, the first side is the left side of the sub-pixel 300, and the second side is the right side of the sub-pixel 300. In the following description, for ease of explanation and understanding, the left side and the right side will represent the first side and the second side, respectively.

[0040] 2 , in the display substrate according to the embodiment of the present disclosure, the first opening area 310 and the second opening area 320 in the subpixel 300 are offset in the second direction, so that the non-transmitting areas on the first and second sides of the subpixel 300 are non-linear, and one data line 100 is shared by the first opening area 310 and the second opening area 320, and the data line 100 should be disposed in the non-transmitting area of ​​the subpixel 300. Therefore, in some embodiments, the data line 100 may be adjusted from a linear wiring to a polygonal wiring, that is, the data line 100 may be disposed in the non-opening area of ​​the subpixel 300 in a polygonal wiring.

[0041] 2, the data line 100 includes a plurality of first repeat units 110 connected sequentially along the first direction, and the first repeat unit 110 includes a first vertical line segment 111, a second vertical line segment 112, a first diagonal line segment 113, and a second diagonal line segment 114. The first vertical line segment 111 is located on a first side of the first opening area 310 and extends along the first direction, and includes a first end away from the second opening area 320 and a second end close to the second opening area 320. The second vertical line segment 112 is located on a second side of the second opening area 320 and extends along the first direction. The second vertical line segment 112 extends along a second direction, and includes a third end close to the first opening area 310 and a fourth end remote from the first opening area 310. The first oblique line segment 113 is connected between the second end of the first vertical line segment 111 and the third end of the second vertical line segment 112, and has a first included angle α between the first oblique line segment 113 and the first vertical line segment 111. The second oblique line segment 114 is connected to the first end of the first vertical line segment 111 or the fourth end of the second vertical line segment 112, and has a second included angle β between the second oblique line segment 114 and the first vertical line segment 111.

[0042] Illustratively, the first repeating unit 110 has a roughly "S"-shaped or approximately inverted "S"-shaped broken line shape.

[0043] It should be noted that, as shown in FIG. 2, the first included angle α refers to the included angle between the first oblique line segment 113 and the first vertical line segment 111, for example, the first included angle α is an obtuse angle, and the second included angle β refers to the included angle between the second oblique line segment 114 and the second vertical line segment 112, for example, the second included angle β is an obtuse angle.

[0044] The specific values ​​of the first included angle α and the second included angle β are not limited here.

[0045] For example, the first included angle α is greater than 90° and less than 150°, and the second included angle β is greater than 90° and less than 150°, so that the data lines 100 have a polygonal shape, without reducing the aperture ratio of the sub-pixels 300 due to the polygonal shape of the data lines 100.

[0046] In some example embodiments, the first vertical line segment 111, the second vertical line segment 112, the first oblique line segment 113, and the second oblique line segment 114 are integrally formed in the same layer and made of the same material. For example, in the first repeating unit 110, the first vertical line segment 111, the second vertical line segment 112, the first oblique line segment 113, and the second oblique line segment 114 are all patterns formed by patterning a source / drain metal layer.

[0047] In some other embodiments, at least two of the first vertical line segment 111, the second vertical line segment 112, the first diagonal line segment 113, and the second diagonal line segment 114 may be arranged in different layers and be insulated from each other, and may be connected through via holes.

[0048] In addition, in this exemplary embodiment, since the data line 100 is connected to the drain of the switching element, the data line 100 should be provided with a connection portion 115 for connecting to the switching element. For example, as shown in FIG. 2 , when the gate line 200 is located in the non-transmitting area between the first opening area 310 and the second opening area 320, the connection portion 115 may be provided on the first vertical line segment 111. It should be understood that the specific location of the connection portion 115 is not limited thereto, and any reasonable location can be selected according to the specific installation location of the gate line 200.

[0049] In the above exemplary embodiment, since the sub-pixel 300 is divided into the first opening area 310 and the second opening area 320, the data line 100 is designed in a polygonal shape to fit into the wiring space of the non-transmitting area. In other embodiments, the data line 100 may be realized using other structures.

[0050] For example, as shown in FIG. 3 , in some other illustrative embodiments, the data line 100 includes a plurality of second repeat units 120 connected sequentially along the first direction, the second repeat unit 120 including a third vertical line segment 121 and a transparent conductive line 122, the third vertical line segment 121 being located on a first side or a second side of the first opening area 310, the third vertical line segment 121 including a first end close to the second opening area 320 and a second end remote from the second opening area 320, the orthogonal projection of the transparent conductive line 122 on the base substrate at least partially overlaps with the orthogonal projection of the second opening area 320 on the base substrate, and the length of the transparent conductive line 122 in the first direction is equal to or greater than the length of the second opening area 320 in the first direction and is connected to a first end of the third vertical line segment 121.

[0051] In the above exemplary embodiment, the data line 100 is not arranged in a broken line, but may be formed by a straight connection between the third vertical line segment 121 and the transparent conductive line 122 to form the second repeating unit 120, and the center lines of the third vertical line segment 121 and the transparent conductive line 122 may be aligned in the same line. The portion of the data line 100 passing through the second opening area 320 becomes the transparent conductive line 122, which does not affect the light transmittance of the second opening area 320.

[0052] 3, the length of the transparent conductive line 122 in the first direction is equal to or greater than the length of the second opening area 320 in the first direction, that is, the transparent conductive line covers the second opening area in the extending direction of the data line, thereby ensuring that the data line does not adversely affect the light transmittance of the second opening area.

[0053] Furthermore, as shown in FIG. 3, the relationship between the length of the transparent conductive line and the width of the second opening area in the second direction is not limited, that is, the transparent conductive line may or may not cover the second opening area in the extending direction of the gate line.

[0054] In this exemplary embodiment, the transparent conductive line 122 and the third vertical line segment 121 are arranged in the same layer but made of different materials, that is, the transparent conductive line 122 and the third vertical line segment 121 may be arranged in the same layer, and in the manufacturing process of the display substrate, the patterns of the third vertical line segment 121 and the transparent conductive line 122 are respectively formed by two mask processes (i.e., two patterning processes).

[0055] In addition, the transparent conductive line 122 and the third vertical line segment 121 may be provided in different layers and insulated from each other, and may be connected through a via hole. In the manufacturing process of the display substrate, the patterns of the third vertical line segment 121 and the transparent conductive line 122 can be formed respectively by two mask processes (i.e., two patterning processes).

[0056] In some exemplary embodiments, the third vertical line segment 121 is a source-drain metal line, and the transparent conductive line 122 is an indium tin oxide conductive line, although it should be understood that the materials of the third vertical line segment 121 and the transparent conductive line 122 are not limited thereto.

[0057] In addition, in this exemplary embodiment, since the data line 100 is connected to the drain of the switching element, a connection portion for connecting to the switching element should be provided on the data line 100. For example, as shown in FIG. 3, when the gate line 200 is located in the non-transmitting area between the first opening area 310 and the second opening area 320, the connection portion may be provided on the third vertical line segment 121. It should be understood that the specific location of the connection portion is not limited thereto, and any reasonable location can be selected according to the specific installation location of the gate line 200.

[0058] In addition, in some exemplary embodiments, as shown in Figures 2 and 3, the display substrate further includes a common electrode layer 400 disposed on the base substrate, the common electrode layer 400 being a non-light-transmitting conductive layer, and an opening area 410 is provided in the common electrode layer 400, which defines the first opening area 310 and the second opening area 320.

[0059] In the above embodiment, a non-transparent conductive layer is used for the common electrode layer 400, and a pattern of aperture areas 410 is formed on the common electrode layer 400 to define the first aperture area 310 and the second aperture area 320. Thus, the non-aperture area 420 of the common electrode can act as a light shield, which is advantageous for matching the transmittance at different positions of each sub-pixel 300.

[0060] In other embodiments, the common electrode layer 400 may be a light-transmitting conductive layer, and the common electrode layer 400 may have an opening area 410, which defines the first opening area 310 and the second opening area 320. Compared with an embodiment in which a non-light-transmitting conductive layer is used for the common electrode layer 400, when a light-transmitting conductive layer is used for the common electrode layer 400, the problem of inconsistent light transmittance at different positions in the non-light-transmitting areas of the sub-pixels 300 may still remain. Therefore, in practical applications, when it is desired to improve the consistency of the light transmittance at different positions in the sub-pixels 300, the common electrode layer 400 may be a non-light-transmitting conductive layer.

[0061] In some embodiments, as shown in FIGS. 2 and 3, the display substrate further includes a plurality of pixel electrodes 500, one pixel electrode 500 is provided in each of the sub-pixels 300, and the pixel electrode 500 is connected to the source of the switching element.

[0062] Exemplarily, the pixel electrode 500 is a transparent conductive electrode, and includes a first electrode block portion 510 located in the first opening area 310, a second electrode block portion 520 located in the second opening area 320, and a connecting bridge portion 530 connected between the first electrode block portion 510 and the second electrode block portion 520.

[0063] In addition, in some embodiments, when the connection portion is provided on the first vertical line segment 111, the shape of the first electrode block portion 510 is adapted to the shape of the space surrounded by the data lines 100 arranged on the first and second sides of the corresponding first opening area 310.

[0064] 4 is a transmittance curve diagram of a pixel structure in a display substrate in some embodiments of the present disclosure, where the common electrode layer in the display substrate is a non-transparent electrode layer and the data line is a polygonal line (e.g., the display substrate in the embodiment shown in FIG. 2). In FIG. 4, the abscissa represents a position within a single sub-pixel 300 in the extension direction of the gate line 200, and the ordinate represents the average transmittance of the first opening area 310 and the second opening area 320 at the same position. As can be seen from the curve in FIG. 4, the pixel structure of the display substrate does not have a position where the transmittance is zero, and continuous light emission of the sub-pixel 300 can be achieved. Experimental testing of moiré patterns has also been conducted, and the test results show that moiré patterns can be effectively eliminated.

[0065] 5 is a transmittance curve diagram of a pixel structure in a display substrate in some other embodiments of the present disclosure, in which the common electrode layer in the display substrate is a non-transparent electrode layer, and the data line includes a third vertical line segment and a transparent conductive line (e.g., the display substrate in the embodiment shown in FIG. 4). In FIG. 5, the abscissa represents a position within a single sub-pixel 300 in the extension direction of the gate line 200, and the ordinate represents the average transmittance of the first opening area 310 and the second opening area 320 at the same position. As can be seen from the curve in FIG. 5, the pixel structure of the display substrate does not have a position where the transmittance is zero, and continuous light emission of the sub-pixel 300 can be achieved. Experimental testing of moiré patterns has also been conducted, and the test results show that moiré patterns can be effectively eliminated.

[0066] FIG. 6 is a transmittance curve diagram of a pixel structure in a display substrate in some embodiments of the present disclosure, in which the common electrode layer in the display substrate is a translucent electrode layer and the data line is a broken line (for example, the display substrate in the embodiment shown in FIG. 2 differs from the display substrate in the embodiment shown in FIG. 4 in that the common electrode layer is a translucent electrode layer). In FIG. 6, the abscissa represents a position within a single sub-pixel 300 in the extension direction of the gate line 200, and the ordinate represents the average transmittance of the first opening area 310 and the second opening area 320 at the same position. As can be seen from the curve in FIG. 6, the pixel structure of the display substrate does not have a position where the transmittance is zero, allowing the sub-pixel 300 to continuously emit light. A moire experiment was conducted, and the test results showed that moire can be effectively eliminated.

[0067] Below, we will explain some points to note. (1) The drawings of the embodiments of the present disclosure are only related to the structure of the embodiments of the present disclosure, and for other structures, reference may be made to the general design. (2) For clarity, in the figures illustrating the embodiments of the present disclosure, the thicknesses of layers or regions have been exaggerated or reduced, i.e., the figures are not drawn to scale. It should be understood that when an element, such as a layer, film, region, or substrate, is referred to as being "on" or "under" another element, the element may be "directly" located "on" or "under" the other element, or there may be an intermediate element present. (3) Where no contradiction exists, embodiments and features of embodiments of the present disclosure may be combined to obtain new embodiments.

[0068] The above are merely specific embodiments of the present disclosure, and the scope of protection of the present disclosure is not limited thereto, but is subject to the scope of protection of the claims.

Claims

1. A display substrate including: a base substrate; and a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction, the data lines being provided on the base substrate; the display substrate including a plurality of sub-pixels, each of the sub-pixels including at least a first opening area and a second opening area spaced apart in the first direction, the second opening area being offset in the second direction with respect to the first opening area, and the offset distance being equal to or less than the width of the first opening area in the second direction; The display substrate further includes a common electrode layer provided on the base substrate, the common electrode layer being a non-light-transmitting conductive layer or a light-transmitting conductive layer, and an opening area is provided in the common electrode layer, and the first opening area and the second opening area are defined by the opening area.

2. The display substrate according to claim 1 , wherein a minimum distance between two adjacent first opening areas in the second direction is equal to the offset distance.

3. 2. The display substrate according to claim 1, wherein, within the same subpixel, the first opening area and the second opening area share the same switching element, share the same data line as a signal input line, and share the same gate line as a switching control line for the switching element.

4. one gate line shared by the first opening area and the second opening area located in the same sub-pixel is disposed between the first opening area and the second opening area, or one gate line shared by the first opening area and the second opening area located in the same sub-pixel is disposed on a side of the first opening area away from the second opening area, or 4. The display substrate according to claim 3, wherein one of the gate lines shared by the first opening area and the second opening area located in the same subpixel is disposed on a side of the second opening area away from the first opening area.

5. 2. The display substrate according to claim 1, wherein the data lines are arranged in a polygonal line shape in non-aperture areas of the sub-pixels.

6. The sub-pixel includes a first side and a second side opposite to each other, the first side and the second side are used to arrange the data line, the data line includes a plurality of first repeat units sequentially connected along the first direction, and the first repeat units include: a first vertical line segment located on a first side of the first opening area and extending along the first direction, the first vertical line segment including a first end away from the second opening area and a second end close to the second opening area; a second vertical line segment located on a second side of the second opening area and extending along the second direction, the second vertical line segment including a third end close to the first opening area and a fourth end distant from the first opening area; a first oblique line segment connected between the second end of the first vertical line segment and the third end of the second vertical line segment, the first oblique line segment forming a first included angle with the first vertical line segment; a second oblique line segment connected to the first end of the first vertical line segment or the fourth end of the second vertical line segment, and having a second included angle with the first vertical line segment; 6. The display substrate according to claim 5, comprising:

7. The first vertical line segment, the second vertical line segment, the first oblique line segment, and the second oblique line segment are an integral structure provided to be in the same layer and made of the same material, or 7. The display substrate of claim 6, wherein at least two of the first vertical line segment, the second vertical line segment, the first diagonal line segment, and the second diagonal line segment are arranged to be in different layers and are connected via via holes.

8. A display substrate comprising: a base substrate; and a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction, the display substrate comprising a plurality of sub-pixels, each of the sub-pixels including at least a first opening area and a second opening area spaced apart in the first direction, the second opening area being offset in the second direction relative to the first opening area, and the offset distance being equal to or less than the width of the first opening area in the second direction; The sub-pixel includes a first side and a second side opposite to each other, the first side and the second side are used to arrange the data line, the data line includes a plurality of second repeat units sequentially connected along the first direction, and the second repeat units include: a third vertical line segment located on a first side or a second side of the first opening area, the third vertical line segment including a first end close to the second opening area and a second end distant from the second opening area; a transparent conductive line whose orthogonal projection on the base substrate at least partially overlaps with the orthogonal projection of the second opening area on the base substrate, the transparent conductive line being connected to a first end of the third vertical line segment and having a length in the first direction that is equal to or greater than the length of the second opening area in the first direction; A display substrate comprising:

9. The transparent conductive line and the third vertical line segment are provided in the same layer but made of different materials, or 9. The display substrate according to claim 8, wherein the transparent conductive line and the third vertical line segment are provided in different layers and insulated from each other, and are connected to each other through a via hole.

10. 10. The display substrate of claim 9, wherein the third vertical line segment is a source-drain metal line, and the transparent conductive line is an indium tin oxide conductive line.

11. The display substrate according to claim 1 , further comprising a plurality of pixel electrodes, one of the pixel electrodes being provided in each of the sub-pixels.

12. The pixel electrode is a transparent conductive electrode, and the pixel electrode is a first electrode block portion located within the first opening area; a second electrode block portion located within the second open area; a connecting bridge portion connected between the first electrode block portion and the second electrode block portion; Including, 12. The display substrate according to claim 11, wherein the shape of the first electrode block portion is adapted to the shape of a space surrounded by data lines disposed on the first and second sides of the corresponding first opening area.

13. 4. The display substrate according to claim 3, wherein the switching elements are provided at intersections of the gate lines and the data lines.

14. A display device comprising the display substrate according to any one of claims 1 to 13.

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