Plasma processing equipment

Abstract

The plasma processing apparatus includes a chamber, first and second bias power supplies that supply first and second bias signals, a substrate support that supports a substrate and an edge ring within the chamber, an adjustment mechanism, and an electrical path. The substrate support has first and second regions that support the substrate and the edge ring, respectively, first and second bias electrodes in the first and second regions, and a grounded adjustment electrode in the second region. The adjustment mechanism includes a first adjustment mechanism that controls the first bias signal, an isolator that blocks the second bias signal between the adjustment electrode and the first adjustment mechanism, and a second adjustment mechanism that controls the second bias signal. The isolator, the first adjustment mechanism, and the second adjustment mechanism are connected in parallel and connected to the adjustment electrode. The electrical path connects the first and second bias power supplies to the first and second bias electrodes.

Description

[Technical Field]

[0001] The present disclosure relates to a plasma processing apparatus. [Background technology]

[0002] US Pat. No. 6,299,499 discloses that when the plasma sheath drops adjacent to the edge ring due to erosion of the edge ring, the capacitance of a variable capacitor is adjusted to affect the RF amplitude near the edge of the substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-130659 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a plasma processing apparatus capable of improving the controllability of a plurality of bias RF signals with different frequencies. [Means for solving the problem]

[0005] According to one aspect of the present disclosure, there is provided a plasma processing apparatus comprising: a chamber; a first bias power supply configured to supply a first bias signal; a second bias power supply configured to supply a second bias signal; a substrate support configured to support a substrate and an edge ring in the chamber; an impedance adjustment mechanism; and an electrical path. The substrate support is configured to have a first region supporting the substrate, a second region surrounding the first region and supporting the edge ring, a first bias electrode provided in the first region, a second bias electrode provided in the second region, and an impedance adjustment electrode provided in the second region and connected to ground. The impedance adjustment mechanism includes a first impedance adjustment mechanism that controls the first bias signal, an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism and that blocks the second bias signal, and a second impedance adjustment mechanism that controls the second bias signal. The isolator, the first impedance adjustment mechanism, and the second impedance adjustment mechanism are configured to be connected in parallel to the impedance adjustment electrode. The electrical path is configured to connect the first bias power supply, the second bias power supply, and the first and second bias electrodes. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to improve the controllability of a plurality of bias RF signals with different frequencies. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a plasma processing apparatus according to the first embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram showing an example of the relationship between wear of the edge ring and tilting. [Figure 3] FIG. 3 is a diagram showing an example of a circuit configuration of the impedance adjustment mechanism in the first embodiment. [Figure 4] FIG. 4 is a diagram showing another example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. [Figure 5]FIG. 5 is a graph showing an example of the relationship between the capacitance and reactance of a variable capacitor. [Figure 6] FIG. 6 is a graph showing an example of the relationship between the capacitance and reactance of a variable capacitor. [Figure 7] FIG. 7 is a graph showing an example of the influence between multiple variable capacitors. [Figure 8] FIG. 8 is a graph showing an example of the influence between multiple variable capacitors. [Figure 9] FIG. 9 is a diagram showing an example of adjustment of a plurality of variable capacitors in the first embodiment. [Figure 10] FIG. 10 is a diagram showing an example of the edge ring wear amount in the reference example. [Figure 11] FIG. 11 is a diagram showing an example of the edge ring wear amount in the first modification. [Figure 12] FIG. 12 is a diagram showing an example of the relationship between the sheath potential and the capacitance of the variable capacitor in the first modification. [Figure 13] FIG. 13 is a diagram showing an example of the bias in the etching rate. [Figure 14] FIG. 14 is a diagram showing an example of the arrangement of conductive bars in the second modification. [Figure 15] FIG. 15 is a diagram showing an example of the arrangement of conductive bars in the third modification. [Figure 16] FIG. 16 is a diagram showing an example of the arrangement of conductive bars in the fourth modification. [Figure 17] FIG. 17 is a diagram showing an example of the arrangement of conductive bars in the fifth modification. [Figure 18] FIG. 18 is a diagram showing an example of the configuration of an electrical path in the sixth modification. [Figure 19] FIG. 19 is a diagram showing an example of the configuration of a plasma processing apparatus according to the second embodiment. [Figure 20] FIG. 20 is a diagram illustrating an example of independent controllability on the edge ring side in the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the plasma processing apparatus will be described in detail below with reference to the accompanying drawings. However, the disclosed technology is not limited to the following embodiments.

[0009] In plasma processing equipment, the thickness of the plasma sheath may vary depending on the potential difference between the substrate and the edge ring. For example, as the edge ring wears, the height of the plasma sheath above the edge ring may decrease (the sheath thickness may increase). This may result in tilting (inner tilt), in which the ion trajectory is tilted at an angle due to the electric field not being perpendicular to the substrate at the periphery of the substrate. To address this issue, it is possible to independently control the potential on the edge ring side. However, when bias RF signals with two different frequencies are used as a bias power supply, the potential at one frequency may be controllable but the potential at the other frequency may not be controllable. Therefore, there is a need for improved controllability over multiple bias RF signals with different frequencies.

[0010] (First embodiment) [Configuration of plasma processing apparatus 1] An example of the configuration of a plasma processing system will be described below. FIG. 1 is a diagram showing an example of the configuration of a plasma processing apparatus according to a first embodiment of the present disclosure. The plasma processing system includes an inductively coupled plasma processing apparatus 1 and a control unit 2. The inductively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing chamber 10 includes a dielectric window 101. The plasma processing apparatus 1 also includes a substrate support 11, a gas introduction unit, and an antenna 14. The substrate support 11 is disposed within the plasma processing chamber 10. The antenna 14 is disposed on or above the plasma processing chamber 10 (i.e., on or above the dielectric window 101). The plasma processing chamber 10 has a plasma processing space 10s defined by the dielectric window 101, a sidewall 102 of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas into the plasma processing space 10s and at least one gas exhaust port for exhausting gas from the plasma processing space 10s. The plasma processing chamber 10 is grounded.

[0011] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a planar view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as a ring support surface for supporting the ring assembly 112. The substrate support 11 is an example of a substrate support, the central region 111a is an example of a first region, and the annular region 111b is an example of a second region. In the following description, the central region 111a may be referred to as a substrate support surface 111a, and the annular region 111b may be referred to as a ring support surface 111b.

[0012] In one embodiment, the main body 111 includes a base 1110, an electrostatic chuck 1111, and an adhesive layer 1112. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as part of an electrical path 38 connected to a first bias electrode 34 and a second bias electrode 35, which will be described later. A power supply line 33a is connected to the bottom of the base 1110. The power supply line 33a is also included in the electrical path 38. The electrostatic chuck 1111 is disposed on the base 1110 via the adhesive layer 1112. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Alternatively, another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may have the annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. At least one RF / DC electrode coupled to an RF (Radio Frequency) power supply 31 and / or a DC (Direct Current) power supply 32 (described later) may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a bias electrode. That is, a first bias electrode 34 and a second bias electrode 35 (described later) are electrically connected to the RF power supply 31 and / or the DC power supply 32 via an electrical path 38. Alternatively, a conductive member of the base 1110 and at least one RF / DC electrode may function as multiple bias electrodes. Alternatively, the electrostatic electrode 1111b may function as a bias electrode, or the first bias electrode 34 may function as an electrostatic electrode. Thus, the substrate support 11 includes at least one bias electrode.

[0013] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0014] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate W to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0015] The electrostatic chuck 1111 includes an electrostatic electrode 1111b and a first bias electrode 34 below the substrate support surface 111a, in that order from the substrate support surface 111a side. The electrostatic chuck 1111 is made of a dielectric material, such as ceramics. The electrostatic chuck 1111 also includes an impedance adjustment electrode 50 and a second bias electrode 35 below the ring support surface 111b, in that order from the ring support surface 111b side. The first bias electrode 34 is connected to, for example, the bottom of the base 1110 via a conductor 36b passing through a through-hole 36a in the base 1110. An insulating sleeve (not shown) is provided inside the through-hole 36a, electrically insulating the base 1110 from the conductor 36b within the through-hole 36a. The second bias electrode 35 is connected to, for example, the bottom of the base 1110 via a conductor 37b passing through a through-hole 37a in the base 1110. An insulating sleeve (not shown) is provided inside the through-hole 37a, and the base 1110 and the conductor 37b are electrically insulated from each other inside the through-hole 37a.

[0016] That is, the first bias electrode 34 and the second bias electrode 35 are connected to a matching circuit 33 (described later) via conductors 36b and 37b, the base 1110, and the power supply line 33a, thereby forming an electrical path 38. Note that the connection between the first bias electrode 34 and the second bias electrode 35 and the base 1110 is not limited to a conductive member, and any method capable of supplying a bias RF signal, such as magnetic resonance, capacitive coupling, or inductive coupling, may be used. That is, the electrical path 38 is configured to connect a bias power supply (for example, a first bias RF generation unit 31b (described later)), the first bias electrode 34, and the second bias electrode 35. Furthermore, the electrical path 38 may be configured so that the first bias RF generation unit 31b and the second bias RF generation unit 31c (described later) are not connected to the base 1110, and the first bias RF generation unit 31b and the second bias RF generation unit 31c are directly connected to the first bias electrode 34 and the second bias electrode 35. The second bias electrode 35 also has the function of suppressing abnormal discharge of the LF1 power supplied from the first bias RF generating unit 31b, which will be described later.

[0017] The impedance adjustment electrode 50 is grounded via an impedance adjustment mechanism 51. The impedance adjustment mechanism 51 adjusts the amount of a portion of the RF signal (electrical bias) supplied from the second bias electrode 35 that flows to the ground (earth). By adjusting the amount of the RF signal that flows to the ground using the impedance adjustment electrode 50, the potential of the ring assembly 112 is adjusted, and this is used to control the tilt angle and / or adjust the etching rate. At least one impedance adjustment electrode 50 is provided within the electrostatic chuck 1111. When multiple impedance adjustment electrodes 50 are provided, for example, two or more are provided in the circumferential direction of the substrate support 11, and the number of impedance adjustment mechanisms 51 corresponds to the number of impedance adjustment electrodes 50. Furthermore, two or more impedance adjustment electrodes 50 may be provided in the radial direction of the substrate support 11. Furthermore, two or more impedance adjustment electrodes 50 may be provided in both the circumferential direction and the radial direction of the substrate support 11. The impedance adjustment electrodes 50 are arranged parallel to the second bias electrode 35.

[0018] By placing the first bias electrode 34 and the second bias electrode 35 as close as possible to the substrate W and the ring assembly 112, the impedance of the capacitor formed by the substrate W, the ring assembly 112, the ceramics of the electrostatic chuck 1111, and these electrodes is reduced. This reduces the potential difference between the first bias electrode 34 and the second bias electrode 35, and the substrate W and ring assembly 112. Similarly, the impedance of the capacitor formed by the first bias electrode 34 and the electrostatic electrode 1111b, and the second bias electrode 35 and the impedance adjustment electrode 50, respectively, is also reduced. Furthermore, the impedance of the capacitor formed by the electrostatic electrode 1111b and the substrate W, and the impedance adjustment electrode 50 and the ring assembly 112, respectively, is also reduced.

[0019] It is also possible to provide an impedance adjustment electrode below the substrate support surface 111a, and to provide an impedance adjustment mechanism connected to the impedance adjustment electrode.

[0020] The gas inlet is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. In one embodiment, the gas inlet includes a center gas injector (CGI) 13. The center gas injector 13 is disposed above the substrate support 11 and attached to a central opening formed in the dielectric window 101. The center gas injector 13 has at least one gas supply port 13a, at least one gas flow path 13b, and at least one gas inlet port 13c. The process gas supplied to the gas supply port 13a passes through the gas flow path 13b and is introduced into the plasma processing space 10s from the gas inlet port 13c. Note that the gas inlet may include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 102 in addition to or instead of the center gas injector 13.

[0021] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the gas inlet through a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include one or more flow modulation devices to modulate or pulse the flow rate of the at least one process gas.

[0022] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one of the first bias electrode 34, the second bias electrode 35, and the antenna 14. This generates a plasma from at least one process gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of a plasma generating unit configured to generate a plasma from one or more process gases in the plasma processing chamber 10. Furthermore, by supplying a bias RF signal to at least one of the first bias electrode 34 and the second bias electrode 35, a bias potential is generated on the substrate W, thereby attracting ions in the formed plasma to the substrate W.

[0023] In one embodiment, the RF power supply 31 includes a source RF generator 31a, a first bias RF generator 31b, and a second bias RF generator 31c. The source RF generator 31a is coupled to the antenna 14 and configured to generate a source RF signal (source RF power) for plasma generation via at least one impedance matching circuit. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the source RF generator 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to the antenna 14.

[0024] The first bias RF generating unit 31b is coupled to the first bias electrode 34 and the second bias electrode 35 via the matching circuit 33, the feed line 33a, and the base 1110, and is configured to generate a first bias RF signal (hereinafter also referred to as LF1 power). The generated first bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. In one embodiment, the first bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the first bias RF signal has a frequency within a range of 100 kHz to 5 MHz. The generated first bias RF signal is supplied to at least one of the first bias electrode 34 and the second bias electrode 35.

[0025] The second bias RF generation unit 31c is coupled to the first bias electrode 34 and the second bias electrode 35 via the matching circuit 33, the feed line 33a, and the base 1110, and is configured to generate a second bias RF signal (hereinafter also referred to as LF2 power). The generated second bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. The frequency of the second bias RF signal may be the same as or different from the frequency of the source RF signal. The frequency of the second bias RF signal is higher than the frequency of the first bias RF signal. In one embodiment, the second bias RF signal has a frequency within a range of 1 MHz to 60 MHz. The generated second bias RF signal is supplied to at least one of the first bias electrode 34 and the second bias electrode 35. In various embodiments, at least one of the source RF signal, the first bias RF signal, and the second bias RF signal may be pulsed. Furthermore, at least one of the first bias RF signal and the second bias RF signal may have at least two power levels.

[0026] The matching circuit 33 is connected to the first bias RF generation unit 31b, the second bias RF generation unit 31c, and the substrate support unit 11 (base 1110). The matching circuit 33 enables the first bias RF signal to be supplied from the first bias RF generation unit 31b to the substrate support unit 11 via the matching circuit 33. The matching circuit 33 also enables the second bias RF signal to be supplied from the second bias RF generation unit 31c to the substrate support unit 11 via the matching circuit 33.

[0027] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a bias DC generator 32a. In one embodiment, the bias DC generator 32a is connected to at least one of a first bias electrode 34 and a second bias electrode 35 and configured to generate a bias DC signal. The generated bias DC signal is applied to the at least one of the first bias electrode 34 and the second bias electrode 35.

[0028] In various embodiments, the bias DC signal may be pulsed. In this case, a sequence of voltage pulses is applied to at least one of the first bias electrode 34 and the second bias electrode 35. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof. In one embodiment, a waveform generator for generating a sequence of voltage pulses from the DC signal is connected between the bias DC generator 32a and at least one of the first bias electrode 34 and the second bias electrode 35. Thus, the bias DC generator 32a and the waveform generator constitute a voltage pulse generator. The voltage pulses may have positive or negative polarity. The sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. The bias DC generator 32a may be provided in addition to the RF power supply 31, or may be provided instead of at least one of the first bias RF generator 31b and the second bias RF generator 31c. Furthermore, in the following description, a first bias signal may include a first bias RF signal and / or a bias DC signal, and a second bias signal may include a second bias RF signal and / or a bias DC signal.

[0029] The antenna 14 includes one or more coils. In one embodiment, the antenna 14 may include an outer coil and an inner coil arranged coaxially. In this case, the RF power supply 31 may be connected to both the outer coil and the inner coil, or to either the outer coil or the inner coil. In the former case, the same RF generator may be connected to both the outer coil and the inner coil, or separate RF generators may be connected to the outer coil and the inner coil separately.

[0030] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure regulating valve regulates the pressure in the plasma processing space 10s. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0031] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 may be implemented by, for example, a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. The program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include a random access memory (RAM), a read only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0032] [Relationship between edge ring wear and tilting] Next, the relationship between wear of the edge ring and tilting will be described with reference to FIG. 2. FIG. 2 is a diagram showing an example of the relationship between wear of the edge ring and tilting. State 60 shown in FIG. 2 shows the state of the plasma sheath at the peripheral edge of the substrate W when the edge ring is not worn. State 61 shows a state in which the substrate W has been processed for a predetermined period and wear of the edge ring has progressed. State 62 shows a state in which the substrate W has been processed for a predetermined period further from state 61 and wear of the edge ring has further progressed.

[0033] In state 60, the height of the upper surface of the unconsumed edge ring 112a is higher than the upper surface of the substrate W. As a result, the plasma sheath 64a is raised from the peripheral edge of the substrate W to the upper surface of the edge ring 112a. At this time, there is a gap 65 between the upper surface of the edge ring 112a and the plasma sheath 64a. In this case, at the peripheral edge of the substrate W, the direction 66a of the electric field is tilted toward the outside of the substrate W, and an outer tilt occurs, as shown by hole 67a, in which the bottom of the hole is tilted toward the outside of the substrate W. Subsequently, the edge ring 112a is worn further, and becomes edge ring 112b shown in state 61.

[0034] In state 61, the height of the upper surface of edge ring 112b is approximately flush with the upper surface of substrate W. If the bias power applied to edge ring 112b is the same as in state 60, plasma sheath 64b will be approximately flush with the peripheral edge of substrate W. At this time, the bias power remains unchanged between the upper surface of edge ring 112b and plasma sheath 64b, resulting in a gap 65 similar to state 60. In this case, the electric field direction 66b is not tilted at the peripheral edge of substrate W, and tilting does not occur, as indicated by hole 67b. Subsequently, wear of edge ring 112b progresses, resulting in edge ring 112c shown in state 62.

[0035] In state 62, the height of the upper surface of the edge ring 112c is lower than the height of the upper surface of the substrate W. Therefore, the plasma sheath 64c descends from the peripheral edge of the substrate W to the upper surface of the edge ring 112c. At this time, the bias power remains unchanged between the upper surface of the edge ring 112c and the plasma sheath 64c, resulting in a gap 65, similar to state 60. In this case, the electric field direction 66c at the peripheral edge of the substrate W is tilted toward the inside of the substrate W, resulting in an inner tilt, as shown by hole 67c, in which the bottom of the hole tilts toward the inside of the substrate W. In this embodiment, the bias power applied to the ring assembly 112 is adjusted in accordance with the wear of the edge ring included in the ring assembly 112, thereby making the height of the plasma sheath at the upper surface of the substrate W and the upper surface of the ring assembly 112 approximately the same. In this embodiment, the bias power applied to the ring assembly 112 is LF1 power and LF2 power, which can be adjusted by an impedance adjustment mechanism 51 connected to the impedance adjustment electrode 50. In the following description, the edge ring included in the ring assembly 112 may be simply referred to as the ring assembly 112.

[0036] [Circuit configuration of impedance adjustment mechanism] Next, the circuit configuration of the impedance adjustment mechanism 51 will be described with reference to Fig. 3. Fig. 3 is a diagram showing an example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. As shown in Fig. 3, the impedance adjustment mechanism 51 has a first variable capacitor 52 that controls the first bias RF signal, a second variable capacitor 53 that controls the second bias RF signal, and an isolator 54. In the following description, 400 kHz is used as an example of the frequency of the first bias RF signal, and 12.88 MHz is used as an example of the frequency of the second bias RF signal.

[0037] The first variable capacitor 52 has a variable capacitance range of, for example, 200 pF to 2000 pF to enable control of the first bias RF signal (LF1 power) on the low frequency side (400 kHz). The second variable capacitor 53 has a variable capacitance range of, for example, 10 pF to 475 pF to enable control of the second bias RF signal (LF2 power) on the high frequency side (12.88 MHz). That is, the first variable capacitor 52 is capable of controlling a high capacitance range in the impedance adjustment mechanism 51, and the second variable capacitor 53 is capable of controlling a low capacitance range in the impedance adjustment mechanism 51. In the following description, the variable capacitor may be referred to as a variable capacitor (VC). For example, the first variable capacitor 52 may be referred to as a first variable capacitor 52, and the second variable capacitor 53 may be referred to as a second variable capacitor 53.

[0038] The isolator 54 is connected between the impedance adjustment electrode 50 and the first variable capacitor 52 and blocks the second bias RF signal. That is, the isolator 54 is connected in series with the first variable capacitor 52 and closer to the impedance adjustment electrode 50 than the first variable capacitor 52. Furthermore, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 with the first variable capacitor 52 and the isolator 54 connected in parallel with the second variable capacitor 53.

[0039] The isolator 54 has a capacitor 54a and a coil 54b. The capacitor 54a and the coil 54b form a parallel resonant circuit. The isolator 54 can block the second bias RF signal flowing from the impedance adjustment mechanism 51 by setting the frequency (12.88 MHz) of the second bias RF signal as its resonant frequency. The resonant frequency of the parallel resonant circuit of the isolator 54 may be a frequency close to the frequency of the second bias RF signal. For example, when the frequency of the second bias RF signal is 12.88 MHz, the resonant frequency of the parallel resonant circuit of the isolator 54 may be 13 MHz. The isolator 54 may also be a low-pass filter configured using, for example, a coil, which passes the first bias RF signal and blocks the second bias RF signal.

[0040] The first variable capacitor 52 and the second variable capacitor 53 may also have a circuit configuration including other types of circuit constants. In this case, the first variable capacitor 52 and the second variable capacitor 53 can be represented as the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53, respectively. Variations in the circuit configuration when the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 are used will be described with reference to FIG. 4.

[0041] FIG. 4 is a diagram showing another example of the circuit configuration of the impedance adjustment mechanism in the first embodiment. As shown in FIG. 4, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can have various configurations such as circuits 170 to 174. The circuit 170 is an LC series circuit using an inductor and a variable capacitor. The circuit 171 is an RC series circuit using a resistor and a variable capacitor. The circuit 172 is an RR series circuit using a resistor and a variable resistor. The circuit 173 is a circuit that can be switched between a high-frequency LC series circuit and a low-frequency RR series circuit by a switch SW. The circuit 174 is a circuit that can be switched between a high-efficiency LC series circuit (inductor L1, variable capacitor C1) and a low-efficiency LC series circuit (inductor L2, variable capacitor C2) by a switch SW. As shown in graph 175, the circuit 174 has a wide adjustment range by switching the switch SW. Although not illustrated in FIG. 4, the impedance adjusting mechanisms 52 and 53 may have a circuit configuration using a variable inductor.

[0042] As described above, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can use variable resistors, variable capacitors, variable inductors, etc., regardless of the type of circuit constant (R, L, C) to be adjusted. The first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 may also be a combination of one or more variable mechanisms (variable resistors, variable capacitors, variable inductors, etc.) depending on the frequency, part size, and adjustment range of the bias RF signal. Since the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 do not require the passage of heater current, variable resistors or variable capacitors can be used. Furthermore, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 may be configured with at least one of a variable resistor, a variable capacitor, a variable inductor, and a DC power supply. For example, when the bias RF signal is high frequency, the impedance between the second bias electrode 35 and the impedance adjustment electrode 50 and the impedance between the impedance adjustment electrode 50 and the ring assembly 112 become small. Therefore, controlling the potential using a DC power supply allows for more effective potential control.

[0043] Here, the control range of the first variable capacitor 52 for the first bias RF signal and the second bias RF signal will be described with reference to FIGS. 5 and 6. FIGS. 5 and 6 are graphs showing an example of the relationship between the capacitance and reactance of a variable capacitor. Graph 70 shown in FIG. 5 shows the relationship between the capacitance C and reactance X of the first variable capacitor 52 for the first bias RF signal (400 kHz). As shown in graph 70, for the first bias RF signal (400 kHz), the control range 71 of the reactance X can be set to approximately 900 Ω. The capacitance C corresponding to the control range 71 is approximately 350 pF to 3000 pF. Furthermore, if the lower limit of the capacitance C is expanded to approximately 200 pF, the control range 71 of the reactance X can be expanded to approximately 1500 Ω. Therefore, as described above, the variable range of the first variable capacitor 52 can be set to 200 pF to 2000 pF.

[0044] Graph 72 in FIG. 6 shows the relationship between the capacitance C and reactance X of first variable capacitor 52 for the second bias RF signal (12.88 MHz). As shown in graph 72, for the second bias RF signal (12.88 MHz), the control range 73 of reactance X is approximately 50 Ω. The capacitance C corresponding to control range 73 is approximately 150 pF to 500 pF. In other words, first variable capacitor 52 has almost no control range for the second bias RF signal (12.88 MHz). This is thought to be due to the influence of stray capacitance. Therefore, for the second bias RF signal (12.88 MHz), the first variable capacitor 52 side is isolated by isolator 54, and impedance is adjusted using second variable capacitor 53.

[0045] Next, using FIGS. 7 and 8, the effect of a change in the capacitance of the first variable capacitor 52 on the second variable capacitor 53 when a second bias RF signal (12.88 MHz) is supplied will be described. FIGS. 7 and 8 are graphs showing an example of the effect between multiple variable capacitors. Graph 74 in FIG. 7 shows the currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma when the first variable capacitor 52 is set to 200 pF, the second bias RF signal is supplied, and the capacitance C of the second variable capacitor 53 is changed. Graph 75 shows the current on the second variable capacitor 53 side. Graph 76 shows the plasma current. Graph 77 shows the current on the first variable capacitor 52 side. As shown in graphs 75 to 77, when the capacitance C of the second variable capacitor 53 is changed from 10 pF to 475 pF, the plasma current decreases and the current on the second variable capacitor 53 side increases. On the other hand, the current on the first variable capacitor 52 side barely flows and does not change.

[0046] Graph 78 in FIG. 8 shows the currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma when the first variable capacitor 52 is set to 2000 pF, the second bias RF signal is supplied, and the capacitance C of the second variable capacitor 53 is changed. Graph 75a shows the current on the second variable capacitor 53 side. Graph 76a shows the plasma current. Graph 77a shows the current on the first variable capacitor 52 side. As shown in graphs 75a to 77a, when the capacitance C of the second variable capacitor 53 is changed from 10 pF to 475 pF, the plasma current decreases and the current on the second variable capacitor 53 side increases. On the other hand, the current on the first variable capacitor 52 side barely flows and remains unchanged. As such, it can be seen that the isolator 54 is functioning in the impedance adjustment mechanism 51, and changing the capacitance C of the first variable capacitor 52 from 200 pF to 2000 pF does not affect the second bias RF signal. That is, it can be seen that even if the capacitance C of the first variable capacitor 52 is changed to a high capacitance, no current flows into the first variable capacitor 52 side.

[0047] [Example of adjusting a variable capacitor] Next, an example of adjusting the first variable capacitor 52 and the second variable capacitor 53 will be described with reference to FIG. 9. FIG. 9 is a diagram illustrating an example of adjusting a plurality of variable capacitors in the first embodiment. From left to right in FIG. 9, an example of adjusting the capacitance of the first variable capacitor 52 and the second variable capacitor 53 according to the amount of wear of the edge ring included in the ring assembly 112 is shown. Note that in FIG. 9, the first bias electrode 34, the second bias electrode 35, and the electrostatic electrode 1111b are omitted, and the flow of the LF1 power and the LF2 power is represented by white arrows. Also, the flow of the LF1 power and the LF2 power is expressed relative to each other in FIG. 9, and is not limited to this. Note that the LF1 power and the LF2 power may be supplied simultaneously or may be supplied by switching between them.

[0048] First, the case of the unconsumed edge ring 112d on the left side of FIG. 9 will be described. The capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath 64d is at a constant height between the top of the substrate W and the top of the edge ring 112d. For example, the first variable capacitor 52 is adjusted to 2000 pF, and the second variable capacitor 53 is adjusted to 475 pF. When LF2 power (12.88 MHz) is supplied to the impedance adjustment electrode 50, more of the LF2 power flows toward the impedance adjustment mechanism 51 than toward the edge ring 112d. In other words, more of the LF2 power flows toward the second variable capacitor 53, which is adjusted to 475 pF, than toward the edge ring 112d. Furthermore, since the LF2 power is blocked by the isolator 54, almost no power flows toward the first variable capacitor 52. That is, when LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 475 pF.

[0049] When LF1 power (400 kHz) is supplied to the impedance adjustment electrode 50, more of the LF1 power flows toward the impedance adjustment mechanism 51 than toward the edge ring 112d. That is, more of the LF1 power flows toward the first variable capacitor 52, which is adjusted to 2000 pF, and the second variable capacitor 53, which is adjusted to 475 pF, than toward the edge ring 112d. Furthermore, the LF1 power is not blocked by the isolator 54, and more of it flows toward the first variable capacitor 52 than toward the second variable capacitor 53. That is, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 2475 pF.

[0050] Next, the case of the edge ring 112e in the center of FIG. 9, where wear is advanced, will be described. The capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath 64e is at a constant height between the top of the substrate W and the top of the edge ring 112e. For example, the first variable capacitor 52 is adjusted to 1000 pF, and the second variable capacitor 53 is adjusted to 200 pF. When LF2 power (12.88 MHz) is supplied to the impedance adjustment electrode 50, the LF2 power flows to the edge ring 112e side and the impedance adjustment mechanism 51 side at the same level. In other words, the LF2 power flows to the edge ring 112e side and the second variable capacitor 53 side, which is adjusted to 200 pF, at the same level. Furthermore, the LF2 power is blocked by the isolator 54, so almost no power flows to the first variable capacitor 52 side. That is, when LF2 power is supplied to the impedance adjusting electrode 50, the impedance adjusting mechanism 51 appears as a capacitive load with a capacitance of 200 pF.

[0051] When LF1 power (400 kHz) is supplied to the impedance adjustment electrode 50, the LF1 power flows to the same extent on the edge ring 112e side and the impedance adjustment mechanism 51 side. That is, the LF1 power flows to the same extent on the edge ring 112e side and the first variable capacitor 52 adjusted to 1000 pF and the second variable capacitor 53 adjusted to 200 pF side. Furthermore, the LF1 power is not blocked by the isolator 54, and flows more to the first variable capacitor 52 side than to the second variable capacitor 53 side. That is, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 1200 pF.

[0052] Next, the case of the edge ring 112f on the right side of FIG. 9, which is more worn, will be described. The capacitances of the first variable capacitor 52 and the second variable capacitor 53 are adjusted so that the plasma sheath 64f is at a constant height between the top of the substrate W and the top of the edge ring 112f. For example, the first variable capacitor 52 is adjusted to 200 pF, and the second variable capacitor 53 is adjusted to 10 pF. When LF2 power (12.88 MHz) is supplied to the impedance adjustment electrode 50, more LF2 power flows toward the edge ring 112f than toward the impedance adjustment mechanism 51. In other words, more LF2 power flows toward the edge ring 112f than toward the second variable capacitor 53, which is adjusted to 10 pF. Furthermore, since the LF2 power is blocked by the isolator 54, almost no power flows toward the first variable capacitor 52. That is, when LF2 power is supplied to the impedance adjusting electrode 50, the impedance adjusting mechanism 51 appears as a capacitive load with a capacitance of 10 pF.

[0053] When LF1 power (400 kHz) is supplied to the impedance adjustment electrode 50, more of the LF1 power flows toward the edge ring 112f than toward the impedance adjustment mechanism 51. In other words, more of the LF1 power flows toward the edge ring 112f than toward the first variable capacitor 52, which is adjusted to 200 pF, and the second variable capacitor 53, which is adjusted to 10 pF. Furthermore, the LF1 power is not blocked by the isolator 54, and more of it flows toward the first variable capacitor 52 than toward the second variable capacitor 53. In other words, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 210 pF.

[0054] 9, the variable range of the capacitance of the impedance adjustment mechanism 51 for the LF1 power is 210 pF to 2475 pF. Also, the variable range of the capacitance of the impedance adjustment mechanism 51 for the LF2 power is 10 pF to 475 pF. That is, the plasma processing apparatus 1 of this embodiment can improve the controllability for a plurality of bias RF signals with different frequencies.

[0055] (Variation 1) Next, a first modification of the first embodiment will be described with reference to Figures 10 to 12. In the first modification, an example of how to deal with the problem that the height of the plasma sheath above the ring assembly 112 tends to be lower than the height of the plasma sheath above the substrate W by providing the impedance adjustment electrode 50 and the impedance adjustment mechanism 51 is shown. Note that it is also possible to supply bias power to the ring assembly 112 from a power source different from the first bias RF generation unit 31b and the second bias RF generation unit 31c for the impedance adjustment electrode 50, but this would make the edge ring more susceptible to wear.

[0056] In Modification 1, the initial thickness of the edge ring of the ring assembly 112 is made thicker than that of the first embodiment. For example, assuming a state in which the impedance adjustment mechanism 51 is not provided, the initial thickness of the edge ring is set so that the height of the plasma sheath above the ring assembly 112 is higher than the height of the plasma sheath above the substrate W. In other words, the initial thickness of the edge ring is set so that an outer tilt occurs when the impedance adjustment mechanism 51 is not provided. In Modification 1, in the initial state, the impedance adjustment mechanism 51 is set to a low impedance (large capacitance C), so that the height of the plasma sheath above the ring assembly 112 and the height of the plasma sheath above the substrate W are approximately the same. In other words, in the initial state, the tilt angle at the peripheral edge of the substrate W is set to a vertical state. Thereafter, the impedance adjustment mechanism 51 is adjusted to a high impedance (small capacitance C) side depending on the wear amount of the edge ring, so that the height of the plasma sheath above the ring assembly 112 and the height of the plasma sheath above the substrate W are approximately the same. That is, the tilt angle is corrected by adjusting the impedance adjustment mechanism 51 to the high impedance side (small capacitance C) according to the amount of wear of the edge ring.

[0057] Here, the relationship between the wear of the edge ring over time and bias power will be described using FIGS. 10 and 11. FIG. 10 is a diagram showing an example of the wear of the edge ring in a reference example. The reference example in FIG. 10 is a case where the edge ring is not provided with an impedance adjustment mechanism 51. Graph 80 shown in FIG. 10 shows the relationship between the bias power supplied to the edge ring and the usage time in the reference example. Furthermore, area 80a of graph 80 represents the cumulative wear of the edge ring relative to the usage time. As shown in graph 80, in the reference example, a constant bias power (represented as 100% in FIG. 10) is supplied to the edge ring regardless of the usage time, so the wear of the edge ring is also constant regardless of the usage time.

[0058] FIG. 11 illustrates an example of edge ring wear in Modification 1. Modification 1 in FIG. 11 illustrates a case in which the impedance adjustment mechanism 51 is adjusted in stages from low impedance to high impedance in accordance with the wear of the edge ring (in accordance with the usage time). A graph 81 in FIG. 11 illustrates the relationship between the bias power supplied to the edge ring and usage time in Modification 1. The bias power includes LF1 power and LF2 power. An area 81a in graph 81 illustrates the cumulative wear of the edge ring relative to usage time. As shown in graph 81, in Modification 1, when the wear of the edge ring is low, the impedance adjustment mechanism 51 is adjusted to a low impedance so that the bias power supplied to the edge ring is reduced. In Modification 1, the impedance adjustment mechanism 51 is then adjusted in stages to a high impedance in accordance with the wear of the edge ring. Comparing the area 80a of the reference example and the area 81a of Modification 1, the area 81a is smaller, and Modification 1 can extend the life of the edge ring of the ring assembly 112.

[0059] FIG. 12 is a diagram showing an example of the relationship between the sheath potential and the capacitance of the variable capacitor in Modification 1. As shown in graph 82 in FIG. 12, when the impedance adjustment mechanism 51 of Modification 1 has a low impedance, for example, a capacitance C of 2000 pF, the sheath potential above the edge ring of the ring assembly 112 is smaller than the sheath potential above the substrate W. Note that graph 82 shows the absolute value of the sheath potential normalized within a predetermined range. That is, the distance between the upper surface of the edge ring of the ring assembly 112 and the plasma sheath is smaller than the distance between the upper surface of the substrate W and the plasma sheath. Since the upper surface of the edge ring of the ring assembly 112 in Modification 1 is initially higher than the upper surface of the substrate W, the difference in the distance between the substrate W and the plasma sheath is compensated for by the thickness of the edge ring of the ring assembly 112. That is, taking into account the thickness of the edge ring of the ring assembly 112, the height of the plasma sheath above the ring assembly 112 and the height of the plasma sheath above the substrate W are adjusted to be approximately the same. Thereafter, the impedance adjustment mechanism 51 is adjusted to the high impedance side (smaller capacitance C) according to the amount of wear of the edge ring of the ring assembly 112. In other words, according to the amount of wear of the edge ring of the ring assembly 112, the height of the plasma sheath above the ring assembly 112 and the height of the plasma sheath above the substrate W are adjusted to be approximately the same.

[0060] (Variation 2) Next, a second modification of the first embodiment will be described with reference to Figures 13 and 14. In the second modification, an example of how to deal with the bias in etching rate caused by the layout of the conductive bars connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51 will be described.

[0061] First, the etching rate bias will be described using FIG. 13 . FIG. 13 is a diagram illustrating an example of the etching rate bias. FIG. 13 illustrates an example of the etching rate bias of a substrate W when an electrostatic chuck 1111 is not adjusted by the impedance adjustment mechanism 51 in a plan view. Note that in FIG. 13 , differences in etching rate are represented by different hatching. As shown in FIG. 13 , a lead-in electrode 35a connected to the second bias electrode 35, an impedance adjustment mechanism 51, and an arc-shaped conductive bar 55 connected to the impedance adjustment mechanism 51 are disposed below the substrate support surface 111a. The lead-in electrode 35a forms part of the electrical path 38 and is connected to the first bias RF generator 31b and the second bias RF generator 31c. The conductive bar 55 is disposed from the connection portion with the impedance adjustment mechanism 51 along the inner periphery of the ring assembly 112 and is connected to the impedance adjustment electrode 50 near the lead-in electrode 35a. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111 and is grounded. As shown in Fig. 13, the etching rate of the substrate W is biased in the 9 o'clock to 12 o'clock direction in plan view where the impedance adjustment mechanism 51 and the conductive bar 55 are located.

[0062] 14 is a diagram showing an example of the arrangement of conductive bars in Modification 2. In an electrostatic chuck 1111c of Modification 2 shown in FIG. 14, a pull-in electrode 35a, an impedance adjustment mechanism 51, and an arc-shaped conductive bar 56 are arranged in a lower portion from the peripheral edge of the central region 111c to the ring assembly 112 (annular region 111b). The pull-in electrode 35a connected to the second bias electrode 35 constitutes part of the electrical path 38 and is connected to the first bias RF generator 31b and the second bias RF generator 31c. The conductive bar 56 connected to the impedance adjustment mechanism 51 is arranged along approximately the entire circumference from a first connection portion 56a with the impedance adjustment mechanism 51 along the inner periphery of the ring assembly 112. The conductive bar 56 is connected to the impedance adjustment electrode 50 at a second connection portion 56b with the impedance adjustment electrode 50 near the pull-in electrode 35a. That is, the conductive bar 56 is disposed along the inner circumferential side of the annular region 111b (second region) and has a first connection portion 56a with the impedance adjustment mechanism 51 and a second connection portion 56b with the impedance adjustment electrode 50. The first connection portion 56a and the second connection portion 56b of the conductive bar 56 are adjacent to each other in the circumferential direction, with a gap 56c interposed between them, which is an unconnected portion in the circumferential direction. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111c and is grounded. Because a current flows in the conductive bar 56 in the direction of the arrow 56d, it is possible to suppress deviations in the etching rate of the substrate W in the circumferential direction, which are caused by a magnetic field generated by the current.

[0063] (Variation 3) Next, a third modification of the first embodiment will be described with reference to Fig. 15. Similar to the second modification, the third modification shows an example of how to deal with the bias in etching rate caused by the layout of the conductive bars connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0064] FIG. 15 is a diagram showing an example of the arrangement of conductive bars in Modification 3. In an electrostatic chuck 1111d of Modification 3 shown in FIG. 15, a plurality of pull-in electrodes 35b connected to the second bias electrode 35 and an impedance adjustment mechanism 51a are arranged in the lower part of the central region 111d. Also arranged in the lower part of the central region 111d are a circular-arc-shaped first conductive bar 57 connected to the impedance adjustment mechanism 51a and a plurality of second conductive bars 58 arranged from the first conductive bar 57 toward the center of the central region 111d. Each of the second conductive bars 58 has a first connection portion 58a connected to the impedance adjustment mechanism 51a. The other end of the impedance adjustment mechanism 51a is electrically connected to the outside of the electrostatic chuck 1111d and is grounded.

[0065] The lead-in electrode 35b forms part of the electrical path 38 and is connected to the first bias RF generator 31b and the second bias RF generator 31c. The first conductive bar 57 is arranged around the entire circumference along the inner periphery of the ring assembly 112. The first conductive bar 57 has a plurality of second connection portions 57b connected to the impedance adjustment electrode 50 at connection portions 57a with the plurality of second conductive bars 58, respectively. Note that the impedance adjustment electrode 50 may be, for example, a plurality of impedance adjustment electrodes divided in the circumferential direction, in which case each of the plurality of impedance adjustment electrodes is connected to the second connection portion 57b.

[0066] In other words, the electrostatic chuck 1111d has a first conductive bar 57 arranged in the circumferential direction along the inner periphery of the annular region 111b (second region), and a plurality of second conductive bars 58 arranged from the first conductive bar 57 toward the center of the base 1110 of the substrate support 11. Each of the second conductive bars 58 has a first connection portion 58a connected to the impedance adjustment mechanism 51a. The first conductive bar 57 has a plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 at the connection portions 57a with the second conductive bars 58. In this manner, the first conductive bar 57 and the plurality of second conductive bars 58 have paths through which the plurality of pull-in electrodes 35b connected to the impedance adjustment electrodes 50 are evenly arranged with respect to the impedance adjustment mechanism 51a arranged in the center of the central region 111d. This allows the first conductive bar 57 and the plurality of second conductive bars 58 to suppress unevenness in the etching rate of the substrate W in the circumferential direction.

[0067] (Variation 4) Next, a fourth modification of the first embodiment will be described with reference to Fig. 16. Similar to the second modification, the fourth modification shows an example of how to deal with the bias in etching rate caused by the layout of the conductive bars connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0068] FIG. 16 is a diagram showing an example of the arrangement of the conductive bar in Modification 4. In Modification 4 shown in FIG. 16, a conductive bar 59 is arranged below the base 1110 of the main body 111. The conductive bar 59 is arranged along the ring assembly 112, i.e., the annular region 111b (second region), so as to have multiple turns. That is, the diameter of the conductive bar 59 can be, for example, equal to or smaller than the diameter of the electrostatic chuck 1111 and equal to or larger than half the diameter of the central region 111a. One end of the conductive bar 59 is connected to the impedance adjustment electrode 50, and the other end is connected to the impedance adjustment mechanism 51. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded. In this way, a current flows through the conductive bar 59 in a coil shape along the ring assembly 112, thereby suppressing unevenness in the etching rate of the substrate W in the circumferential direction.

[0069] In addition, in the fourth modification, similarly to the first embodiment, the LF1 power and the LF2 power supplied from the first bias RF generation unit 31b and the second bias RF generation unit 31c are supplied to the first bias electrode 34 and the second bias electrode 35 via the electrical path 38. That is, the LF1 power and the LF2 power are supplied to the first bias electrode 34 and the second bias electrode 35 via the electrical path 38 formed by the base 1110 and the conductors 36b, 37b.

[0070] (Variation 5) Next, a fifth modification of the first embodiment will be described with reference to Fig. 17. The fifth modification shows an example of how to deal with bias in etching rate due to the layout of the conductive bars connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51, and power loss due to spatial propagation of RF power from the base 1110 to the conductive bars.

[0071] FIG. 17 is a diagram showing an example of the arrangement of the conductive bar in Modification 5. In Modification 5 shown in FIG. 17, similar to Modification 4, a conductive bar 56e is arranged below the base 1110 of the main body 111. The conductive bar 56e is arranged along the ring assembly 112, i.e., the annular region 111b (second region). That is, the diameter of the conductive bar 56e can be, for example, equal to or smaller than the diameter of the electrostatic chuck 1111 and equal to or larger than half the diameter of the central region 111a. One end 56g of the conductive bar 56e is connected to the impedance adjustment electrode 50, and the other end 56f is connected to the impedance adjustment mechanism 51. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and is grounded.

[0072] The conductive bar 56e has a shape similar to that of the conductive bar 56 of Modification 2, and the ends 56g and 56f are adjacent to each other in the circumferential direction via a gap 56h, which is an unconnected portion between the ends 56g and 56f in the circumferential direction. The conductive bar 56e functions as a split ring resonator. For example, when the impedance adjustment mechanism 51 adjusts the LF1 power, the split ring resonator is configured to have a resonant frequency that resonates with the LF2 power. That is, the resonant frequency of the split ring resonator is the frequency of the second bias RF signal. Note that the resonant frequency of the split ring resonator may also be the frequency of the RF signal (RF power) for plasma generation. In this way, by using the conductive bar 56e as a split ring resonator, spatial propagation 83 of RF power from a HOT portion, such as the base 1110, to the conductive bar 56e can be suppressed, thereby suppressing power loss of the RF power. Furthermore, since the conductive bar 56e allows current to flow circumferentially along the ring assembly 112, it is possible to suppress deviation in the etching rate of the substrate W in the circumferential direction.

[0073] (Variation 6) Next, a sixth modification of the first embodiment will be described with reference to Fig. 18. The sixth modification is a case in which the power of the electrical bias output from the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a is controlled. Fig. 18 shows the first bias RF generation unit 31b and the second bias RF generation unit 31c as an example.

[0074] Fig. 18 is a diagram showing an example of the configuration of an electrical path in Modification 6. As shown in Fig. 18, in the plasma processing apparatus 1 of Modification 6, a measurement unit 46 is provided in the electrical path 38 between the first bias RF generation unit 31b and the second bias RF generation unit 31c and the base 1110. In addition, in the plasma processing apparatus 1 of Modification 6, a high-voltage probe 47 may be provided between the base 1110 and the ground (earth, ground).

[0075] The measuring unit 46 is, for example, a VI probe, and is controlled to measure the voltage and current of the bias RF signal and / or bias DC signal output from the first bias RF generating unit 31b, the second bias RF generating unit 31c, and / or the bias DC generating unit 32a. That is, the measuring unit 46 is controlled to measure the power of the bias RF signal and / or the bias DC signal. The measuring unit 46 outputs the measured voltage and current to the control unit 2. That is, the measuring unit 46 is configured to measure the voltage and current of the bias RF signal and / or the bias DC signal output from the bias power supply.

[0076] The high-voltage probe 47 is controlled to measure the potential (Vpp) of the base 1110. Note that, for example, by measuring in advance the relationship between the voltage of the bias RF signal and / or bias DC signal measured by the measurement unit 46 and the potential (Vpp) of the base 1110 measured by the high-voltage probe 47, the high-voltage probe 47 may be removed during process execution. In this case, the control unit 2 can estimate the potential (Vpp) of the base 1110 based on the relationship between the voltage of the bias RF signal and / or bias DC signal measured in advance by the measurement unit 46 and the potential (Vpp) of the base 1110 measured in advance.

[0077] In the sixth modification, when the impedance adjustment mechanism 51 is adjusted, the control unit 2 controls the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a based on the voltage and current input from the measurement unit 46. That is, the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a control (feedback control) the power of the bias RF signal and / or the bias DC signal based on the voltage and current measured by the measurement unit 46 so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. Here, the preset value is, for example, a value when the potential (Vpp) of the base 1110 measured by the high-voltage probe 47 becomes a desired potential. Note that, in the sixth modification, the potentials of the first bias electrode 34 and the second bias electrode 35 can be considered to be substantially equal to the potential (Vpp) of the base 1110 and the potential (Vdc) of the substrate W and the ring assembly 112.

[0078] That is, the plasma processing apparatus 1 further includes a measurement unit 46 configured to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply (first bias RF generation unit 31b) and the second bias power supply (second bias RF generation unit 31c). The bias power supply is configured to control the power of the bias RF signal based on the voltage and current measured by the measurement unit 46 when the impedance adjustment mechanism 51 is adjusted, so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. The plasma processing apparatus 1 also includes a measurement unit 46 configured to measure the voltage and current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply (bias DC generation unit 32a). The bias power supply is configured to control the power of the bias DC signal based on the voltage and current measured by the measurement unit 46 when the impedance adjustment mechanism 51 is adjusted, so that the power supplied to the first bias electrode 34 and the second bias electrode 35 becomes preset values.

[0079] (Second embodiment) In the above-described first embodiment, the second bias electrode 35 is always connected to the base 1110, but a switch may be provided to switch on / off depending on the frequency of the bias RF signal, and this embodiment will be described as the second embodiment. Note that the plasma processing apparatus in the second embodiment is the same as that of the above-described first embodiment except for the switch provided on the conductor 37b that connects the base 1110 and the second bias electrode 35, and therefore a description of the overlapping configuration and operation will be omitted.

[0080] Fig. 19 is a diagram showing an example of the configuration of a plasma processing apparatus according to the second embodiment. As shown in Fig. 19, in the plasma processing apparatus 1a according to the second embodiment, a switch 37c is provided in the conductor 37b according to the first embodiment.

[0081] The switch 37c is provided on the conductor 37b that connects between the base 1110 and the second bias electrode 35. The switch 37c is provided, for example, on the conductor 37b, between the connection portion with the base 1110 and the opening of the through-hole 37a. The switch 37c is controlled to be turned on when LF1 power is supplied, and the LF1 power is supplied to the second bias electrode 35. On the other hand, the switch 37c is controlled to be turned off when LF2 power is supplied, and the LF2 power is not supplied to the second bias electrode 35. In other words, the LF1 power is supplied to the first bias electrode 34 and the second bias electrode 35, and the LF2 power is supplied to the first bias electrode 34 but not to the second bias electrode 35.

[0082] FIG. 20 is a diagram showing an example of independent controllability on the edge ring side in the second embodiment. Table 90 shown in FIG. 20 summarizes the controllability of the sheath potential (represented by "Vdc" in Table 90) when the switch 37c is turned on / off when LF2 power of 12.88 MHz and 20 W is supplied. Note that Table 90 considers a case in which the impedance adjustment electrode 50 includes an inner circumferential side adjustment electrode 50A and an outer circumferential side adjustment electrode 50B, as shown in the connection example. Furthermore, a switch 51b is provided between the adjustment electrode 50A and the impedance adjustment mechanism 51. Note that in Table 90, the adjustment electrodes 50A and 50B are referred to as adjustment electrodes A and B, respectively, and the second bias electrode 35 is referred to as the ER bias electrode. Note that in Table 90, the adjustment electrode 50B is not provided with a switch, and therefore the adjustment electrode 50B is connected to the impedance adjustment mechanism 51 (represented by "Short" in Table 90). In addition, in table 90, the first bias electrode 34 and the second bias electrode 35 are at the same potential.

[0083] In Table 90, graph 91 shows the sheath potential (Vdc) when switch 37c and switch 51b are both on (represented by "Short" for adjustment electrode A and ER bias electrode in Table 90). In graph 91, graph 92 shows the sheath potential above the substrate W, and graph 93 shows the sheath potential above the edge ring of ring assembly 112. Comparing graphs 92 and 93, it can be seen that the shapes of the graphs are similar, and that the sheath potential above the substrate W also fluctuates in accordance with fluctuations in the sheath potential above the edge ring of ring assembly 112. This is thought to be because the impedance between the second bias electrode 35 and adjustment electrodes 50A and 50B is extremely small with the LF2 power of 12.88 MHz. That is, with LF2 power, even if the capacitance C of the impedance adjustment mechanism 51 is changed to adjust the sheath potential above the edge ring of the ring assembly 112, it is found that there is no independent control over the sheath potential above the substrate W. When the switches 37c and 51b are both on and LF1 power (400 kHz) is supplied, the impedance between the second bias electrode 35 and the adjustment electrodes 50A and 50B is high. Therefore, when LF1 power is supplied, the sheath potential above the edge ring of the ring assembly 112 can be independently controlled. The impedance adjustment mechanism 51 of the second embodiment only needs to include a variable capacitor. For example, as in the first embodiment, the first variable capacitor 52 and the isolator 54 may be connected in series, and the second variable capacitor 53 may be connected in parallel. The impedance adjustment mechanism 51 of the second embodiment may be a variable capacitor alone, or a combination circuit of a variable capacitor with a resistor, an inductor, or the like.

[0084] In Table 90, graph 94 shows the sheath potential (Vdc) when switch 37c and switch 51b are both off (indicated by "Open" for the adjustment electrode A and the ER bias electrode in Table 90). In graph 94, graph 95 shows the sheath potential above the substrate W, and graph 96 shows the sheath potential above the edge ring of ring assembly 112. Comparing graphs 95 and 96, the slope of graph 95 is different from the slope of graph 96, indicating that the sheath potential above the edge ring of ring assembly 112 can be controlled independently of the sheath potential above the substrate W. Note that even when switch 51b is on, the sheath potential above the edge ring of ring assembly 112 can be controlled independently of the sheath potential above the substrate W. Furthermore, when the switch 37c and the switch 51b are both off and LF1 power (400 kHz) is supplied, the second bias electrode 35 on the ring assembly 112 side is floated, so the power is supplied from the base 1110. Therefore, the impedance between the base 1110 and the adjustment electrodes 50A and 50B is high. For this reason, it is considered possible to independently control the sheath potential above the edge ring of the ring assembly 112 even when LF1 power is supplied.

[0085] In this way, in the plasma processing apparatus 1a of the second embodiment, when the first bias RF signal (LF1 power) is supplied, the switch 37c is controlled to be on, and when the second bias RF signal (LF2 power) is supplied, the switch 37c is controlled to be off, thereby improving the controllability over a plurality of bias RF signals with different frequencies.

[0086] The above-described embodiments and modifications can be combined as appropriate within the scope of not causing any contradiction. For example, the first embodiment and the second embodiment can be combined, or the second embodiment can be combined with modifications 1 to 6 of the first embodiment.

[0087] As described above, according to the first embodiment, the plasma processing apparatus 1 includes a chamber (plasma processing chamber 10), a first bias power supply (first bias RF generator 31b) configured to supply a first bias signal, a second bias power supply (second bias RF generator 31c) configured to supply a second bias signal, a substrate support (substrate support 11) that supports a substrate W and an edge ring (ring assembly 112) in the chamber, an impedance adjustment mechanism 51, and an electrical path 38. The substrate support is configured to have a first region (central region 111a) that supports the substrate W, a second region (annular region 111b) that is provided around the first region and supports the edge ring, a first bias electrode 34 provided in the first region, a second bias electrode 35 provided in the second region, and an impedance adjustment electrode 50 that is provided in the second region and is grounded. The impedance adjustment mechanism 51 includes a first impedance adjustment mechanism (first variable capacitor 52) that controls the first bias signal, an isolator 54 that is connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism and blocks the second bias signal, and a second impedance adjustment mechanism (second variable capacitor 53) that controls the second bias signal, and is configured so that the isolator 54, the first impedance adjustment mechanism, and the second impedance adjustment mechanism are connected in parallel to the impedance adjustment electrode 50. The electrical path 38 is configured to connect the first bias power supply and the second bias power supply to the first bias electrode 34 and the second bias electrode 35. As a result, controllability over a plurality of bias signals with different frequencies (e.g., bias RF signals) can be improved.

[0088] Furthermore, according to the second embodiment, the electrical path 38 includes a switch 37c provided between the first and second bias power supplies and the second bias electrode 35. The switch 37c is controlled to be on when the first bias signal is supplied, and is controlled to be off when the second bias signal is supplied. As a result, the sheath potential above the edge ring of the ring assembly 112 can be controlled independently of the sheath potential above the substrate W.

[0089] According to each embodiment, the first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. The second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor. As a result, the potential of the impedance adjustment electrode can be adjusted.

[0090] Furthermore, according to the first embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal, the first impedance adjustment mechanism is constituted by the first variable capacitor 52, and the second impedance adjustment mechanism is constituted by the second variable capacitor 53. The variable range of the capacitance of the first variable capacitor 52 is larger than the variable range of the capacitance of the second variable capacitor 53. As a result, the controllability of the sheath potential on the ring assembly 112 side can be improved for both the first bias signal and the second bias signal.

[0091] Furthermore, according to the first embodiment, the isolator 54 includes a resonant circuit whose resonant frequency is the frequency of the second bias signal. As a result, the second bias signal can be blocked from the first variable capacitor 52.

[0092] According to the second embodiment, the plasma processing apparatus 1a includes a chamber (plasma processing chamber 10), a first bias power supply (first bias RF generator 31b) configured to supply a first bias signal, a second bias power supply (second bias RF generator 31c) configured to supply a second bias signal, a substrate support (substrate support 11) that supports a substrate W and an edge ring (ring assembly 112) in the chamber, an impedance adjustment mechanism 51, and an electrical path 38. The substrate support includes a first region (central region 111a) that supports the substrate W, a second region (annular region 111b) that is provided around the first region and supports the edge ring, a first bias electrode 34 provided in the first region, a second bias electrode 35 provided in the second region, and an impedance adjustment electrode 50 that is provided in the second region and is grounded. The impedance adjustment mechanism 51 is configured to be connected to the impedance adjustment electrode 50. The electrical path 38 is configured to connect the first and second bias power supplies to the first and second bias electrodes 34 and 35, and a switch 37c is provided between the first and second bias power supplies and the second bias electrode 35. The switch 37c is controlled to be on when a first bias signal is supplied, and is controlled to be off when a second bias signal is supplied. As a result, the sheath potential above the edge ring of the ring assembly 112 can be controlled independently of the sheath potential above the substrate W.

[0093] Furthermore, according to the first embodiment, the impedance adjustment mechanism 51 includes a first impedance adjustment mechanism (first variable capacitor 52) that controls the first bias signal, an isolator 54 that is connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism and blocks the second bias signal, and a second impedance adjustment mechanism (second variable capacitor 53) that controls the second bias signal, and the isolator 54, the first impedance adjustment mechanism, and the second impedance adjustment mechanism are connected in parallel. As a result, it is possible to improve the controllability for a plurality of bias signals (e.g., bias RF signals) with different frequencies.

[0094] Furthermore, according to each embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal, which improves the controllability of the potential at the frequencies of both the first bias signal and the second bias signal (e.g., the first bias RF signal and the second bias RF signal).

[0095] Furthermore, according to the first embodiment and Modification 1, the impedance adjustment mechanism 51 adjusts the impedance from low to high in response to an increase in the amount of wear of the edge ring. As a result, it is possible to improve the controllability of a plurality of bias signals (e.g., bias RF signals) with different frequencies and extend the life of the edge ring.

[0096] Furthermore, according to the second modification, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via a conductive bar 56. The conductive bar 56 is disposed along the inner circumferential side of the second region and has a first connection portion 56a with the impedance adjustment mechanism 51 and a second connection portion 56b with the impedance adjustment electrode 50, with the first connection portion 56a and the second connection portion 56b being adjacent to each other in the circumferential direction via an unconnected portion (gap 56c) between the first connection portion 56a and the second connection portion 56b in the circumferential direction. As a result, it is possible to suppress bias in the etching rate of the substrate W in the circumferential direction.

[0097] Furthermore, according to the fifth modification, the conductive bar 56e is disposed below the base 1110 of the substrate support and acts as a split ring resonator. As a result, it is possible to suppress power loss of RF power (and / or pulsed DC power) and also to suppress deviation in the etching rate of the substrate W in the circumferential direction.

[0098] Furthermore, according to the fifth modification, the resonant frequency of the split ring resonator is the frequency of the second bias signal, which makes it possible to suppress spatial propagation of RF power (and / or pulsed DC power) to the conductive bar 56e.

[0099] Furthermore, according to Modification 3, the impedance adjustment mechanism 51a is connected to the plurality of impedance adjustment electrodes 50 via conductive bars (first conductive bar 57, second conductive bar 58). The conductive bars include a first conductive bar 57 arranged in the circumferential direction along the inner periphery of the second region, and a plurality of second conductive bars 58 arranged from the first conductive bar 57 toward the center of the base 1110 of the substrate support. The plurality of second conductive bars 58 each have a first connection portion 58a connected to the impedance adjustment mechanism 51a. The first conductive bar 57 has a plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 at the connection portions 57a with the plurality of second conductive bars 58, respectively. As a result, it is possible to suppress bias in the etching rate of the substrate W in the circumferential direction.

[0100] Furthermore, according to the fourth modification, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via the conductive bar 59, and the conductive bar 59 is arranged along the second region so as to have multiple turns. As a result, it is possible to suppress deviations in the etching rate of the substrate W in the circumferential direction.

[0101] Moreover, according to the sixth modification, the plasma processing apparatus 1 further includes a measurement unit 46 configured to measure the voltage and current of a bias RF signal output from at least one of the first bias power supply (first bias RF generation unit 31b) and the second bias power supply (second bias RF generation unit 31c). The bias power supply is configured to control the power of the bias RF signal based on the voltage and current measured by the measurement unit 46 when the impedance adjustment mechanism 51 is adjusted so that the potentials of the first bias electrode 34 and the second bias electrode 35 become preset values. As a result, by controlling the bias RF power, it is possible to suppress changes in the etching rate when the value of VC is changed.

[0102] According to the sixth modification, the plasma processing apparatus 1 further includes a measurement unit 46 configured to measure the voltage and current of a bias DC signal output from at least one bias power supply (bias DC generation unit 32a) of the first bias power supply and the second bias power supply. The bias power supply is configured to control the power of the bias DC signal based on the voltage and current measured by the measurement unit 46 when the impedance adjustment mechanism 51 is adjusted so that the power supplied to the first bias electrode 34 and the second bias electrode 35 becomes a preset value. As a result, by controlling the bias DC power, it is possible to suppress changes in the etching rate when the value of VC is changed.

[0103] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive, and various omissions, substitutions, and modifications may be made in the above embodiments without departing from the scope and spirit of the appended claims.

[0104] Furthermore, in the above-described embodiments, the plasma processing apparatus 1, 1a is described as an example in which an inductively coupled plasma is used as a plasma source to perform processing such as etching on a substrate W, but the disclosed technology is not limited to this. As long as the apparatus performs processing on a substrate W using plasma, the plasma source is not limited to inductively coupled plasma, and any plasma source such as capacitively coupled plasma, microwave plasma, or magnetron plasma can be used.

[0105] The present disclosure can also be configured as follows. (1) a chamber; a first bias power supply configured to provide a first bias signal; a second bias power supply configured to provide a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; An electrical path; Equipped with The substrate support includes: a first region for supporting the substrate; a second region provided around the first region and supporting the edge ring; a first bias electrode provided in the first region; a second bias electrode provided in the second region; an impedance adjusting electrode provided in the second region and grounded; configured to have The impedance adjustment mechanism includes: a first impedance adjustment mechanism that controls the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, and blocking the second bias signal; a second impedance adjustment mechanism that controls the second bias signal; the isolator and the first impedance adjustment mechanism are connected in parallel to the second impedance adjustment mechanism, and are connected to the impedance adjustment electrode; the electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode; Plasma processing equipment. (2) the electrical path includes a switch provided between the first bias power supply and the second bias power supply and the second bias electrode, the switch being controlled to be on when the first bias signal is supplied, and the switch being controlled to be off when the second bias signal is supplied; The plasma processing apparatus according to (1) above. (3) the first impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; the second impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; The plasma processing apparatus according to (1) or (2) above. (4) the frequency of the first bias signal is lower than the frequency of the second bias signal; the first impedance adjustment mechanism is constituted by a first variable capacitor; the second impedance adjustment mechanism is configured by a second variable capacitor, The variable range of the capacitance of the first variable capacitor is larger than the variable range of the capacitance of the second variable capacitor. The plasma processing apparatus according to (3) above. (5) the isolator includes a resonant circuit whose resonant frequency is the frequency of the second bias signal. The plasma processing apparatus according to any one of (1) to (4) above. (6) a chamber; a first bias power supply configured to provide a first bias signal; a second bias power supply configured to provide a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; An electrical path; Equipped with The substrate support includes: a first region for supporting the substrate; a second region provided around the first region and supporting the edge ring; a first bias electrode provided in the first region; a second bias electrode provided in the second region; an impedance adjusting electrode provided in the second region and grounded; configured to have the impedance adjustment mechanism is configured to be connected to the impedance adjustment electrode; the electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode, and a switch is provided between the first bias power supply and the second bias power supply and the second bias electrode, and the switch is controlled to be turned on when the first bias signal is supplied, and controlled to be turned off when the second bias signal is supplied; Plasma processing equipment. (7) The impedance adjustment mechanism includes: a first impedance adjustment mechanism that controls the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, and blocking the second bias signal; a second impedance adjustment mechanism that controls the second bias signal; the isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism. The plasma processing apparatus according to (6) above. (8) the first impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; the second impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; The plasma processing apparatus according to (7) above. (9) The frequency of the first bias signal is lower than the frequency of the second bias signal. The plasma processing apparatus according to any one of (1) to (8) above. (10) the impedance adjustment mechanism adjusts the impedance from low to high in response to an increase in the amount of wear of the edge ring; The plasma processing apparatus according to any one of (1) to (9) above. (11) the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar; the conductive bar is arranged along the inner circumferential side of the second region, and has a first connection portion with the impedance adjustment mechanism and a second connection portion with the impedance adjustment electrode, and the first connection portion and the second connection portion are adjacent to each other in the circumferential direction via an unconnected portion between the first connection portion and the second connection portion in the circumferential direction. The plasma processing apparatus according to any one of (1) to (10) above. (12) the conductive bar is disposed below a base of the substrate support and acts as a split ring resonator; The plasma processing apparatus according to (11) above. (13) the resonant frequency of the split ring resonator is the frequency of the second bias signal; The plasma processing apparatus according to (12) above. (14) the impedance adjustment mechanism is connected to the plurality of impedance adjustment electrodes via a conductive bar; the conductive bars include a first conductive bar arranged in a circumferential direction along an inner circumferential side of the second region, and a plurality of second conductive bars arranged from the first conductive bar toward a center of a base of the substrate support, each of the second conductive bars has a first connection portion connected to the impedance adjustment mechanism; the first conductive bar has a plurality of second connection portions connected to the plurality of impedance adjustment electrodes at connection portions with the plurality of second conductive bars, respectively; The plasma processing apparatus according to any one of (1) to (10) above. (15) the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar; the conductive bar is disposed along the second region so as to have a plurality of turns; The plasma processing apparatus according to any one of (1) to (10) above. (16) a measurement unit configured to measure a voltage and a current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply, the bias power supply is configured to control the power of the bias RF signal based on the voltage and the current measured by the measurement unit when the impedance adjustment mechanism is adjusted so that the potentials of the first bias electrode and the second bias electrode become preset set values. The plasma processing apparatus according to any one of (1) to (15) above. (17) a measurement unit configured to measure a voltage and a current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply; the bias power supply is configured to control the power of the bias DC signal based on the voltage and the current measured by the measurement unit when the impedance adjustment mechanism is adjusted so that the power supplied to the first bias electrode and the second bias electrode becomes a preset set value. The plasma processing apparatus according to any one of (1) to (15) above. [Explanation of symbols]

[0106] 1, 1a Plasma processing device 10 Plasma Processing Chamber 11 Substrate support 31a 31b First bias RF generation unit 31c Second bias RF generator 34 First bias electrode 35 Second bias electrode 37c switch 38 Electrical Path 50 Impedance Adjusting Electrode 51,51a Impedance adjustment mechanism 52 First variable capacitor (first impedance adjustment mechanism) 53 Second variable capacitor (second impedance adjustment mechanism) 54 Isolator 56, 56e, 59 Conductive bar 56a, 58a First connection part 56b, 57b Second connection part 56c Gap 57 First conductive bar 57a Connection 58 Second conductive bar 112 Ring Assembly 111a,111c,111d central area 111b Annular region 1110 Foundation 1111, 1111c, 1111d Electrostatic chuck W substrate

Claims

1. a chamber; a first bias power supply configured to provide a first bias signal; a second bias power supply configured to provide a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; An electrical path; Equipped with The substrate support includes: a first region for supporting the substrate; a second region provided around the first region and supporting the edge ring; a first bias electrode provided in the first region; a second bias electrode provided in the second region; an impedance adjusting electrode provided in the second region and grounded; configured to have The impedance adjustment mechanism includes: a first impedance adjustment mechanism that controls the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, and blocking the second bias signal; a second impedance adjustment mechanism that controls the second bias signal; the isolator and the first impedance adjustment mechanism are connected in parallel to the second impedance adjustment mechanism, and are connected to the impedance adjustment electrode; the electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode; Plasma processing equipment.

2. the electrical path includes a switch provided between the first bias power supply and the second bias power supply and the second bias electrode, the switch being controlled to be on when the first bias signal is supplied, and the switch being controlled to be off when the second bias signal is supplied; The plasma processing apparatus according to claim 1 .

3. the first impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; the second impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; 3. The plasma processing apparatus according to claim 1 or 2.

4. the frequency of the first bias signal is lower than the frequency of the second bias signal; the first impedance adjustment mechanism is constituted by a first variable capacitor, the second impedance adjustment mechanism is configured by a second variable capacitor, The variable range of the capacitance of the first variable capacitor is larger than the variable range of the capacitance of the second variable capacitor. The plasma processing apparatus according to claim 3 .

5. the isolator includes a resonant circuit whose resonant frequency is the frequency of the second bias signal. The plasma processing apparatus according to claim 1 .

6. a chamber; a first bias power supply configured to provide a first bias signal; a second bias power supply configured to provide a second bias signal; a substrate support for supporting a substrate and an edge ring within the chamber; an impedance adjustment mechanism; An electrical path; Equipped with The substrate support includes: a first region for supporting the substrate; a second region provided around the first region and supporting the edge ring; a first bias electrode provided in the first region; a second bias electrode provided in the second region; an impedance adjusting electrode provided in the second region and grounded; configured to have the impedance adjustment mechanism is configured to be connected to the impedance adjustment electrode; the electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode, and a switch is provided between the first bias power supply and the second bias power supply and the second bias electrode, and the switch is controlled to be turned on when the first bias signal is supplied, and controlled to be turned off when the second bias signal is supplied; Plasma processing equipment.

7. The impedance adjustment mechanism includes: a first impedance adjustment mechanism that controls the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, and blocking the second bias signal; a second impedance adjustment mechanism that controls the second bias signal; the isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism. The plasma processing apparatus according to claim 6 .

8. the first impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; the second impedance adjustment mechanism is configured by at least one of a variable resistor, a variable capacitor, and a variable inductor; The plasma processing apparatus according to claim 7 .

9. The frequency of the first bias signal is lower than the frequency of the second bias signal. The plasma processing apparatus according to claim 1 or 6.

10. the impedance adjustment mechanism adjusts the impedance from low to high in response to an increase in the amount of wear of the edge ring; The plasma processing apparatus according to claim 1 or 6.

11. the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar; the conductive bar is disposed along the inner circumferential side of the second region, and has a first connection portion with the impedance adjustment mechanism and a second connection portion with the impedance adjustment electrode, and the first connection portion and the second connection portion are adjacent to each other in the circumferential direction via an unconnected portion between the first connection portion and the second connection portion in the circumferential direction. The plasma processing apparatus according to claim 1 or 6.

12. the conductive bar is disposed below a base of the substrate support and acts as a split ring resonator; The plasma processing apparatus according to claim 11 .

13. a resonant frequency of the split ring resonator is the frequency of the second bias signal; The plasma processing apparatus according to claim 12 .

14. the impedance adjustment mechanism is connected to the plurality of impedance adjustment electrodes via a conductive bar; the conductive bars include a first conductive bar arranged in a circumferential direction along an inner circumferential side of the second region, and a plurality of second conductive bars arranged from the first conductive bar toward a center of a base of the substrate support, each of the second conductive bars has a first connection portion connected to the impedance adjustment mechanism; the first conductive bar has a plurality of second connection portions connected to the plurality of impedance adjustment electrodes at connection portions with the plurality of second conductive bars, respectively; The plasma processing apparatus according to claim 1 or 6.

15. the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive bar; the conductive bar is disposed along the second region so as to have a plurality of turns; The plasma processing apparatus according to claim 1 or 6.

16. a measurement unit configured to measure a voltage and a current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply; the bias power supply is configured to control the power of the bias RF signal based on the voltage and the current measured by the measurement unit when the impedance adjustment mechanism is adjusted so that the potentials of the first bias electrode and the second bias electrode become preset set values. The plasma processing apparatus according to claim 1 or 6.

17. a measurement unit configured to measure a voltage and a current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply; the bias power supply is configured to control the power of the bias DC signal based on the voltage and the current measured by the measurement unit when the impedance adjustment mechanism is adjusted so that the power supplied to the first bias electrode and the second bias electrode becomes a preset set value. The plasma processing apparatus according to claim 1 or 6.

Images