Device design for transistor short circuit protection

Abstract

To provide device design for short-circuit protection of transistors.SOLUTION: A transistor semiconductor die 10 includes a first current terminal 12, a second current terminal 14, and a control terminal 16. A semiconductor structure forming a transistor device Qig is between the first current terminal, the second current terminal, and the control terminal and a resistance between the first current terminal and the second current terminal is based on a control signal provided at the control terminal. Short circuit protection circuitry 18 is coupled between the control terminal and the second current terminal. In a normal mode of operation, the short circuit protection circuitry provides a voltage drop that is greater than a voltage of the control signal. In a short circuit protection mode of operation, the short circuit protection circuitry provides a voltage drop that is less than the voltage of the control signal.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] TECHNICAL FIELD

[0001] The present disclosure relates to transistor semiconductor dies, and more particularly to transistor semiconductor dies with improved protection against short circuit events. [Background technology]

[0002]

[0002] Transistor devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), junction field-effect transistors (JFETs), and bipolar junction transistors (BJTs), are commonly used in power electronics, where they may be used to selectively source current to or from a load. In certain circumstances, the load may cause a short circuit across the transistor device. Such a short-circuit event may cause the transistor device to fail.

[0003]

[0003] In recent years, there has been a trend toward using wide-bandgap semiconductor material systems in devices used in power electronics. For example, silicon carbide transistors are now widely used in power electronics. Compared to their silicon counterparts, silicon carbide transistors offer better performance, for example, by providing higher blocking voltages, lower on-state resistance, and lower switching losses. Silicon carbide transistors are much smaller in size, resulting in higher current densities. Therefore, the short circuit withstand time of silicon carbide transistors, or the time during which the device can survive failure during a short-circuit event, is much shorter than that of similar silicon devices.

[0004] In light of the above, there is currently a need for silicon carbide transistor devices with improved short circuit protection. Summary of the Invention [Means for solving the problem]

[0005] In one embodiment, a transistor semiconductor die includes a first current terminal, a second current terminal, and a control terminal. A semiconductor structure is disposed between the first current terminal, the second current terminal, and the control terminal, and configured such that a resistance between the first current terminal and the second current terminal is based on a control signal provided at the control terminal. Short-circuit protection circuitry is coupled between the control terminal and the second current terminal. In a normal operating mode, the short-circuit protection circuitry is configured to provide a voltage drop between the control terminal and the second current terminal that is greater than a voltage of the control signal. In a short-circuit protection operating mode, the short-circuit protection circuitry is configured to provide a voltage drop between the control terminal and the second current terminal that is less than a voltage of the control signal. Thus, the short-circuit protection circuitry is configured to protect the transistor semiconductor die from failure due to a short-circuit condition without impeding operation of the transistor semiconductor die in the normal operating mode.

[0006] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects after reading the following detailed description of the preferred embodiments in connection with the accompanying drawings.

[0007] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure. [Brief explanation of the drawings]

[0007] [Figure 1]

[0008] FIG. 1 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 2]

[0009] FIG. 2 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 3]

[0010] FIG. 3 is a graph illustrating the relationship between drain-source voltage, drain-source current, and gate-source voltage of a metal-oxide-semiconductor field-effect transistor (MOSFET) according to one embodiment of the present disclosure. [Figure 4]

[0011] FIG. 4 is a cross-sectional view of a portion of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 5]

[0012] FIG. 5 is a cross-sectional view of a portion of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 6]

[0013] FIG. 6 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 7]

[0014] FIG. 7 is a cross-sectional view of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 8]

[0015] FIG. 8 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 9]

[0016] FIG. 9 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 10]

[0017] FIG. 10 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. [Figure 11]

[0018] FIG. 11 is a schematic diagram of a transistor semiconductor die according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0008]

[0019] The embodiments described below represent the information necessary to enable those skilled in the art to practice the embodiments and illustrate the best modes of practicing the embodiments. Upon reading the following description in light of the accompanying drawings, those skilled in the art will understand the concepts of the present disclosure and will recognize applications of these concepts not specifically addressed herein. It is understood that these concepts and applications are within the scope of this disclosure and the appended claims.

[0009]

[0020] As used herein, terms such as first, second, etc. may be used to describe various elements, but it should be understood that these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as the first element, without departing from the scope of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0010]

[0021] When an element such as a layer, region, or substrate is referred to as being "on" or extending "on" another element, it will be understood that it can be directly on or extending directly onto the other element, or that intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or extending "directly onto" another element, there are no intervening elements present. Similarly, when an element such as a layer, region, or substrate is referred to as being "on" or extending "above" another element, it will be understood that it is directly on or extending directly above the other element or intervening elements. In contrast, when an element is referred to as being "directly on" or extending "directly above" another element, there are no intervening elements present. When an element is referred to as being "connected" or "coupled" to another element, it will be understood that it can be directly connected or coupled to the other element, or that intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0011]

[0022] "Down" or "upper" or "upper" or "lower" or "horizontal" or " Relative terms such as "vertical" may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region as illustrated in the figures. It will be understood that these terms, and those discussed above, are intended to encompass different orientations of the device in addition to the orientation shown.

[0012]

[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. As used herein, the terms "comprises," "comprising," "including," and / or "comprising" specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0013]

[0024] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs. Terms used herein should be interpreted to have a meaning consistent with the meaning in the context of the present specification and related art, and are further understood not to be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0014]

[0025] 1 shows a schematic diagram of a transistor semiconductor die 10 according to one embodiment of the present disclosure. The transistor semiconductor die 10 includes a first current terminal 12, a second current terminal 14, and a control terminal 16. The semiconductor structure between the first current terminal 12, the second current terminal 14, and the control terminal 16 configures a transistor device Q such that the resistance between the first current terminal 12 and the second current terminal 14 is based on a control signal CNT provided at the control terminal 16. ig As shown in Figure 1, a transistor device Qig is a metal oxide semiconductor field effect transistor (MOSFET). Thus, first current terminal 12 is the drain terminal, second current terminal 14 is the source terminal, and control terminal 16 is the gate terminal. However, the principles of the present disclosure apply equally to any transistor device, such as an insulated gate bipolar transistor (IGBT). For an IGBT, first current terminal 12 is the collector terminal, second current terminal 14 is the emitter terminal, and control terminal 16 is the gate terminal. Transistor device Q ig can be used for power electronics, so that a freewheeling anti-parallel diode D is connected between the first current terminal 12 and the second current terminal 14 so that current can be conducted bidirectionally. fw But the transistor device Q ig In various embodiments, the freewheeling diode D fw is the current flowing through the transistor device Q, for example the body diode. ig or the transistor device Q ig It can be inside.

[0015]

[0026] Transistor Device Q ig Although Q is shown herein as an insulated gate device, the principles of the present disclosure apply equally to any transistor device, such as a bipolar junction transistor (BJT) and a junction field effect transistor (JFET). For a BJT, the first current terminal 12 is the collector terminal, the second current terminal 14 is the emitter terminal, and the control terminal 16 is the base terminal. For a JFET, the first current terminal 12 is the drain terminal, the second current terminal 14 is the source terminal, and the control terminal 16 is the gate terminal. Furthermore, transistor device Q ig In the case of a thyristor, the first current terminal 12 is the anode, the second current terminal 14 is the cathode, and the control terminal 16 is the gate terminal.

[0016]

[0027] The transistor semiconductor die 10 is made of a wide bandgap material system such as silicon carbide. As discussed above, silicon carbide transistor semiconductor die 10 may be more sensitive to short circuit events than its silicon counterpart due to its smaller size and higher current density. Accordingly, short circuit protection circuitry 18 is coupled between control terminal 16 and second current terminal 14. Short circuit protection circuitry 18 is configured to operate in a normal operating mode and a short circuit protection operating mode. In the normal operating mode, short circuit protection circuitry 18 is configured to provide a voltage drop between control terminal 16 and second current terminal 14 that is greater than the voltage of control signal CNT. In the short circuit protection operating mode, short circuit protection circuitry 18 is configured to provide a voltage drop between control terminal 16 and second current terminal 14 that is less than the voltage of control signal CNT. In the normal operating mode, when the voltage drop across short circuit protection circuitry 18 is greater than the voltage of control signal CNT, transistor device Q ig In the short circuit protection mode of operation, if the voltage drop across the short circuit protection circuitry 18 is less than the voltage of the control signal CNT, then the voltage between the control terminal 16 and the second current terminal 14 (i.e., the voltage across the transistor device Q ig The gate-to-source voltage of the transistor device Q is reduced, thereby reducing the voltage at the control terminal 16 so as to partially or completely shut off the device. ig The interruption of the protection circuit protects the device during a short circuit event to prevent failure.

[0017]

[0028] One way in which the above functionality may be achieved is by providing short-circuit protection circuitry 18 to have a negative temperature coefficient for the voltage drop across short-circuit protection circuitry 18. In other words, short-circuit protection circuitry 18 may be provided such that the voltage drop across short-circuit protection circuitry 18 decreases as the temperature increases. Because the temperature of transistor semiconductor die 10 increases rapidly, well above its normal operating temperature, during a short-circuit event, short-circuit protection circuitry 18 may significantly reduce the voltage drop between control terminal 16 and second current terminal 14 only if a short-circuit event occurs. Note that this functionality requires adequate thermal coupling between short-circuit protection circuitry 18 and the current-carrying portions of transistor semiconductor die 10.

[0018]

[0029] In particular, short circuit protection circuitry 18 is disposed on transistor semiconductor die 10. As described in more detail below, short circuit protection circuitry 18 occupies a minimal amount of area on transistor semiconductor die 10 and can significantly, potentially indefinitely, extend the short circuit withstand time of transistor semiconductor die 10.

[0019]

[0030] 2 is a schematic diagram of transistor semiconductor die 10 showing details of short circuit protection circuitry 18 in accordance with one embodiment of the present disclosure. As shown in FIG. 2, short circuit protection circuitry 18 includes a number of short circuit protection diodes D coupled in series between control terminal 16 and second current terminal 14. sc In particular, a short circuit protection diode D sc is coupled anode to cathode between the control terminal 16 and the second current terminal 14, resulting in a short circuit protection diode D sc The first short-circuit protection diode D sc The anode of the short circuit protection diode D sc The last short-circuit protection diode D sc The cathode of the short circuit protection diode D is coupled to the second current terminal 14. As discussed above, sc may be given a negative temperature coefficient (e.g., an exponential negative temperature coefficient) for its forward voltage drop. In other words, the short circuit protection diode Dsc A negative temperature coefficient can be provided so that the forward voltage drop across the diode decreases as the temperature increases. Such a negative temperature coefficient is naturally present in silicon carbide diodes. A negative temperature coefficient also makes short-circuit protection diodes D sc The voltage drop across the transistor device Q ig (and therefore does not interfere with the operation of the transistor device Q) is smaller than the voltage of the control signal CNT in the short circuit protection operation mode. ig (Partially or completely turning off the short-circuit protection diode D). Note that this function requires adequate thermal coupling between the short-circuit protection circuitry 18 and the current-carrying portions of the transistor semiconductor die 10. sc The number of transistors in the semiconductor die 10 is determined by the temperature of the If the temperature is lower than the threshold temperature, the short circuit protection diode D sc is selected to be equal to or greater than the voltage of control signal CNT, and when the temperature of transistor semiconductor die 10 exceeds the short circuit threshold temperature, the voltage at control terminal 16 ig short-circuit protection diode D sc may be chosen to be significantly lower than the voltage of the control signal CNT.

[0020]

[0031] Transistor device Q from short circuit event ig In addition to protecting against sc This clamps to the combined forward voltage drop of the transistor device Q ig has the added benefit of protecting the transistor device Q from electrostatic discharge (ESD). ig Provides voltage overshoot protection to the gate of the

[0021]

[0032] Short-circuit protection circuitry 18 may enable a significant improvement in the short-circuit withstand time of transistor semiconductor die 10. As discussed herein, short-circuit protection circuitry 18 may require a minimum active area on transistor semiconductor die 10. In various embodiments, the on-state resistance of transistor semiconductor die 10 is less than or equal to 0.1 mΩ / cm 2 to 3.0mΩ / cm 2 The blocking voltage of the transistor semiconductor die 10 may be between 600V and 10 kV, and the short circuit withstand time of the transistor semiconductor die 10 may be greater than 3 microseconds. In particular, the on-state resistance of the transistor semiconductor die 10 may be greater than 0.5 mΩ / cm 2 to 3.0mΩ / cm 2 Between 1.0mΩ / cm 2 to 3.0mΩ / cm 2 Between 1.5mΩ / cm 2 to 3.0mΩ / cm 2 Between 2.0mΩ / cm 2 to 3.0mΩ / cm 2 Between, 2.5mΩ / cm 2 to 3.0mΩ / cm 2 The blocking voltage of the transistor semiconductor die 10 may similarly be in any of the above ranges, such as between 600V and 1 kV, between 600V and 2 kV, between 600V and 5 kV, between 1 kV and 5 kV, between 5 kV and 10 kV, etc. The relationship between the on-state resistance and the blocking voltage of the transistor semiconductor die 10 may be expressed according to equation (1):

[0022]

number

[0023] where R on is the on-state resistance of the transistor semiconductor die, and V block is the blocking voltage of the transistor semiconductor die 10.

[0033] Although the short circuit withstand time of the transistor semiconductor die 10 may be less than 10 seconds in some embodiments, the principles of the present disclosure may also enable the transistor semiconductor die 10 to withstand a short circuit event indefinitely in some circumstances. The short circuit withstand time of the transistor semiconductor die 10 may be any of the above ranges, such as a short circuit withstand time of between 4 microseconds and 10 seconds, between 5 microseconds and 10 seconds, between 10 microseconds and 10 seconds, between 50 microseconds and 10 seconds, between 5 milliseconds and 10 seconds, between 10 milliseconds and 10 seconds, between 50 milliseconds and 10 seconds, between 1 second and 10 seconds, etc.

[0024]

[0034] Figure 3 is a graph showing the relationship between drain-source voltage, drain-source current, and gate-source voltage for a MOSFET. As shown, the relationship between drain-source voltage and drain-source current is dependent on the gate-source voltage, such that the steepness of the curve for drain-source voltage versus drain-source current increases as the gate-source voltage increases. Therefore, a higher gate-source voltage results in a higher drain-source current during a short-circuit event. If the drain-source current becomes high enough, the device will fail. By reducing the gate-source voltage during a short-circuit event, the drain-source current can be significantly reduced, preventing device failure.

[0025]

[0035] 4 is a cross-sectional view of a portion of a transistor semiconductor die 10 according to one embodiment of the present disclosure. The transistor semiconductor die 10 includes a substrate 20, a drift layer 22 on the substrate 20, multiple implants 24 in the drift layer 22, an upper metallization layer 26, and a semiconductor substrate 28. 26, and an underlying metallization layer 28. In particular, on the right side of transistor semiconductor die 10, transistor device Q is configured as a vertical MOSFET that includes a pair of junction implants 30 in drift layer 22 such that the junction implants 30 are separated by a JFET gap 32. ig1. A gate contact 34 on top of the gate oxide layer 36 extends between the junction implants 30 on the surface of the drift layer 22 opposite the substrate 20. A source contact 38 (which may also be the second current terminal 14) also contacts each of the junction implants 30 on the surface of the drift layer 22 opposite the substrate 20. A drain contact 40 (which may also be the first current terminal 12) is on the substrate 20 opposite the drift layer 22. The source contact 38 is provided by a portion of the upper metallization layer 26. The drain contact 40 is provided by the lower metallization layer 28.

[0026]

[0036] On the left side of transistor semiconductor die 10, control terminal 16 is provided by a portion of upper metallization layer 26. Although not shown, control terminal 16 is connected to transistor device Q (e.g., via gate runner 42 provided on field oxide layer 44 below upper metallization layer 26) in a plane not shown in the cross-sectional view. ig The control terminal 16 is also coupled to the gate contact 34 of the transistor device Q through a number of PN junctions 46 formed in the drift layer 22. ig Each of these PN junctions 46 is coupled to the source contact 38 of the short circuit protection diode D sc One of the short-circuit protection diodes D sc The top metallization layer 26 is appropriately patterned to form a connection between the control terminal 16 and the source contact 38 via a PN junction 46, as shown. An intermetal dielectric layer 48 may insulate different portions of the top metallization layer 26 to form the desired connection pattern.

[0027]

[0037] Transistor Device Q ig Only one unit cell of the transistor device Q is shown in Figure 4. ig may comprise any number of cells coupled together to provide the desired forward current rating of the transistor semiconductor die 10. Additionally, the short circuit protection diode D sc are shown adjacent to each other in the drift layer 22 in FIG. 4, but the short circuit protection diode D scmay be distributed in any suitable manner within the transistor semiconductor die 10. For example, short circuit protection diodes D sc is the short-circuit protection diode D sc To reduce the total active area allocated to the transistor device Q ig The short-circuit protection diodes D sc is the transistor device Q ig , would consume very little area and have minimal impact on the total active area of ​​the transistor semiconductor die 10.

[0028]

[0038] 5 illustrates a transistor semiconductor die 10 according to an additional embodiment of the present disclosure. The transistor semiconductor die 10 illustrated in FIG. 5 includes short-circuit protection diodes D1 and D2 as several PN junctions 50 formed in an additional semiconductor layer 52 (e.g., a polysilicon layer) provided on the drift layer 22 (with a field oxide layer 44 between the additional semiconductor layer 52 and the drift layer 22 to avoid layer-to-layer interactions). sc 5 is substantially similar to that shown in FIG. 4 except that a number of metal jumpers 53 may be provided between each adjacent PN junction 50. In the embodiment shown in FIG. 5, short circuit protection diodes D sc may be a Zener diode. In such an embodiment, the short circuit protection diode D sc is coupled cathode-to-anode in series between the insulated gate terminal 16 and the second current terminal 14, and a short circuit protection diode D sc The first short-circuit protection diode D sc The cathode of is coupled to the control terminal 16 and connected to the short circuit protection diode D sc The last short-circuit protection diode D sc The anode of the PN junction in FIG. The connection 50 may be inverted to be coupled anode-to-cathode between the insulated gate terminal 16 and the second current terminal 14, as shown. In some embodiments, an additional semiconductor layer 52 provided on the drift layer 22 includes a short circuit protection diode D scBy providing a short circuit protection diode D sc , the transistor device Q ig , which may allow for a reduction or elimination of the active area allocated to short circuit protection circuitry 18.

[0029]

[0039] 6 is a schematic diagram of a transistor semiconductor die 10 according to an additional embodiment of the present disclosure. The transistor semiconductor die 10 shown in FIG. 6 further includes short circuit protection circuitry 18 including a short circuit protection diode D sc and a short-circuit protection resistor element R sc 2 except that it includes a short circuit protection resistive element R sc Using only diodes in short circuit protection circuitry 18, precise voltage drops across the short circuit protection circuitry 18 can be achieved that may be difficult to achieve using diodes alone. Using only diodes in short circuit protection circuitry 18 effectively limits the total voltage drop across the short circuit protection circuitry 18 to an integer multiple of the diode forward voltage drops, thereby reducing the short circuit protection resistive element R sc By providing a resistor R, more precise adjustment of the voltage drop across the short circuit protection circuitry 18 is possible. The short circuit protection circuitry 18 reduces the voltage drop across the short circuit protection resistor element R as the temperature of the transistor semiconductor die 10 increases. sc The short circuit protection circuitry 18 may be given a negative temperature coefficient relative to its own resistance so that the resistance of the short circuit protection circuitry 18 decreases.

[0030]

[0040] 7 is a cross-sectional view of a portion of a transistor semiconductor die 10 according to an additional embodiment of the present disclosure. The transistor semiconductor die 10 shown in FIG. 7 further includes a short-circuit protection resistive element R coupled between the control terminal 16 and the second current terminal 14. sc 4 except that it includes a short circuit protection resistive element R sc can be implemented using a deep N-doped well 54. In this manner, the short circuit protection resistive element R sc By providing a resistor R, a negative temperature coefficient can be ensured for the resistor.sc may be implemented using heavily doped polysilicon resistors, metal resistors with a sufficiently high positive temperature coefficient of resistance, or any other suitable type of resistor element.

[0031]

[0041] 8 is a schematic diagram of a transistor semiconductor die 10 according to an additional embodiment of the present disclosure. The transistor semiconductor die 10 shown in FIG. 8 further includes a control terminal 16 and a transistor device Q ig A gate resistor R is coupled between the gate of g 1 except that it includes a gate resistor R g has a positive temperature coefficient of resistance. g The resistance of increases as the temperature of transistor semiconductor die 10 increases. Note that this functionality requires adequate thermal coupling between short circuit protection circuitry 18 and the current-carrying portions of transistor semiconductor die 10. This reduces the gate drive current in the event of a short circuit, thereby enhancing the action of short circuit protection circuitry 18.

[0032]

[0042] As discussed above, the foregoing example of a transistor semiconductor die 10 primarily includes transistor device Q ig Although shown as a MOSFET, the principles of the present disclosure apply equally to any type of transistor device, including IGBTs, BJTs, JFETs, etc. Therefore, for the sake of completeness, FIG. 9 illustrates the transistor device Q ig 10 shows a schematic diagram of a transistor semiconductor die 10 that is an IGBT instead of a MOSFET. In this case, first current terminal 12 is the collector terminal and second current terminal 14 is the emitter terminal. Those skilled in the art will readily appreciate that the MOSFET shown in the cross-sectional view of transistor semiconductor die 10 shown above can easily be replaced with an IGBT, for example, by adding an injector layer between substrate 20 and drift layer 22. FIG. 10 shows a transistor device Q igHowever, instead of MOSFET, it is a BJT, which is a transistor semiconductor. 11 shows a schematic diagram of a transistor device Q10. In this case, first current terminal 12 is the collector terminal, second current terminal 14 is the emitter terminal, and control terminal 15 is the base terminal. Those skilled in the art will readily appreciate that the MOSFETs shown in the cross-sectional diagram of transistor semiconductor die 10 shown above can be readily replaced with BJTs. FIG. 11 shows a schematic diagram of a transistor device Q10. ig 1 shows a schematic diagram of a transistor semiconductor die 10 that is a JFET instead of a MOSFET. In this case, first current terminal 12 is a drain terminal, second current terminal 14 is a source terminal, and control terminal 16 is a gate terminal. Those skilled in the art will readily understand that the MOSFETs shown in the cross-sectional diagram of transistor semiconductor die 10 shown above can be readily replaced with JFETs.

[0033]

[0043] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure, and all such improvements and modifications are considered within the scope of the concepts disclosed herein and the following claims.

Claims

1. 1. A transistor semiconductor die comprising: a first current terminal and a second current terminal; A control terminal; a semiconductor structure between the first current terminal and the second current terminal; a short circuit protection circuit comprising at least a first diode coupled between the control terminal and the second current terminal, the first diode having a negative temperature coefficient with respect to the voltage drop across the first diode such that the first diode is on in a short circuit protection mode of operation; a gate resistor coupled between the control terminal and a gate of a semiconductor device implemented on the transistor semiconductor die, the gate resistor having a positive temperature coefficient of resistance; 1. A transistor semiconductor die comprising:

2. 10. The transistor semiconductor die of claim 1, The short circuit protection circuit includes: providing a voltage drop between said control terminal and said second current terminal in a normal operating mode that is greater than the voltage of a control signal supplied to said control terminal; a transistor semiconductor die configured to, in the short circuit protection mode of operation, provide a voltage drop between the control terminal and the second current terminal that is less than a voltage of the control signal;

3. 2. The transistor semiconductor die of claim 1, wherein the short circuit protection circuit is configured to reduce a voltage drop between the control terminal and the second current terminal in response to the first diode turning on.

4. 3. The transistor semiconductor die of claim 2, wherein the semiconductor structure comprises a drift layer, and the first diode resides in the drift layer.

5. 3. The transistor semiconductor die of claim 2, wherein the first diode is provided in an additional semiconductor layer above the semiconductor structure.

6. 2. The transistor semiconductor die of claim 1, wherein the short circuit protection circuit further comprises a second diode, the first diode and the second diode coupled in series, an anode of the first diode coupled to the control terminal, and a cathode of the second diode coupled to the second current terminal.

7. 3. The transistor semiconductor die of claim 2, the transistor semiconductor die is configured to operate in the normal operating mode when a temperature of the semiconductor structure is below a short circuit threshold temperature; The transistor semiconductor die is configured to operate in the short circuit protection mode of operation when a temperature of the semiconductor structure exceeds the short circuit threshold temperature.

8. 1. A transistor semiconductor die comprising: a first current terminal and a second current terminal; A control terminal; a semiconductor structure between the first current terminal and the second current terminal, the semiconductor structure comprising a first conductivity type well region; a short circuit protection circuit comprising one or more diodes and a resistive element coupled in series between the control terminal and the second current terminal; the resistor element comprises a second conductivity type semiconductor region in the first conductivity type well region; The resistive element is a transistor semiconductor die having a negative temperature coefficient of resistance.

9. 10. The transistor semiconductor die of claim 8, wherein at least one of the one or more diodes has a negative temperature coefficient for the voltage drop across the one or more diodes.

10. 10. The transistor semiconductor die of claim 9, the transistor semiconductor die is configured to operate in a normal operating mode when a temperature of the semiconductor structure is below a short circuit threshold temperature; The transistor semiconductor die is configured to operate in a short circuit protection mode of operation when a temperature of the semiconductor structure exceeds the short circuit threshold temperature.

11. 1. A transistor semiconductor die comprising: a first current terminal and a second current terminal; A control terminal; a semiconductor structure between the first current terminal and the second current terminal; a protection circuit comprising at least two diodes coupled in series between the control terminal and the second current terminal, the at least two diodes having a negative temperature coefficient for a voltage drop across the at least two diodes such that the protection circuit at least partially shuts down the semiconductor structure in a protection event; wherein, during the protection event, the protection circuitry is configured to clamp a voltage supplied to a gate of a semiconductor device implemented on the transistor semiconductor die to a combined forward voltage drop of the at least two diodes.

12. the protection circuit is configured to reduce a voltage drop between the control terminal and the second current terminal in the protection event; the at least two diodes are provided in an additional semiconductor layer on the semiconductor structure; The transistor semiconductor die of claim 11 , wherein the additional semiconductor layer comprises a first material and the semiconductor structure comprises a second material different from the first material.

13. 12. The transistor semiconductor die of claim 11 , wherein the protection event is a short-circuit condition between the first current terminal and the second current terminal, and a cathode of a first diode of the at least two diodes is coupled to an anode of a second diode of the at least two diodes.

Images