Semiconductor Devices

The semiconductor device's innovative base member protrusions prevent voids, ensuring stable mounting and efficient heat dissipation, thereby maintaining a wide safe operating area.

JP7748924B2Active Publication Date: 2025-10-03KK TOSHIBA +1
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Patent Information

Application Number
JP2022146064
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-09-14
Publication Date
2025-10-03
Estimated Expiration
2042-09-14

AI Technical Summary

Technical Problem

Semiconductor devices face challenges in maintaining a wide safe operating area (SOA) due to voids in the connection members, which hinder heat conduction and lead to uneven temperature distribution and potential element breakdown.

Method used

A semiconductor device design featuring a base member with protrusions on its surface to prevent voids from forming and migrating, ensuring stable mounting and efficient heat dissipation by overlapping connection members, thereby maintaining a wide safe operating area.

Benefits of technology

The design effectively prevents voids from obstructing heat conduction paths, maintaining uniform temperature distribution and preventing current concentration, thus enhancing the semiconductor device's safe operating area.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a semiconductor device having a wide safe operation region.SOLUTION: A semiconductor device comprises a base member, a semiconductor chip, and a first conductive member. The base member has a first surface and a second surface opposite to the first surface, and includes a convex part provided on the second surface side. The semiconductor chip is mounted on the second surface via a first connection member. The semiconductor chip has a first electrode, a second electrode, a control pad, and a semiconductor part. The semiconductor part is located between the first electrode and the second electrode and between the first electrode and the control pad. The first connection member is connected with the first electrode. The control pad is provided so as to be separated from the second electrode. The first conductive member is bonded on the second electrode via a second connection member. The convex part of the base member is located below a lateral surface along a space between the second electrode of the second connection member and the control pad.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The embodiments relate to a semiconductor device. [Background technology]

[0002] Semiconductor devices are required to have a wide safe operating area (SOA). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-197634 Summary of the Invention [Problem to be solved by the invention]

[0004] Embodiments provide a semiconductor device with a wide safe operating area. [Means for solving the problem]

[0005] A semiconductor device according to an embodiment includes a base member, a semiconductor chip, and a first conductive member. The base member has a first surface and a second surface opposite the first surface, and includes a convex portion provided on the second surface side and protruding in a first direction perpendicular to the second surface. The semiconductor chip is mounted on the second surface of the base member via a first connection member. The semiconductor chip has a first electrode, a second electrode, a control pad, and a semiconductor portion, and the semiconductor portion is located between the first electrode and the second electrode and between the first electrode and the control pad. The first connection member is connected to the first electrode, and the control pad is located on the front surface of the semiconductor portion opposite the back surface on which the first electrode is located, spaced apart from the second electrode. The first conductive member is bonded to the second electrode of the semiconductor chip via a second connection member. The convex portion of the base member overlaps the second connection member in the first direction. The second connection member has a side extending along the space between the second electrode of the semiconductor chip and the control pad, and the convex portion of the base member extends below and along the side of the second connection member. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a schematic diagram illustrating a semiconductor device according to an embodiment; [Figure 2] 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment; [Figure 3] FIG. 1 is a schematic plan view showing a semiconductor chip according to an embodiment. [Figure 4] FIG. 2 is a schematic plan view showing a base member according to the embodiment. [Figure 5] FIG. 10 is a schematic plan view showing a base member according to a modified example of the embodiment. [Figure 6] FIG. 10 is a schematic plan view showing a base member according to another modified example of the embodiment. [Figure 7] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments will be described with reference to the drawings. Identical parts in the drawings are assigned the same numbers, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc., are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be expressed differently depending on the drawing.

[0008] Furthermore, the arrangement and configuration of each part will be explained using the X-axis, Y-axis, and Z-axis shown in each figure. The X-axis, Y-axis, and Z-axis are mutually perpendicular and represent the X-direction, Y-direction, and Z-direction, respectively. In addition, the Z-direction may be explained as upward and the opposite direction as downward.

[0009] 1(a) and 1(b) are schematic diagrams showing a semiconductor device 1 according to an embodiment. Fig. 1(a) is a plan view showing the upper surface of the semiconductor device 1. Fig. 1(b) is a cross-sectional view taken along line AA shown in Fig. 1(a).

[0010] The semiconductor device 1 is, for example, a power control MOS transistor and includes, for example, a semiconductor chip 10, a base member 20, a first terminal 30, a second terminal 40, a first conductive member 50, and a second conductive member 60.

[0011] 1(a), the semiconductor chip 10 is mounted on a base member 20. The first terminal 30 and the second terminal 40 are arranged at a distance from the base member 20, for example, in the XY plane. The first terminal 30 and the second terminal 40 are arranged at a distance from each other.

[0012] The first terminal 30 is electrically connected to the semiconductor chip 10 via a first conductive member 50. The first conductive member 50 is, for example, a plate-shaped metal connector. The second terminal 40 is electrically connected to the semiconductor chip 10 via a second conductive member 60. The second conductive member 60 is, for example, a plate-shaped metal connector. The second conductive member 60 may be, for example, a metal wire.

[0013] As shown in FIG. 1(b), the semiconductor chip 10 includes a semiconductor portion 11, a first electrode 13, a second electrode 15, and a control pad 17. The semiconductor portion 11 is made of, for example, silicon carbide (SiC). The semiconductor portion 11 is located between the first electrode 13 and the second electrode 15, and between the first electrode 13 and the control pad 17. The first electrode 13 is provided on a back surface 11B of the semiconductor portion 11. The second electrode 15 and the control pad 17 are provided on a front surface 11F of the semiconductor portion 11 and are spaced apart from each other. The control pad 17 is provided on the semiconductor portion 11 via an insulating film (not shown) and is electrically insulated from the semiconductor portion 11.

[0014] The first electrode 13 is, for example, a drain electrode of a MOS transistor. The second electrode 15 is, for example, a source electrode of the MOS transistor. The control pad 17 is electrically connected to, for example, a gate electrode (not shown) of the MOS transistor. The gate electrode is provided, for example, between the semiconductor portion 11 and the second electrode 15.

[0015] The base member 20 has a back surface 20B (first surface) and a front surface 20F (second surface) opposite the back surface 20B. The semiconductor chip 10 is mounted on the front surface 20F of the base member 20 via a first connection member 25. The first connection member 25 is, for example, a solder material. The first electrode 13 of the semiconductor chip 10 is connected to the first connection member 25. The semiconductor chip 10 is electrically connected to the base member 20 via the first connection member 25.

[0016] The first conductive member 50 is connected to the second electrode 15 via a second connection member 55. The second connection member 55 is, for example, a solder material. The first conductive member 50 is electrically connected to the second electrode 15 via the second connection member 55.

[0017] The second conductive member 60 is connected to the control pad 17 via a third connection member 65. The third connection member 65 is, for example, a solder material. The second conductive member 60 is electrically connected to the control pad 17 via the third connection member 65. Furthermore, when a metal wire is used for the second conductive member 60, the second conductive member 60 is directly bonded onto the control pad 17.

[0018] As shown in FIG. 1(b), the base member 20 has a protrusion 20p partially provided on the surface 20F side of the base member 20. The semiconductor chip 10 is mounted so that the second connection member 55 overlaps the protrusion 20p in a direction perpendicular to the surface 20F of the base member 20, for example, in the Z direction. Furthermore, the protrusion 20p is located below a side surface 55s of the second connection member 55 that faces the third connection member 65, and is provided so as to extend along the side surface 55s (see FIG. 3). The thickness of the protrusion 20p in the Z direction is, for example, 15 to 20 μm.

[0019] In the semiconductor device 1, the Z-direction thickness T1 of the first connecting member 25 between the semiconductor chip 10 and the protruding portion 20p of the base member 20 is thinner than the Z-direction thickness T2 of the first connecting member 25 between the base member 20 and the second connecting member 55. The Z-direction thickness T2 of the first connecting member 25 is, for example, 22 μm. As a result, even if voids are generated in the first connecting member 25 during the process of mounting the semiconductor chip 10 on the base member 20, they are unlikely to be generated between the semiconductor chip 10 and the protruding portion 20p. For example, during the reflow process of mounting the semiconductor chip 10 on the base member 20, small voids generated between the semiconductor chip 10 and the first connecting member 25 may gather and become larger voids, but such voids will not be formed between the semiconductor chip 10 and the protruding portion 20p. Furthermore, the protruding portion 20p functions to prevent the movement of such voids within the first connecting member 25.

[0020] 7(a) and 7(b), the semiconductor device 2 according to the comparative example does not have a protrusion 20p on the front surface 20F of the base member 20. The semiconductor chip 10 is mounted on the flat front surface 20F via a first connecting member 25.

[0021] For example, when the size of the semiconductor chip 10 in the X and Y directions increases, voids Vd may occur in the first connecting member 25. Such voids Vd may block part of the heat conduction from the semiconductor chip 10 to the base member 20.

[0022] 7(a), when a void Vd occurs between the base member 20 and the first conductive member 50, part of the heat conduction from the semiconductor chip 10 to the base member 20 is inhibited, but the heat conduction path from the semiconductor chip 10 to the first conductive member 50 via the second connection member 55 is maintained. Therefore, the temperature rise inside the semiconductor chip 10 is suppressed.

[0023] However, as shown in FIG. 7(b), if the void Vd is located below the space between the first conductive member 50 and the second conductive member 60, heat conduction from the semiconductor chip 10 to the base member 20 is hindered and an upward heat conduction path is lost. This implies that a region in the semiconductor chip 10 where heat dissipation is limited is created, resulting in an uneven temperature distribution within the semiconductor chip 10. In other words, if the void Vd is located below the space between the first conductive member 50 and the second conductive member 60, a region within the semiconductor chip 10 where electrical resistance locally decreases as the temperature rises is created. This makes it easier for current to concentrate near the void Vd, further increasing the temperature. As a result, the current concentration accelerates, potentially leading to element breakdown. This means that the safe operating area (SOA) of the semiconductor device 2 may be narrowed.

[0024] Such voids Vd often occur in the first connecting member 25 below the center of the semiconductor chip 10, and then migrate toward the edge of the semiconductor chip 10. In contrast, in the semiconductor device 1 according to the embodiment, a convex portion 20p of the base member 20 is provided below the side surface of the second connecting member 55 that faces the third connecting member 65. The convex portion 20p is provided so as to extend along the side surface of the second connecting member 55 that faces the third connecting member 65. This makes it possible to prevent the voids Vd that occur below the center of the semiconductor chip 10 from migrating downward into the space between the first conductive member 50 and the second conductive member 60. Therefore, the semiconductor device 1 can have a wide SOA.

[0025] Fig. 2 is a schematic cross-sectional view showing the semiconductor device 1 according to the embodiment, Fig. 2 is a schematic view showing a cross section taken along line BB shown in Fig. 1(a).

[0026] 2, the first conductive member 50 is, for example, a bent plate-shaped connector. The first conductive member 50 allows a large current to flow between the second electrode 15 of the semiconductor chip 10 and the first terminal 30, and also 2 The connecting member 55 has the function of dissipating heat from the semiconductor chip 10 .

[0027] The first conductive member 50 is connected to the second electrode 15 of the semiconductor chip 10 via a second connecting member 55. The first conductive member 50 is also connected to the first terminal 30 via a fourth connecting member 33. The fourth connecting member 33 is, for example, a solder material. The first conductive member 50 is preferably connected to the entire surface of the second electrode 15 of the semiconductor chip 10 except for the outer edge (see FIG. 1(a)). This allows the semiconductor chip 10 to operate with a large current and efficiently dissipates heat generated in the semiconductor portion 11.

[0028] 3 is a schematic plan view showing the semiconductor chip 10 according to the embodiment. FIG. 3 is a plan view showing the front surface 11F side of the semiconductor portion 11. In FIG. 3, the second electrode 15, the control pad 17, the first electrode 15, the second electrode 15, the control pad 17, the first electrode 15, the second electrode 15, the control pad 17, the first electrode 15, the control pad 17, the first electrode 15, the control pad 17, the second ... 2 The connecting member 55 and 3The layout of the connecting members 65 is shown.

[0029] 3, the second electrode 15 and the control pad 17 are provided on the surface 11F of the semiconductor portion 11. The surface 11F of the semiconductor portion 11 is, for example, rectangular, and the control pad is provided at one corner of the rectangle. The second electrode 15 is provided so as to cover most of the surface 11F side of the semiconductor portion 11, except for the corners where the control pad 17 is provided and the outer edge of the semiconductor portion 11. The second connection member 55 is preferably provided so as to cover the second electrode 15, except for the outer edge of the second electrode 15.

[0030] The control pad 17 is provided spaced apart from the second electrode 15. The space between the second electrode 15 and the control pad 17 includes, for example, a first space 17sx and a second space 17sy. The first space 17sx extends in the X direction and has a length Lsx in the X direction and a width Wsy in the Y direction. The second space 17sy extends in the Y direction and has a length Lsy in the Y direction and a width Wsx in the X direction.

[0031] 3, the protrusion 20p of the base member 20 has, for example, a length Lpx in the X direction and a length Lpy in the Y direction. The protrusion 20p is preferably provided so that the length Lpx in the X direction is equal to or longer than the length Lsx in the X direction of the first space 17sx between the second electrode 15 and the control pad 17. Furthermore, the protrusion 20p is preferably provided so that the length Lpy in the Y direction is equal to or longer than the length Lsy in the Y direction of the second space 17sy between the second electrode 15 and the control pad 17.

[0032] The protrusion 20p has, for example, an L-shaped planar shape. In other words, the protrusion 20p includes, for example, a first portion 20px extending in the X direction and a second portion 20py extending in the Y direction, and an end of the first portion 20px is connected to an end of the second portion 20py.

[0033] In this example, the protrusion 20p is located below the second connection member 55, but the embodiment is not limited to this. For example, the protrusion 20p may be widened in the direction from the second connection member 55 toward the third connection member 65 so as to overlap the space between the second connection member 55 and the third connection member 65.

[0034] 4(a) to 4(c) are schematic plan views illustrating the base member 20 according to the embodiment. The dashed lines shown in the drawings indicate the outer edges of the semiconductor chip 10 and the outer edges of the control pads 17.

[0035] 4(a), the protrusion 20p of the base member 20 is provided so as to be located between the center of the semiconductor chip 10 and the control pad 17 in a plan view. In other words, the protrusion 20p is provided so as to block the path along which the void Vd generated in the center of the semiconductor chip 10 moves toward the control pad 17.

[0036] The base member 20 may further have another protrusion 20s. The protrusion 20s has a size smaller than the length in the X and Y directions of the protrusion 20p. The protrusions 20s are, for example, arranged below three corners of the semiconductor chip 10. This allows the semiconductor chip 10 to be mounted without tilting on the surface 20F of the base member 20 (see FIG. 1(b)).

[0037] If the semiconductor chip 10 is mounted at an angle relative to the surface 20F of the base member 20, it becomes difficult to connect the first conductive member 50 to the semiconductor chip 10. Furthermore, the escape route for air remaining between the semiconductor chip 10 and the first connecting member 25 is restricted, making it easier for voids Vd to occur in the first connecting member 25. By providing the protrusions 20s, such problems can be avoided. Furthermore, by providing multiple protrusions 20s, the area of ​​the protrusions 20s facing the semiconductor chip 10 via the first connecting member 25 can be increased. This reduces stress applied to the semiconductor chip 10 mounted on the base member 20, making it possible to prevent chip cracks and the like.

[0038] 4(b), in addition to the protrusions 20s located below the three corners of the semiconductor chip 10, protrusions 20s may be provided below the center of the semiconductor chip 10 and at positions aligned with the protrusions 20p in the X direction. This allows even a semiconductor chip 10s (see FIG. 4(c)) smaller than the semiconductor chip 10 to be stably held.

[0039] 4(c), a plurality of protrusions 20s may be provided for holding semiconductor chips 10s that are smaller than the semiconductor chip 10. The protrusions 20s are arranged in the center of the base member 20, for example, in the Y direction.

[0040] 4(b) and (c) show two protrusions 20s for holding the semiconductor chip 10s, but three or more protrusions 20s may be provided. By providing multiple protrusions 20s so that they overlap the semiconductor chip 10 in this way, tilting of the semiconductor chip 10 is suppressed, and air remaining between the semiconductor chip 10 and the first connecting member 25 is more likely to escape to the outside of the semiconductor chip 10, thereby suppressing the occurrence of voids Vd. In addition, stress applied to the semiconductor chip 10 can be reduced.

[0041] 5(a) to 5(c) are schematic plan views illustrating a base member 20 according to a modified example of the embodiment. The dashed lines in the drawings indicate the outer edges of the semiconductor chip 10 and the outer edges of the control pads 17.

[0042] As shown in Fig. 5(a), the base member 20 has a protrusion 20p, at least one protrusion 20qx, and at least one protrusion 20qy. In a plan view, the protrusions 20p and 20qx are aligned in the X direction. The protrusions 20p and 20qx are aligned, for example, at equal intervals. Department The protrusions 20p and the protrusions 20qy are aligned in the Y direction. Department The projections 20p and the projections 20qy are arranged at equal intervals, for example.

[0043] The protrusion 20qx extends in the Y direction and has, for example, the same length as the length Lpy (see FIG. 3) of the protrusion 20p in the Y direction. The width of the protrusion 20qx in the X direction is narrower than its length in the Y direction.

[0044] The protrusion 20qy extends in the X direction and has, for example, the same length as the X-direction length Lpx of the protrusion 20p (see FIG. 3). The Y-direction width of the protrusion 20qy is narrower than the X-direction length.

[0045] The protrusions 20qx and 20qy are provided so as not to hinder the movement of the voids Vd (see FIG. 7) in the direction from the center of the semiconductor chip 10 toward the outer edge, for example.

[0046] 5(b), the protrusion 20qx may be provided so that the length in the Y direction decreases with increasing distance from the protrusion 20p in the X direction. Similarly, the protrusion 20qy may be provided so that the length in the X direction decreases with increasing distance from the protrusion 20p in the Y direction.

[0047] 5(c), the base member 20 may further include a protrusion 20s. The protrusion 20s has a size smaller than the lengths in the X and Y directions of the protrusions 20p, 20qx, and 20qy. The protrusion 20s is disposed, for example, below a corner diagonally opposite the corner at which the control pad 17 of the semiconductor chip 10 is provided.

[0048] 5(a) to 5(c), when the semiconductor chip 10 is mounted on the base member 20, the molten first connection member 25 can move more easily in a direction from the center toward the outer edge of the semiconductor chip 10, thereby suppressing the occurrence of voids Vd. In addition, the semiconductor chip 10 can be prevented from being mounted at an angle with respect to the surface 20F of the base member 20.

[0049] 6(a) to 6(c) are schematic plan views illustrating a base member 20 according to a modified example of the embodiment. The dashed lines shown in the drawings indicate the outer edges of the semiconductor chip 10 and the outer edges of the control pads 17.

[0050] 6(a), the base member 20 has a protrusion 20p, at least one protrusion 20rx, and at least one protrusion 20ry. In a plan view, the protrusion 20p and the protrusion 20rx are aligned in the X direction. Convex part 20p The protrusions 20ry are aligned in the Y direction.

[0051] The protrusion 20rx extends in a direction inclined with respect to the X and Y directions. The length Lry of the protrusion 20rx in the Y direction is longer than its width Wrx in the X direction. A distance Drp1 from one end of the protrusion 20rx located toward the center of the semiconductor chip 10 to the protrusion 20p is shorter than a distance Drp2 from the other end of the protrusion 20rx located toward the outer edge of the semiconductor chip 10 to the protrusion 20p.

[0052] The protrusion 20ry also extends in a direction inclined with respect to the X and Y directions. The length Lrx of the protrusion 20ry in the X direction is longer than the width Wry in the Y direction. The distance from one end of the protrusion 20ry located on the central side of the semiconductor chip 10 to the protrusion 20p is shorter than the distance from the other end of the protrusion 20ry located on the outer edge side of the semiconductor chip 10 to the protrusion 20p.

[0053] 6(b), the protrusion 20rx may be provided so that the length in the Y direction decreases with increasing distance from the protrusion 20p in the X direction. Similarly, the protrusion 20ry may be provided so that the length in the X direction decreases with increasing distance from the protrusion 20p in the Y direction.

[0054] 6(c), the base member 20 may further have a protrusion 20s. The protrusion 20s has a size smaller than the length Lrx in the X direction and the length Lry in the Y direction of the protrusions 20p, 20rx, and 20ry. The protrusion 20s is disposed, for example, below a corner diagonally opposite the corner where the control pad 17 of the semiconductor chip 10 is provided.

[0055] 6(a) to 6(c), the first connection member 25, which melts when the semiconductor chip 10 is mounted on the base member 20, can move more easily in the direction from the center to the outer edge of the semiconductor chip 10, thereby suppressing the occurrence of voids Vd. In addition, the semiconductor chip 10 can be prevented from being mounted at an angle with respect to the surface 20F of the base member 20.

[0056] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0057] (Appendix 1) a base member having a first surface and a second surface opposite to the first surface, the base member including a protrusion provided on the second surface side and protruding in a first direction perpendicular to the second surface; a semiconductor chip mounted on the second surface of the base member via a first connection member, the semiconductor chip having a first electrode, a second electrode, a control pad, and a semiconductor portion, the semiconductor portion being located between the first electrode and the second electrode and between the first electrode and the control pad, the first connection member being connected to the first electrode, and the control pad being provided spaced apart from the second electrode on a surface of the semiconductor portion opposite to a back surface on which the first electrode is provided; a first conductive member bonded onto the second electrode of the semiconductor chip via a second connecting member; Equipped with the protrusion of the base member overlaps the second connection member in the first direction, A semiconductor device, wherein the second connection member has a side extending along the space between the second electrode of the semiconductor chip and the control pad, and the convex portion of the base member extends along the side below the side of the second connection member. (Appendix 2) 2. The semiconductor device according to claim 1, wherein the side surface of the second connection member overlaps with a convex portion of the base member in the first direction. (Appendix 3) the space between the second electrode and the control pad includes a first space extending in a second direction along the second surface of the base member and a second space extending in a third direction within the second surface that intersects with the second direction; 3. The semiconductor device according to claim 1, wherein the protrusion of the base member includes a first portion extending in the second direction and a second portion extending in the third direction. (Appendix 4) A semiconductor device as described in Appendix 3, wherein the length in the second direction of the first portion of the convex portion of the base member is the same as or longer than the length in the second direction of the first space, and the length in the third direction of the second portion of the convex portion is the same as or longer than the length in the third direction of the second space. (Appendix 5) 5. The semiconductor device according to claim 1, wherein the second connection member covers the second electrode of the semiconductor chip except for an outer edge of the second electrode. (Appendix 6) A semiconductor device described in any one of Appendix 1 to 4, wherein the side of the second connection member extending along the space between the second electrode of the semiconductor chip and the control pad is located inside the outer edge of the second electrode. (Appendix 7) 7. The semiconductor device according to claim 1, wherein the base member has a second protrusion aligned with the protrusion in at least one of the second direction and the third direction. (Appendix 8) 8. The semiconductor device according to claim 7, wherein the second protrusion of the base member is aligned with the protrusion in the second direction and extends in the third direction. (Appendix 9) the semiconductor chip has a quadrangle in a plan view parallel to the second surface of the base member, the base member further includes a third protrusion provided on the second surface side and protruding in the first direction, A semiconductor device described in any one of Appendixes 1 to 8, wherein the convex portion and the third convex portion of the base member are aligned diagonally in the rectangle of the semiconductor chip along the second surface of the base member. [Explanation of symbols]

[0058] 1, 2, 3, 4...Semiconductor device, 10, 10s...Semiconductor chip, 11...Semiconductor portion, 11B, 20B...Back surface, 11F, 20F...Front surface, 13...First electrode, 15...Second electrode, 17...Control pad, 17sx...First space, 17sy...Second space, 20...Base member, 20p, 20s, 20qx, 20qy, 20rx, 20ry...Protruding portion, 20fp...First portion, 20sp...Second portion, 25...First connecting member, 30...First terminal, 33...Fourth connecting member, 40...Second terminal, 50...First conductive member, 55...Second connecting member, 60...Second conductive member, 65...Third connecting member, Vd...Void

Claims

1. a base member having a first surface and a second surface opposite to the first surface, the base member including a protrusion provided on the second surface side and protruding in a first direction perpendicular to the second surface; a semiconductor chip mounted on the second surface of the base member via a first connection member, the semiconductor chip having a first electrode, a second electrode, a control pad, and a semiconductor portion, the semiconductor portion being located between the first electrode and the second electrode and between the first electrode and the control pad, the first connection member being connected to the first electrode, and the control pad being provided spaced apart from the second electrode on a surface of the semiconductor portion opposite to a back surface on which the first electrode is provided; a first conductive member bonded onto the second electrode of the semiconductor chip via a second connecting member; Equipped with In the first direction of the base member, the protrusion of the base member overlaps the second connection member, A semiconductor device, wherein the second connection member has a side extending along the space between the second electrode of the semiconductor chip and the control pad, and the convex portion of the base member extends along the side below the side of the second connection member.

2. The semiconductor device according to claim 1 , wherein the side surface of the second connection member overlaps the protrusion of the base member in the first direction.

3. the space between the second electrode and the control pad includes a first space extending in a second direction along the second surface of the base member and a second space extending in a third direction within the second surface that intersects with the second direction; 3. The semiconductor device according to claim 1, wherein the protrusion of the base member includes a first portion extending in the second direction and a second portion extending in the third direction.

4. 4. The semiconductor device of claim 3, wherein the length in the second direction of the first portion of the convex portion of the base member is the same as or longer than the length in the second direction of the first space, and the length in the third direction of the second portion of the convex portion is the same as or longer than the length in the third direction of the second space.

5. The semiconductor device according to claim 1 , wherein the second connection member covers the second electrode of the semiconductor chip except for an outer edge of the second electrode.

6. 3. The semiconductor device according to claim 1, wherein the side surface of the second connection member extending along the space between the second electrode of the semiconductor chip and the control pad is positioned inside an outer edge of the second electrode.

7. 4. The semiconductor device according to claim 3, wherein said base member has a second protrusion aligned with said protrusion in at least one of said second direction and said third direction.

8. The semiconductor device according to claim 7 , wherein the second protrusion of the base member is aligned with the protrusion in the second direction and extends in the third direction.

9. the semiconductor chip has a quadrangular shape in a plan view parallel to the second surface of the base member, the base member further includes a third protrusion provided on the second surface side and protruding in the first direction, 3 . The semiconductor device according to claim 1 , wherein the protrusion and the third protrusion of the base member are aligned along the second surface of the base member in a diagonal direction of the quadrangle of the semiconductor chip.

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