METHOD FOR MANUFACTURING ELECTRONIC COMPONENT DEVICE AND ELECTRONIC COMPONENT DEVICE

Abstract

Disclosed is a method for manufacturing an electronic component device, the method comprising: preparing a wiring structure including a wiring portion and a connecting portion, the wiring portion including a metal wire and an insulating layer and having two major surfaces opposing each other, the connecting portion being provided on one of the major surfaces of the wiring portion; fixing one or more conductor pins on a wiring substrate vertically with respect to the connecting portion; mounting one or more electronic components on the wiring structure; and forming on the wiring structure a sealing layer for sealing the electronic component and the conductor pin.

Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing an electronic component device, and to an electronic component device. [Background technology]

[0002] In various semiconductor packages, conductive vias that penetrate an encapsulation layer that encapsulates a semiconductor chip are sometimes provided (for example, Patent Document 1). Conventional methods for forming conductive vias that penetrate an encapsulation layer generally include an electrolytic plating process. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2014 / 252646 [Patent Document 2] International Publication No. 2017 / 057355 [Patent Document 3] Patent No. 5494766 [Patent Document 4] International Publication No. 2015 / 186744 Summary of the Invention [Problem to be solved by the invention]

[0004] One aspect of the present disclosure makes it possible to manufacture, by a simpler process, an electronic component having a conductive via that penetrates a sealing layer that seals the electronic component. [Means for solving the problem]

[0005] One aspect of the present disclosure provides a method for manufacturing an electronic component device, including: preparing a wiring structure having a wiring portion including metal wiring and an insulating layer and having two opposing main surfaces, and a connection portion provided on one of the main surfaces of the wiring portion; fixing one or more conductor pins on the wiring structure in a state where they stand relative to the connection portion; mounting one or more electronic components on the wiring structure; and forming a sealing layer on the wiring structure to seal the electronic components and the conductor pins.

[0006] Another aspect of the present disclosure provides an electronic component device including: a wiring structure having a wiring portion including metal wiring and an insulating layer and having two opposing main surfaces, and a connection portion provided on one main surface of the wiring portion; one or more electronic components mounted on the wiring structure; a sealing layer formed on the wiring structure to seal the electronic components; and one or more conductor pins penetrating the sealing layer while standing upright relative to the connection portion. [Effects of the Invention]

[0007] According to one aspect of the present disclosure, an electronic component device having a conductive via penetrating a sealing layer can be efficiently and easily manufactured with a small number of steps. The method according to one aspect of the present disclosure is also advantageous in that it can easily form a conductive via that is narrow and has a certain height. [Brief explanation of the drawings]

[0008] [Figure 1] 1A to 1C are process diagrams illustrating an example of a method for manufacturing an electronic component device. [Figure 2] 1A to 1C are process diagrams illustrating an example of a method for manufacturing an electronic component device. [Figure 3] 1A to 1C are process diagrams illustrating an example of a method for manufacturing an electronic component device. [Figure 4] 1A to 1C are process diagrams illustrating an example of a method for manufacturing an electronic component device. [Figure 5] 10A to 10C are process diagrams showing an example of a method for fixing a conductive pin onto a wiring structure. [Figure 6]10A to 10C are process diagrams showing an example of a method for fixing a conductive pin onto a wiring structure. [Figure 7] FIG. 1 is a plan view showing an example of an electronic component device. [Figure 8] FIG. 1 is a plan view showing an example of an electronic component device. [Figure 9] 1 is a micrograph of a wiring structure and a conductor pin fixed on the wiring structure. DETAILED DESCRIPTION OF THE INVENTION

[0009] The present invention is not limited to the following examples.

[0010] 1, 2, 3, and 4 are process diagrams showing an example of a method for manufacturing an electronic component device. The method shown in Figures 1 to 4 includes preparing a wiring structure 60 having a wiring portion 6 including metal wiring 61 and an insulating layer 62 and having two opposing main surfaces 6S1 and 6S2, and a plurality of connecting portions 65, 66, and 67 provided on one main surface 6S1 of the wiring portion 6, fixing two or more conductor pins 5 on the wiring structure 60 in a state where they stand relative to the connecting portions 67, mounting a chip component 2 and a chip-type passive component 3 as electronic components on the wiring structure 60, and forming a sealing layer 7 on the wiring structure 60 to seal the electronic components (chip component 2 and passive component 3) and the conductor pins 5.

[0011] The wiring structure 60 illustrated in FIG. 1(a) is prepared in a state where it is fixed on a carrier substrate 1. The carrier substrate 1 is a laminate including a support 11 and a temporary fixing material layer 12 provided on the support 11, and the wiring structure 60 is provided on the temporary fixing material layer 12. The support 11 may be made of any material, as long as it has sufficient strength and rigidity to support electronic components. For example, the support 11 may be a silicon wafer, a glass plate, or a stainless steel plate. The thickness of the support 11 is not particularly limited, but may be, for example, 200 to 2000 μm. The temporary fixing material layer 12 can hold the wiring structure 60 during the mounting of the electronic components and the formation of the sealing layer 7, and has sufficient releasability to be finally peeled off from the wiring structure 60. The thickness of the temporary fixing material layer 12 may be, for example, 1 to 100 μm. The material forming the temporary fixing material layer 12 can be selected from materials used for the purpose of temporary fixing or temporary adhesion in the manufacture of electronic component devices (see, for example, WO 2017 / 057355).

[0012] The wiring portion 6 of the wiring structure 60 includes metal wirings 61 and insulating layers 62 disposed between the metal wirings 61. The metal wirings 61 include multiple wiring layers 61a extending parallel to the main surfaces 6S1 and 6S2 of the wiring portion 6 and connecting portions 61b extending perpendicular to the main surfaces 6S1 and 6S2 of the wiring portion 6. The metal wirings 61 constituting the wiring portion 6 include rewirings connected to the chip components 2 and passive components 3. The thickness of each wiring layer 61a is not particularly limited and may be, for example, 1 to 30 μm. The overall thickness of the wiring portion 6 may be, for example, 2 to 1000 μm. The wiring portion 6 can be formed by a conventional method known to those skilled in the art. For a method of forming a wiring portion including metal wiring, see, for example, Japanese Patent No. 5494766.

[0013] The multiple connection portions provided on the wiring structure 60 include a connection portion 65 connected to the chip component 2, a connection portion 66 connected to the passive component 3, and a connection portion 67 connected to the conductive pin 5, and are each connected to the metal wiring 61. The connection portions 65, 66, and 67 may be formed of the same metal as the metal wiring 61. The connection portions 65, 66, and 67 may include solder bumps. The width of the connection portions 65, 66, and 67 may be, for example, 10 to 500 μm. The height of the connection portions 65, 66, and 67 may be, for example, 1 to 25 μm. The multiple connection portions 67 connected to the conductive pin 5 are arranged on one main surface 6S1 of the wiring portion 6 along the outer periphery of the wiring portion 6 so as to surround the connection portions 65, 66 connected to the electronic components (chip component 2 and passive component 3) mounted on the wiring structure 60. In other words, the multiple connection portions 67 and the multiple conductive pins 5 are arranged at intervals from each other to form one or more rows surrounding the electronic component. The sealing layer 7 fills the gap between two adjacent conductor pins 5 in a row formed by the conductor pins 5. The plurality of conductor pins 5 provided on the connection portion 67 arranged in this manner can function as an electromagnetic wave shield together with the shielding film 8. The sealing layer 7 may completely fill the gap between two adjacent conductor pins 5 in a row formed by the conductor pins 5, but some gaps may remain as long as they do not cause any problems.

[0014] The prepared wiring structure 60 may be inspected. The inspection includes checking for abnormalities, such as breaks or shorts, in the metal wiring 61 and the connection portions 65, 66, and 67. This inspection allows defective wiring structures 60 to be rejected before the wiring structure 60 is connected to an electronic component. As a result, compared to when a wiring structure is formed on an electronic component encapsulated in an encapsulation layer, the possibility of rejecting a normal electronic component due to defects in the formation of the wiring structure can be reduced.

[0015] As shown in FIG. 1B, the conductor pin 5 is fixed on the wiring structure 60 in a state where it stands upright relative to the connection portion 67. In other words, the pillar-shaped conductor pin 5 is fixed on the connection portion 67 with its longitudinal direction oriented substantially perpendicular to the main surface 6S1 of the wiring portion 6. The phrase "the conductor pin 5 is fixed on the wiring structure 60 in a state where it stands upright relative to the connection portion 67" means that the conductor pin 5 is fixed to the wiring structure 60 on the side of the connection portion 67 opposite the wiring portion 6, and the angle between the longitudinal direction of the fixed conductor pin 5 and the main surface 6S1 of the wiring portion 6 is right or nearly right. The angle between the longitudinal direction of the fixed conductor pin 5 and the main surface 6S1 of the wiring portion 6 may be, for example, 85 to 95 degrees. One end of the conductor pin 5 is joined to the connection portion 67 via a solder film 50, thereby electrically connecting the conductor pin 5 to the connection portion 67.

[0016] 5 and 6 are process diagrams illustrating an example of a method for fixing a conductor pin 5 on a wiring structure 60. The method illustrated in FIGS. 5 and 6 includes the steps of: arranging a mask 41 having openings 41A at positions corresponding to the connection portions 67 on the main surface 6S1 of the wiring portion 6, where the connection portions 67 are provided; applying a fluxing agent 52 onto the connection portions 67 located inside the openings 41A; arranging a mask 42 having openings 42A at positions corresponding to the connection portions 67 on the main surface 6S1 of the wiring portion 6; inserting solder-coated pins 55 having the conductor pins 5 and solder films 50 covering the surfaces of the conductor pins 5 through the openings 42A; thereby positioning the solder-coated pins 55 on the connection portions 67 in an upright position relative to the connection portions 67; melting the solder films 50 to fix the conductor pins 5 so as to be electrically connected to the connection portions 67 via the solder films 50; and removing the fluxing agent 52. A surface insulating layer 4, such as a solder resist, may be provided on the insulating layer 62.

[0017] The use of the fluxing agent 52 makes it easier to obtain a good connection by the solder film 50. There are no particular limitations on the fluxing agent 52, and it can be selected arbitrarily by a person skilled in the art. The fluxing agent 52 is applied onto the connection portion 67 by, for example, a printing method.

[0018] The conductor pin 5 constituting the solder-coated pin 55 may be a metal molded body having a columnar portion. The conductor pin 5 may be a columnar metal molded body containing at least one metal selected from copper, gold, aluminum, silver, etc. The maximum width (maximum width of a cross section perpendicular to the longitudinal direction) of the conductor pin 5 (or its columnar portion) may be, for example, 10 to 500 μm, or 50 to 200 μm. The length of the conductor pin 5 (or columnar portion) may be, for example, 50 to 1000 μm, or 100 to 500 μm. The ratio of the length of the conductor pin 5 (or columnar portion) to the maximum width of the conductor pin 5 (or columnar portion) may be 2 to 10. The solder film 50 covers the entire or part of the outer surface of the conductor pin 5 (or columnar portion). The thickness of the solder film 50 may be, for example, 0.1 to 10 μm.

[0019] For example, the solder-coated pins 55 (or conductor pins 5) can be inserted through the openings 42A by a method including scattering a larger number of solder-coated pins 55 (or conductor pins 5) than the number of openings 42A on the mask 42 and vibrating the wiring structure 60 and the mask 42. The minimum width of the openings 42A is typically larger than the maximum width of the solder-coated pins 55 (or conductor pins 5).

[0020] When the solder film 50 is melted by heating the solder-coated pin 55 placed on the connection portion 67 while standing relative to the connection portion 67, the solder film 50 flows and moves onto the connection portion 57. The solder film 50 on the connection portion 67 fixes the conductor pin 5 to the wiring structure 60 and electrically connects it to the connection portion 67. The heating temperature for melting the solder film 50 need only be equal to or higher than the melting point of the solder film 50, and may be 250 to 300°C, for example, when the solder film 50 is a film of Sn-Ag-Cu based lead-free solder.

[0021] After the conductive pins 5 are introduced, electronic components (chip components 2 and passive components 3) are mounted on the wiring structure 60, as shown in (a) of Figure 2. The chip components 2 and passive components 3 may be mounted in any order. After the chip components 2 and passive components 3 are mounted on the wiring structure 60, the conductive pins 5 may be introduced onto the wiring structure 60.

[0022] The chip component 2 is electrically connected to the connection portion 65. The chip component 2 has an IC chip 21 and a plurality of connection portions 22 provided on the IC chip 21. The connection portions 22 may have a columnar portion 22A containing metal and bumps 22B provided on the columnar portion 22A. The maximum width of the chip component 2 in a direction parallel to the main surface 6S1 may be, for example, 0.1 to 50 mm.

[0023] The passive component 3 is electrically connected to the connection portion 66. The passive component 3 is selected according to the design of the electronic component device, and may be, for example, a resistor, a capacitor, or a combination thereof. The passive component 3 is electrically connected to the connection portion 66 via, for example, a bump 32. The maximum width of the passive component 3 in a direction parallel to the main surface 6S1 may be 0.05 to 2 mm, 1 to 2 mm, 0.5 to 1 mm, or 0.1 to 0.5 mm.

[0024] After the conductive pins 5, chip components 2, and passive components 3 are fixed on the wiring structure 60, an encapsulating layer 7 that encapsulates them is formed using an encapsulating resin material, as shown in FIG. 2(b). The encapsulating layer 7 is formed so as to entirely embed the conductive pins 5 and electronic components (chip components 2 and passive components 3). If there is a gap between the electronic component and the wiring structure, part or all of the gap may be filled with the encapsulating layer 7. The encapsulating layer 7 may be formed in a mold using, for example, a compression or transfer molding machine. Alternatively, the encapsulating layer 7 may be formed using a film-like encapsulating resin material (see, for example, WO 2015 / 186744). In this case, the film-like encapsulating resin material may be laminated under reduced pressure to prevent the entrapment of air bubbles.

[0025] The formed sealing layer 7 is ground from the surface opposite to the wiring structure 60 to expose the tips of the conductor pins 5, as shown in Fig. 3(a). Grinding of the sealing layer 7 can be performed using a conventional grinding device.

[0026] Subsequently, as shown in FIG. 3(b), a conductive shielding film 8 is formed to cover the surface of the sealing layer 7 opposite to the wiring structure 60. The shielding film 8 is connected to the tip of the conductor pin 5. The shielding film 8 is provided mainly for the purpose of electromagnetic wave shielding. The thickness of the shielding film 8 may be, for example, 0.1 to 100 μm. The shielding film 8 may be a single-layer or multi-layer metal thin film, which may be formed by a method such as sputtering, vapor deposition, or plating.

[0027] 4(a), the carrier substrate 1 is peeled off from the wiring structure 60. The carrier substrate 1 having the temporary fixing material layer 12 can be peeled off from the wiring portion 6 by, for example, heating, light irradiation, mechanical peeling, or a combination of these.

[0028] After the carrier substrate 1 is peeled off, as shown in FIG. 4(b), solder balls 9 to be connected to the metal wiring 61 may be provided on the main surface 6S2 of the wiring portion 6 opposite the sealing layer 7. The solder balls 9 are used as connection terminals for secondary mounting. Reflow is performed as necessary.

[0029] The method exemplified above can obtain the electronic component device 100. The electronic component device 100 is mainly composed of a wiring structure 60, a plurality of electronic components (chip components 2 and passive components 3) mounted on the wiring structure 60, a sealing layer 7 that seals the electronic components and conductor pins 5, and conductor pins 5 that penetrate the sealing layer 7 while standing upright relative to connection portions 67.

[0030] The method for manufacturing the electronic component device is not limited to the above-described example and can be modified as necessary. For example, a wiring structure corresponding to multiple electronic component devices may be formed on a single large-area carrier substrate.

[0031] FIG. 7 is a plan view showing an example of an arrangement of conductor pins in an electronic component device. The sealing layer 7 and shielding film 8 are omitted in FIG. 7. In the electronic component device 100 shown in FIG. 7, a plurality of conductor pins 5 are arranged to form one or more circular rows. The rows formed by the conductor pins 5 divide the main surface of the wiring portion 6 on the connection side into three mounting regions 6A, 6B, and 6C. Electronic components are arranged in each mounting region. For example, a chip component 2A and a passive component 3 arranged around it are surrounded by two rows L1 and L2 extending along the periphery of the mounting region 6A in which they are arranged. Row L1 and the outer row L2 extend along the periphery of the mounting region 6A without intersecting each other and surround the chip component 2A and the passive component 3. The mounting regions 6B and 6C in which chip components 2B and 2C are arranged are also surrounded by two rows extending along the periphery. Parts of the rows L1 and L2 surrounding the chip component 2A also serve as rows extending along the outer peripheries of the mounting regions 6B and 6C on which the chip components 2B and 2C are arranged.

[0032] Typically, one or more electronic components (especially chip components) are placed in a mounting area inside one or more rows formed by multiple conductive pins. The number of rows extending along the periphery of one mounting area may be two or more, three or more, or even just one. When an electronic component is surrounded by two or more rows formed by conductive pins, an even higher electromagnetic wave shielding effect is likely to be obtained.

[0033] The distance W between two adjacent conductor pins 5 in the same row may be, for example, 500 μm or less. Even if the conductor pins 5 are arranged with a gap between them, if the distance W is small, a sufficient electromagnetic shielding effect is likely to be obtained even if no conductive material is provided between the conductor pins 5. From a similar perspective, the distance W may be 300 μm or less, 200 μm or less, or 100 μm or less. From the perspectives of process stability and reducing the number of required conductor pins 5, the distance W exceeds 0 μm. From a similar perspective, the distance W may be 50 μm or more, 75 μm or more, or 100 μm or more.

[0034] When two or more rows extend along the periphery of the mounting area where electronic components are arranged, the interval W' between two adjacent rows may be 100 μm or more and 500 μm or less. The interval W' may be the minimum distance between the conductor pins constituting the two adjacent rows.

[0035] As another example shown in Fig. 8, multiple conductor pins 5 may be arranged in a staggered pattern in two or more rows (e.g., L1 and L2) that extend along the periphery of the mounting area where electronic components are mounted and do not intersect with each other. "Staggered pattern" means that the conductor pins constituting each of two adjacent rows are arranged alternately in the direction in which the two rows extend. When the conductor pins 5 are arranged in a staggered pattern, a high electromagnetic wave shielding effect can be obtained while using a smaller number of conductor pins 5.

[0036] An example of a test in which a conductor pin is fixed on a wiring structure in a state where it stands upright relative to the connection portion will be described below.

[0037] A test wiring structure was prepared, having a connection portion with a circular cross section and a diameter of 200 μm disposed on an insulating layer. The wiring structure had a surface insulating layer disposed on the insulating layer and having a circular opening surrounding the connection portion. Similar to the process shown in FIG. 5B, a 30 μm-thick mask 41 (metal mask) having a circular opening 41A with a diameter of 190 μm disposed at a position corresponding to the connection portion 67 was placed on the wiring structure, and a water-soluble fluxing agent ("WF-6457" manufactured by Senju Metal Industry Co., Ltd.) was printed to introduce fluxing agent 52 onto the connection portion 67.

[0038] Next, similar to the process shown in (c) of Figure 5, a mask 42 (metal mask) having a thickness of 145 μm (including a rib height of 45 μm) and a circular opening 42A with a diameter of 92 μm provided at a position corresponding to the connection portion 67 was placed on the wiring structure 60, and using a conductor pin mounting machine ("SBP662" manufactured by Shibuya Kogyo Co., Ltd.), a conductor pin 5 (copper pin) and a solder-coated pin 55 (diameter 76 μm, length 180 μm, manufactured by FineNex Co., Ltd.) having a solder film 50 was inserted through the opening 42A of the mask 42, and placed on the connection portion 67 in an upright position relative to the connection portion 67.

[0039] Next, similar to the process shown in (a) of Figure 6, the solder film 50 was melted by reflow in a nitrogen atmosphere at a maximum temperature of 265°C, and the conductor pin 5 was fixed so that the conductor pin 5 and the connection portion 57 were electrically connected via the solder film 50.

[0040] Finally, the fluxing agent 52 was removed by washing with water, similar to the step shown in Fig. 6(b). Fig. 9 is a micrograph of the wiring structure and the conductor pin fixed on the wiring structure, fabricated by the above method. As shown in the photograph in Fig. 7, it was confirmed that the conductor pin 5 could be fixed on the wiring structure in an upright state relative to the connection portion 67. [Explanation of symbols]

[0041] 1...carrier substrate, 2...chip component (electronic component), 3...passive component (electronic component), 5...conductor pin, 6...wiring portion, 6S1, 6S2...main surface of wiring portion, 7...sealing layer, 8...shielding film, 11...support, 12...temporary fixing material layer, 22, 65, 66, 67...connection portion, 41, 42...mask, 41A, 42A...opening, 50...solder film, 55...solder-coated pin, 60...wiring structure, 61...metal wiring, 62...insulating layer, 100...electronic component device.

Claims

1. preparing a wiring structure having a wiring portion including a metal wiring and an insulating layer and having two opposing main surfaces, and a connection portion provided on one main surface of the wiring portion; Fixing one or more conductor pins on the wiring structure in a state where the conductor pins stand relative to the connection portion; Mounting one or more electronic components on the wiring structure; forming a sealing layer on the wiring structure to seal the electronic component and the conductive pins; Including, one or more of the electronic components are disposed in one or more mounting regions on the main surface on which the connection portions of the wiring portions are provided; a plurality of the conductive pins are fixed on the wiring structure; some or all of the plurality of conductor pins are arranged at intervals from one another to form one or more rows, and the mounting area is an area surrounded by the one or more rows, the sealing layer fills spaces between adjacent conductive pins in one row; A method for manufacturing an electronic component device.

2. The method of claim 1 , wherein each of the one or more mounting areas is surrounded by two or more of the rows that extend along the periphery of the mounting area and do not intersect with each other.

3. The method of claim 2 , wherein two or more of the rows extending along the periphery of the mounting area and not intersecting each other include a plurality of the conductor pins arranged in a staggered arrangement.

4. 4. The method according to claim 1, wherein the distance between adjacent conductor pins in one row is greater than 50 μm and equal to or less than 250 μm.

5. The method according to any one of claims 1 to 4, further comprising forming a conductive shielding film covering the sealing layer and connected to the tip of the conductive pin.

6. The method according to any one of claims 1 to 5, further comprising: grinding the sealing layer from a surface opposite to the wiring structure to expose the tip of the conductor pin.

7. The method according to any one of claims 1 to 6, wherein the conductor pin is fixed on the wiring structure in an upright state relative to the connection portion by a method including placing a mask having an opening on the main surface side of the wiring structure on which the connection portion is provided, and inserting the conductor pin through the opening.

8. The method according to any one of claims 1 to 7, wherein the conductor pin has a columnar portion, and a solder-coated pin having the conductor pin and a solder film covering the outer surface of the columnar portion of the conductor pin is placed in an upright position relative to the connection portion, and the solder film is melted in that state, thereby fixing the conductor pin on the wiring structure so as to be electrically connected to the connection portion via solder.

9. The method according to any one of claims 1 to 8, wherein the conductor pin is a metal molded body having a columnar portion with a maximum width of 10 to 500 µm and a length of 50 to 1000 µm.

10. a wiring structure including a wiring portion having two opposing main surfaces including a metal wiring and an insulating layer, and a connection portion provided on one main surface of the wiring portion; one or more electronic components mounted on the wiring structure; a sealing layer formed on the wiring structure to seal the electronic component; one or more conductor pins that extend through the sealing layer while standing on the connection portion; An electronic component device comprising: one or more of the electronic components are disposed in one or more mounting regions on the main surface on which the connection portions of the wiring portions are provided; the electronic component device comprises a plurality of the conductor pins, some or all of the plurality of conductor pins are arranged at intervals from one another to form one or more rows, and the mounting area is an area surrounded by the one or more rows, The sealing layer fills spaces between adjacent conductive pins in one row.

11. The electronic component device according to claim 10 , wherein each of the one or more mounting areas is surrounded by two or more of the rows that extend along the periphery of the mounting area and do not intersect with each other.

12. The electronic component device according to claim 11 , wherein two or more of the rows extending along the outer periphery of the mounting area and not intersecting each other include a plurality of the conductor pins arranged in a staggered arrangement.

13. 13. The electronic component device according to claim 10, wherein the distance between adjacent conductor pins in one row is greater than 50 μm and not greater than 250 μm.

14. 14. The electronic component device according to claim 10, further comprising a conductive shielding film that covers the sealing layer and is connected to the tip of the conductive pin.

15. 15. The electronic component device according to claim 10, further comprising a solder film interposed between the conductive pin and the connecting portion.

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