Semiconductor Devices

Abstract

To provide a semiconductor device in which leak current when a transistor is off can be reduced.SOLUTION: A semiconductor device includes an n-type GaN layer 12, an n-type AlGaN layer 13 disposed on the n-type GaN layer 12, a GaN layer 14 disposed on the n-type AlGaN layer 13, a source electrode 15 disposed on the n-type AlGaN layer 13 and existing on one side of the GaN layer 14, a drain electrode 16 disposed on the n-type AlGaN layer 13 and existing on the other side of the GaN layer 14, a p-type GaN layer 17 disposed on the GaN layer 14 and existing on the source electrode 15 side relative to a center on the GaN layer 14, and a gate electrode 18 disposed on the p-type GaN layer 17. In the GaN layer 14, one or more diodes 20 are formed on the drain electrode 16 side relative to a position right under the p-type GaN layer 17.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device. [Background technology]

[0002] A conventional semiconductor device is a polarization-junction GaN-based FET serving as a HEMT (High Electron Mobility Transistor). This polarization-junction GaN-based FET has a first n-type GaN layer, an n-type AlGaN layer formed on the first n-type GaN layer, and a second n-type GaN layer formed on the n-type AlGaN layer. A source electrode located on one side of the second n-type GaN layer and a drain electrode located on the other side of the second n-type GaN layer are formed on the n-type AlGaN layer. A p-type GaN layer is formed on the second n-type GaN layer, and a gate electrode is formed on the p-type GaN layer. A related technology is disclosed in Patent Document 1.

[0003] The above-mentioned conventional polarization junction GaN-based FET has a problem in that leakage current flows from the gate electrode to the drain electrode when the transistor is turned off.

[0004] Therefore, in the semiconductor device, it is required to reduce the leakage current when the device is off.

[0005] In the conventional polarization-junction GaN-based FET described above, the first GaN layer, AlGaN layer, and second GaN layer are formed in this order on a buffer layer by epitaxial growth. During this epitaxial growth, impurities such as Si and C are introduced into the first GaN layer, AlGaN layer, and second GaN layer, making these layers n-type. This leaves ionized donors in the off-state, which become positively charged. This can result in a deterioration of the breakdown voltage in the off-state. Furthermore, making these layers n-type can hinder the suppression of current collapse.

[0006] Therefore, in the semiconductor device, it is required to suppress the electric field concentration, to suppress the deterioration of the breakdown voltage in the off state, and to suppress the current collapse phenomenon. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-106627 Summary of the Invention [Problem to be solved by the invention]

[0008] Various aspects of the present invention aim to provide a semiconductor device capable of reducing leakage current when a transistor is off. Another object of various aspects of the present invention is to provide a semiconductor device that can suppress the degradation of breakdown voltage in the off state and the current collapse phenomenon by suppressing electric field concentration. [Means for solving the problem]

[0009] Various aspects of the present invention are described below.

[0010] [1] an n-type GaN layer; an n-type AlGaN layer disposed on the n-type GaN layer; a GaN layer disposed on the n-type AlGaN layer; a source electrode disposed on the n-type AlGaN layer and located on one side of the GaN layer; a drain electrode disposed on the n-type AlGaN layer and located on the other side of the GaN layer; a p-type GaN layer disposed on the GaN layer and positioned closer to the source electrode than the center of the GaN layer; a gate electrode disposed on the p-type GaN layer; and The semiconductor device is characterized in that one or more diodes are formed in the GaN layer from directly below the p-type GaN layer to the drain electrode side.

[0011] [2] In [1] above, The semiconductor device is characterized in that the diode has a first conductivity type layer formed on the gate electrode side and a second conductivity type layer formed on the drain electrode side alternately.

[0012] [3] In [2] above, The semiconductor device is characterized in that the first conductivity type layer is formed from the upper surface to the lower surface of the GaN layer.

[0013] [4] In any one of [1] to [3] above, The semiconductor device is characterized in that a plurality of the diodes are formed up to the end of the GaN layer on the drain electrode side, excluding a portion directly under the gate electrode.

[0014] [5] In any one of paragraphs [1] to [4] above, The semiconductor device is characterized in that the GaN layer is a p-type GaN layer having a lower p-type impurity concentration than the p-type GaN layer.

[0015] [6] In paragraph [5] above, The hole density of the GaN layer is 1×10 17 cm -3 A semiconductor device characterized in that:

[0016] [7] In any one of paragraphs [1] to [6] above, The hole density of the p-type GaN layer is 1×10 19 cm -3 The semiconductor device is characterized by the above.

[0017] [8] In any one of paragraphs [1] to [7] above, the n-type GaN layer is disposed on a buffer layer; The semiconductor device is characterized in that the buffer layer is disposed on a substrate.

[0018] [9] In paragraph [8] above, The semiconductor device is characterized in that the substrate is a Si substrate, a sapphire substrate, a SiC substrate, a GaN substrate, an AlN substrate, or a Ga2O3 substrate. [Effects of the Invention]

[0019] According to the semiconductor device of the present invention described above in [1], by forming one or more diodes in the GaN layer, the reverse current blocking function of the diode characteristics can reduce the leakage current from the gate electrode through the GaN layer to the drain electrode.

[0020] According to the semiconductor device of the present invention [2], the diode has a first conductivity type layer on the gate electrode side and a second conductivity type layer on the drain electrode side, alternately formed. When the first conductivity type layer is a p-type layer, the second conductivity type layer is an n-type layer, and when the first conductivity type layer is an n-type layer, the second conductivity type layer is a p-type layer. This allows the leakage current to be reduced by the reverse current blocking function of the diode characteristics.

[0021] According to the semiconductor device of the present invention [3], the first conductivity type layer is formed from the upper surface to the lower surface of the GaN layer, thereby making it possible to reliably reduce leakage current.

[0022] According to the semiconductor device of the present invention [4], a plurality of diodes are formed up to the end of the GaN layer on the drain electrode side, excluding the area directly under the gate electrode, thereby reliably reducing leakage current.

[0023] According to the semiconductor device of the present invention described above in [5], even if the GaN layer is p-type, if the p-type impurity concentration is low, both positively charged ionized donors and negatively charged ionized acceptors are present when the transistor is off, improving the charge balance when the transistor is off, thereby suppressing deterioration of the breakdown voltage.

[0024] Furthermore, according to various aspects of the present invention, it is possible to provide a semiconductor device that can reduce leakage current when a transistor is off. Furthermore, various aspects of the present invention can provide a semiconductor device that can suppress the degradation of breakdown voltage in the off state and the current collapse phenomenon by suppressing electric field concentration. [Brief explanation of the drawings]

[0025] [Figure 1] FIG. 1 is a cross-sectional view schematically showing a semiconductor device according to one embodiment of the present invention, in which a GaN layer 14 is of n-type. [Figure 2] FIG. 1 is a cross-sectional view schematically showing a semiconductor device according to one embodiment of the present invention, in which a GaN layer 14p is of p-type. [Figure 3] FIG. 1 is a diagram for explaining the path of leakage current between the gate and the drain. [Figure 4] FIG. 2 is a diagram showing the results of simulating leakage current values ​​when the gate is off (Vds=900V, Vgs=−15V) for the semiconductor device shown in FIG. 1 and the semiconductor device obtained by removing the diode 20 from the semiconductor device shown in FIG. 1. DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0027] (First embodiment) FIG. 1 is a cross-sectional view schematically showing a semiconductor device according to one embodiment of the present invention, in which a GaN layer 14 is of n-type.

[0028] This semiconductor device has an n-type GaN layer 12, an n-type AlGaN layer 13 disposed on the n-type GaN layer 12, a GaN layer 14 disposed on the n-type AlGaN layer 13, a source electrode 15 disposed on the n-type AlGaN layer 13 and located on one side of the GaN layer 14, a drain electrode 16 disposed on the n-type AlGaN layer 13 and located on the other side of the GaN layer 14, a p-type GaN layer 17 disposed on the GaN layer 14 and located closer to the source electrode 15 than the center of the GaN layer 14, and a gate electrode 18 disposed on the p-type GaN layer 17, and one or more diodes 20 are formed in the GaN layer 14 from directly below the p-type GaN layer 17 to the drain electrode 16 side.

[0029] This is explained in detail below. The semiconductor device shown in FIG. 1 is a polarization junction GaN-based FET (Field Effect Transistor) serving as a HEMT (High Electron Mobility Transistor). The polarization junction GaN-based FET has a substrate 10, which may be a GaN substrate, a SiC substrate, a Si substrate, a sapphire substrate, an AlN substrate, or a Ga2O3 substrate. A buffer layer 11 is formed on the substrate 10. This buffer layer 11 is made of, for example, polycrystalline or amorphous GaN, AlGaN, or an AlGaN / GaN superlattice. An n-type GaN layer (n-GaN1) 12 is disposed on the buffer layer 11, and the n-type impurity concentration of this n-type GaN layer 12 is 1×10 15 cm -3 It would be better if it was below.

[0030] An n-type AlGaN layer (n-AlGaN) 13 is disposed on the n-type GaN layer 12. The n-type impurity concentration of this n-type AlGaN layer 13 is 1×10 15 cm -3 It would be better if it was below.

[0031] A GaN layer is disposed on the n-type AlGaN layer 13, and the n-type GaN layer (n-GaN2) 14 shown in FIG. 1 can be used as this GaN layer.

[0032] 1, polarization junction GaN-based FET is caused by the piezoelectric effect of n-type AlGaN layer 13, which induces positive fixed charges in n-type AlGaN layer 13 near the interface between n-type GaN layer 12 and n-type AlGaN layer 13, and negative fixed charges in n-type AlGaN layer 13 near the interface between n-type AlGaN layer 13 and n-type GaN layer 14. As a result, two-dimensional hole gas (2DHG) 30 is formed in n-type GaN layer 14 near the interface between n-type AlGaN layer 13 and n-type GaN layer 14, and two-dimensional electron gas (2DEG) 31 is formed in n-type GaN layer 12 near the interface between n-type GaN layer 12 and n-type AlGaN layer 13. This two-dimensional electron gas (2DEG) 31 serves as the channel of the transistor.

[0033] Furthermore, a source electrode (S) 15 is disposed on the n-type AlGaN layer 13, and this source electrode 15 is located on one side of the n-type GaN layer .

[0034] Furthermore, a drain electrode (D) 16 is disposed on the n-type AlGaN layer 13, and this drain electrode 16 is located on the other side of the n-type GaN layer 14. The source electrode 15 and the drain electrode 16 may be made of a laminated film, for example, in which a Ni film, an Au film, an Al film, or the like is laminated on a Ti film.

[0035] A p-type GaN layer (p-GaN2) 17 is disposed on the n-type GaN layer 14, and the p-type GaN layer 17 is located closer to the source electrode 15 than the center of the n-type GaN layer 14. The hole density of the p-type GaN layer 17 is 1×10 19 cm -3 This is desirable, as it allows good contact with the gate electrode 18.

[0036] A gate electrode (G) 18 is disposed on the p-type GaN layer 17. The p-type GaN layer 17 has a lower layer of, for example, p - The upper layer is p-type GaN layer + It is preferable that the gate electrode 18 has a two-layer structure of a GaN layer. The gate electrode 18 is preferably made of a laminated film in which another metal film is laminated on a Ni film, for example.

[0037] One or more diodes 20 are formed in the n-type GaN layer 14 from directly below the p-type GaN layer 17 toward the drain electrode 16. In the diode 20, first conductivity type layers 21 are alternately formed on the gate electrode 18 side and second conductivity type layers 22 are alternately formed on the drain electrode 16 side. When the first conductivity type layers 21 are p-type layers (e.g., p-GaN1), the second conductivity type layers 22 are n-type layers (e.g., n-GaN3). This allows the leakage current of path 1 shown in FIG. 3 to be reduced by the reverse current blocking function of the diode characteristics. Furthermore, because the first conductivity type layer 21 becomes p-type, when the GaN layer 14 is n-type, electrons generated by the current collapse phenomenon can be neutralized and eliminated by holes in the p-type layer 21. As a result, it is also possible to prevent electrons from being trapped in the n-type GaN layer 14. Therefore, it is expected that a low-loss GaN-based HEMT with excellent current collapse suppression can be realized.

[0038] 1, the first conductivity type layer (p-type layer) 21 is formed from the upper surface to the lower surface of the n-type GaN layer 14. The second conductivity type layer (n-type layer) 22 is also formed from the upper surface to the lower surface of the n-type GaN layer 14. This ensures that the leakage current of the path 1 shown in FIG.

[0039] 1, extending to the end of the n-type GaN layer 14 on the drain electrode 16 side, excluding the area directly under the gate electrode 18. This ensures a reduction in the leakage current of the path 1 shown in FIG.

[0040] According to this embodiment, by forming one or more diodes 20 in the n-type GaN layer 14, the reverse current blocking function of the diode characteristics can reduce the current flowing through the path 1 from the gate electrode 18 through the n-type GaN layer 14 toward the drain electrode 16 (see FIG. 3).

[0041] This is explained in detail below. FIG. 3 is a diagram for explaining the path of leakage current between the gate and drain; diodes are not shown in this diagram. As shown in FIG. 3, leakage current can take two possible paths: path 1 and path 2. Path 1 is a path that flows from the gate electrode 18 to the surface of the n-type GaN layer 14 or across the n-type GaN layer 14 toward the drain electrode 16. Path 2 is a path that flows from the gate electrode 18 through the n-type GaN layer 14 and the n-type AlGaN layer 13, across the n-type GaN layer 12, and toward the drain electrode 16. The leakage current is larger through path 1 than through path 2. In this embodiment, the leakage current in the path 1 can be reduced by the reverse current blocking function of the diode characteristics.

[0042] 4 is a diagram showing the results of simulating leakage current values ​​when the gate is off (Vds=900V, Vgs=−15V) for the semiconductor device shown in FIG. 1 and a semiconductor device obtained by removing the diode 20 from the semiconductor device shown in FIG. 1. The curve indicated by reference numeral 102 is the result for the semiconductor device shown in FIG. 1, and the curve indicated by reference numeral 101 is the result for the semiconductor device obtained by removing the diode 20 from the semiconductor device shown in FIG. As shown in FIG. 4, it was found that at Vds=900V, the leakage current (Ids) was reduced by 17%.

[0043] Note that structures having a diode near the gate include active clamp diodes that use a semiconductor element to absorb the energy of an inductive load, but active clamp diodes have a structure in which the diode is connected from the gate to the drain, whereas in the present invention, a diode is introduced into the GaN layer 14 to reduce leakage between the gate and the drain, and is not connected to the drain, so the purpose and structure are different from those of active clamp diodes.

[0044] (Second embodiment) Fig. 2 is a cross-sectional view schematically showing a semiconductor device according to one embodiment of the present invention, in which the GaN layer 14p is p-type. Similar to the semiconductor device shown in Fig. 1, the semiconductor device shown in Fig. 2 is also a polarization junction GaN-based FET as a HEMT (High Electron Mobility Transistor), and the polarization junction GaN-based FET has an n-type GaN layer (n-GaN1) 12.

[0045] The semiconductor device shown in Fig. 2 differs from the semiconductor device shown in Fig. 1 in that the n-type GaN layer 14 shown in Fig. 1 is a p-type GaN layer (p-GaN1) 14p in the semiconductor device shown in Fig. 2. The p-type impurity concentration of this p-type GaN layer 14p is 1 × 10 17 cm -3 It would be better if it was below.

[0046] 2, polarization due to the piezoelectric effect of the n-type AlGaN layer (n-AlGaN) 13 induces positive fixed charges in the n-type AlGaN layer 13 near the interface between the n-type GaN layer 12 and the n-type AlGaN layer 13, and negative fixed charges in the n-type AlGaN layer 13 near the interface between the n-type AlGaN layer 13 and the p-type GaN layer 14p. As a result, a two-dimensional hole gas (2DHG) 30 is formed in the p-type GaN layer 14p near the interface between the n-type AlGaN layer 13 and the p-type GaN layer 14p, and a two-dimensional electron gas (2DEG) 31 is formed in the n-type GaN layer 12 near the interface between the n-type GaN layer 12 and the n-type AlGaN layer 13. The two-dimensional electron gas (2DEG) 31 serves as the channel of the transistor.

[0047] The p-type GaN layer 14p shown in FIG. 2 is preferably a p-type GaN layer having a lower p-type impurity concentration than the p-type GaN layer (p-GaN2) 17. Specifically, the hole density of the p-type GaN layer 14p shown in FIG. 17 cm -3It is preferable that the p-type impurity concentration is less than 1 / 2. Even if the GaN layer 14p is p-type, by lowering the p-type impurity concentration, both positively charged ionized donors and negatively charged ionized acceptors are present in the A-A' cross section shown in FIG. 3 when the transistor is off, improving the charge balance when the transistor is off, thereby suppressing deterioration in the breakdown voltage. In addition, it is possible to suppress the current collapse phenomenon.

[0048] In the diode 20a, first conductivity type layers 23 are alternately formed on the gate electrode 18 side and second conductivity type layers 24 are alternately formed on the drain electrode 16 side. When the first conductivity type layers 23 are n-type layers (n-GaN2), the second conductivity type layers 24 are p-type layers (p-GaN3). This allows the leakage current of path 1 shown in FIG. 3 to be reduced by the reverse current blocking function of the diode characteristics.

[0049] 2, the first conductivity type layer (n-type layer) 23 is formed from the upper surface to the lower surface of the p-type GaN layer 14p. Similarly, the second conductivity type layer (p-type layer) 24 is formed from the upper surface to the lower surface of the p-type GaN layer 14p. This reliably reduces the leakage current of the path 1 shown in FIG. 3.

[0050] A plurality of diodes 20 are formed up to the end of the p-type GaN layer 14p on the drain electrode 16 side, excluding the area directly under the gate electrode 18, as shown in Fig. 2. This ensures a reduction in the leakage current of the path 1 shown in Fig. 3. Explaining in detail, as in the first embodiment, as shown in FIG. 3, there are two possible paths for leakage current: path 1 and path 2. Path 1 is a path that flows from the gate electrode 18 to the surface of the p-type GaN layer 14p or across the p-type GaN layer 14p toward the drain electrode 16. Path 2 is a path that flows from the gate electrode 18 through the p-type GaN layer 14p and the n-type AlGaN layer 13, across the n-type GaN layer 12, and toward the drain electrode 16. The leakage current is larger in path 1 than in path 2. In this embodiment, the leakage current in the path 1 can be reduced by the reverse current blocking function of the diode characteristics. 1, the semiconductor device shown in FIG. 2 also has the effect of reducing the leakage current (Ids) at Vds=900V, as shown in the simulation results.

[0051] Furthermore, according to this embodiment, even if the GaN layer 14p is p-type, if the p-type impurity concentration is low, both positively charged ionized donors and negatively charged ionized acceptors are present in the cross section A-A' shown in Figure 3 when the transistor is off, improving the charge balance when the transistor is off, thereby suppressing deterioration in the breakdown voltage, i.e., achieving a high breakdown voltage.

[0052] Furthermore, in this embodiment, the second n-type GaN layer in the polarization-junction GaN-based FET of the prior art is replaced with the p-type GaN layer 14p shown in FIG. 2, which has a low p-type impurity concentration. When the transistor is on, even if electrons in the two-dimensional electron gas (2DEG) 31 accelerated by a high voltage cross the potential barrier and move to the n-type AlGaN layer 13, the electrons are neutralized with holes in the p-type GaN layer 14p, which is believed to prevent the lower part of the n-type AlGaN layer 13 from becoming negatively charged. This prevents electrons in the channel of the two-dimensional electron gas (2DEG) 31 directly below the n-type AlGaN layer 13 from being depleted. As a result, an increase in channel resistance, a decrease in drain current, and an increase in on-resistance are prevented. This makes it possible to suppress the current collapse phenomenon. In other words, the p-type GaN layer 14p shown in FIG. 2 is believed to have the function of balancing the polarization due to the piezoelectric effect of the n-type AlGaN layer 13. Based on the above explanation, a low-loss GaN-based FET can be realized. [Explanation of symbols]

[0053] 12 n-type GaN layer (n-GaN1) 13 n-type AlGaN layer (n-AlGaN) 14 n-type GaN layer (n-GaN2) 14p p-type GaN layer (p-GaN1) 15 Source electrode (S) 16 Drain electrode (D) 17 p-type GaN layer (p-GaN2) 18 Gate electrode (G) 20,20a diode 21 First conductivity type layer (p-type layer, p-GaN1) 22 Second conductivity type layer (n-type layer, n-GaN3) 23 First conductivity type layer (n-type layer, n-GaN2) 24 Second conductivity type layer (p-type layer, p-GaN3)

Claims

1. an n-type GaN layer; an n-type AlGaN layer disposed on the n-type GaN layer; a GaN layer disposed on the n-type AlGaN layer; a source electrode disposed on the n-type AlGaN layer and located on one side of the GaN layer; a drain electrode disposed on the n-type AlGaN layer and located on the other side of the GaN layer; a p-type GaN layer disposed on the GaN layer and positioned closer to the source electrode than the center of the GaN layer; a gate electrode disposed on the p-type GaN layer; and The semiconductor device is characterized in that one or more diodes are formed in the GaN layer from directly below the p-type GaN layer to the drain electrode side.

2. In claim 1, The semiconductor device is characterized in that the diode has a first conductivity type layer formed on the gate electrode side and a second conductivity type layer formed on the drain electrode side, alternately formed.

3. In claim 2, The semiconductor device is characterized in that the first conductivity type layer is formed from the upper surface to the lower surface of the GaN layer.

4. In any one of claims 1 to 3, The semiconductor device is characterized in that a plurality of the diodes are formed up to the end of the GaN layer on the drain electrode side, excluding a portion immediately below the gate electrode.

5. In any one of claims 1 to 3, The semiconductor device is characterized in that the GaN layer is a p-type GaN layer having a p-type impurity concentration lower than that of the p-type GaN layer.

6. In claim 5, The hole density of the GaN layer is 1×10 １７ cm －３ A semiconductor device characterized in that:

7. In any one of claims 1 to 3, The hole density of the p-type GaN layer is 1×10 １９ cm －３ The semiconductor device is characterized by the above.

8. In any one of claims 1 to 3, the n-type GaN layer is disposed on a buffer layer; The semiconductor device is characterized in that the buffer layer is disposed on a substrate.

9. In claim 8, The substrate may be a Si substrate, a sapphire substrate, a SiC substrate, a GaN substrate, an AlN substrate, or a Ga ２ O ３ A semiconductor device characterized in that it is a substrate.

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