Band synthesizing circuit

Abstract

The band synthesis circuit (10A) includes delta-sigma DACs (2A-1, 2A-2), a multiplexing circuit (4A), and a BPF (5A). The delta-sigma DACs (2A-1, 2A-2) perform processing, including quantization, on input signals and output signals that include signals valid in a first band, which is a portion of the entire frequency band to be output, and do not include signals valid in a second band. The multiplexing circuit (4A) combines multiple output signals from the delta-sigma DACs (2A-1, 2A-2). The BPF (5A) passes signals in a passband that is a portion of the frequency band included in the second band, and that includes part of the quantization noise generated in the delta-sigma DAC (2A-1), and blocks the rest. The output of the BPF (5A) is subtracted from the input signal to the delta-sigma DAC (2A-2) where the passband of the BPF (5A) overlaps with the first band of the output signal.

Description

[Technical Field]

[0001] The present disclosure relates to a band combining circuit that combines a plurality of signals and outputs a signal with a wider band than the signals before the combination. [Background technology]

[0002] In recent years, a technique called direct digital RF has been studied, in which a delta-sigma DAC (Digital-Analog Converter) is used to output an RF (Radio Frequency) signal directly from an FPGA (Field-Programmable Gate Array) (Non-Patent Document 1). In principle, the signal bandwidth available in a delta-sigma DAC is 5 to 10% of the sampling rate at which the delta-sigma DAC performs quantization, and is therefore limited by the maximum output rate of the high-speed serial transceiver built into the FPGA.

[0003] One way to widen the output signal bandwidth of a circuit that performs processing including quantization, such as a delta-sigma DAC, without increasing the sampling rate is to combine the outputs of multiple circuits. In this case, by band-combining the outputs of multiple circuits by shifting the frequencies of the effective signals contained in the outputs of each circuit, it becomes possible to output a wideband signal. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Suematsu, K. et al., "Direct Digital RF Technology," IEICE Transactions, Vol. J102-C, No. 11, pp. 297-304, Nov. 2019. Summary of the Invention [Problem to be solved by the invention]

[0005] However, quantization generates quantization noise during processing. When multiple output signals containing quantization noise are band-combined, the effective signal and the quantization noise may be combined, potentially distorting the signal waveform. Therefore, it is desirable to perform band-combining after removing the quantization noise generated in each circuit. To reliably separate the effective signal from the quantization noise, it is necessary to design dedicated analog filters with cutoff frequencies corresponding to the frequencies and bandwidths used in each circuit. This poses a problem: the number of dedicated analog filters required increases.

[0006] The present disclosure has been made in view of the above, and aims to provide a band synthesis circuit that can widen the output signal bandwidth of a circuit that performs processing including quantization without increasing the sampling rate, while reducing the number of required dedicated analog filters. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems and achieve the object, the band synthesis circuit of the present disclosure comprises a plurality of quantization circuits that perform processing including quantization on an input signal and output an output signal that includes a valid signal in a first band that is a part of the total frequency band to be output, and that does not include a valid signal in a second band that is the remaining frequency band; a combining circuit that combines the plurality of output signals output by the plurality of quantization circuits; and a first filter that passes signals of a pass band that is a part of the frequency band included in the second band of the output signal of a first quantization circuit of the plurality of quantization circuits and that includes a part of the quantization noise generated in the first quantization circuit, and blocks signals of the remaining frequency bands, and is characterized in that the output of the first filter is subtracted from the input signal to a second quantization circuit that is a quantization circuit other than the first quantization circuit and whose pass band overlaps with the first band of the output signal, and the result is input to the second quantization circuit. [Effects of the Invention]

[0008] The band synthesis circuit according to the present disclosure has the advantage of being able to reduce the number of required dedicated analog filters while widening the output signal bandwidth of a circuit that performs processing including quantization without increasing the sampling rate. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing a configuration of a band synthesis circuit according to a comparative example; [Figure 2] An explanatory diagram of the characteristics required for the filter used in the band synthesis circuit shown in Figure 1. [Figure 3] FIG. 1 is a diagram illustrating a functional configuration of a band synthesis circuit according to a first embodiment. [Figure 4] An explanatory diagram of the characteristics required for the filter used in the band synthesis circuit shown in Figure 3. [Figure 5] FIG. 4 shows an example of a hardware configuration for realizing the band synthesis circuit shown in FIG. 3. [Figure 6] FIG. 10 is a diagram illustrating a functional configuration of a band synthesis circuit according to a second embodiment. [Figure 7] FIG. 10 is a diagram illustrating a functional configuration of a band synthesis circuit according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, a band synthesis circuit according to an embodiment of the present disclosure will be described in detail with reference to the drawings.

[0011] First, as a comparative example of the present disclosure, a method of removing quantization noise using a filter for each system before band combining in a band combining circuit that combines the bands of outputs from two systems of delta-sigma DACs will be described with reference to FIGS.

[0012] FIG. 1 is a diagram illustrating the configuration of a band combining circuit 90 according to a comparative example. FIG. 2 is an explanatory diagram illustrating characteristics required for a filter used in the band combining circuit 90 shown in FIG. 1. The band combining circuit 90 according to the comparative example of the present disclosure includes a demultiplexer circuit 91, two delta-sigma DACs 92-1 and 92-2, filters 93-1 and 93-2, and a multiplexer circuit 94. Here, multiple components having a common function are distinguished by adding a common symbol followed by a hyphen and a different symbol. When it is not necessary to distinguish between multiple components having a common function, only the common symbol may be used. For example, when it is not necessary to distinguish between the delta-sigma DACs 92-1 and 92-2, they are simply referred to as the delta-sigma DAC 92. In the drawings, the delta-sigma DAC is referred to as a "ΔΣ-DAC."

[0013] The demultiplexer circuit 91 separates the input signal in terms of frequency. The demultiplexer circuit 91 outputs the separated signals to the delta-sigma DACs 92-1 and 92-2, respectively. Here, the demultiplexer circuit 91 outputs the low-frequency signal of the separated signals to the delta-sigma DAC 92-1 and the high-frequency signal to the delta-sigma DAC 92-2. (a) of FIG. 1 shows the input signal to the demultiplexer circuit 91.

[0014] The delta-sigma DAC 92 is an example of a quantization circuit that performs processing including quantization on an input signal, and is a digital-sigma digital-to-analog converter. The delta-sigma DAC 92 interpolates the input digital signal in the time domain to increase the sampling frequency, passes this output through a delta-sigma modulator to generate low-bit oversampled data, and then performs digital-to-analog conversion on the low-bit oversampled data to output an analog signal. (b-1) in Figure 1 shows the output signal of the delta-sigma DAC 92-1, and (b-2) in Figure 1 shows the output signal of the delta-sigma DAC 92-2. Quantization noise occurs in the delta-sigma DACs 92-1 and 92-2 during quantization, and a signal containing the quantization noise is output in addition to the valid signal. The output signal of the delta-sigma DAC 92 is an analog signal.

[0015] The filters 93-1 and 93-2 are analog filters. The filter 93-1 is a low-pass filter that receives the output signal of the delta-sigma DAC 92-1 as its input signal. The filter 93-2 is a high-pass filter that receives the output signal of the delta-sigma DAC 92-2 as its input signal. The filter 93-1 passes an effective signal included in the output signal of the delta-sigma DAC 92-1 and blocks high-frequency components of the quantization noise included in the output signal of the delta-sigma DAC 92-1. The filter 93-2 passes an effective signal included in the output signal of the delta-sigma DAC 92-2 and blocks low-frequency components of the quantization noise included in the output signal of the delta-sigma DAC 92-2. For this reason, as shown in FIG. 2, the start frequency of the high-frequency components of the quantization noise included in the output signal of the delta-sigma DAC 92-1 is set to f1, and the cutoff frequency of the filter 93-1 is set to f2. c1 The start frequency of the low-frequency quantization noise contained in the output signal of the delta-sigma DAC 92-2 is set to f2, and the cutoff frequency of the filter 93-2 is set to f c2 In this case, the relationship between these frequencies must satisfy the following formula (1).

[0016]

number

[0017] The signal system including the delta-sigma DAC 92-1, i.e., the signal system from the diplexer circuit 91 to the multiplexer circuit 94 via the delta-sigma DAC 92-1 and filter 93-1, is referred to as system #1, and the signal system including the delta-sigma DAC 92-2, i.e., the signal system from the diplexer circuit 91 to the multiplexer circuit 94 via the delta-sigma DAC 92-2 and filter 93-2, is referred to as system #2.

[0018] Returning to the explanation of Figure 1, the multiplexing circuit 94 combines the output signals of the delta-sigma DACs 92-1 and 92-2 that are input via filters 93-1 and 93-2. The effective signal included in the output signal of the delta-sigma DAC 92-1 and the effective signal included in the output signal of the delta-sigma DAC 92-2 are designed so that their frequency bands do not overlap, and the output signal is as shown in Figure 1(c).

[0019] As described above, in the configuration shown in FIG. 1, the start frequencies f1 and f2 of the quantization noise in each delta-sigma DAC 92 and the cutoff frequency f c1 ,f c2 The relationship between and must strictly satisfy the relationship in equation (1). For this reason, in the configuration of Figure 1, two dedicated analog filters, filters 93-1 and 93-2, must be designed according to the frequency and bandwidth to be used.

[0020] Another possible method for eliminating the quantization noise of the delta-sigma DAC92 without using an analog filter is to use a multi-bit general-purpose DAC for noise cancellation. However, multi-bit general-purpose DACs have a lower sampling rate than the high-speed serial transceivers built into FPGAs that are often used in direct digital RF systems. This makes it difficult to directly cancel the quantization noise in the high-frequency band generated by direct digital RF using a multi-bit general-purpose DAC. Furthermore, using a multi-bit general-purpose DAC would cancel out the advantage of direct digital RF of not requiring an external DAC.

[0021] Below, we will explain a new method that can reduce the number of dedicated analog filters required in a band synthesis circuit, while widening the output signal bandwidth of a circuit that performs processing including quantization without increasing the sampling rate.

[0022] Embodiment 1 3 is a diagram showing a functional configuration of a band synthesis circuit 10A according to the first embodiment. The band synthesis circuit 10A performs two-band synthesis. The band synthesis circuit 10A includes a demultiplexer circuit 1A, delta-sigma DACs 2A-1 and 2A-2, a filter 3A, a multiplexer circuit 4A, a BPF (Band Pass Filter) 5A, and delay circuits 6A-1 and 6A-2. The delta-sigma DACs 2A-1 and 2A-2 are an example of a quantization circuit that performs processing including quantization on an input signal.

[0023] The demultiplexer circuit 1A separates the input signal into two signals, one of which is equal to the number of delta-sigma DACs 2A, and outputs one of the separated signals to the delta-sigma DAC 2A-1, while outputting the other of the separated signals to a delay circuit 6A-2 provided immediately before the delta-sigma DAC 2A-2. Here, the demultiplexer circuit 1A outputs the low-frequency signal of the separated signals to the delta-sigma DAC 2A-1, and outputs the high-frequency signal of the separated signals to the delay circuit 6A-2.

[0024] The delta-sigma DAC2A is an example of a quantization circuit that performs processing, including quantization, on an input signal. It is a digital-sigma digital-to-analog converter. The delta-sigma DAC2A interpolates the digital input signal in the time domain to increase the sampling frequency, passes the output through a delta-sigma modulator to generate low-bit oversampled data, and then performs digital-to-analog conversion on the low-bit oversampled data to output an analog signal. (b-1) of FIG. 3 shows the output signal of the delta-sigma DAC2A-1, and (b-2) of FIG. 3 shows the output signal of the delta-sigma DAC2A-2. Quantization noise occurs in the delta-sigma DACs 2A-1 and 2A-2, and a signal containing the quantization noise is output in addition to the valid signal. The output signal of the delta-sigma DAC2A contains a valid signal in a first band, which is a portion of the total frequency band to be output, and does not contain a valid signal in a second band, which is the remaining frequency band. Furthermore, the first band of the delta-sigma DAC2A-1 and the first band of the delta-sigma DAC2A-2 do not overlap but are adjacent to each other.

[0025] The delta-sigma DAC2A-1 is an example of a first quantization circuit among the plurality of delta-sigma DACs 2A, and the delta-sigma DAC2A-2 is an example of a second quantization circuit that is a quantization circuit other than the first quantization circuit.

[0026] The filter 3A is an analog filter provided between the delta-sigma DAC2A-2 and the multiplexing circuit 4A. The filter 3A is an example of a second filter that passes a frequency band including a first band, which is a frequency band including a valid signal, from the output of the delta-sigma DAC2A-2 and blocks the remaining frequency band including a portion of the quantization noise generated in the delta-sigma DAC2A-2. The filter 3A is a high-pass filter in this example and blocks the low-frequency portion of the quantization noise generated in the delta-sigma DAC2A-2. The filter 3A outputs the processed signal to the multiplexing circuit 4A. The signal output by the filter 3A is the signal shown in (b-2) of FIG. 3 with the low-frequency quantization noise removed.

[0027] The multiplexing circuit 4A combines the output signals of the multiple delta-sigma DACs 2A. Specifically, the multiplexing circuit 4A combines the output signal of the delta-sigma DAC 2A-1, which has been delayed by the delay circuit 6A-1, with the output signal of the delta-sigma DAC 2A-2, from which low-frequency quantization noise has been removed by the filter 3A. Figure 3(c) shows the output signal of the multiplexing circuit 4A.

[0028] The BPF5A is an example of a first filter that passes signals in a frequency band included in the second band of the output signal of the delta-sigma DAC2A-1, which is the first quantization circuit, and blocks signals in the remaining frequency bands. The passband of the BPF5A overlaps with the first band of the delta-sigma DAC2A-2, which is the second quantization circuit, and is designed to pass signals in a frequency band that includes the valid signal of the delta-sigma DAC2A-2. Figure 3(d) shows the output signal of the BPF5A, which includes a portion of the quantization noise generated by the delta-sigma DAC2A-1.

[0029] The output of the BPF 5A is subtracted from the input signal to the delta-sigma DAC 2A-2, which is input from the demultiplexer circuit 1A via the delay circuit 6A-2, and the result is input to the delta-sigma DAC 2A-2.

[0030] The delay circuit 6A-1 is an example of a first delay circuit provided between the delta-sigma DAC 2A-1 and the multiplexing circuit 4A. The delay circuit 6A-1 delays the output of the delta-sigma DAC 2A-1 by a delay time equal to the sum of the processing delay time of the delta-sigma DAC 2A-2 and the processing delay time of the BPF 5A, and outputs the delayed output to the multiplexing circuit 4A.

[0031] The delay circuit 6A-2 is provided between the diplexer circuit 1A and the delta-sigma DAC 2A-2. The delay circuit 6A-2 delays the input signal to the delta-sigma DAC 2A-2, which is output from the diplexer circuit 1A, by a delay time equal to the sum of the processing delay time of the delta-sigma DAC 2A-1 and the processing delay time of the BPF 5A.

[0032] The demultiplexer circuit 1A, the delta-sigma DACs 2A-1 and 2A-2, the delay circuits 6A-1 and 6A-2, and the BPF 5A are implemented by FPGAs. The filter 3A and the multiplexer circuit 4A process the analog signal output by the FPGA.

[0033] Here, we will explain the signal processing in the band synthesis circuit 10A. An input signal such as that shown in FIG. 3(a) is first frequency-separated by the demultiplexer circuit 1A into two signals: a low-frequency path #1 and a high-frequency path #2. The path #1 signal is converted into a 1-bit signal by the delta-sigma DAC 2A-1, delayed by a predetermined number of samples by the delay circuit 6A-1, output from the FPGA, and input to the analog multiplexer circuit 4A. The 1-bit signal output from the delta-sigma DAC 2A-1 is replicated, and the frequency range in which the valid signal of path #2 exists is extracted by the BPF 5A and transmitted to the signal processing path of path #2. In other words, the BPF 5A extracts a portion of the output signal of the delta-sigma DAC 2A-1 of path #1 and transmits it to the signal processing path of path #2. The passband of this BPF 5A is designed to overlap with the first band in which the valid signal of the delta-sigma DAC 2A-2 of path #2 exists. In the output signal of the delta-sigma DAC2A-1 of line #1, the passband of the BPF5A includes quantization noise generated in the delta-sigma DAC2A-1, so the BPF5A extracts part of the quantization noise generated in the delta-sigma DAC2A-1.

[0034] The signal of path #2 is delayed by delay circuit 6A-2 by the number of samples, which is the sum of the processing delay time of delta-sigma DAC2A-1 and the processing delay time of BPF5A, and after subtracting the output from BPF5A, the signal is input to delta-sigma DAC2A-2 and converted to a 1-bit signal. The 1-bit signal output from delta-sigma DAC2A-2 is output from the FPGA, and then has low-frequency quantization noise removed by filter 3A, which is an analog filter, before being input to multiplexing circuit 4A, which is an analog circuit.

[0035] Finally, the 1-bit signal on the system #1 side and the 1-bit signal on the system #2 side are combined by the combining circuit 4A, and a band signal corresponding to the original input signal is output.

[0036] In the band synthesis circuit 10A shown in Figure 3, the quantization noise generated by the delta-sigma DAC 2A-1 is extracted by the BPF 5A from a frequency band that overlaps with the first band, which is the band in which the valid signal of the delta-sigma DAC 2A-2 exists, and this signal is subtracted in advance from the input signal to the delta-sigma DAC 2A-2. Therefore, in the combined signal output by the multiplexing circuit 4A, the effect of the quantization noise generated by the delta-sigma DAC 2A-1 on the valid signal of path #2 is canceled immediately after signal generation. This makes it possible to reduce the number of dedicated analog filters required and widen the output signal bandwidth of the circuit that performs processing including quantization without increasing the sampling rate.

[0037] 4 is an explanatory diagram of the characteristics required for the filter 3A used in the band synthesis circuit 10A shown in FIG. 3. In the configuration shown in FIG. 3, the filter 3A is a high-pass filter that cuts off quantization noise on the low-frequency side. For this reason, the cutoff frequency f c2 is only required to be greater than the start frequency f2 of the quantization noise of the branch #2. In the comparative example shown in FIGS. c2 is greater than f2 and f c1 Compared to this example, the band synthesis circuit 10A according to the first embodiment can ease the conditions required for the cutoff frequency of the analog filter.

[0038] 5 is a diagram illustrating an example of a hardware configuration for implementing the band synthesis circuit 10A shown in FIG. 3. Each functional block of the band synthesis circuit 10A shown in FIG. 3 can be implemented by digital signal processing using a memory 11, a processor 12, and high-speed serial output circuits 13-1 and 13-2. The memory 11 may be, for example, a non-volatile or volatile semiconductor memory such as a random access memory (RAM), a read-only memory (ROM), a flash memory, an erasable programmable read-only memory (EPROM), or an electrically EEPROM (registered trademark), a magnetic disk, a flexible disk, an optical disk, a compact disk, a minidisk, or a digital versatile disk (DVD). The processor 12 is a central processing unit (CPU), also referred to as an arithmetic unit, a microprocessor, a microcomputer, or a digital signal processor (DSP).

[0039] Each of the above functional blocks is realized by software, firmware, or a combination of software and firmware. The software or firmware is written as a program and stored in memory 11. The programs stored in memory 11 are read and executed by processor 12 to realize each function. Note that memory 11 is also used as a temporary memory for each process executed by processor 12. The programs executed by processor 12 may be provided in a state stored in a storage medium, or may be provided via a communication path such as the Internet.

[0040] The demultiplexer circuit 1A and the BPF 5A are configured by digital filters such as an FIR (Finite Impulse Response) filter and an IIR (Infinite Impulse Response) filter.

[0041] 5. Moreover, the filter 3A in FIG. 3 is realized by the analog filter 14 in FIG. 5, and the multiplexing circuit 4A in FIG. 3 is realized by the analog multiplexing circuit 15 in FIG.

[0042] As described above, according to the first embodiment, it is possible to provide the band combining circuit 10A that can realize two-band synthesis. The number of delta-sigma DACs 2A that constitute the band combining circuit 10A is two. The band synthesis circuit 10A is equipped with delta-sigma DACs 2A-1 and 2A-2, which are multiple quantization circuits that perform processing including quantization on input signals and output signals that include a valid signal in a first band that is a portion of the entire frequency band to be output, and that do not include a valid signal in a second band that is the remaining frequency band; a multiplexing circuit 4A that combines the multiple output signals output by the multiple quantization circuits; and a first filter BPF5A that passes signals in a passband that is a portion of the frequency band included in the second band, of the output signal of the delta-sigma DAC2A-1, which is a first quantization circuit of the multiple quantization circuits, and that includes a portion of the quantization noise generated in the first quantization circuit, and blocks signals in the remaining frequency bands.The output of the first filter is subtracted from the input signal to the delta-sigma DAC2A-2, which is a quantization circuit other than the first quantization circuit and is a second quantization circuit whose passband overlaps with the first band of the output signal, and the result is input to the second quantization circuit.

[0043] The band synthesis circuit 10A further includes a second filter, filter 3A, which is an analog filter provided between the delta-sigma DAC 2A-2 (a second quantization circuit) and the multiplexing circuit 4A. The second filter 3A passes a frequency band including the first band from the output of the second quantization circuit and blocks the remaining frequency band including a portion of the quantization noise generated by the second quantization circuit. The number of filters 3A (second filters) constituting the band synthesis circuit 10A is N-1, where N is the number of delta-sigma DACs 2A (quantization circuits). Since N=2 in the band synthesis circuit 10A, the number of filters 3A is one. Thus, compared to the comparative example shown in FIG. 1, the minimum number of analog filters required to remove quantization noise can be reduced to N-1. When N=2, the number of analog filters is reduced by half, which significantly impacts the band synthesis circuit 10A.

[0044] In the band synthesis circuit 10A, the quantization circuit is a delta-sigma digital-to-analog converter. The number of delta-sigma DAC2A, which are quantization circuits constituting the band synthesis circuit 10A, is two. The band synthesis circuit 10A further includes a delay circuit 6A-1, which is a first delay circuit, that delays the output of the delta-sigma DAC2A-1, which is a first quantization circuit, by a delay time equal to the sum of the processing delay time of the delta-sigma DAC2A-2, which is a second quantization circuit, and the processing delay time of the BPF5A, which is a first filter, and outputs the delayed output to the multiplexing circuit 4A.

[0045] The band synthesis circuit 10A also includes a delay circuit 6A-2, which is a second delay circuit that delays an input signal to the delta-sigma DAC2A-2, which is a second quantization circuit, by a delay time equal to the sum of the processing delay time of the delta-sigma DAC2A-1, which is a first quantization circuit, and the processing delay time of the BPF5A, which is a first filter, and a demultiplexer circuit 1A that separates one input signal into two in terms of frequency, outputs one of the separated signals to the delta-sigma DAC2A-1, which is the first quantization circuit, and outputs the other separated signal to the delay circuit 6A-2, which is a second delay circuit provided immediately before the second quantization circuit.

[0046] In the first embodiment, the system #1 processes signals in a lower frequency band, and the system #2 processes signals in a higher frequency band, but the correspondence between the systems and the frequency bands may be reversed. That is, the system #1 may process signals in a higher frequency band, and the system #2 may process signals in a lower frequency band. In this case, the filter 3A may be a low-pass filter that removes quantization noise on the higher frequency side.

[0047] Furthermore, in the band synthesis circuit 10A shown in FIG. 3, the input signal is split into two systems of signals using the splitter circuit 1A to generate input signals to be processed by each system, but two band signals that are originally adjacent may also be input to each system without going through the splitter circuit 1A.

[0048] Embodiment 2 6 is a diagram showing a functional configuration of a band combining circuit 10B according to the second embodiment. The band combining circuit 10B includes a demultiplexing circuit 1B, three delta-sigma DACs 2B-1, 2B-2, and 2B-3, two filters 3B-1 and 3B-3, a multiplexing circuit 4B, two BPFs 5B-1 and 5B-3, and three delay circuits 6B-1, 6B-2, and 6B-3.

[0049] Like the diplexer circuit 1A, the diplexer circuit 1B frequency-separates the input signal into the number of delta-sigma DACs 2B. While the diplexer circuit 1A separated the input signal into two signals, the diplexer circuit 1B separates the input signal into three signals. Specifically, the diplexer circuit 1B separates one input signal into three signals frequency-separated, inputting the signal with the lowest frequency band of the three separated signals to the delay circuit 6B-1, inputting the signal with the middle frequency band of the three separated signals to the delta-sigma DAC 2B-2, and inputting the signal with the highest frequency band of the three separated signals to the delay circuit 6B-3. Figure 6(a) shows the input signals to the diplexer circuit 1B.

[0050] The delta-sigma DAC2B has the same function as the delta-sigma DAC2A. The delta-sigma DAC2B-1 receives a signal obtained by subtracting the output of BPF5B-1 from the input signal received from diplexer circuit 1B via delay circuit 6B-1. The delta-sigma DAC2B-2 receives an input signal from diplexer circuit 1B. The delta-sigma DAC2B-3 receives a signal obtained by subtracting the output of BPF5B-3 from the input signal received from diplexer circuit 1B via delay circuit 6B-3. In other words, the delta-sigma DACs 2B-1 and 2B-3 are examples of second quantization circuits, and the delta-sigma DAC2B-2 is an example of a first quantization circuit. (b-1) of FIG. 6 shows the output signal of the delta-sigma DAC2B-1, (b-2) of FIG. 6 shows the output signal of the delta-sigma DAC2B-2, and (b-3) of FIG. 6 shows the output signal of the delta-sigma DAC2B-3.

[0051] 3, the filters 3B-1 and 3B-3 are examples of second filters provided between the multiplexing circuit 4B and each of the delta-sigma DACs 2B-1 and 2B-3, which are second quantization circuits, similar to the filter 3A in FIG. 3. The filter 3B-1 is an analog filter that passes a frequency band including a first band, which is a frequency band including a valid signal among the output signals of the delta-sigma DAC 2B-1, and blocks a frequency band including a part of the quantization noise generated by the delta-sigma DAC 2B-1. Specifically, the filter 3B-1 is a low-pass filter that blocks the high-frequency side of the quantization noise generated by the delta-sigma DAC 2B-1. The filter 3B-3 is an analog filter that passes a frequency band including a first band, which is a frequency band including a valid signal among the output signals of the delta-sigma DAC 2B-3, and blocks a frequency band including a part of the quantization noise generated by the delta-sigma DAC 2B-3. Specifically, the filter 3B-3 is a high-pass filter that cuts off the low-frequency side of the quantization noise generated in the delta-sigma DAC 2B-3.

[0052] The multiplexing circuit 4B combines the multiple output signals from the three delta-sigma DACs 2B-1, 2B-2, and 2B-3. Specifically, the output signal from the delta-sigma DAC 2B-1 is input to the multiplexing circuit 4B via a filter 3B-1, the output signal from the delta-sigma DAC 2B-2 is input to the multiplexing circuit 4B after being delayed via a delay circuit 6B-2, and the output signal from the delta-sigma DAC 2B-3 is input to the multiplexing circuit 4B via a filter 3B-3. (c) of Figure 6 shows the output signal from the multiplexing circuit 4B.

[0053] BPFs 5B-1 and 5B-3 are examples of first filters that pass signals in a frequency band included in the second band of the output signal of the delta-sigma DAC2B-2 (the first quantization circuit), including a portion of the quantization noise generated in the delta-sigma DAC2B-2, and block signals in the remaining frequency band. The pass band of BPF 5B-1 is a low-frequency portion of the quantization noise generated in the delta-sigma DAC2B-2 and includes quantization noise in a band adjacent to the first band of the output signal of the delta-sigma DAC2B-2. The pass band of BPF 5B-1 overlaps with the first band of the output signal of the delta-sigma DAC2B-1. The pass band of BPF 5B-3 is a high-frequency portion of the quantization noise generated in the delta-sigma DAC2B-2 and includes quantization noise in a band adjacent to the first band of the output signal of the delta-sigma DAC2B-2. The passband of the BPF5B-3 overlaps with the first band of the output signal of the delta-sigma DAC2B-3. (d-1) of Fig. 6 shows the output signal of the BPF5B-1, and (d-2) of Fig. 6 shows the output signal of the BPF5B-3.

[0054] The delay circuit 6B-2 is an example of a first delay circuit provided between the delta-sigma DAC2B-2, which is an example of a first quantization circuit, and the multiplexing circuit 4B. The delay circuit 6B-2 delays the output of the delta-sigma DAC2B-2 by a delay time equal to the sum of the processing delay times of the delta-sigma DACs 2B-1 and 2B-3 and the processing delay times of the BPFs 5B-1 and 5B-3, and outputs the delayed output to the multiplexing circuit 4B. In this case, the processing delay times of the delta-sigma DAC2B-1 and the delta-sigma DAC2B-3 may be set to be the same, and the processing delay times of the BPF5B-1 and the BPF5B-3 may be set to be the same, and the delay time of the delay circuit 6B-2 may be set to be the sum of the processing delay times of the delta-sigma DAC2B-1 and the BPF5B-1.

[0055] Delay circuit 6B-1 and delay circuit 6B-3 are examples of second delay circuits provided between demultiplexer circuit 1B and delta-sigma DACs 2B-1 and 2B-3. Delay circuit 6B-1 delays the input signal to delta-sigma DAC 2B-1 by a delay time equal to the sum of the processing delay time of delta-sigma DAC 2B-2 and the processing delay time of BPF 5B-1. The output of BPF 5B-1 is subtracted from the input signal to delta-sigma DAC 2B-1 output by delay circuit 6B-1 and the result is input to delta-sigma DAC 2B-1. Delay circuit 6B-3 delays the input signal to delta-sigma DAC 2B-3 by a delay time equal to the sum of the processing delay time of delta-sigma DAC 2B-2 and the processing delay time of BPF 5B-3. The output of the BPF 5B-3 is subtracted from the input signal to the delta-sigma DAC 2B-3, which is output by the delay circuit 6B-3, and the result is input to the delta-sigma DAC 2B-3.

[0056] The hardware configuration of the band synthesizing circuit 10B is the same as that of the band synthesizing circuit 10A according to the first embodiment, and therefore a description thereof will be omitted here.

[0057] Here, the signal processing of the band synthesis circuit 10B will be explained. The input signal shown in FIG. 6(a) is first frequency-separated by the demultiplexer circuit 1B into three signals: path #1, which has the lowest frequency band; path #2, which has the middle frequency band; and path #3, which has the highest frequency band. The path #2 signal is converted into a 1-bit signal by the delta-sigma DAC 2B-2, delayed by a predetermined number of samples by the delay circuit 6B-2, output from the FPGA, and input to the multiplexer circuit 4B, which is an analog circuit. The 1-bit signal output from the delta-sigma DAC 2B-2 is replicated, and the frequency range of the valid signal for path #1 is extracted by the BPF 5B-1 and transmitted to the signal processing path for path #1. The passband of the BPF 5B-1 is designed to overlap with the first band in which the valid signal exists in the output signal of the delta-sigma DAC 2B-1 of path #1. Similarly, the 1-bit signal output from the delta-sigma DAC2B-2 is replicated, and the frequency range of the valid signal for path #3 is extracted by BPF5B-3, and transmitted to the signal processing path for path #3. The passband of BPF5B-3 is designed to overlap with the first band in which the valid signal exists in the output signal of the delta-sigma DAC2B-3.

[0058] The signal of path #1 is delayed by a predetermined number of samples in delay circuit 6B-1, the output of BPF 5B-1 is subtracted, and the signal is input to delta-sigma DAC 2B-1 and converted to a 1-bit signal. The 1-bit signal output from delta-sigma DAC 2B-1 is output from the FPGA, and then filtered by filter 3B-1, an analog filter, to remove quantization noise on the high-frequency side, before being input to multiplexing circuit 4B.

[0059] The signal of line #3 is delayed by a predetermined number of samples in delay circuit 6B-3, the output of BPF 5B-3 is subtracted, and the signal is input to delta-sigma DAC 2B-3 and converted to a 1-bit signal. The 1-bit signal output from delta-sigma DAC 2B-3 is output from the FPGA, and then filtered by filter 3B-3, an analog filter, to remove quantization noise on the low-frequency side, before being input to multiplexer circuit 4B.

[0060] Finally, the 1-bit signals of the systems #1 to #3 are combined by the multiplexing circuit 4B, and a band signal corresponding to the original input signal is output.

[0061] Here, assuming that the processing delay time of BPF5B-1 is equal to the processing delay time of BPF5B-3 and that the processing delay time of delta-sigma DAC2B-1 is equal to the processing delay time of delta-sigma DAC2B-3, the delay time of delay circuits 6B-1 and 6B-2 can be set to, for example, the delay time obtained by adding up the number of samples of the processing delay by BPF5B-1 and the number of samples of the processing delay by delta-sigma DAC2B-1.

[0062] In the second embodiment, the input signal is first separated into three signals in terms of frequency by the demultiplexer circuit 1B, but the three originally adjacent band signals may be input to the paths of the delta-sigma DACs 2B-1 to 2B-3 without passing through the demultiplexer circuit 1B.

[0063] As described above, according to the second embodiment, it is possible to provide a band synthesis circuit 10B that realizes three-band synthesis. The band synthesis circuit 10B comprises delta-sigma DACs 2B-1 to 2B-3 that are multiple quantization circuits that perform processing including quantization on an input signal and output an output signal that includes a valid signal in a first band that is a part of the entire frequency band to be output, and does not include a valid signal in a second band that is the remaining frequency band, a multiplexing circuit 4B that combines multiple output signals output by the multiple quantization circuits, and a multiplexing circuit 4C that combines output signals of a first quantization circuit among the multiple quantization circuits that is a part of the frequency band included in the second band and includes a valid signal in the first quantization circuit. and BPF5B-1, 5B-3 which are first filters that pass signals in a passband that includes a portion of the quantization noise generated in the circuit and block signals in the remaining frequency band, and the outputs of the first filters BPF5B-1, 5B-3 are subtracted from input signals to second quantization circuits that are delta-sigma DAC2B-1, 2B-3 and are quantization circuits other than the first quantization circuit, the passband of which overlaps with the first band of the output signal, and the result is input to the delta-sigma DAC2B-1, 2B-3 which are second quantization circuits.

[0064] Furthermore, the band synthesis circuit 10B further includes filters 3B-1 and 3B-3, which are second analog filters provided between the delta-sigma DACs 2B-1 and 2B-3, which are second quantization circuits, and the multiplexing circuit 4B. The filters 3B-1 and 3B-3 are second analog filters that pass a frequency band including the first band among the outputs of the delta-sigma DACs 2B-1 and 2B-3 and block the remaining frequency band including a portion of the conversion noise generated by the delta-sigma DACs 2B-1 and 2B-3. In the second embodiment, the number of filters 3B-1 and 3B-3, which are second filters constituting the band synthesis circuit 10B, is N-1, where N is the number of delta-sigma DACs 2B. Specifically, N=3, and the number of filters 3B is two. In this case, the number of required dedicated analog filters is reduced to two-thirds compared to a configuration in which an analog filter is provided for each system.

[0065] The number of delta-sigma DACs 2B constituting the band synthesis circuit 10B is three, the number of delta-sigma DACs 2B serving as second quantization circuits is two, and the band synthesis circuit 10B further includes a delay circuit 6B-2 serving as a first delay circuit that delays the output of the delta-sigma DAC2B-2 serving as the first quantization circuit by a delay time equal to the sum of the processing delay time of the delta-sigma DAC2B-1 serving as the second quantization circuit and the processing delay time of the BPF5B-1 serving as the first filter, and outputs the delayed output to the multiplexing circuit 4B.

[0066] The band synthesis circuit 10B also includes delay circuits 6B-1 and 6B-3, which are second delay circuits provided corresponding to the two second quantization circuits, respectively, and which delay the input signal to the corresponding second quantization circuit by a delay time equal to the sum of the processing delay time of the delta-sigma DAC2B-2, which is the first quantization circuit, and the processing delay time of the BPF5B-1, which is the first filter; and a diplexer circuit 1B that separates one input signal into three signals in terms of frequency, outputs the first input signal having the center frequency band of the three signals to the delta-sigma DAC2B-2, which is the first quantization circuit, and outputs the remaining two of the three signals to each of the two second delay circuits, respectively, the delta-sigma DAC2B-1 and 2B-3.

[0067] With the above-described configuration, in the second embodiment, even in the band combining circuit 10B that achieves three-band combining, in each of the signal inputs to the delta-sigma DACs 2B-1 and 2B-3 in the first and second paths, the quantization noise generated by the delta-sigma DAC 2B-2 in the second path is subtracted from the input signals to the delta-sigma DACs 2B-1 and 2B-3 in the first and second paths, in the frequency bands where the valid signals in each path exist. Therefore, in the combined signal output by the combining circuit 4B, the influence of the quantization noise generated by the delta-sigma DAC 2B-2 on the valid signal in the first path and the influence of the quantization noise generated by the delta-sigma DAC 2B-2 on the valid signal in the third path are canceled out immediately upon signal generation. Therefore, it is possible to reduce the number of dedicated analog filters required and widen the output signal bandwidth of a circuit that performs processing including quantization without increasing the sampling rate.

[0068] Embodiment 3 FIG. 7 is a diagram illustrating a functional configuration of a band combining circuit 10C according to a third embodiment. The band combining circuit 10C illustrates an example configuration for band combining for an arbitrary number N of bands. The band combining circuit 10C includes a demultiplexer circuit 1C, N delta-sigma DACs 2C-1 to 2C-N, N-1 filters 3C-2 to 3C-N, a multiplexer circuit 4C, N-1 BPFs 5C-1 to 5C-(N-1), and a delay circuit 6C. Note that while FIG. 7 illustrates a configuration for up to N=4, when N is an integer equal to or greater than 5, the band combining circuit 10C includes even more functional blocks than those illustrated in FIG. 7. N-1 delay circuits 6C are provided for each system. Furthermore, of the N-1 delay circuits 6C provided in system #k, k-1 delay circuits are provided between the demultiplexer circuit 1C and the delta-sigma DAC 2C-k, and the remaining Nk delay circuits are provided between the delta-sigma DAC 2C-k and the multiplexer circuit 4C or the filter 3C-k.

[0069] Here, the signal processing of the band synthesis circuit 10C will be described. First, the input signal is separated into N signals in terms of frequency by the demultiplexer circuit 1C. The separated signals are arranged in ascending order of frequency as the first to Nth signals, and the signal systems that process each signal are referred to as systems #1 to #N. The delta-sigma DAC2C-k of system #k is referred to as the kth delta-sigma DAC2C-k, and the filter 3C-k of system #k is referred to as the kth filter 3C-k. Furthermore, the BPF 5C that outputs a signal to system #k is referred to as BPF5C-(k-1).

[0070] In the third embodiment, quantization noise generated in the delta-sigma DACs 2C-1 to 2C-(k-1) of the systems #1 to #k-1 is cancelled from the input signal to the delta-sigma DAC 2C-k corresponding to the system #k.

[0071] The delay circuit 6C is provided so that the timing of each signal coincides, taking into consideration the processing delay time of the delta-sigma DACs 2C-1 to 2C-N and the BPFs 5C-1 to 5C-(N-1). The delay time set in the delay circuit 6C provided on the input side of the k-th delta-sigma DAC 2C-k is set to T DSMk , the processing delay time of BPF5C-k is T BPFkと In this case, it is expressed by the following formula (2).

[0072]

number

[0073] The delay time set in the delay circuit 6C provided on the output side of the k-th delta-sigma DAC 2C-k is expressed by the following equation (3).

[0074]

number

[0075] The signal of the path #1 output by the diplexer circuit 1C is input to the delta-sigma DAC 2C-1 and converted into a 1-bit signal, and then input to the multiplexer circuit 4C via delay circuits 6C-11, 6C-12, 6C-13, etc. In addition, each of the signals of the paths #2 to #N output by the diplexer circuit 1C is delayed through k-1 delay circuits 6C, after which the output of the corresponding BPF 5C-(k-1) is subtracted, and then input to the delta-sigma DAC 2C-k, converted into a 1-bit signal, delayed through Nk delay circuits 6C, and then input to the multiplexer circuit 4C via the filter 3C. Note that for the path #N, since no delay circuit 6C is provided on the output side of the delta-sigma DAC 2C-N, the signal is input directly from the delta-sigma DAC 2C-N to the filter 3C-N.

[0076] As a result, the output signal of the delta-sigma DAC2C-k corresponding to channel #k has the quantization noise generated by the delta-sigma DAC2Cs of channels #1 to #k-1 canceled in the range that overlaps with the frequency band of channel #k. Therefore, the output signals of the delta-sigma DAC2Cs of channels #1 to #k-1 are replicated and additively synthesized, and the frequency band of channel #k, i.e., the frequency band where a valid signal exists, is extracted by BPF5C-(k-1) and subtracted from the input signal to the delta-sigma DAC2C-k, thereby realizing quantization noise cancellation. Furthermore, the low-frequency side of the quantization noise contained in the output signals of the delta-sigma DAC2C-2 to 2C-N of channels #2 to #N is removed by external analog filters 3C-2 to 3C-N.

[0077] In the above description, the systems separated by the diplexer circuit 1C are defined as systems #1 to #N in ascending order from the low-pass side, but they may also be defined as systems #1 to #N in descending order from the high-pass side. In this case, the quantization noise removed by canceling is defined as the low-pass side, and the quantization noise removed by the filter 3C, which is an analog filter, is defined as the high-pass side.

[0078] In addition, in embodiment 3, the input signal is first divided into N signals in terms of frequency by the diplexer circuit 1C, but N band signals that are originally adjacent may also be input to each system #1 to #N without going through the diplexer circuit 1C.

[0079] The hardware configuration of the band synthesizing circuit 10C is the same as that of the band synthesizing circuit 10A according to the first embodiment, and therefore a description thereof will be omitted here.

[0080] As described above, according to the third embodiment, it is possible to provide a band synthesis circuit 10C that synthesizes any N bands. The band synthesis circuit 10C includes delta-sigma DACs 2C-1 to 2C-N that are multiple quantization circuits that perform processing including quantization on input signals and output signals that include valid signals in a first band that is a portion of the entire frequency band to be output and that do not include valid signals in a second band that is the remaining frequency band, a multiplexing circuit 4C that synthesizes the multiple output signals output by the multiple quantization circuits, and BPFs 5C-1 to 5C-(N-1) that are first filters that pass signals of a passband that is a portion of the frequency band included in the second band and that includes part of the quantization noise generated in the first quantization circuit, among the output signals of a first quantization circuit of the multiple quantization circuits, and that block signals of the remaining frequency bands. In the band synthesis circuit 10C, the output of the first filter is subtracted from the input signal to a second quantization circuit, which is a quantization circuit other than the first quantization circuit and whose passband overlaps with the first band of the output signal, and the result is input to the second quantization circuit. Here, if the second quantization circuit is a delta-sigma DAC2C-k (k=2 to N), the first quantization circuit is a delta-sigma DAC2C-1 to 2C-(k-1). In the band synthesis circuit 10C, the outputs of BPFs 5C-1 to 5C-(N-1) are subtracted from the input signals to each of the delta-sigma DACs 2C-2 to 2C-N, and the result is input to each of the delta-sigma DACs 2C-2 to 2C-N. At this time, a signal obtained by additively combining the output signals of the delta-sigma DACs 2C-1 to 2C-(k-1) is input to the BPF 5C-k (k=1 to N-1).

[0081] Therefore, in the third embodiment, even in the band combining circuit 10C that realizes N-band combining, for each of k=2 to N, the quantization noise generated by the delta-sigma DACs 2C-1 to 2C-(k-1) obtained by adding and combining signals in the frequency band in which the valid signal in path #k exists is subtracted from the input signal to the delta-sigma DAC 2C-k. As a result, in the combined signal output by the multiplexing circuit 4C, the influence of the quantization noise generated by the delta-sigma DACs 2C-1 to 2C-(k-1) on the valid signal in path #k is canceled immediately after signal generation. Therefore, it is possible to reduce the number of filters 3C, which are dedicated analog filters required, and widen the output signal bandwidth of the circuit that performs processing including quantization without increasing the sampling rate.

[0082] The band synthesis circuit 10C further includes filters 3C-2 to 3C-N, which are second filters that are analog filters provided between the multiplexing circuit 4C and each of the delta-sigma DACs 2C-2 to 2C-N that function as second quantization circuits and pass a frequency band that includes the first band from the output of the second quantization circuit and block the remaining frequency band that includes a portion of the conversion noise generated in the second quantization circuit.

[0083] In the band synthesis circuit 10C, the quantization circuit is a delta-sigma digital-to-analog converter.

[0084] The number of quantization circuits constituting band synthesis circuit 10C is N, a natural number equal to or greater than 3. When the frequencies of valid signals in the N quantization circuits constituting band synthesis circuit 10C are arranged in ascending or descending order to form the first to N-th quantization circuits, BPF5C, which is a first filter, is provided corresponding to each of the second to N-th quantization circuits, and the first filter corresponding to the k-th quantization circuit is designated as BPF5C-(k-1), which is the k-1th first filter. In band synthesis circuit 10C, when the k-th quantization circuit is designated as the second quantization circuit for each of the second to N-th quantization circuits, the first quantization circuits are the first to k-1th quantization circuits, and the k-1th first filter passes a signal obtained by additively combining the outputs of the first to k-1th quantization circuits through a passband and outputs the signal. The output of the k-1th first filter is subtracted from the input signal to the k-th second quantization circuit and input to the second quantization circuit.

[0085] Furthermore, the band synthesis circuit 10C further includes, for each of the second to Nth quantization circuits, a delay circuit immediately before the kth quantization circuit, which delays the sum of the processing delay times of the first to k-1th quantization circuits and the processing delay times of the second to kth first filters, and a demultiplexing circuit 1C that separates one input signal into N signals in terms of frequency. The demultiplexing circuit 1C inputs each of the separated signals to the first quantization circuit and the delay circuits immediately before the second to Nth quantization circuits, respectively.

[0086] In the third embodiment, the number of filters 3C, which are second filters constituting the band synthesis circuit 10C, is N-1 when the number of delta-sigma DACs 2C is N. In this case, the number of required dedicated analog filters is reduced to (N-1) times N compared to a configuration in which an analog filter is provided for each system.

[0087] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention.

[0088] For example, in the above embodiment, a delta-sigma DAC is given as an example of a quantization circuit, but other examples of quantization circuits include a pulse width modulator (PWM: Pulse Width Modulation), a hybrid modulator of delta-sigma modulation and pulse width modulation, etc. The technology shown in the above embodiment is useful when applied to a quantization circuit in which quantization noise is biased in terms of frequency. [Explanation of symbols]

[0089] 1A, 1B, 1C, 91 Diplexer circuit, 2A-1, 2A-2, 2B-1 to 2B-3, 2C-1 to 2C-N, 92-1, 92-2 Delta-sigma DAC, 3A, 3B-1, 3B-3, 3C-2 to 3C-N, 93-1, 93-2 Filter, 4A, 4B, 4C, 94 Multiplexer circuit, 5A, 5B-1, 5B-3, 5C-1 to 5C-(N-1) BPF, 6A-1, 6A-2, 6B-1 to 6B-3, 6C Delay circuit, 10A, 10B, 10C, 90 Band synthesizer circuit, 11 Memory, 12 Processor, 13-1, 13-2 High-speed serial output circuit, 14 Analog filter, 15 Analog multiplexer circuit.

Claims

1. a plurality of quantization circuits that perform processing including quantization on input signals and output signals that include a valid signal in a first band that is a part of the entire frequency band to be output, and do not include the valid signal in a second band that is the remaining frequency band; a combining circuit that combines the output signals output from the quantization circuits; a first filter that passes signals of a part of a frequency band included in the second band, the part of the output signal of a first quantization circuit among the plurality of quantization circuits, and that passes signals of a pass band including a part of quantization noise generated in the first quantization circuit, and blocks signals of the remaining frequency bands; Equipped with a band synthesis circuit, characterized in that the output of the first filter is subtracted from an input signal to a second quantization circuit other than the first quantization circuit, the second quantization circuit having an overlapping passband and the first band of an output signal, and the resultant signal is input to the second quantization circuit.

2. a second filter, which is an analog filter provided between the second quantization circuit and the multiplexing circuit, for passing a frequency band including the first band from the output of the second quantization circuit and blocking the remaining frequency band including a part of the quantization noise generated in the second quantization circuit; 2. The band combining circuit according to claim 1, further comprising:

3. 2. The band synthesizing circuit according to claim 1, wherein the quantization circuit is a delta-sigma type digital-to-analog converter.

4. the number of the quantization circuits constituting the band synthesis circuit is two, a first delay circuit that delays the output of the first quantization circuit by a delay time equal to the sum of a processing delay time of the second quantization circuit and a processing delay time of the first filter, and outputs the delayed output to the multiplexing circuit; 4. The band combining circuit according to claim 1, further comprising:

5. a second delay circuit that delays an input signal to the second quantization circuit by a delay time equal to the sum of a processing delay time of the first quantization circuit and a processing delay time of the first filter; a demultiplexing circuit that separates one input signal into two signals in terms of frequency, outputs one of the separated signals to the first quantization circuit, and outputs the other separated signal to the second delay circuit; 5. The band combining circuit according to claim 4, further comprising:

6. the number of the quantization circuits constituting the band synthesis circuit is three, the number of the second quantization circuits is two, a first delay circuit that delays the output of the first quantization circuit by a delay time equal to the sum of a processing delay time of the second quantization circuit and a processing delay time of the first filter, and outputs the delayed output to the multiplexing circuit; 4. The band combining circuit according to claim 1, further comprising:

7. a second delay circuit provided corresponding to each of the two second quantization circuits, delaying an input signal to the corresponding second quantization circuit by a delay time equal to the sum of a processing delay time of the first quantization circuit and a processing delay time of the first filter; a demultiplexing circuit that separates one input signal into three signals in terms of frequency, outputs a first input signal having a center frequency band among the three signals to the first quantization circuit, and outputs the remaining two of the three signals to the two second delay circuits, respectively; 7. The band combining circuit according to claim 6, further comprising:

8. the number of the quantization circuits constituting the band synthesis circuit is a natural number N of 3 or more, When the frequencies of the effective signals in the N quantization circuits are arranged in ascending or descending order to be the first to Nth quantization circuits, the first filters are provided corresponding to the second to N-th quantization circuits, respectively, and the first filter corresponding to the k-th quantization circuit is defined as the k-1-th first filter; 4. The band synthesis circuit according to claim 1, wherein, for each of the second to Nth quantization circuits, when the kth quantization circuit is the second quantization circuit, the first quantization circuit is the 1st to k-1th quantization circuits, the k-1st first filter passes a signal obtained by additively combining outputs of the 1st to k-1th quantization circuits through the passband and outputs the signal, and the output of the k-1st first filter is subtracted from the input signal to the kth second quantization circuit and input to the second quantization circuit.

9. a delay circuit, immediately before the k-th quantization circuit, for each of the second to N-th quantization circuits, for delaying the total time of each processing delay time of the first to k-1-th quantization circuits and each processing delay time of the second to k-th first filters; a demultiplexing circuit for separating one input signal into N signals in terms of frequency; Furthermore, 9. The band synthesizing circuit according to claim 8, wherein the demultiplexing circuit inputs each of the separated signals to the first quantization circuit and the delay circuits provided immediately before the second to Nth quantization circuits, respectively.

10. 3. The band synthesis circuit according to claim 2, wherein the number of the second filters constituting the band synthesis circuit is N-1, where N is the number of the quantization circuits.

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