Stacked structure and gallium nitride semiconductor device
A layered structure on amorphous substrates with controlled impurities and high crystallinity gallium nitride films addresses the challenge of scaling up gallium nitride film production, offering cost-effective and high-performance devices.
Patent Information
- Application Number
- JP2023556301
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-10-28
- Filing Date
- 2022-10-12
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2042-10-12
AI Technical Summary
The high cost and difficulty in enlarging sapphire and single-crystal silicon substrates for growing high-quality crystalline gallium nitride films necessitate the development of a method to produce such films on amorphous substrates like glass, which are more affordable and easier to scale.
A layered structure is developed comprising an amorphous substrate with a buffer layer and a gallium nitride semiconductor layer, where the gallium nitride layer has controlled impurity concentrations and high crystallinity, achieved through a sputtering method that includes a high-purity target, reverse sputtering, and low-temperature film formation to minimize impurities and enhance crystallinity.
This approach allows for the production of high-quality crystalline gallium nitride films on large-area amorphous substrates, reducing costs and enabling the fabrication of gallium nitride-based devices with improved performance and increased productivity.
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Abstract
Description
[Technical Field]
[0001] An embodiment of the present invention relates to a layered structure including a gallium nitride based semiconductor layer formed on an amorphous substrate, and a gallium nitride based semiconductor device formed from the layered structure. [Background technology]
[0002] Gallium nitride is used in light-emitting diodes and is expected to be used as a next-generation semiconductor material in power transistors and integrated circuits. Gallium nitride is manufactured using the metal-organic chemical vapor deposition (MOCVD) method. The MOCVD method requires heating the substrate to over 1000°C to grow gallium nitride, which poses a problem in that it requires enormous amounts of power for device fabrication. Therefore, development is underway to develop a technology for fabricating crystalline gallium nitride films using a sputtering method that allows film formation at low temperatures. For example, methods have been disclosed for depositing crystalline gallium nitride layers on single-crystal silicon substrates or sapphire substrates using a gallium nitride sputtering target (see Patent Documents 1 to 3). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-162606 [Patent Document 2] Japanese Patent Application Laid-Open No. 2016-188165 [Patent Document 3] Patent Publication No. 2021-075779 Summary of the Invention [Problem to be solved by the invention]
[0004] Crystalline substrates such as sapphire and single-crystal silicon substrates are used to grow gallium nitride films. However, sapphire and single-crystal silicon substrates are expensive and difficult to enlarge. If amorphous substrates, such as glass substrates used in liquid crystal displays, could be used as the substrate for growing gallium nitride films, the cost of the substrate could be reduced and it would be easier to enlarge the area. However, to date, there have been no reports of the production of high-quality crystalline gallium nitride on amorphous substrates such as glass.
[0005] In view of the above problems, one object of one embodiment of the present invention is to provide a layered structure including a gallium nitride based semiconductor layer with excellent crystallinity formed by a sputtering method on an amorphous substrate, which is inexpensive. [Means for solving the problem]
[0006] A stacked structure according to one embodiment of the present invention includes an amorphous substrate, a buffer layer on the amorphous substrate, and a gallium nitride based semiconductor layer on the buffer layer, the gallium nitride based semiconductor layer including at least one gallium nitride layer, and the gallium nitride layer has an oxygen concentration of 1×10 21 / cm 3 The following is the result. [Brief explanation of the drawings]
[0007] [Figure 1] 1 is a diagram showing a configuration of a laminated structure according to one embodiment of the present invention; [Figure 2A] 1 is a diagram showing the structure of a light-emitting device including the configuration of a stacked structure according to one embodiment of the present invention. [Figure 2B] 1 is a diagram showing the structure of a light-emitting device including the configuration of a stacked structure according to one embodiment of the present invention. [Figure 3] 1 is a diagram showing a structure of a transistor including a configuration of a stacked structure according to one embodiment of the present invention; [Figure 4]FIG. 2 is a diagram showing the results of measuring the contents of oxygen, carbon, hydrogen, and fluorine contained in the gallium nitride layer shown in the example by secondary ion mass spectrometry. DETAILED DESCRIPTION OF THE INVENTION
[0008] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different forms, and should not be construed as being limited to the description of the embodiments exemplified below. For clarity of explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual form, but these are merely examples and do not limit the interpretation of the present invention. Furthermore, in this specification and each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals (or reference numerals with a, b, etc. suffixed thereto), and detailed descriptions may be omitted as appropriate. Furthermore, the letters "first" and "second" attached to each element are convenient labels used to distinguish each element and have no further meaning unless otherwise specified.
[0009] In this specification, when a component or region is described as being "on (or under)" another component or region, unless otherwise specified, this includes not only the case where it is directly above (or directly under) the other component or region, but also the case where it is above (or under) the other component or region, i.e., the case where another component is included between the component or region and above (or under) the other component or region.
[0010] 1.Laminated structure 1 shows an example of the structure of a stacked structure 100 according to one embodiment of the present invention. The stacked structure 100 includes an amorphous substrate 102, a buffer layer 106 provided on the amorphous substrate 102, and a gallium nitride based semiconductor layer 108 provided on the buffer layer 106. The stacked structure 100 may include an insulating base layer 104 provided between the amorphous substrate 102 and the buffer layer 106.
[0011] 1-1.Amorphous substrate The amorphous substrate 102 preferably has a low thermal expansion coefficient, a high strain point, and a high surface flatness. For example, the amorphous substrate 102 has an expansion coefficient of 50×10 -7 / °C and a strain point of 600°C or higher. The amorphous substrate 102 in this embodiment only needs to be heat resistant to about 700°C, and is not required to be heat resistant to 1000°C or higher like a sapphire substrate. Furthermore, the amorphous substrate 102 preferably has an alkali metal content such as sodium (Na) of 0.1% or less.
[0012] As an amorphous substrate 102 satisfying these characteristics, for example, a glass substrate made of at least one of aluminoborosilicate glass and aluminosilicate glass can be used, and an alkali-free glass substrate is preferable. Such glass substrates are used in liquid crystal displays and organic electroluminescence (organic EL) displays, and large-area glass substrates called mother glasses are available on the market. By using a glass substrate as the amorphous substrate 102, a gallium nitride-based semiconductor layer 108 can be formed on the large-area glass substrate.
[0013] A flexible resin substrate such as a polyimide substrate, an acrylic substrate, a siloxane substrate, or a fluororesin substrate can also be used as the amorphous substrate 102. A quartz glass substrate can also be used as the amorphous substrate 102.
[0014] 1-2. Undercoat insulation layer As shown in FIG. 1, a base insulating layer 104 may be provided over an amorphous substrate 102. The base insulating layer 104 is formed of an inorganic insulating film. Examples of inorganic insulating films that can be used include a silicon nitride film, a silicon oxide film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, and an aluminum oxynitride film. The base insulating layer 104 has a single-layer structure made of any of these inorganic insulating films or a stacked structure made of multiple inorganic insulating films. FIG. 1 shows a case where the base insulating layer 104 has a stacked structure. FIG. 1 shows, as an example, an example where the base insulating layer 104 is formed of a silicon nitride layer 104a provided in contact with the amorphous substrate 102 and a silicon oxide layer 104b provided thereon.
[0015] The silicon nitride layer 104a has the effect of preventing impurities contained in the amorphous substrate 102 from diffusing into the buffer layer 106 and the gallium nitride-based semiconductor layer 108. A particularly problematic impurity is alkali metals such as sodium, which are present in trace amounts in the amorphous substrate 102. The silicon nitride layer 104a can prevent the diffusion of alkali metals if it has a thickness of 20 nm or more. The silicon nitride layer 104a can have a thickness of, for example, 20 nm to 500 nm, preferably 100 nm to 300 nm, and can be formed to a thickness of, for example, 150 nm. The silicon oxide layer 104b improves the adhesion of the buffer layer 106 and prevents peeling. The silicon oxide layer 104b preferably has a thickness of 20 nm or more. The silicon oxide layer 104b can have a thickness of, for example, 20 nm to 500 nm, preferably 50 nm to 200 nm, and can be formed to a thickness of, for example, 100 nm.
[0016] By providing the insulating base layer 104 on the amorphous substrate 102, it is possible to prevent impurities from diffusing into the gallium nitride based semiconductor layer 108 and to achieve high purity, thereby enabling the formation of a gallium nitride based semiconductor layer 108 with high crystallinity.
[0017] 1-3.Buffer layer The buffer layer 106 is provided on the amorphous substrate 102. The buffer layer 106 is preferably crystalline, i.e., is made of at least one of a crystalline metal and a crystalline metal compound. The crystal of the buffer layer 106 is preferably oriented, and the orientation is preferably c-axis oriented. The buffer layer 106 is preferably a crystal with rotational symmetry, for example, its crystal surface preferably has six-fold symmetry. For example, the buffer layer 106 preferably has a hexagonal close-packed structure, a face-centered cubic structure, or a structure equivalent thereto. Here, a hexagonal close-packed structure or a structure equivalent thereto includes a crystal structure in which the c-axis is not 90 degrees relative to the a-axis and b-axis. The buffer layer 106 made of a conductive material having a hexagonal close-packed structure or a structure equivalent thereto is preferably oriented in the (0001) direction, i.e., the c-axis direction, relative to the amorphous substrate 102 (hereinafter referred to as the (0001) orientation of the hexagonal close-packed structure). Furthermore, the buffer layer 106 having a face-centered cubic structure or a structure equivalent thereto is preferably oriented in the (111) direction relative to the amorphous substrate 102 (hereinafter referred to as the (111) orientation of the face-centered cubic structure).
[0018] The buffer layer 106 is provided between the amorphous substrate 102 and the gallium nitride based semiconductor layer 108. Since the crystalline gallium nitride based semiconductor layer 108 is formed on the amorphous substrate 102, the buffer layer 106 functions as a buffer layer that alleviates lattice mismatch. The above-described crystallinity of the buffer layer 106 allows the gallium nitride based semiconductor layer 108 to be crystallized. That is, the buffer layer 106 has a crystalline surface with a c-axis orientation and six-fold rotational symmetry, such as a hexagonal close-packed structure or a face-centered cubic structure, so that the orientation of the c-axis of the gallium nitride based semiconductor layer 108 can be controlled so that it grows in the film thickness direction.
[0019] The buffer layer 106 preferably has a flat surface. When the flatness of the surface of the buffer layer 106 is expressed as an arithmetic average roughness (Ra), the value is preferably less than 2.5 nm, and more preferably less than 2.3 nm. When the buffer layer 106 has a flat surface, the crystallinity of the gallium nitride based semiconductor layer 108 can be improved. The smaller the Ra of the buffer layer 106, the better, but it can be said that it is sufficient if the calculated average roughness (Ra) exceeds 0 nm, is 0.1 nm or more, and preferably is 0.01 nm or more, for example. The surface roughness of the buffer layer 106 can be measured using an atomic force microscope (AFM).
[0020] The buffer layer 106 is preferably thin while still having crystallinity. There is no particular limitation on the thickness of the buffer layer 106, as long as it can be considered a thin film. However, if the film thickness is too thin, the surface flatness may be poor and the layer may not have crystallinity. On the other hand, if the film thickness of the buffer layer 106 is too thick, crystallization may cause the surface morphology specific to metals to appear, reducing the surface flatness. Therefore, the film thickness of the buffer layer 106 is preferably 5 nm to 500 nm, and more preferably 10 nm to 200 nm. The film thickness of the buffer layer 106 can be measured using a contact-type profilometer or an optical film thickness meter (ellipsometry), or from images obtained with a scanning electron microscope (SEM) or a transmission electron microscope (TEM).
[0021] The buffer layer 106 can be formed of a metal. Titanium (Ti) or aluminum (Al) is preferably used as the metal material for forming the buffer layer 106, but other metals that can be used include silver (Ag), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), iridium (Ir), platinum (Pt), and gold (Au). The buffer layer 106 can also be formed of a metal oxide material such as zinc oxide (ZnO) or titanium dioxide (TiO2).
[0022] Such a buffer layer 106 can be produced by sputtering or electron beam vacuum deposition.
[0023] Furthermore, the buffer layer 106 can be formed of an insulating layer instead of a metal layer. That is, the buffer layer 106 can be formed of an insulating material. Aluminum nitride (AlN), aluminum oxide (Al2O3), or the like can be used as the insulating buffer layer 106. The insulating buffer layer 106 preferably has the same crystallinity and film thickness as those described above.
[0024] 1-4.Gallium nitride semiconductor layer The gallium nitride based semiconductor layer 108 includes at least one gallium nitride (GaN) layer. For example, the gallium nitride based semiconductor layer 108 is a single gallium nitride layer. The gallium nitride based semiconductor layer 108 includes a gallium nitride layer and at least one layer selected from an indium gallium nitride (InGaN) layer and an aluminum gallium nitride (AlGaN) layer, and has a structure in which these layers are stacked. The gallium nitride layer, the indium gallium nitride layer, and the aluminum gallium nitride layer that form the gallium nitride based semiconductor layer 108 preferably have a stoichiometric composition, but may deviate from the stoichiometric composition.
[0025] The gallium nitride based semiconductor layer 108 preferably has crystallinity. That is, the gallium nitride layer forming the gallium nitride based semiconductor layer 108 preferably has crystallinity. The gallium nitride layer is preferably single crystalline, but may be polycrystalline, microcrystalline, or nanocrystalline. The crystalline structure of the gallium nitride layer preferably has a wurtzite structure. The gallium nitride layer forming the gallium nitride based semiconductor layer 108 preferably has a c-axis orientation or a (111) orientation.
[0026] The conductivity type of the gallium nitride layers forming part or all of the layers of the gallium nitride based semiconductor layer 108 may be substantially intrinsic, or may have n-type or p-type conductivity. The gallium nitride layer may contain a dopant for valence electron control. The n-type gallium nitride layer may be doped with an element selected from silicon (Si) or germanium (Ge) as a dopant. The p-type gallium nitride layer may be doped with an element selected from magnesium (Mg), zinc (Zn), cadmium (Cd), and beryllium (Be) as a dopant. The n-type gallium nitride layer has a dopant of 1×10 18 / cm 3 The p-type gallium nitride layer preferably has a carrier concentration of 5×10 or more. 16 / cm 3 It is preferable that the gallium nitride layer has a carrier concentration of at least 1000 .mu.m.sup.2 or more. Furthermore, the substantially intrinsic (in other words, highly resistive) gallium nitride layer may contain zinc (Zn) as a dopant.
[0027] The gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 is provided in contact with the buffer layer 106. The gallium nitride layer is deposited on the buffer layer 106. As described above, the buffer layer 106 includes a c-axis-oriented crystal plane, resulting in a gallium nitride layer having a c-axis orientation or a (111) orientation. The gallium nitride layer may include an amorphous structure near the interface with the buffer layer 106, but preferably has crystallinity in the region (bulk) away from the interface. The crystallinity of the gallium nitride layer forming part or all of the gallium nitride-based semiconductor layer 108 can improve the performance of the gallium nitride-based semiconductor device. For example, if the gallium nitride-based semiconductor device is a light-emitting device, the light emission intensity can be increased, and if the gallium nitride-based semiconductor device is an active device such as a transistor, the carrier mobility can be increased.
[0028] The gallium nitride layer that forms part or all of the gallium nitride based semiconductor layer 108 may contain oxygen (O), carbon (C), hydrogen (H), and fluorine (F) as impurity elements other than the elements added as dopants as described above. The concentration of oxygen contained in the gallium nitride layer is 2×10 21 / cm 3 Less than 1×10 is preferred 21 / cm 3 The concentration of carbon contained in the gallium nitride layer is preferably 5×10 19 / cm 3 Less than 3 x 10 is preferable. 19 / cm 3 The concentration of hydrogen contained in the gallium nitride layer is preferably 3×10 20 / cm 3 Less than 2 x 10 is preferable. 20 / cm 3 The concentration of fluorine contained in the gallium nitride layer is preferably 1×10 19 / cm 3 Less than 5×10 is preferable 17 / cm 3 The following is more preferred:
[0029] The lower limits of the impurity elements oxygen (O), carbon (C), hydrogen (H), and fluorine (F) are not limited, and the lower the better, from the viewpoint of increasing the purity of the gallium nitride layer. However, the lower limits may be set equal to or higher than the lower detection limit of a measuring device that detects these impurity elements. When the concentrations of oxygen (O), carbon (C), hydrogen (H), and fluorine (F) in the gallium nitride layer are measured by secondary ion mass spectrometry, the lower limits may be set equal to or higher than the background level. For example, the lower limits may be set at a value where oxygen (O) is 6×10 16 / cm 3 Above, carbon (C) is 4 × 10 16 / cm 3 Above, hydrogen (H) is 2 × 10 17 / cm 3 Above, fluorine (F) is 2 × 10 15 / cm 3 It can be more than that.
[0030] A high impurity concentration in the gallium nitride layer is undesirable because it reduces crystallinity and increases defect levels that act as carrier traps. Oxygen contained in the gallium nitride layer acts as a dopant, so exceeding the above range may change the conductivity and degrade device characteristics. Hydrogen contained in the gallium nitride layer may passivate, particularly p-type dopants, so it is preferable not to exceed the above range. Carbon contained in the gallium nitride layer forms crystal defects, creates defect levels, and reduces luminous efficiency, so it is preferable not to exceed the above range.
[0031] The concentrations of these impurity elements are based on measurements obtained by secondary ion mass spectrometry. The above impurity concentrations are based on the primary ions, cesium ions (Cs + ) was used to measure the secondary ion intensity in the depth direction (thickness direction of the film) for each element, and the values were obtained by quantification based on the secondary ion intensity.
[0032] Impurities such as oxygen, hydrogen, carbon, and fluorine contained in the gallium nitride-based semiconductor layer 108 originate from impurities contained in the sputtering target material. These impurity elements also originate from residual gases in the film formation chamber of the sputtering device. It is believed that the impurity elements contained in the gallium nitride layer are incorporated into the film from these sources during sputtering film formation. These impurity elements differ from impurities intentionally added for the purpose of valence electron control, and can be said to be impurities that are inevitably introduced.
[0033] The crystallinity of the gallium nitride layer can be improved by purifying the gallium nitride layer that forms part or all of the gallium nitride based semiconductor layer 108 so that the concentrations of oxygen, carbon, hydrogen, and fluorine that are inevitably contained in the gallium nitride layer that forms part or all of the gallium nitride based semiconductor layer 108 are within the above-mentioned numerical ranges. That is, the stacked structure 100 according to this embodiment can improve its crystallinity by purifying the gallium nitride layer that forms part or all of the gallium nitride based semiconductor layer 108 provided on the amorphous substrate 102.
[0034] 2. Method for fabricating laminated structures There is no particular limitation on the method for producing the laminated structure 100 according to this embodiment, but the laminated structure 100 according to this embodiment can be suitably produced according to the following production method.
[0035] The stacked structure 100 according to this embodiment can be fabricated by a manufacturing method including the steps of forming a buffer layer 106 on an amorphous substrate 102 and forming a gallium nitride based semiconductor layer 108 on the buffer layer 106. When an underlying insulating layer 104 is provided, the method includes the step of forming the underlying insulating layer 104 on the amorphous substrate 102 before forming the buffer layer 106. The step of forming the gallium nitride based semiconductor layer 108 includes a film formation step by sputtering. The following explanation will also include the step of forming the underlying insulating layer 104.
[0036] 2-1. Preparation of amorphous substrate A glass substrate is used as the amorphous substrate 102. The glass substrate is an alkali-free glass substrate made of aluminoborosilicate glass, aluminosilicate glass, or the like. The amorphous substrate 102 is washed to form a clean surface. Any method of washing can be used, but for example, the substrate is washed with a mixed cleaning solution containing sulfuric acid and hydrogen peroxide, or hydrochloric acid and hydrogen peroxide, followed by rinsing with ultrapure water to wash away the mixed cleaning solution.
[0037] 2-2. Formation of the base insulation layer The base insulating layer 104 is formed of a silicon nitride layer 104a and a silicon oxide layer 104b. There are no limitations on the methods for forming the silicon nitride layer 104a and the silicon oxide layer 104b. For example, the silicon nitride layer 104a is formed by plasma CVD (Chemical Vapor Deposition) using reactive gases such as silane (SiH), ammonia (NH), and nitrogen (N), and the silicon oxide layer 104b is formed by plasma CVD using source gases such as silane (SiH), nitrous oxide (N), and tetraethoxysilane (TEOS: Tetraethyl Orthosilicate). If the plasma CVD apparatus has multiple film formation chambers, the silicon nitride layer 104a and the silicon oxide layer 104b can be formed consecutively. Alternatively, the silicon nitride layer 104a may be formed by reactive sputtering using silicon as a sputtering target, and the silicon oxide layer 104b may be formed using quartz as a sputtering target.
[0038] As described above, the silicon nitride layer 104a is formed to a thickness of 20 to 500 nm, preferably 100 to 300 nm, e.g., 150 nm, and the silicon oxide layer 104b is formed to a thickness of 20 to 500 nm, preferably 50 to 200 nm, e.g., 100 nm.
[0039] 2-3. Formation of buffer layer A buffer layer 106 is formed on the insulating base layer 104. The buffer layer 106 is formed by sputtering or vacuum deposition. Any known sputtering method can be used as the sputtering method. Known techniques include DC sputtering, RF sputtering, AC sputtering, DC magnetron sputtering, RF magnetron sputtering, pulse sputtering, ion beam sputtering, and induction plasma assisted sputtering. Of these, DC magnetron sputtering or RF magnetron sputtering is preferably used to form a film uniformly and quickly on a large-area glass substrate.
[0040] When the buffer layer 106 is formed by sputtering, a metal target, an oxide target, or a nitride target is used as the sputtering target. Since the buffer layer 106 preferably has orientation, the target material is preferably high purity, and it is preferable to use one with a purity of 5N (99.999%) or higher. Furthermore, to prevent abnormal discharge and suppress particle generation, it is preferable to use a target material with a low defect density and a smooth surface.
[0041] When a metal buffer layer is formed as the buffer layer 106, titanium (Ti) or aluminum (Al) is preferably used as the metal material, as described above. Other metals that can be used include silver (Ag), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), iridium (Ir), platinum (Pt), and gold (Au). The buffer layer 106 may also be formed of a metal oxide such as zinc oxide (ZnO) or titanium dioxide (TiO2) instead of a metal. The buffer layer 106 may also be formed of an insulating material such as aluminum nitride (AlN) or aluminum oxide (Al2O3). The buffer layer 106 is formed to a thickness of 5 nm to 500 nm, preferably 10 nm to 200 nm.
[0042] When the buffer layer 106 is made of a metal, a high-purity metal is used as the sputtering target material. When the buffer layer 106 is made of a metal oxide, a sintered body of the metal oxide is used as the sputtering target material. When the buffer layer 106 is made of an insulator, a sintered body of an insulating material is used as the sputtering target. These target materials are brazed to a backing plate such as copper (Cu), aluminum (Al), or stainless steel. When the target material is a metal, a backing plate may be integrally formed.
[0043] It is preferable to use a film formation apparatus capable of high vacuum evacuation to form the buffer layer 106. For example, when the buffer layer 106 is formed by a sputtering method, the ultimate vacuum in the film formation chamber of the sputtering apparatus is set to 1×10 -4 It is preferable that the pressure be set to 0.1 Pa or less. By increasing the ultimate vacuum in the deposition chamber, residual gas can be removed as much as possible, which can reduce impurities that are incorporated into the buffer layer 106 during deposition, thereby improving the orientation. In order to improve the orientation of the buffer layer 106, it is preferable to heat the substrate to a temperature of 100°C to 300°C. By depositing the film at such a substrate temperature, it is possible to form a buffer layer 106 with a high degree of c-axis orientation.
[0044] 2-4. Fabrication of gallium nitride semiconductor layers In this embodiment, the gallium nitride semiconductor layer 108 is produced by sputtering. A gallium nitride sintered body is used as the sputtering target. When a gallium nitride layer is formed as the gallium nitride semiconductor layer 108, a gallium nitride sintered body is used as the target material of the sputtering target. From the viewpoint of improving the crystallinity of the gallium nitride layer, the lower the oxygen content in the sputtering target material, the better. For example, the oxygen content of the gallium nitride sintered body used as the target material is preferably 3 at% or less, more preferably 1 at% or less, in atomic percentage. Furthermore, the content of metal impurities other than gallium in the gallium nitride sintered body is preferably less than 0.1 at%, more preferably less than 0.01 at%. The resistivity of the target material made of a gallium nitride sintered body is 1×10 2 It is preferable that the density is 3.0 g / cm or less. 3 More than 5.4g / cm 3 The sputtering target area is preferably 18 cm or less, and preferably no deposition of metallic gallium occurs. 2 More than 100cm is preferable. 2The above is more preferable. The larger the area of the sputtering target, the more stable the discharge becomes, enabling sputtering at lower gas pressures and lower power densities. Furthermore, by using a sputtering target of this size, the uniformity of the film thickness and quality of the gallium nitride layer can be improved.
[0045] Sputtering methods that can be used include DC sputtering, RF sputtering, AC sputtering, DC magnetron sputtering, RF magnetron sputtering, pulse sputtering, ion beam sputtering, and induction plasma-assisted sputtering. Among these, DC magnetron sputtering and RF magnetron sputtering are preferred because they can accommodate larger areas of the amorphous substrate 102. In DC and RF magnetron sputtering, a moving magnet system is preferably employed, which allows for erosion of the entire surface of the sputtering target and allows for efficient use of materials.
[0046] The gas pressure during deposition of the gallium nitride layer by sputtering is less than 0.3 Pa, preferably 0.1 Pa or less, and more preferably 0.08 Pa or less. The lower the gas pressure during deposition by sputtering, the more the surface diffusion of sputtered particles attached to the deposition surface can be promoted, leading to improved crystallinity.
[0047] The ultimate vacuum level in the deposition chamber of the sputtering equipment is 3 x 10 -5 Pa or less, and 1×10 -5 It is more preferable to set the pressure to 100 Pa or less. In order to remove moisture remaining in the film formation chamber and enable high-vacuum evacuation, it is preferable to perform a baking treatment on the film formation chamber and the vacuum evacuation system. Increasing the ultimate vacuum in the film formation chamber in this way makes it difficult for residual gases to be mixed into the gallium nitride layer as impurities, thereby improving the crystallinity.
[0048] Before depositing the gallium nitride layer, it is preferable to perform a reverse sputtering process on the amorphous substrate 102 (i.e., the surface of the buffer layer 106 that will serve as the deposition surface). Reverse sputtering is a method of cleaning the surface by irradiating the amorphous substrate 102 with rare gas ions such as argon (Ar) rather than the sputtering target side. Reverse sputtering cleans the surface of the amorphous substrate 102 (i.e., the surface of the buffer layer 106 that will serve as the deposition surface), flattens any minute irregularities on the surface, and removes factors that inhibit crystal growth. The sputtering apparatus preferably has a dedicated processing chamber for reverse sputtering in addition to the deposition chamber. After reverse sputtering, the substrate is transferred to the deposition chamber without being exposed to the outside air, allowing film deposition to be performed while maintaining the cleanliness of the surface of the amorphous substrate 102 (i.e., the surface of the buffer layer 106 that will serve as the deposition surface).
[0049] To improve the crystallinity of the gallium nitride layer, it is preferable to control the substrate temperature during film formation. Increasing the substrate temperature promotes surface diffusion of sputtered particles attached to the deposition surface, thereby improving the crystallinity of the gallium nitride layer. The substrate temperature during sputtering film formation (also called the "film formation temperature") is preferably from room temperature to 600°C or less, and more preferably from 100°C to 400°C. Furthermore, temperatures higher than 600°C exceed the heat resistance temperature of the amorphous substrate 102, making the sputtering equipment expensive and reducing the benefits of using sputtering. The substrate temperature may be from room temperature (including cases where the substrate is not intentionally heated) or higher, and is preferably from 100°C to 400°C or less to perform low-temperature film formation on the amorphous substrate 102, thereby improving the crystallinity of the gallium nitride layer deposited on the buffer layer 106.
[0050] Although rare gases such as argon (Ar) are usually used as sputtering gas, nitrogen (N2) gas is preferably used for depositing gallium nitride films. By using nitrogen gas as the sputtering gas, the generation of nitrogen defects can be suppressed.
[0051] The power density during discharge is 5W / cm 2Preferably, it is 2.5 W / cm or less. 2 More preferably, it is 1.5 W / cm or less. 2 The lower limit is preferably 0.1 W / cm or less. 2 More than 0.3W / cm is preferable. 2 It is more preferable that the power density is 5W / cm or more. The power density is calculated by dividing the power applied during discharge by the area of the sputtering target material. 2 If the power density is higher than 0.1 W / cm, coarse polycrystalline particles tend to peel off from the sputtering target. 2 If the temperature is less than this, the discharge becomes stable, the film formation rate decreases, and the productivity of the film decreases.
[0052] The thickness of the gallium nitride layer is preferably 30 nm or more, and more preferably 50 nm or more. With such a thickness, a crystalline gallium nitride layer can be formed on the buffer layer 106. The thickness of the gallium nitride layer may be 5000 nm or less, preferably 1000 nm or less, and more preferably, for example, 200 nm to 500 nm or less.
[0053] Although this embodiment has described a method for producing a gallium nitride layer as the gallium nitride based semiconductor layer 108, by changing the material of the sputtering target, it is possible to produce crystalline thin films with different compositions, such as an indium gallium nitride (InGaN) layer and an aluminum gallium nitride (AlGaN) layer. Also, in a sputtering apparatus having multiple film formation chambers, by installing sputtering targets with different compositions in each film formation chamber, it is possible to form the gallium nitride based semiconductor layer 108 in which multiple layers with different compositions are stacked.
[0054] As shown in this embodiment, in the production of the gallium nitride semiconductor layer 108, the concentration of impurities such as oxygen contained in the sputtering target material is reduced, high vacuum evacuation is performed during sputtering film formation, and the deposition surface is further purified by a process such as reverse sputtering, thereby making it possible to produce a gallium nitride semiconductor layer 108 with low concentrations of impurities such as oxygen, carbon, hydrogen, and fluorine and high crystallinity. In other words, the oxygen concentration is reduced to 2×10 21 / cm 3 Less than 1 × 10 21 / cm 3 The carbon concentration is set to 5×10 19 / cm 3 Less than or equal to 3 x 10 19 / cm 3 The hydrogen concentration is set to 3 x 10 20 / cm 3 Less than or equal to 2 x 10 20 / cm 3 Hereafter, the fluorine concentration is 1×10 19 / cm 3 Less than or equal to 5 x 10 17 / cm 3 A gallium nitride layer having the following impurity concentrations can be fabricated. By using these impurity concentrations, a layered structure 100 can be fabricated in which a crystalline gallium nitride-based semiconductor layer 108 is formed on an amorphous substrate 102.
[0055] As described above, the gallium nitride based semiconductor layer 108 according to this embodiment is produced by using a sputtering target made of gallium nitride with reduced impurities such as oxygen, performing a process such as reverse sputtering on the amorphous substrate 102, and then performing a high vacuum evacuation and then sputtering at the predetermined power density. This film formation method reduces the concentrations of impurities such as oxygen, carbon, and hydrogen, and allows for the production of a gallium nitride based semiconductor layer 108 with high crystallinity and low defect density.
[0056] 3. Gallium nitride semiconductor devices Gallium nitride semiconductor devices such as light-emitting devices and transistors can be fabricated using the stacked structure 100 according to this embodiment. An example of a device having the stacked structure 100 as a basic structure is shown below. Note that the device shown below is just an example, and devices realized by the stacked structure 100 are not limited to the structure shown in the figure.
[0057] 3-1. Light-emitting devices FIG. 2A shows a light-emitting device 150 as an example of a gallium nitride-based semiconductor device. The light-emitting device 150 has a stacked structure 100 in which an insulating base layer 104, a buffer layer 106, and a gallium nitride-based semiconductor layer 108 are stacked on an amorphous substrate 102. The gallium nitride-based semiconductor layer 108 has a stacked structure in which an n-type gallium nitride layer 110, a light-emitting layer 114, and a p-type gallium nitride layer 118 are stacked. An upper electrode layer 120 is provided on the p-type gallium nitride layer 118. The upper electrode layer 120 is formed of a metal material such as gold (Au) or a titanium (Ti)-gold (Au) alloy, or a transparent conductive film such as indium tin oxide (ITO). The light-emitting layer 114 may have various structures, and may be formed of a quantum well layer in which gallium nitride (GaN) layers and indium gallium nitride (InGaN) layers are alternately stacked.
[0058] 2B shows a light-emitting device 155 in which the configuration of the gallium nitride based semiconductor layer 108 is different from that shown in FIG. 2A. The light-emitting device 155 has a stacked structure including an n-type gallium nitride layer 110, an n-type aluminum gallium nitride layer 112, an indium gallium nitride layer 114 as a light-emitting layer, a p-type aluminum gallium nitride layer 116, and a p-type gallium nitride layer 118. Since each of these layers has a different composition, they are deposited using sputtering targets corresponding to the respective compositions.
[0059] The light-emitting device 150 shown in FIG. 2A and the light-emitting device 155 shown in FIG. 2B include the structure of the stacked structure 100 described in this embodiment. The stacked structure 100 includes a gallium nitride-based semiconductor layer 108 having a high crystallinity and reduced concentrations of impurities such as oxygen, carbon, and hydrogen, on an amorphous substrate 102. Because the gallium nitride-based semiconductor layer 108 can be formed on a large-area amorphous substrate 102, the number of light-emitting devices that can be separated from a single amorphous substrate 102 can be increased, thereby improving productivity. In addition, an LED array can be fabricated by arranging light-emitting devices on the amorphous substrate 102, and a display device can be fabricated using the LED array.
[0060] Transistor 3 shows a transistor 160 as an example of a gallium nitride based semiconductor device. The transistor 160 includes a gallium nitride based semiconductor layer 108 formed on an amorphous substrate 102. The gallium nitride based semiconductor layer 108 is an n + 3 has a stacked structure of a p-type gallium nitride layer 122, an n-type gallium nitride layer 124, a p-type gallium nitride layer 126, and an n-type gallium nitride layer 128. A gate electrode 132 is provided so as to be embedded in the p-type gallium nitride layer 126 via a gate insulating layer 130. A source electrode 134 is provided on the n-type gallium nitride layer 128. The buffer layer 106 may also function as a drain electrode. In other words, by forming the buffer layer 106 from a metal or a conductive metal oxide, it can also function as a drain electrode. The transistor 160 shown in FIG. 3 can be used, for example, as a power transistor.
[0061] The active layer of the transistor 160 is formed of a gallium nitride based semiconductor layer 108 provided on an amorphous substrate 102. The gallium nitride based semiconductor layer 108 has a high crystallinity due to reduced concentrations of impurities such as oxygen, carbon, and hydrogen, and a reduced defect density, making it possible to provide a transistor with excellent switching characteristics and high-speed operation at low cost. [Example]
[0062] An example of the laminated structure 100 will be described below, but the present invention is not limited to this example.
[0063] An alkali-free glass substrate was used as the amorphous substrate 102. On the alkali-free glass substrate, a silicon nitride layer 104a with a thickness of 150 nm and a silicon oxide layer 104b with a thickness of 100 nm were formed as the insulating base layer 104. The silicon nitride layer 104a and the silicon oxide layer 104b were fabricated by plasma CVD. The silicon nitride layer 104a was fabricated using silane (SiH4), ammonia (NH3), and nitrogen (N2) as reactive gases, with an RF power density of 0.24 W / cm. 2 The silicon oxide layer 104b was formed using silane (SiH4) and nitrous oxide (N2O) as reactive gases with an RF power density of 0.61 W / cm2. 2 The film was formed at a substrate temperature of 380°C.
[0064] A titanium (Ti) layer was formed to a thickness of 50 nm as a buffer layer 106 on the insulating base layer 104. The titanium (Ti) layer was formed by sputtering using a titanium (Ti) target at room temperature without heating the substrate.
[0065] A gallium nitride layer was formed by sputtering as the gallium nitride based semiconductor layer 108. The sputtering conditions were as follows: Discharge method: RF sputtering Film forming equipment: Magnetron sputtering equipment Target material: Gallium nitride (oxygen content 7 atm%) Target size: 120mmφ Target-substrate distance: 150mm Film formation pressure: 0.3 Pa Inlet gas: Nitrogen Discharge power: 100W Film forming temperature: 200℃ Film thickness: 100nm Heat treatment temperature: 600℃
[0066] The impurity concentrations of the gallium nitride layer fabricated under the above conditions were evaluated by secondary ion mass spectrometry. The concentrations of oxygen, hydrogen, carbon, and fluorine as impurities contained in the gallium nitride layer were measured.
[0067] The analysis conditions by secondary ion mass spectrometry are as follows: Measuring device: PHI ADEPT1010 Primary ion species: Cs + Primary accelerating voltage: 2.0 kV Detection area: 90μm x 90μm
[0068] Figure 4 shows a graph showing the depth distribution of the elements oxygen, hydrogen, carbon, and fluorine contained in the gallium nitride layer, as measured by secondary ion mass spectrometry. In the graph shown in Figure 4, the horizontal axis represents the depth from the surface of the gallium nitride film, and the vertical axis represents the concentration of each element converted from the secondary ion intensity.
[0069] The graph in Figure 4 shows the background Guérande levels (detection limits) of the elements oxygen, hydrogen, carbon, and fluorine. The background is oxygen at 6.0 x 10 16 / cm 3 , hydrogen is 2.1 × 10 17 / cm 3 , carbon is 4.5 × 10 16 / cm 3 , fluorine is 1.9 × 10 15 / cm 3The graph in Figure 4 also shows the secondary ion intensities of gallium (Ga) + nitrogen (N), gallium (Ga), and titanium (Ti) superimposed as matrix markers. In the sample used for the measurement, the area where the secondary ion intensities of gallium (Ga) + nitrogen (N), and gallium (Ga) are flat, as shown by the matrix markers, is the area where the gallium nitride layer is definitely present. The graph in Figure 4 reveals that the gallium nitride layer extends from the surface to approximately 80 μm, with a titanium buffer layer present beyond that. The quantitative values of oxygen, hydrogen, carbon, and fluorine elements can be read from the flat area of the matrix markers. Due to the characteristics of secondary ion mass spectrometry, profile pileups due to charge-up and impurity contamination are observed near the film surface and interface, so these areas should not be taken into consideration.
[0070] Table 1 shows the concentrations of oxygen, hydrogen, carbon, and fluorine contained in the gallium nitride layer, as read from the graph shown in Figure 4. As shown in Table 1, the gallium nitride layer fabricated in this example had a hydrogen concentration of 9.7 x 10 19 / cm 3 , carbon concentration is 1.4 × 10 19 / cm 3 , oxygen concentration is 7.1×10 20 / cm 3 , fluorine concentration is 1.9 × 10 17 / cm 3 The hydrogen profile shows a tendency to gradually decrease as it progresses from the surface to the interior of the gallium nitride layer, but the quantitative values were read from the values near the center of the film. [Table 1]
[0071] This example demonstrates that by minimizing impurities that inevitably enter when a gallium nitride film is produced by sputtering, even when an amorphous substrate such as a glass substrate is used, it is possible to produce a gallium nitride layer with excellent crystallinity. [Explanation of symbols]
[0072] 100: stacked structure, 102: amorphous substrate, 104: base insulating layer, 106: buffer layer, 108: gallium nitride semiconductor layer, 110: n-type gallium nitride layer, 112: n-type aluminum gallium nitride layer, 114: light-emitting layer, 115: indium gallium nitride layer, 116: p-type aluminum gallium nitride layer, 118: p-type gallium nitride layer, 120: upper electrode layer, 122: n+-type gallium nitride layer, 124: n-type gallium nitride layer, 126: p-type gallium nitride layer, 128: n-type gallium nitride layer, 130: gate insulating layer, 132: gate electrode, 134: source electrode, 150: light-emitting device, 155: light-emitting device, 160: transistor
Claims
1. an amorphous substrate; a buffer layer on the amorphous substrate; a gallium nitride based semiconductor layer on the buffer layer, The gallium nitride based semiconductor layer includes at least one gallium nitride layer, and the oxygen concentration of the gallium nitride layer is 1×10 21 / cm 3 is as follows: the amorphous substrate is a glass substrate, has a thermal expansion coefficient of less than 50×10 −7 / °C, and a strain point of 600°C or higher; A laminated structure, wherein the buffer layer has an arithmetic mean roughness (Ra) of less than 2.5 nm.
2. The carbon concentration of the gallium nitride layer is 3×10 19 / cm 3 The laminate structure according to claim 1 , wherein:
3. The hydrogen concentration of the gallium nitride layer is 2×10 20 / cm 3 The laminate structure according to claim 2, wherein:
4. The fluorine concentration of the gallium nitride layer is 5×10 17 / cm 3 The laminate structure according to claim 3, wherein:
5. The stacked structure according to claim 1 , wherein the gallium nitride layer has a c-axis orientation.
6. 5. The stacked structure according to claim 1, wherein the buffer layer is a c-axis oriented metal film containing at least one element selected from titanium (Ti), aluminum (Al), silver (Ag), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), iridium (Ir), platinum (Pt), and gold (Au).
7. a metal oxide buffer layer instead of the buffer layer; The metal oxide buffer layer is made of zinc oxide (ZnO) and titanium dioxide (TiO 2 5. The laminate structure according to claim 1, wherein the laminate structure is a c-axis oriented metal oxide film containing one of:
8. The laminated structure according to claim 1 , further comprising an underlayer between the amorphous substrate and the buffer layer.
9. The laminated structure according to claim 8 , wherein the underlayer has a laminated structure of a silicon oxide film and a silicon nitride film.
10. The laminated structure according to claim 1 , wherein the amorphous substrate is a flexible resin substrate.
11. A gallium nitride based semiconductor device comprising the stacked structure according to claim 1 .
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