Semiconductor device and method for manufacturing the same

Abstract

This disclosure relates to a semiconductor device comprising: a first heat spreader mounting a first semiconductor element; a first electrode plate coupled to the first heat spreader via a bent portion having an inclination; a second heat spreader mounting a second semiconductor element; and a second electrode plate provided so as to have a step with respect to the second heat spreader. The first electrode plate is arranged at a position higher than that of the first heat spreader. The second electrode plate is arranged at a position higher than that of the second heat spreader. The first and second electrode plates are arranged at the same height. The first and second heat spreaders are arranged at the same height. The second electrode plate is arranged above the first heat spreader. The first electrode plate is arranged above the second heat spreader. The first semiconductor element is joined to the first heat spreader and the second electrode plate. The second semiconductor element is joined to the second heat spreader and the first electrode plate.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device, and more particularly to a semiconductor device with a direct lead bonding structure in which a semiconductor element and an electrode are directly bonded. [Background technology]

[0002] Power semiconductor devices such as IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and high-voltage diodes employ semiconductor device modules in which a direct lead bonding (DLB) structure, in which semiconductor elements and electrodes are directly bonded, is sealed with transfer mold resin.

[0003] For example, Patent Document 1 discloses a DLB structure in which a semiconductor element is bonded onto a die pad of a lead frame using a bonding material such as solder, and then the upper surface electrode of the semiconductor element is bonded to a DLB frame using a bonding material. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2018-081947 Summary of the Invention [Problem to be solved by the invention]

[0005] In the prior art, a lead frame and a DLB frame had to be prepared and each had to be bonded to a semiconductor element, which increased the number of parts and manufacturing steps, resulting in increased manufacturing costs.

[0006] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor device that reduces the number of parts and manufacturing steps, thereby reducing manufacturing costs. [Means for solving the problem]

[0007] The semiconductor device according to the present disclosure includes a first heat spreader on which a first semiconductor element is mounted, and the first heat spreader is bent at an inclined bend. together a first electrode plate connected to the first heat spreader, a second heat spreader on which a second semiconductor element is mounted, and a second electrode plate provided with a step from the second heat spreader, wherein the first electrode plate is disposed at a higher position than the first heat spreader, the second electrode plate is disposed at a higher position than the second heat spreader, the first electrode plate and the second electrode plate are disposed at the same height, the first heat spreader and the second heat spreader are disposed at the same height, the second electrode plate is disposed above the first heat spreader, and the first electrode plate is disposed above the second heat spreader, the first semiconductor element is bonded to the first heat spreader and the second electrode plate, and the second semiconductor element is bonded to the second heat spreader and the first electrode plate. [Effects of the Invention]

[0008] According to the semiconductor device of the present disclosure, a frame is provided in which a first heat spreader and a first electrode plate are provided so as to have a step, and a second heat spreader and a second electrode plate are provided so as to have a step. Electrode plate By preparing a frame in which the first semiconductor element is bonded to the first heat spreader and the second electrode plate and the second semiconductor element is bonded to the second heat spreader and the first electrode plate, a semiconductor device can be obtained, which eliminates the need to provide a heat spreader and an electrode plate separately and reduces the number of parts. In addition, by bonding the first and second semiconductor elements while the two frames are overlapped, the number of manufacturing steps can be reduced. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a plan view showing a configuration of a semiconductor device according to a first embodiment. [Figure 2] 1 is a plan view showing a frame for manufacturing the semiconductor device according to the first embodiment. [Figure 3] 1 is a plan view showing a frame for manufacturing the semiconductor device according to the first embodiment. [Figure 4] 1 is a plan view showing a state in which two frames for manufacturing the semiconductor device of the first embodiment are combined together. [Figure 5] 2 is a cross-sectional view of a frame for manufacturing the semiconductor device of the first embodiment. FIG. [Figure 6] 2 is a cross-sectional view of a frame for manufacturing the semiconductor device of the first embodiment. FIG. [Figure 7] 1 is a plan view showing a state in the middle of superimposing two frames for manufacturing the semiconductor device of the first embodiment. FIG. [Figure 8] FIG. 10 is a plan view showing a state in which two frames for manufacturing a semiconductor device according to a second embodiment are combined together. [Figure 9] FIG. 10 is a schematic cross-sectional view of a semiconductor device according to a second embodiment. [Figure 10] FIG. 11 is a plan view showing a state in the middle of superimposing two frames for manufacturing a semiconductor device according to a third embodiment. [Figure 11] FIG. 11 is a plan view showing a state in which two frames for manufacturing a semiconductor device according to a third embodiment are combined together. [Figure 12] FIG. 10 is a plan view showing a frame for manufacturing a semiconductor device according to a fourth embodiment. [Figure 13] FIG. 10 is a plan view showing a frame for manufacturing a semiconductor device according to a fourth embodiment. [Figure 14] FIG. 10 is a plan view showing a state in which two frames for manufacturing a semiconductor device according to a fourth embodiment are combined together. [Figure 15] FIG. 10 is a cross-sectional view of a frame for manufacturing a semiconductor device according to a fourth embodiment. [Figure 16] FIG. 10 is a cross-sectional view of a frame for manufacturing a semiconductor device according to a fourth embodiment. [Figure 17]FIG. 13 is a cross-sectional view of a frame for manufacturing a semiconductor device according to a fifth embodiment. [Figure 18] FIG. 13 is a cross-sectional view of a frame for manufacturing a semiconductor device according to a fifth embodiment. [Figure 19] 13 is a flowchart illustrating a method for manufacturing a semiconductor device according to a sixth embodiment. [Figure 20] 1A to 1C are plan views illustrating a manufacturing process of a semiconductor device. [Figure 21] 1A to 1C are plan views illustrating a manufacturing process of a semiconductor device. [Figure 22] 1A to 1C are plan views illustrating a manufacturing process of a semiconductor device. [Figure 23] 1A to 1C are plan views illustrating a manufacturing process of a semiconductor device. [Figure 24] 1A to 1C are plan views illustrating a manufacturing process of a semiconductor device. [Figure 25] FIG. 13 is a plan view showing a state in the middle of superimposing two frames for manufacturing a semiconductor device according to a seventh embodiment. [Figure 26] FIG. 13 is a plan view showing a state in which two frames for manufacturing a semiconductor device according to a seventh embodiment are combined together. [Figure 27] FIG. 20 is a plan view showing a state in the middle of overlapping two frames in a method for manufacturing a semiconductor device according to an eighth embodiment. [Figure 28] FIG. 20 is a plan view showing a state in which two frames are combined in a method for manufacturing a semiconductor device according to an eighth embodiment. [Figure 29] FIG. 20 is a plan view showing a state in the middle of overlapping two frames in a method for manufacturing a semiconductor device according to a ninth embodiment. [Figure 30] 13 is a plan view showing a state in which two frames are combined in a method for manufacturing a semiconductor device according to a ninth embodiment. FIG. [Figure 31] 20A to 20C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a tenth embodiment. [Figure 32] FIG. 23 is a plan view illustrating a method for manufacturing a semiconductor device according to a tenth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] <First Embodiment> FIG. 1 is a plan view showing a configuration of a single-phase power inverter 100, which is a semiconductor device according to a first embodiment of the present disclosure. The single-phase inverter 100 shown in FIG. 1 is sealed with a mold resin, but for convenience, the mold resin on the upper surface is omitted and only the mold resin RG on the lower surface is shown. Also, for convenience, only a power semiconductor element 1a (first semiconductor element) and a power semiconductor element 1b (second semiconductor element) are shown, but if these are IGBTs or MOSFETs connected in series, they can be considered as a basic circuit of a single-phase inverter.

[0011] As shown in FIG. 1, the single-phase inverter 100 is configured such that a heat spreader 4a2 (first heat spreader) carrying power semiconductor elements 1a, such as IGBTs, MOSFETs, and high-voltage diodes, is connected to an electrode plate 4a1 (first electrode plate) arranged parallel to the heat spreader 4a2 in a plan view, and the two are electrically at the same potential. The heat spreader 4a2 and the electrode plate 4a1 are connected by a bent portion BP1. The bent portion BP1 is inclined so that it is higher on the electrode plate 4a1 side and lower on the heat spreader 4a2 side. Therefore, a step exists between the heat spreader 4a2 and the electrode plate 4a1.

[0012] Furthermore, the bent portion BP1 is provided along one entire long side of the heat spreader 4a2, and the electrode plate 4a1 and the heat spreader 4a2 are firmly engaged with each other, thereby stabilizing the shape of the electrode plate 4a1.

[0013] The power semiconductor element 1a has a first main electrode provided on the lower surface joined to the upper surface of the heat spreader 4a2 by a brazing material such as solder (not shown), and a second main electrode provided on the upper surface joined to the heat spreader 4a 2 It is joined to the lower surface of the electrode plate 4b1 (second electrode plate) arranged above with a brazing material (not shown) such as solder.

[0014] Also, below the electrode plate 4a1, there is a heat spreader 4b2 on which the power semiconductor element 1b is mounted. (Second heat spreader) In the power semiconductor element 1b, a first main electrode provided on the lower surface side is joined to the upper surface of the heat spreader 4b2 with a brazing material such as solder (not shown), and a second main electrode provided on the upper surface side is joined to the lower surface of the electrode plate 4a1 with a brazing material such as solder (not shown).

[0015] The heat spreaders 4a2 and 4b2 are arranged parallel to each other in a plan view, with no step between them. On the other hand, the electrode plate 4b1 and the heat spreader 4b2 are arranged parallel to each other in a plan view, but the electrode plate 4b1 is located higher than the heat spreader 4b2, with a step between them.

[0016] The electrode plate 4b1 has a rectangular shape in a plan view, and a main terminal plate T2 is bonded to one end of the electrode plate 4b1. The main terminal plate T2 protrudes outside the mold resin RG. The end to which the main terminal plate T2 is bonded is opposite the end of the heat spreader 4a2 on which the power semiconductor element 1a is mounted. A bent portion BP2 is provided at one end of the electrode plate 4b1. The bent portion BP2 is inclined so that it is higher on the electrode plate 4b1 side and lower on the main terminal plate T2 side. This results in a step between the electrode plate 4b1 and the heat spreader 4b2.

[0017] The heat spreader 4a2 has a rectangular shape in a plan view, and the power semiconductor element 1a is mounted on one end and connected to the relay terminal RT1 via the wire WR, and the relay terminal RT1 protrudes outside the molding resin RG.

[0018] The heat spreader 4b2 has a rectangular shape in a plan view, and a main terminal plate T3 is bonded to one end of the heat spreader 4b2, which protrudes outside the molding resin RG. The end to which the main terminal plate T3 is bonded is on the same side as the end on which the power semiconductor element 1b is mounted. The power semiconductor element 1b is connected to a relay terminal RT2 via a wire WR, and the relay terminal RT2 protrudes outside the molding resin RG.

[0019] The electrode plate 4a1 has a rectangular shape in a plan view, and a main terminal plate T1 is joined to one end of the electrode plate 4a1, and the main terminal plate T1 protrudes outside the molding resin RG. The end to which the main terminal plate T1 is joined is opposite to the end of the heat spreader 4b2 on which the power semiconductor element 1b is mounted.

[0020] As described above, in single-phase inverter 100 shown in FIG. 1, there is a step between heat spreader 4a2 and electrode plate 4a1, and there is a step between electrode plate 4b1 and heat spreader 4b2. By arranging power semiconductor element 1a between heat spreader 4a2 and electrode plate 4b1 and arranging power semiconductor element 1b between heat spreader 4b2 and electrode plate 4a1, power semiconductor element 1a and power semiconductor element 1b can be connected in series.

[0021] Next, a method for manufacturing the main parts of the single-phase inverter 100 will be described with reference to Figures 2 to 6. Figures 2 and 3 are plan views showing frames 4b and 4a, respectively, for manufacturing the single-phase inverter 100, and Figure 4 is a plan view showing a state in which the frame 4a (first frame) and the frame 4b (second frame) are combined together.

[0022] As shown in FIG. 2, the frame 4b is composed of a frame main body 4b0 that defines the outline of the frame 4b, an electrode plate 4b1, and a heat spreader 4b2. The frame main body 4b0 is a rectangular framework in plan view, with the electrode plate 4b1 and heat spreader 4b2 extending inward from one side of the frame main body 4b0. The electrode plate 4b1 and the heat spreader 4b2 are arranged parallel to each other with a gap in between in plan view, but one end of the electrode plate 4b1 has a bent portion BP2. The bent portion BP2 is higher on one end side and slopes downward on the frame main body 4b0 side. This creates a step between the electrode plate 4b1 and the heat spreader 4b2.

[0023] The heat spreader 4b2 has the power semiconductor elements 1b and 11b mounted thereon, and the end portion on the side where the power semiconductor elements 1b are mounted is partially narrowed and is integrated with the frame body 4b0.

[0024] 3, the frame 4a is composed of a frame main body 4a0 that defines the outline of the frame 4a, an electrode plate 4a1, and a heat spreader 4a2. The frame main body 4a0 is a framework that is rectangular in plan view, and the electrode plate 4a1 is provided so as to extend inward from one side of the frame main body 4a0. The electrode plate 4a1 is connected to the heat spreader 4a2, which is arranged parallel to the frame main body 4a0 in plan view, by a bent portion BP1.

[0025] The bent portion BP1 has an inclination that is higher on the electrode plate 4a1 side and lower on the heat spreader 4a2 side. Therefore, a step exists between the heat spreader 4a2 and the electrode plate 4a1. The heat spreader 4a2 carries the power semiconductor elements 1a and 11a. The frames 4a and 4b can be made of aluminum (Al) or copper (Cu).

[0026] As shown in Figures 2 and 3, one side of the frame main body 4b0 along which the electrode plate 4b1 and heat spreader 4b2 of frame 4b extend is positioned opposite to one side along which the electrode plate 4a1 of frame 4a extends, and when frames 4b and 4a are arranged so as to overlap each other, the configuration shown in Figure 4 is obtained.

[0027] FIG. 4 shows the configuration of the area of ​​the single-phase inverter 100 shown in FIG. 1 that is sealed with the molding resin RG, in which the power semiconductor elements 1a and 11a are arranged between the heat spreader 4a2 and the electrode plate 4b1, and the power semiconductor elements 1b and 11b are arranged between the heat spreader 4b2 and the electrode plate 4a1.

[0028] FIG. 5 shows a cross-sectional view taken along line AA in FIG. 4, and FIG. 6 shows a cross-sectional view taken along line BB in FIG.

[0029] As shown in FIG. 5, the power semiconductor elements 1a and 11a are joined to the heat spreader 4a2 by a brazing filler metal 2a, and are joined to the upper electrode plate 4b1 by a brazing filler metal (first brazing filler metal).

[0030] 6, the power semiconductor elements 1b and 11b are joined to the heat spreader 4b2 by a brazing filler metal 2b, and are joined to the upper electrode plate 4a1 by a brazing filler metal 3b (second brazing filler metal). The brazing filler metals 2a, 3a, 2b, and 3b may be, for example, solder.

[0031] As described above, by providing the electrode plate 4a1 and the heat spreader 4a2 on the frame 4a, and the electrode plate 4b1 and the heat spreader 4b2 on the frame 4b, and arranging the frames 4a and 4b so that they overlap, it is no longer necessary to provide a heat spreader and an electrode plate separately, thereby reducing the number of parts. In addition, since the brazing filler metals 3a and 3b are joined with the frames 4a and 4b overlapped, the number of manufacturing steps can be reduced.

[0032] In addition, the frame shape can be freely designed, which increases the degree of freedom in inductance design and also improves heat dissipation.

[0033] Furthermore, by making the outer shapes defined by the frame main body 4a0 of the frame 4a and the frame main body 4b0 of the frame 4b the same size, it becomes easier to align the frames when they are superimposed, and the alignment accuracy is also improved.

[0034] Here, the types of the power semiconductor elements 1a and 11a are, for example, an IGBT for the power semiconductor element 1a, a high-voltage diode for the power semiconductor element 11a, and the power semiconductor element 11a is connected in antiparallel to the power semiconductor element 1a.

[0035] As for the types of the power semiconductor elements 1b and 11b, for example, the power semiconductor element 1b is an IGBT, the power semiconductor element 11b is a high-voltage diode, and the power semiconductor element 11b is connected inversely in parallel to the power semiconductor element 1b.

[0036] By connecting the power semiconductor element 1b and the power semiconductor element 1a in series, it is possible to configure an inverter in which the power semiconductor elements 11b and 11a operate as free wheeling diodes.

[0037] <Embodiment 2> Next, a second embodiment of the present disclosure will be described with reference to Figures 7 and 8. Figure 7 is a plan view showing a state in which frame 4b and frame 4a are being overlapped, and Figure 8 is a plan view showing a state in which frame 4a and frame 4b are combined, showing the main parts of single-phase inverter 200 of the second embodiment.

[0038] 7, frame 4b has the same shape as that of embodiment 1 shown in FIG. 2, but frame 4a has bent portion BP1 that joins electrode plate 4a1 and heat spreader 4a2, which is not provided along the entire long side of heat spreader 4a2 but is provided so as to connect part of one long side to part of one long side of electrode plate 4a1. For this reason, bent portion BP1 can be said to be provided so as to form a slit between electrode plate 4a1 and heat spreader 4a2.

[0039] As shown in FIG. 8, a slit is formed between the electrode plate 4a1 and the heat spreader 4a2, making it possible to utilize the gap between the heat spreaders 4b2 and 4a2.

[0040] FIG. 9 is a schematic cross-sectional view of a resin-sealed single-phase inverter 200 configured by combining the frame 4a and the frame 4b shown in FIG. 8, and corresponds to a cross-sectional view taken along the line CC in FIG. 8.

[0041] 8, cooling fins 6 are attached to single-phase inverter 200 sealed with mold resin RG. By forming slits between electrode plate 4a1 and heat spreader 4a2, through-holes TH penetrating the mold resin RG in the thickness direction can be provided between electrode plate 4b1 and electrode plate 4a1 and between heat spreaders 4a2 and heat spreaders 4b2. Screws 7 can be inserted into these through-holes TH to attach single-phase inverter 200 to cooling fins 6. In this way, the positions for inserting screws 7 can be secured in single-phase inverter 200.

[0042] <Third Embodiment> Next, a third embodiment of the present disclosure will be described with reference to Fig. 10 and Fig. 11. Fig. 10 is a plan view showing a state in which the frame 4b and the frame 4a are being overlapped, and Fig. 11 is a plan view showing a state in which the frame 4a and the frame 4b are combined. 3 1 shows the main parts of a single-phase inverter 300.

[0043] 10, frame 4b has the same shape as that of embodiment 1 shown in FIG. 2, but frame 4a has bent portion BP1 connecting electrode plate 4a1 and heat spreader 4a2, which is not provided along the entire long side of heat spreader 4a2 but is provided so as to connect two separate portions of one long side to two separate portions of one long side of electrode plate 4a1. For this reason, bent portion BP1 can be said to be provided so as to form an opening between electrode plate 4a1 and heat spreader 4a2.

[0044] As shown in FIG. 11, an opening is formed between the electrode plate 4a1 and the heat spreader 4a2, making it possible to utilize the gap between the heat spreaders 4b2 and 4a2.

[0045] 9 in the second embodiment, the slits are used as screw insertion positions when attaching cooling fins to the single-phase inverter 300. Furthermore, compared to when slits are formed between the electrode plate 4a1 and the heat spreader 4a2, the engagement between the electrode plate 4a1 and the heat spreader 4a2 is stronger, and the shape of the electrode plate 4a1 can be stabilized.

[0046] <Fourth Embodiment> Next, a fourth embodiment of the present disclosure will be described with reference to Figures 12 to 16. Figures 12 and 13 are plan views showing frames 4b and 4a, respectively, for manufacturing a single-phase inverter 400 according to the fourth embodiment, and Figure 14 is a plan view showing a state in which the frames 4a and 4b are combined, illustrating the main parts of the single-phase inverter 400 according to the fourth embodiment. In Figures 12 to 16, the same components as those in Figures 2 to 6 of the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0047] As shown in FIG. 12, the frame 4b is configured to include a frame body 4b0 that defines the outline of the frame 4b, an electrode plate 4b1, a heat spreader 4b2, and a relay terminal 4b3 (second relay terminal).

[0048] The frame body 4b0 is a rectangular framework in plan view, with an electrode plate 4b1, a heat spreader 4b2, and multiple relay terminals 4b3 extending inward from one side of the frame body 4b0. One end of the electrode plate 4b1 is provided with a terminal hole 4bh located closer to the frame body 4b0 than the bent portion BP2. The end of the heat spreader 4b2 on the side where the power semiconductor element 1b is mounted is partially narrowed to form one piece with the frame body 4b0, and the terminal hole 4bh is located closer to the frame body 4b0. The portion with the terminal hole 4bh functions as a main terminal for the single-phase inverter 400, and the terminal hole 4bh functions as an attachment hole for connecting external wiring. The multiple relay terminals 4b3 extend to the vicinity of the power semiconductor element 1b on the heat spreader 4b2 in plan view.

[0049] As shown in FIG. 13, the frame 4a is configured to include a frame body 4a0 that defines the outline of the frame 4a, an electrode plate 4a1, a heat spreader 4a2, and a plurality of relay terminals 4a3 (first relay terminals).

[0050] The frame main body 4a0 is a rectangular framework in plan view, with an electrode plate 4a1 and multiple relay terminals 4a3 extending inward from one side of the frame main body 4a0. One end of the electrode plate 4a1 is provided with a terminal hole 4ah on the frame main body 4a0 side. The portion with the terminal hole 4ah functions as a main terminal of the single-phase inverter 400, and the terminal hole 4ah functions as an attachment hole for connecting external wiring. The multiple relay terminals 4b3 extend to the vicinity of the power semiconductor elements 1a on the heat spreader 4a2 in plan view. The multiple relay terminals 4a3 function as terminals for connecting wires to control terminals on the top surfaces of the power semiconductor elements 1a.

[0051] As shown in Figures 12 and 13, one side of the frame main body 4b0 along which the electrode plate 4b1, heat spreader 4b2, and multiple relay terminals 4b3 of frame 4b extend is opposed to one side of the frame 4a along which the electrode plate 4a1 and multiple relay terminals 4a3 extend, and when frame 4b and frame 4a are arranged so as to overlap each other, the configuration shown in Figure 14 is obtained.

[0052] FIG. 14 shows the configuration of the area of ​​the single-phase inverter 100 shown in FIG. 1 that is sealed with the molding resin RG, in which the power semiconductor elements 1a and 11a are arranged between the heat spreader 4a2 and the electrode plate 4b1, and the power semiconductor elements 1b and 11b are arranged between the heat spreader 4b2 and the electrode plate 4a1.

[0053] FIG. 15 shows a cross-sectional view taken along line AA in FIG. 14, and FIG. 16 shows a cross-sectional view taken along line BB in FIG.

[0054] As shown in FIG. 15, the power semiconductor elements 1a and 11a are joined to the heat spreader 4a2 by a brazing material 2a, and are joined to the upper electrode plate 4b1 by a brazing material 3a.

[0055] As shown in FIG. 16, the power semiconductor elements 1b and 11b are joined to the heat spreader 4b2 by a brazing material 2b, and are joined to the upper electrode plate 4a1 by a brazing material 3b.

[0056] As described above, by providing the frame 4a with a plurality of relay terminals 4a3 and a portion that functions as a main terminal, and by providing the frame 4b with a plurality of relay terminals 4b3 and a portion that functions as a main terminal, the number of parts required to assemble the single-phase inverter 400 can be reduced, and productivity can be improved.

[0057] 12, in the frame 4b, the multiple relay terminals 4b3 are extended to the vicinity of the power semiconductor elements 1b on the heat spreader 4b2 in plan view, but in this case, the power semiconductor elements 1b close to the multiple relay terminals 4b3 are IGBTs or MOSFETs, and the multiple relay terminals 4b3 are used as terminals for wire bonding to the control terminals of the IGBTs or MOSFETs, which makes wire bonding easier and improves productivity. Note that the power semiconductor elements 11b are high-voltage diodes.

[0058] 13, in the frame 4a, the plurality of relay terminals 4a3 are extended to the vicinity of the power semiconductor elements 1a on the heat spreader 4a2 in plan view, but in this case, the power semiconductor elements 1a close to the plurality of relay terminals 4a3 are IGBTs or MOSFETs, and the plurality of relay terminals 4a3 are used as terminals for wire bonding to the control terminals of the IGBTs or MOSFETs, which makes wire bonding easier and improves productivity. Note that the power semiconductor elements 11b are high-voltage diodes.

[0059] <Fifth Embodiment> Next, a fifth embodiment of the present disclosure will be described with reference to Figures 17 and 18. Figure 17 is a cross-sectional view showing a cross-sectional configuration of a heat spreader 4a2 constituting a single-phase inverter 500 according to the fifth embodiment, and grooves GR (first grooves) for positioning power semiconductor elements 1a and 11a are provided on the semiconductor element mounting surface of heat spreader 4a2.

[0060] The grooves GR are formed to a depth and size that prevents the power semiconductor elements 1a and 11a arranged on the brazing filler metal 2a from shifting from above the brazing filler metal 2a. The grooves GR are provided in a direction perpendicular to the arrangement direction of the power semiconductor elements 1a and 11a, and are deep enough to accommodate the brazing filler metal 2a and also accommodate parts of the power semiconductor elements 1a and 11a.

[0061] By providing the grooves GR, the positioning accuracy when arranging the power semiconductor elements 1a and 11a on the brazing material 2a can be improved, and the power semiconductor elements 1a and 11a can be prevented from shifting from the brazing material 2a.

[0062] Although Figure 17 shows an example in which a groove GR is provided in the heat spreader 4a2, a groove GR (second groove) may also be provided in the heat spreader 4b2 to improve the positioning accuracy of the power semiconductor elements 1b and 11b and prevent misalignment of the power semiconductor elements 1b and 11b.

[0063] FIG. 18 is a cross-sectional view showing a configuration in which protrusions PJ are provided on the semiconductor element mounting surface of the heat spreader 4a2 instead of grooves GR. As shown in FIG. 18, the protrusions PJ are formed at a height that prevents the power semiconductor elements 1a and 11a, which are placed on the brazing filler metal 2a, from shifting from above the brazing filler metal 2a. The protrusions PJ are provided on the outer sides of each of the power semiconductor elements 1a and 11a in a plan view, and have a height that exceeds the thickness of the brazing filler metal 2a and extends to a portion of the thickness of the power semiconductor elements 1a and 11a. Note that, while FIG. 18 shows the protrusions PJ provided at the front and rear of each of the power semiconductor elements 1a and 11a, they can also be provided on the left and right sides of each of the power semiconductor elements 1a and 11a, or on the front, back, left, or right.

[0064] Providing the protrusions PJ improves the positioning accuracy when arranging the power semiconductor elements 1a and 11a on the brazing material 2a, and also prevents the power semiconductor elements 1a and 11a from shifting from the brazing material 2a.

[0065] Although Figure 18 shows an example in which a protrusion PJ is provided on the heat spreader 4a2, a protrusion PJ can also be provided on the heat spreader 4b2 to improve the positioning accuracy of the power semiconductor elements 1b and 11b and prevent misalignment of the power semiconductor elements 1b and 11b.

[0066] <Sixth Embodiment> Next, as a sixth embodiment of the present disclosure, a method for manufacturing the single-phase inverter 100 shown in FIG. 1 will be described with reference to the flowchart shown in FIG. 19 and with reference to FIGS.

[0067] In step S1 shown in Fig. 19, a frame is formed. This is a step of preparing frames 4a and 4b, as shown in Fig. 20, and frames 4a and 4b are formed by punching and bending. The frames 4a and 4b shown in Fig. 20 are in the state before power semiconductor elements are mounted on the frame 4a shown in Fig. 3 and the frame 4b shown in Fig. 2, respectively.

[0068] Next, in step S2, the power semiconductor elements are joined to the heat spreader with brazing filler metal. As shown in Fig. 21, this is a step in which the power semiconductor elements 1a and 11a are joined to the heat spreader 4a2 of the frame 4a via brazing filler metal 2a (not shown), and the power semiconductor elements 1b and 11b are joined to the heat spreader 4b2 of the frame 4b via brazing filler metal 2b (not shown), and this is a step in which the brazing filler metal is melted. figure The frames 4a and 4b shown in 21 are in the state of the frame 4a shown in FIG. 3 and the frame 4b shown in FIG. 2, respectively, and brazing filler metal 3a is placed on the power semiconductor elements 1a and 11a for the next step, and brazing filler metal 3b is placed on the power semiconductor elements 1b and 11b for the next step.

[0069] Next, in step S3, the two frames are overlapped, and the electrode plates are joined with the brazing filler metal on the power semiconductor elements. This is a process of overlapping frames 4a and 4b, joining brazing filler metal 3a (not shown) on the power semiconductor elements 1a and 11a of frame 4a to the electrode plate 4b1 of frame 4b, and joining brazing filler metal 3b (not shown) on the power semiconductor elements 1b and 11b of frame 4b to the electrode plate 4a1 of frame 4a, and melting the brazing filler metal. The overlapping state of frames 4a and 4b shown in FIG. 22 corresponds to the state shown in FIG. 4.

[0070] Next, in step S4, the main terminal board is joined to an external frame provided with relay terminals. This is a step of joining the external frame OF to the frames 4a and 4b after the joining of the power semiconductor elements and electrode plates has been completed, as shown in Fig. 23.

[0071] The external frame OF is joined so as to be further superimposed on the superimposed frames 4a and 4b, and is composed of a frame body OF0 that defines the outline of the external frame OF, main terminal boards T1, T2 and T3, and relay terminals RT1 and RT2.

[0072] The frame body OF0 is a framework having a rectangular shape in a plan view, and the main terminal plate T1 and the relay terminal RT1 are provided so as to extend inward from one side of the frame body. The main terminal plate T1 is provided at a position where it is joined to an end of the electrode plate 4a1, and the relay terminal RT1 is provided at a position opposite the power semiconductor element 1a.

[0073] Furthermore, main terminal plates T2 and T3 and relay terminal RT2 are provided to extend inward from an opposite side of frame body OF0 to the side along which main terminal plate T1 and relay terminal RT1 extend. Main terminal plate T2 is provided at a position where it is joined to an end of electrode plate 4b1, main terminal plate T3 is provided at a position where it is joined to an end of heat spreader 4b2, and relay terminal RT2 is provided at a position facing power semiconductor element 1b.

[0074] The external frame OF can be joined to the frames 4a and 4b by ultrasonic (US) joining, or by joining via a brazing material.

[0075] Next, in step S5, the relay terminals and the power semiconductor elements are connected by wire bonding. This is a step of connecting the relay terminal RT1 and the control terminal of the power semiconductor element 1a by a wire WR, and connecting the relay terminal RT2 and the control terminal of the power semiconductor element 1b by a wire WR, as shown in Fig. 24.

[0076] Thereafter, unnecessary portions of the frame main body OF0 and the frame main bodies 4a0 and 4b0 are cut off, and the main portion of the single-phase inverter 100 is sealed with molding resin RG, thereby obtaining the single-phase inverter 100 shown in FIG.

[0077] <Seventh Embodiment> Next, a seventh embodiment of the present disclosure will be described with reference to Fig. 25 and Fig. 26. Fig. 25 is a plan view showing a state in which frame 4b and frame 4a are being overlapped, and Fig. 26 is a plan view showing a state in which frame 4a and frame 4b are combined, showing the main parts of single-phase inverter 600 of the seventh embodiment.

[0078] 25, frame 4b has the same shape as in embodiment 1 shown in FIG. 2, but frame 4a has a notch portion NP, where a portion of frame main body 4a0 is cut out. The notch portion NP is provided at a position where an end of electrode plate 4b1 of frame 4b engages with frame main body 4a0 when frames 4a and 4b are combined. Therefore, when frames 4a and 4b are overlapped and joined, the frame main body 4a0 and the end of electrode plate 4b1 do not overlap, making joining easier.

[0079] <Embodiment 8> Next, an eighth embodiment of the present disclosure will be described with reference to Figures 27 and 28. Figure 27 is a plan view showing a state in which frame 4b and frame 4a are being overlapped, and Figure 28 is a plan view showing a state in which frame 4a and frame 4b are combined.

[0080] 27, the frame main body 4b0 of the frame 4b has protrusions CV on two left and right sides parallel to the arrangement of the electrode plates 4b1 and the heat spreader 4b2. The protrusions CV are provided at four corners of the frame main body 4b0 and protrude toward the side on which the frame 4a is placed.

[0081] On the other hand, as shown in Fig. 27, the frame main body 4a0 of the frame 4a has openings OP on two left and right sides parallel to the arrangement of the electrode plates 4a1 and the heat spreader 4a2. The openings OP are provided at four corners of the frame main body 4a0, and as shown in Fig. 28, are provided at positions where the protrusions CV are inserted into the openings OP when the frame 4a is placed on top of the frame 4b. This improves the positioning accuracy when the frames 4a and 4b are placed together.

[0082] <Ninth Embodiment> Next, a ninth embodiment according to the present disclosure will be described with reference to Figures 29 and 30. Figure 29 is a plan view showing a state in which frame 4b and frame 4a are in the process of being superimposed on each other, and Figure 30 is a plan view showing a state in which frame 4a and frame 4b have been combined.

[0083] 29, the frame body 4b0 of the frame 4b has a plurality of dimples DP2 (second dimples) on two left and right sides parallel to the arrangement of the electrode plates 4b1 and the heat spreaders 4b2. The plurality of dimples DP2 are arranged in a row on the two left and right sides along the extension direction of each side.

[0084] Similarly, the frame body 4a0 of the frame 4a also has a plurality of dimples DP1 (first dimples) on two left and right sides parallel to the arrangement of the electrode plates 4a1 and the heat spreaders 4a2. The plurality of dimples DP1 are arranged in a row on the two left and right sides along the extension direction of each side.

[0085] The multiple dimples DP1 and DP2 on the frames 4a and 4b are provided so as to be recessed in the same direction at overlapping positions when the frame 4a is placed on top of the frame 4b, as shown in Fig. 30. This improves the positioning accuracy when the frames 4a and 4b are placed on top of each other.

[0086] <Tenth Embodiment> Next, a tenth embodiment according to the present disclosure will be described with reference to Fig. 31 and Fig. 32. Fig. 31 is a cross-sectional view illustrating a state in which frame 4a and frame 4b are overlapped and electrode plates on a power semiconductor element are joined with brazing material, and corresponds to Fig. 5 described in the first embodiment, and is a diagram illustrating a technique employed in step S3 of the flowchart shown in Fig. 19 in the sixth embodiment.

[0087] 31, the overlapping frames 4a and 4b are fixed by a fixing jig JG in order to carry out the step of melting the brazing material. The fixing jig JG is made up of a lower fixing jig JD that is disposed on the lower side of the overlapping frames 4a and 4b, i.e., on the heat spreader 4a2 side, and an upper fixing jig JU that is disposed on the upper side of the overlapping frames 4a and 4b, i.e., on the electrode plate 4b1 side.

[0088] As shown in Figure 31, by sandwiching the overlapping frames 4a and 4b between the lower fixing jig JD and the upper fixing jig JU, the frames 4a and 4b are prevented from shifting when the solder material is melted, and the positioning accuracy of the electrode plates is improved.

[0089] Although FIG. 31 shows a configuration in which the entire overlapping frames 4a and 4b are sandwiched by the fixing jig JG, the present invention is not limited to this, and a configuration in which only a portion of the frames is sandwiched may also be used.

[0090] Figure 32 is a plan view showing a fixture JG that clamps only a portion of the frame. Figure 32 shows a configuration in which the left and right frame bodies of the overlapping frames 4a and 4b are clamped between a lower fixture JD and an upper fixture JU. The upper fixture JU is positioned only above the left and right frame bodies of the overlapping frames 4a and 4b. When using such a fixture JG, it is possible to proceed to the next wire bonding process while the overlapping frames 4a and 4b are still clamped by the fixture JG.

[0091] The fixing jig JG may be made of a material such as carbon that can withstand the temperature at which the brazing material melts and is less likely to deform.

[0092] <Semiconductor materials for power semiconductor elements> The power semiconductor elements 1a, 1b, 11a, and 11b are not limited to silicon semiconductor elements using silicon (Si), and wide bandgap semiconductor elements such as silicon carbide semiconductor elements using silicon carbide (SiC) and gallium nitride semiconductor elements using gallium nitride (GaN) can be used. Compared to silicon semiconductor elements, wide bandgap semiconductor elements can be made smaller, have excellent voltage resistance, high allowable current density, and high heat resistance, allowing for high-temperature operation and the potential for high efficiency.

[0093] <Modification> In the above-described first to tenth embodiments, the present disclosure is applied to a single-phase inverter, but is not limited to this and can also be applied to a three-phase inverter in which three single-phase inverters are combined, or to a converter for power regeneration.

[0094] It should be noted that, within the scope of the present disclosure, the embodiments can be freely combined, modified, or omitted as appropriate.

[0095] Although the present disclosure has been described in detail, the above description is in all respects illustrative and is not intended to limit the disclosure, and it is understood that numerous variations not illustrated can be envisaged without departing from the scope of the present disclosure.

Claims

1. a first heat spreader on which a first semiconductor element is mounted; a first electrode plate integrally connected to the first heat spreader at a bent portion having an inclination; a second heat spreader on which a second semiconductor element is mounted; a second electrode plate provided with a step on the second heat spreader, the first electrode plate is disposed at a position higher than the first heat spreader, the second electrode plate is disposed at a position higher than the second heat spreader, the first electrode plate and the second electrode plate are disposed at the same height; the first heat spreader and the second heat spreader are disposed at the same height; the second electrode plate is disposed above the first heat spreader; the first electrode plate is disposed above the second heat spreader; the first semiconductor element is bonded to the first heat spreader and the second electrode plate; The second semiconductor element is bonded to the second heat spreader and the first electrode plate.

2. 2. The semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate are positioned parallel to each other in a plan view, and the bent portion is provided along an entire side of the first heat spreader facing the first electrode plate.

3. 2. The semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate are positioned parallel to each other in a plan view, and the bent portion is provided on a part of one side of the first heat spreader facing the first electrode plate, forming a slit between the first heat spreader and the first electrode plate.

4. 2. The semiconductor device according to claim 1, wherein the first heat spreader and the first electrode plate are positioned parallel to each other in a planar view, and the bent portion is provided in a first portion and a second portion spaced apart from each other on one side of the first heat spreader facing the first electrode plate, forming an opening between the first heat spreader and the first electrode plate.

5. the first heat spreader and the first electrode plate are in a parallel positional relationship in a plan view, and the heat spreader further includes a plurality of first relay terminals arranged in parallel in a plan view on the first heat spreader, the first semiconductor element is disposed on the first heat spreader at a position closer to the plurality of first relay terminals, the second heat spreader and the second electrode plate are in a parallel positional relationship in a plan view, and the heat spreader further includes a plurality of second relay terminals arranged in parallel in a plan view, 2. The semiconductor device according to claim 1, wherein said second semiconductor element is disposed on said second heat spreader at a position closer to said plurality of second relay terminals.

6. 6. The semiconductor device according to claim 5, wherein said first and second semiconductor elements are IGBTs or MOSFETs.

7. The first heat spreader comprises: a first groove having a size corresponding to the size of the first semiconductor element in a plan view is provided in a portion on which the first semiconductor element is mounted; The second heat spreader comprises:

2. The semiconductor device according to claim 1, further comprising a second groove in a portion where said second semiconductor element is mounted, said second groove having a size corresponding to the size of said second semiconductor element in a plan view.

8. The first heat spreader comprises: a plurality of first protrusions provided on a portion on which the first semiconductor element is mounted, the first protrusions being located outside the first semiconductor element in a plan view; The second heat spreader comprises:

2. The semiconductor device according to claim 1, further comprising a plurality of second protrusions provided on a portion on which said second semiconductor element is mounted, said second protrusions being located outside said second semiconductor element in a plan view.

9. The semiconductor device according to claim 1 , wherein said first semiconductor element is a silicon carbide semiconductor element.

10. a first heat spreader to which a first semiconductor element is bonded; a first frame having a first electrode plate connected to the first heat spreader at an inclined bent portion; A method for manufacturing a semiconductor device using a second frame having a second heat spreader to which a second semiconductor element is bonded and a second electrode plate provided with a step from the second heat spreader, the first electrode plate is disposed at a position higher than the first heat spreader, the second electrode plate is disposed at a position higher than the second heat spreader, the first electrode plate and the second electrode plate are disposed at the same height; the first heat spreader and the second heat spreader are disposed at the same height; the second electrode plate is disposed above the first heat spreader; the first electrode plate is disposed above the second heat spreader; (a) overlapping the first frame and the second frame so that the first semiconductor element is sandwiched between the first heat spreader and the second electrode plate and the second semiconductor element is sandwiched between the second heat spreader and the first electrode plate; (b) melting a first brazing filler metal placed between the first semiconductor element and the second electrode plate and a second brazing filler metal placed between the second semiconductor element and the first electrode plate to join the first semiconductor element to the second electrode plate and to join the second semiconductor element to the first electrode plate.

11. The first frame comprises:

11. The method for manufacturing a semiconductor device according to claim 10, wherein a notch is formed in a portion that comes into contact with the second electrode plate when the first frame and the second frame are superimposed on each other.

12. the second frame has a plurality of protrusions, The first frame comprises: a plurality of openings provided at positions corresponding to the plurality of protrusions of the second frame; The step (a) 11. The method for manufacturing a semiconductor device according to claim 10, wherein the first frame and the second frame are overlapped with each other so that the plurality of projections are inserted into the plurality of openings.

13. the second frame has a plurality of second dimples; The first frame comprises: a plurality of first dimples provided at positions corresponding to the plurality of second dimples of the second frame; The step (a) 11. The method for manufacturing a semiconductor device according to claim 10, wherein the first frame and the second frame are overlapped with each other so that the plurality of first dimples and the plurality of second dimples overlap with each other.

14. The step (b) 11. The method for manufacturing a semiconductor device according to claim 10, further comprising the step of holding the top and bottom of the overlapped first and second frames with a fixing jig.

15. The first and second frames include: The method for manufacturing a semiconductor device according to claim 10, wherein the external dimensions of the semiconductor devices are the same.

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