High heat dissipation hybrid substrate manufacturing method and semiconductor structure

Abstract

To provide a method for manufacturing a high-heat-dissipation hybrid substrate with a better heat dissipation performance than that of a conventional substrate, and to provide a semiconductor structure.SOLUTION: A method for manufacturing a high-heat-dissipation hybrid substrate includes: preparing a mother substrate, the mother substrate including an insulating layer and a temporary carrier plate, the insulating layer being press-bonded to the temporary carrier plate; providing the mother substrate with some first grooves and some first cavities; filling the first grooves with a thermally-conductive material to form a first thermally-conductive block, and adhering an embedded device in the first cavities and filling the first cavities with the thermally-conductive material to form a second thermally-conductive block; removing the temporary carrier plate to obtain a semi-finished substrate; manufacturing circuit layers on two opposite side surfaces of the semi-finished substrate to obtain a target mother substrate; and cutting the target mother substrate along region dividing lines to obtain a hybrid substrate with a side surface being a thermally-conductive surface.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to the technical field of integrated circuit manufacturing, and more particularly to methods for fabricating high heat dissipation hybrid substrates and semiconductor structures. [Background technology]

[0002] A hybrid substrate is a substrate containing a circuit and an embedded packaged device. Embedded packaging technology involves embedding passive components such as resistors, capacitors, and inductors, as well as active components such as IC chips, inside a package substrate. To meet the heat dissipation requirements of embedded packaging technology, many conventional substrates have been designed with thermally conductive copper columns and heat-dissipating copper blocks on the backside of the embedded packaged device to improve the heat dissipation capabilities of the substrate. However, with the continuous development of electronic technology, product sizes are gradually shrinking and the integration density of substrates is increasing. As a result, embedded packaged devices generate more heat in the substrate, and the heat dissipation needs of the devices become greater. Therefore, the commonly used embedded package substrate cannot meet these new heat dissipation needs. Therefore, a new method for fabricating a hybrid substrate is urgently needed. Summary of the Invention [Problem to be solved by the invention]

[0003] The present disclosure aims to solve at least to some extent one of the technical problems existing in the prior art.

[0004] Therefore, one object of the embodiments of the present disclosure is to provide a method for manufacturing a high heat dissipation hybrid substrate and a semiconductor structure that can obtain a hybrid substrate having better heat dissipation performance than conventional substrates. [Means for solving the problem]

[0005] To achieve the above technical objectives, the technical solution adopted in the embodiment of the present disclosure includes the steps of preparing a mother substrate, the mother substrate including an insulating layer and a temporary carrier plate, the insulating layer being pressed onto the temporary carrier plate; and forming several first grooves and several first cavities on the mother substrate, the mother substrate including several sub-substrates and area dividing lines, the sub-substrate including at least one first cavity, the first grooves being formed across two adjacent sub-substrates, and the area dividing lines dividing the projection pattern of the first grooves in a direction perpendicular to the mother substrate into two. a first insulating layer formed on the insulating layer and a second insulating layer formed on the insulating layer; a first insulating layer formed on the insulating layer and a second insulating layer formed on the insulating layer; a second insulating layer formed on the insulating layer and a second insulating layer formed on the insulating layer; a second insulating layer formed on the insulating layer and a second insulating layer formed on the insulating layer; a second insulating layer formed on the insulating layer and a second insulating layer formed on the insulating layer; a second insulating layer formed on the insulating layer and a second insulating layer formed on the insulating layer;

[0006] Furthermore, the method for producing a high heat dissipation hybrid substrate according to the above embodiment of the present invention may have the following additional technical features. Furthermore, in an embodiment of the present disclosure, the step of filling the first groove with a thermally conductive material to form a first thermally conductive block specifically includes the step of filling the first groove with a thermally conductive material by silkscreen printing to form the first thermally conductive block, or pressing a dry film type high thermal conductivity material to fill the first groove and form the first thermally conductive block.

[0007] Furthermore, in an embodiment of the present disclosure, the step of fabricating circuit layers on opposite side surfaces of the semi-finished substrate to obtain a target mother substrate specifically includes the steps of fabricating first via holes to electrically connect the first and second circuit layers on both side surfaces of the semi-finished substrate, fabricating the first circuit layer on one surface of the semi-finished substrate and fabricating a third circuit layer electrically connected to the first circuit layer, and fabricating the second circuit layer on the other surface opposite to the one surface of the semi-finished substrate and fabricating a fourth circuit layer electrically connected to the second circuit layer.

[0008] Furthermore, in an embodiment of the present disclosure, the step of fabricating the first circuit layer on one surface of the semi-finished substrate specifically includes the steps of fabricating a first metal seed layer, pressing a photoresist material onto the first metal seed layer, and exposing, developing, and etching the photoresist material to obtain a first circuit layer.

[0009] Furthermore, in an embodiment of the present disclosure, the thermally conductive material includes a combination of one or more of the following thermally conductive materials: aluminum oxide, beryllium oxide, aluminum nitride, and silicon nitride.

[0010] Furthermore, in an embodiment of the present disclosure, the embedded element comprises one of a chip, an active element, or a passive element.

[0011] On the other hand, an embodiment of the present disclosure further provides a high heat dissipation hybrid substrate obtained by the method for manufacturing a hybrid substrate described in any of the above embodiments, the high heat dissipation hybrid substrate including a first thermally conductive block, a second thermally conductive block, an embedded element, and a circuit layer, wherein the first thermally conductive block is provided on a side surface of the hybrid substrate, and the second thermally conductive block is provided between the embedded element and the circuit layer.

[0012] Furthermore, in the embodiments of the present disclosure, one or more of the embedded elements are included.

[0013] Furthermore, in the embodiment of the present disclosure, one or more first thermally conductive blocks are included.

[0014] Meanwhile, an embodiment of the present disclosure further provides a semiconductor structure, characterized by including at least one high heat dissipation hybrid substrate according to any of the above embodiments.

[0015] The advantages and beneficial effects of the present disclosure will be set forth in part in the description that follows, and in part will be obvious from the description, or may be learned by practice of the present disclosure. The present disclosure provides a mother substrate including several sub-substrates and area dividing lines, with a first groove and a first cavity in which elements can be embedded, fills the first groove and the first cavity with a thermally conductive material, creates circuits on the mother substrate filled with the thermally conductive material, and finally cuts the mother substrate along the area dividing lines to obtain a hybrid substrate with a thermally conductive side surface. The thermally conductive side surface of the hybrid substrate can dissipate heat from the circuit layer on the substrate, and a second thermally conductive block filled in the second cavity conducts heat generated from the embedded elements to the circuit layer on the substrate, and the heat from the circuit layer can be quickly conducted to the external environment via the conductive side surface of the hybrid substrate, thereby improving the heat dissipation efficiency of the entire hybrid substrate. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a schematic diagram of steps in a method for fabricating a high heat dissipation hybrid substrate in one specific embodiment of the present invention. [Figure 2] FIG. 2 is a schematic diagram of the step of fabricating circuit layers on opposite sides of the semi-finished substrate to obtain a target mother substrate in one specific embodiment of the present invention. [Figure 3] FIG. 2 is a schematic diagram of a step of fabricating the first circuit layer on one surface of the semi-finished substrate in one specific embodiment of the present invention. [Figure 4] 1 is a structural schematic diagram of a mother substrate in one specific embodiment of the present invention; [Figure 5]1 is a structural schematic diagram of a mother substrate having a first groove and a first cavity in one specific embodiment of the present invention; [Figure 6] FIG. 2 is a top view of a mother substrate having a first groove and a first cavity in one specific embodiment of the present invention. [Figure 7] FIG. 2 is a structural schematic diagram of a mother substrate after being filled with a thermally conductive material and having elements embedded therein in one specific embodiment of the present invention. [Figure 8] FIG. 2 is a top view of a mother substrate after being filled with a thermally conductive material and having elements embedded therein in one specific embodiment of the present invention. [Figure 9] 1 is a structural schematic diagram of a semi-finished substrate in one specific embodiment of the present invention; [Figure 10] 3 is a schematic diagram of the structural changes of the target mother substrate obtained on the semi-finished substrate in one specific embodiment of the present invention; FIG. [Figure 11] 1 is a structural schematic diagram of a hybrid substrate in one specific embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, the principles and processes of the hybrid substrate manufacturing method, hybrid substrate, and semiconductor structure according to the embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0018] Referring to FIG. 1, the method for producing a high heat dissipation hybrid substrate of the present invention includes the following steps S1 to S6.

[0019] In step S1, a motherboard is prepared.

[0020] Optionally, the mother substrate of the present disclosure may include an insulating layer and a temporary carrier plate. The insulating layer and the temporary carrier plate can be physically bonded by pressure bonding, adhesion, or other methods. Because the temporary carrier plate needs to be physically removed in a subsequent process, the temporary carrier plate may be made of a heat-sealable material or an adhesive material such as heat-resistant tape. The insulating layer may be made of a glass fiber material or other insulating material. Specifically, heat-resistant tape is used for the temporary carrier plate. The heat-resistant tape is thermally stable and does not easily change physically or chemically even at high temperatures. Furthermore, because elements need to be embedded in the hybrid substrate, the heat-resistant tape has adhesive properties that allow it to fix the embedded elements.

[0021] In step S2, several first grooves and several first cavities are provided in the mother substrate.

[0022] In some embodiments of the present disclosure, the first groove and the first cavity may be formed physically by milling or gong-cutting, or chemically by chemical etching. The mother substrate may include several sub-substrates and dividing lines. The projected areas of the several sub-substrates in a direction perpendicular to the mother substrate may be the same, partially the same, or different for each pair of sub-substrates. The first groove may be used to fill a thermally conductive material. The first groove may be formed across any two sub-substrates. The dividing line of the first groove may divide the first groove into two parts along a direction perpendicular to the mother substrate, and the projected areas of the two parts in a direction perpendicular to the mother substrate may be the same or different. The first cavity may be used to attach an embedded element. The first cavity may be formed at any position on each sub-substrate, such as in the center of the sub-substrate, near the first groove, or connected to the first groove. Both the first cavity and the first groove can penetrate the insulating layer of the motherboard along a direction perpendicular to the base.

[0023] In step S3, the first groove is filled with a thermally conductive material to form a first thermally conductive block, and an embedded element is attached to the first cavity and filled with a thermally conductive material to form a second thermally conductive block.

[0024] In some embodiments of the present disclosure, the first groove may be filled with a thermally conductive material to form a first thermally conductive block. An embedded device must be attached to the first cavity before the thermally conductive material is filled with the thermally conductive material to form a second thermally conductive block. The first thermally conductive block can be used for heat dissipation of the circuit layer of the hybrid substrate. The second thermally conductive block can be used for heat dissipation of the device embedded in the first cavity. Because neither the first thermally conductive block nor the second thermally conductive block is involved in interlayer conduction in the hybrid substrate, an insulating material with high thermal conductivity can be used for the thermally conductive blocks.

[0025] In step S4, the temporary carrier plate is removed to obtain a semi-finished substrate.

[0026] In some embodiments of the present disclosure, the temporary carrier plate can fix the thermally conductive material during the fabrication of the hybrid substrate so that the thermally conductive material does not overflow in the opposite direction to the filling process. Because the temporary carrier plate and the insulating layer are connected by bonding or crimping, the temporary carrier plate can be removed by a physical removal method. Alternatively, the temporary carrier plate can be removed by a chemical removal method, such as by using a chemical reagent that can corrode the temporary carrier plate. In this case, it is necessary that the chemical reagent does not corrode the thermally conductive block and the insulating layer.

[0027] In step S5, circuit layers are fabricated on both opposing sides of the semi-finished substrate to obtain a target mother substrate.

[0028] In some embodiments of the present disclosure, after a semi-finished substrate is obtained, a circuit layer needs to be fabricated on the semi-finished substrate. Before fabricating the circuit layer, the surface of the semi-finished substrate on which the thermally conductive material will be filled needs to be planarized to prevent unevenness or overflow during filling. This can be done by mechanical grinding or etching. After the planarization process is complete, circuit layers are fabricated on both opposing sides of the semi-finished substrate, ultimately obtaining a target mother substrate. The target mother substrate may include a circuit layer and a semi-finished substrate circuit layer. The circuit layer may be a single-layer circuit layer or a multi-layer circuit layer. The specific number of circuit layers may be selected according to specific functions.

[0029] In step S6, the target mother substrate is divided along the region dividing lines to obtain hybrid substrates whose side surfaces are heat-conductive surfaces.

[0030] In some embodiments of the present disclosure, after a target mother substrate having a circuit layer is obtained, the target mother substrate can be divided along a division line to divide the target mother substrate into several hybrid substrates. The division line can divide the projection pattern toward the mother substrate into two parts, and the side surfaces of the hybrid substrates divided along the division line become thermally conductive surfaces, which can quickly conduct heat generated in the circuit layer to the external environment, thereby achieving a heat dissipation effect. Because a first cavity is located in the hybrid substrate, a second thermally conductive block can conduct heat generated in the embedded device to the circuit layer and then to the external environment via the thermally conductive surface.

[0031] Furthermore, the step of filling the first groove with a thermally conductive material to form a first thermally conductive block may specifically include filling the first groove with a thermally conductive material by silkscreen printing to form the first thermally conductive block, or pressing a dry film type high thermal conductivity material to fill the first groove and form the first thermally conductive block.

[0032] In some embodiments of the present disclosure, when filling the first groove with a thermally conductive material, the thermally conductive material can be filled into the first groove by silkscreen printing. In this case, the thermally conductive material can be an insulating and thermally conductive filler ink. The first thermally conductive block is formed by thermal curing, or a dry film type highly thermally conductive material is pressed into the first groove to form the first thermally conductive block. The first thermally conductive block can conduct heat from the circuit layer to prevent high temperatures from affecting the circuit function.

[0033] Alternatively, the second thermally conductive block may be silk-screen printed to fill the first cavity containing the embedded device with a thermally conductive material, which may be an insulating and thermally conductive filler ink. The second thermally conductive block may be formed by thermal curing, or by compressing a dry film-type highly thermally conductive material into the first cavity to form the second thermally conductive block. The second thermally conductive block can conduct heat from the device, thereby preventing high temperatures from affecting the device's service life.

[0034] Further, referring to FIG. 2, the step of fabricating circuit layers on both opposing side surfaces of the semi-finished substrate to obtain a target mother substrate may specifically include the following steps S101 to S103.

[0035] In step S101, a first via hole is formed.

[0036] In some embodiments of the present disclosure, the first via hole may be a via hole that interconnects circuit layers on both sides of the semi-finished substrate. The number of the first via holes may be one or more. The first via hole may be provided at any position in the insulating layer. The first via hole may penetrate the insulating layer of the semi-finished substrate in a direction perpendicular to the semi-finished substrate. When forming the first via hole, a hole may first be drilled in the semi-finished substrate to form the via hole, and then the via hole may be metallized. An electroplating process may be used for the hole metallization process.

[0037] In step S102, the first circuit layer is fabricated on one surface of the semi-finished substrate, and a third circuit layer that is electrically connected to the first circuit layer is fabricated.

[0038] In some embodiments of the present disclosure, the first circuit layer may be a circuit layer on one surface of a semi-finished substrate, and the third circuit layer may be a circuit layer connected to the first circuit layer. The third circuit layer may be one or more circuit layers. After the first circuit layer is fabricated, a third circuit layer that is electrically connected to the first circuit layer can be fabricated based on the first circuit layer.

[0039] In step S103, the second circuit layer is fabricated on the surface opposite to the surface on the other side of the semi-finished substrate, and a fourth circuit layer electrically connected to the second circuit layer is fabricated.

[0040] In some embodiments of the present disclosure, the second circuit layer may be a circuit layer on one surface of the semi-finished substrate opposite to the other surface, and the fourth circuit layer may be a circuit layer connected to the second circuit layer. The fourth circuit layer may be one or more circuit layers. After the second circuit layer is fabricated, a fourth circuit layer that is conductive with the second circuit layer can be fabricated based on the second circuit layer, ultimately forming a target motherboard in which multiple circuits on both sides of the substrate are conductive with each other.

[0041] Further, referring to FIG. 3, the step of fabricating the first circuit layer on one surface of the semi-finished substrate may specifically include the following steps S201 to S203.

[0042] In step S201, a first metal seed layer is formed.

[0043] In some embodiments of the present disclosure, the first metal seed layer can be used as a basis for fabricating the first circuit layer. The first metal seed layer may be obtained by an electroplating process, and the first metal seed layer may completely cover the surface of one side of the semi-finished substrate.

[0044] In step S202, a photoresist material is pressed onto the first metal seed layer.

[0045] In some embodiments of the present disclosure, after the first metal seed layer is obtained, a photoresist material may be pressed onto the seed layer, which can protect circuit layers that do not require etching.

[0046] In step S203, the photoresist material is exposed, developed and etched to obtain a first circuit layer.

[0047] In some embodiments of the present disclosure, the photoresist material can be exposed and developed to obtain a developed circuit image of the portion that needs to be etched, and an etching process can remove the exposed and developed circuit layer, thereby obtaining the first circuit layer.

[0048] It should be noted that the fabrication steps of the second circuit layer may be the same as the fabrication steps of the first circuit layer, i.e., the second circuit layer may be obtained by fabricating a seed layer, followed by exposure, development, and etching, or by other conventional processes.

[0049] Furthermore, in some embodiments of the present disclosure, the thermally conductive material may include a combination of one or more of aluminum oxide, beryllium oxide, aluminum nitride, and silicon nitride. Aluminum oxide, beryllium oxide, aluminum nitride, and silicon nitride are all materials with good thermal conductivity and can efficiently conduct heat, thereby realizing efficient heat dissipation of the substrate and increasing the rigidity of the substrate to effectively reduce warpage of the product.

[0050] Furthermore, in some embodiments of the present disclosure, the embedded elements of the hybrid substrate may include one of a chip, an active element, or a passive element, and the number of embedded elements may be one or more, and the specific number may be set according to actual applications.

[0051] Specifically, the method and principle of producing the hybrid substrate of the present disclosure will be described with reference to FIGS.

[0052] First, it is necessary to prepare a mother substrate 2000. Referring to Fig. 4, the mother substrate 2000 has a two-layer structure including an insulating layer 2002 and a temporary carrier plate 2003, and the insulating layer 2002 and the temporary carrier plate 2003 are adhered to each other to form the mother substrate 2000.

[0053] Next, several first grooves 2004 and first cavities 2005 are provided in the mother substrate 2000, and the first grooves 2004 and first cavities 2005 may be provided with reference to FIGS. 5 and 6. In FIGS. 5 and 6, the mother substrate 2000 includes a plurality of sub-substrates 2001 and area dividing lines L1 and L2. Each sub-substrate 2001 includes at least one first cavity 2005. The first grooves 2004 are provided across two adjacent sub-substrates 2001, and the area dividing lines L1 and L2 can be used to divide the projection pattern of the first grooves 2004 in a direction perpendicular to the mother substrate 2000 into two parts. Both the first grooves 2004 and the first cavities 2005 penetrate the insulating layer 2002 in a direction perpendicular to the mother substrate 2000.

[0054] Next, referring to Figures 7 and 8, the first groove 2004 is filled with a thermally conductive material to form a first thermally conductive block 2006, and an embedded element 2008 is attached to the first cavity 2005 and filled with a thermally conductive material to form a second thermally conductive block 2007.

[0055] Next, referring to FIG. 9, temporary carrier plate 2003 is removed to obtain semi-finished substrate 2009.

[0056] Next, referring to FIG. 10, a first circuit layer 2010 and a second circuit layer 2011 that are mutually conductive are fabricated on opposite sides of the semi-finished substrate 2009, then a third circuit layer 2012 is fabricated on the first circuit layer 2010, and a fourth circuit layer 2013 is fabricated on the second circuit layer 2011, finally obtaining a target mother substrate 2014 with a multi-layer circuit.

[0057] Finally, referring to FIG. 11, the target mother substrate 2014 is divided along the area division lines L1 and L2, and the first thermally conductive block 2006 is divided into two parts, finally obtaining a hybrid substrate 2015 whose sides are thermally conductive surfaces.

[0058] The present disclosure also provides a high-heat-dissipation hybrid substrate, which can be fabricated by the hybrid substrate manufacturing method described in any of the above embodiments. The hybrid substrate includes a first thermally conductive block, a second thermally conductive block, an embedded device, and a circuit layer. The first thermally conductive block may be disposed on a side of the hybrid substrate, and the second thermally conductive block may be disposed between the embedded device and the circuit layer. The first thermally conductive block can conduct heat generated by the circuit layer of the hybrid substrate to the external environment in a timely manner to achieve rapid heat dissipation. The second thermally conductive block is disposed between the embedded device and the circuit layer, and can conduct heat generated by the embedded device to the circuit layer in a timely manner, thereby completing heat dissipation of the embedded device through the first thermally conductive block. Finally, the hybrid substrate has efficient heat dissipation performance.

[0059] Furthermore, in some embodiments of the present disclosure, the number of embedded elements in a hybrid substrate may be one or more. Typically, one hybrid substrate may have multiple embedded elements. To maintain the overall heat dissipation function, a corresponding thermally conductive block must be provided between each embedded element and the circuit layer, which can ensure timely heat dissipation for all embedded elements on the entire substrate and extend the service life of the embedded elements on the substrate. The specific number of embedded elements may be determined according to the circuit functions and roles realized by the actual substrate.

[0060] Furthermore, in some embodiments of the present disclosure, the number of first thermally conductive blocks may be one or more. The first thermally conductive block may be provided on a side surface of the substrate, since it can be used for heat dissipation of a circuit layer on the substrate. The substrate may have four sides, and each side may be provided with one thermally conductive block. The thermally conductive block can achieve heat conduction with the external environment through the side surface. The first thermally conductive block can be connected to the circuit layer on the substrate in a direction perpendicular to the substrate, so that the first thermally conductive block can not only achieve heat dissipation of the circuit layer, but also conduct heat conducted from the embedded device to the circuit layer to the outside, thereby achieving heat dissipation of the embedded device.

[0061] The present disclosure also provides a semiconductor structure that may include at least one hybrid substrate according to the above embodiments. Because the semiconductor structure includes at least one hybrid substrate with efficient heat dissipation performance, the semiconductor structure can also achieve efficient heat dissipation of elements and circuits, thereby preventing the shortening of the service life of the semiconductor structure due to overheating of the elements or circuits when the semiconductor structure performs circuit functions, thereby improving the stability of the semiconductor elements and saving costs.

[0062] In some alternative embodiments, the functions / acts depicted in the block diagrams may not occur in the order shown in the operational schematics. For example, depending on such functions / acts, two blocks shown in succession may in fact be executed substantially concurrently, or the blocks may be executed in the reverse order. Also, the embodiments shown and described in the flowcharts of the present disclosure are provided as examples to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flow shown herein. Alternative embodiments are anticipated in which the order of various operations is changed and some sub-operations described as larger operations are executed independently.

[0063] Furthermore, although the present disclosure has been described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. A detailed discussion of the actual implementation of each module is not necessary for understanding the present disclosure. Rather, when considering the attributes, functions, and internal relationships of the various functional modules within the devices disclosed herein, the actual implementation of the modules is understood to be within the skill of an engineer. Accordingly, one skilled in the art can implement the present disclosure as set forth in the claims using ordinary skill without undue experimentation. Furthermore, the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present disclosure, which is determined by the full scope of the appended claims and their equivalent solutions.

[0064] In the description herein above, a description that refers to terms such as "one embodiment / example," "another embodiment / example," or "some embodiments / examples" means that the specific features, structures, materials, or characteristics described in an embodiment or example are included in at least one embodiment or example of the present disclosure. As used herein, exemplary uses of such terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0065] Although embodiments of the present disclosure have been illustrated and described, those skilled in the art will understand that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present disclosure, and that the scope of the present disclosure is limited by the claims and their equivalents.

[0066] The above is a specific description of the preferred embodiments of the present disclosure, but the present disclosure is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and all of these equivalent modifications or substitutions are included in the scope defined by the claims of the present disclosure.

Claims

1. A method for producing a high heat dissipation hybrid substrate, comprising: providing a mother substrate, the mother substrate including an insulating layer and a temporary carrier plate, the insulating layer being pressed onto the temporary carrier plate; providing several first grooves and several first cavities in the mother substrate, wherein the mother substrate includes several sub-substrates and area dividing lines, each sub-substrate includes at least one of the first cavities, the first grooves are provided across two adjacent sub-substrates, the area dividing lines are used to divide a projection pattern of the first grooves in a direction perpendicular to the mother substrate into two parts, and both the first grooves and the first cavities penetrate the insulating layer in a direction perpendicular to the mother substrate; filling the first groove with a thermally conductive material to form a first thermally conductive block, and attaching an embedded element into the first cavity and filling the thermally conductive material therein to form a second thermally conductive block, wherein the thermally conductive material comprises one or a combination of aluminum oxide, beryllium oxide, aluminum nitride, and silicon nitride; removing the temporary carrier plate to obtain a semi-finished substrate; fabricating circuit layers on opposite sides of the semi-finished substrate to obtain a target mother substrate; dividing the target mother substrate along the area dividing lines to obtain hybrid substrates whose side surfaces are heat conductive surfaces.

2. Specifically, the step of filling the first groove with the thermally conductive material to form a first thermally conductive block includes:

2. The method for manufacturing a high heat dissipation hybrid substrate according to claim 1, further comprising the steps of filling the first groove with the thermally conductive material by silkscreen printing to form a first thermally conductive block, or pressing a dry film type high thermal conductivity material to fill the first groove with the material and form a first thermally conductive block.

3. The step of fabricating circuit layers on both opposing sides of the semi-finished substrate to obtain a target mother substrate specifically includes: forming a first via hole for electrically connecting the first circuit layer and the second circuit layer on both sides of the semi-finished substrate; forming the first circuit layer on one surface of the semi-finished substrate, and forming a third circuit layer that is electrically connected to the first circuit layer; 2. The method for manufacturing a high heat dissipation hybrid substrate according to claim 1, further comprising the steps of: fabricating the second circuit layer on the surface opposite to the surface on one side of the semi-finished substrate; and fabricating a fourth circuit layer that is conductive with the second circuit layer.

4. The step of fabricating the first circuit layer on one surface of the semi-finished substrate specifically includes: forming a first metal seed layer; compressing a photoresist material onto the first metal seed layer; 4. The method for fabricating a high heat dissipation hybrid substrate according to claim 3, further comprising the steps of: exposing, developing and etching the photoresist material to obtain a first circuit layer.

5. 2. The method for fabricating a high heat dissipation hybrid substrate according to claim 1, wherein the embedded element comprises one of a chip, an active element, or a passive element.

6. A high heat dissipation hybrid substrate, A high heat dissipation hybrid substrate obtained by the method for manufacturing a high heat dissipation hybrid substrate according to any one of claims 1 to 5, comprising a first thermally conductive block, a second thermally conductive block, an embedded element, and a circuit layer, wherein the first thermally conductive block is provided on a side surface of the hybrid substrate, forming the side surface of the hybrid substrate as a thermally conductive surface, and the second thermally conductive block is provided between the embedded element and the circuit layer.

7. The high heat dissipation hybrid substrate according to claim 6 , wherein the embedded element is one or more.

8. The high heat dissipation hybrid substrate according to claim 6 , wherein the first thermally conductive block is one or more.

9. A semiconductor structure comprising at least one high heat dissipation hybrid substrate according to claim 6.

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