Lead frame for semiconductor device and integrated lead frame for semiconductor device

Abstract

To provide a lead frame for a semiconductor device having an effect that lead terminals of different lead lengths can be formed without changing a width of a frame part.SOLUTION: A lead frame for a semiconductor device comprises: a first terminal part 3 in which a plurality of first terminals 2 is disposed side by side; a second terminal part 5 in which a plurality of second terminals 4 wider than the first terminals is disposed side by side, and a die bond part 6 to dispose a semiconductor element therein is disposed while being held with the first terminal part 3; and a frame part 6 to which tip ends of the first terminals 2 and the second terminals 4 are connected. A first recess 10 which is recessed along the first terminals 2 in a direction from the die bond part 1 to the tip ends is provided in the frame part 6. The first terminal part 2 includes a first terminal 2A of which the tip end is held between the adjacent first recesses 10 and a first terminal 2B of which the tip end is not held between the adjacent first recesses 10.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a lead frame for a semiconductor device. and Integrated lead frame for semiconductor device Mu Regarding. [Background technology]

[0002] Semiconductor devices have circuits constructed using conductive lead frames. The lead frame is formed by pressing or other methods from a plate-shaped material such as copper, and includes an area for mounting a semiconductor element for electrical connection and lead terminals for external connection. Such semiconductor devices have an insulating encapsulation resin covering the semiconductor element mounted on the lead frame, and conductive lead terminals electrically connected to the semiconductor element protrude from the side surfaces of the encapsulation resin and are bent at right or obtuse angles. To improve insulation between the lead terminals, such semiconductor devices sometimes use a terminal arrangement known as a staggered arrangement, in which long and short lead terminals are alternately arranged in a direction perpendicular to the extension direction of the lead terminals.

[0003] Japanese Patent Laid-Open No. 2000-138343 describes a lead frame in which, during formation of the lead frame, the tip of each lead terminal is connected to a frame portion that is the outer frame of the lead frame, and recesses are provided in the frame portion so as to sandwich the tip. In this configuration, after a semiconductor element is placed on the lead frame and sealed with insulating resin, the frame portion is removed to separate the individual lead terminals. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-138343 Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 does not describe a lead frame that can accommodate lead terminals with different terminal lengths, such as a staggered arrangement, and since recesses are provided adjacent to all terminals, there was a problem in that lead terminals with different terminal lengths could not be formed without changing the width of the frame portion.

[0006] The present disclosure has been implemented to solve the above-mentioned problems, and provides a lead frame for a semiconductor device that has the effect of enabling lead terminals with different terminal lengths to be formed without changing the width of the frame portion. and Integrated lead frame for semiconductor device M The purpose is to provide. [Means for solving the problem]

[0007] The lead frame according to the present disclosure comprises a first terminal portion in which a plurality of first terminals are arranged side by side in a first direction, which is the width direction of the first terminals; a second terminal portion in which a plurality of second terminals, each wider than the first terminals in the first direction, are arranged side by side in the first direction, and which is arranged between the first terminal portion and a die bond portion or a void portion in which a semiconductor element is disposed, and a frame portion to which tip portions of the first terminals and the second terminals, which are the ends farther from the die bond portion or the void portion, are connected, and the frame portion is provided with a first recess portion recessed along the first terminal in a direction from the die bond portion or the void portion toward the tip portion, and the first terminal portion has a first terminal whose tip portion is sandwiched between adjacent first recess portions in the first direction and a first terminal whose tip portion is not sandwiched between adjacent first recess portions in the first direction.

[0008] The integrated lead frame of the semiconductor device according to the present disclosure is a structure in which a plurality of lead frames according to the present disclosure are arranged side by side in a second direction, which is the extension direction of at least the first terminal and the second terminal, and has an intermediate portion extending in the first direction of the lead frame between adjacent lead frames in the second direction, and the tip portion of either the first terminal or the second terminal is connected to each side of the frame portion extending in the first direction in the intermediate portion. [Effects of the Invention]

[0010] According to the present disclosure, lead terminals with different terminal lengths can be formed without changing the width of the frame portion. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 2 is a plan view of the lead frame of the first embodiment. [Figure 2] FIG. 10 is a plan view of a modified example of the lead frame of the first embodiment. [Figure 3] FIG. 2 is an enlarged plan view of a part of the lead frame of FIG. [Figure 4] 1 is a flow chart showing a part of a method for manufacturing a semiconductor device using the lead frame of the first embodiment. [Figure 5] 1 is a plan view of a semiconductor device using a lead frame according to a first embodiment before a mounting molding process. [Figure 6] 1 is a plan view of a semiconductor device after a mounting molding process using the lead frame of the first embodiment. [Figure 7] FIG. 7 is a side view of the semiconductor device of FIG. [Figure 8] 10 is a plan view of a semiconductor device using the lead frame of the first embodiment before a second forming step. FIG. [Figure 9] 10 is a plan view of a semiconductor device using the lead frame of the first embodiment after a second forming step. FIG. [Figure 10] FIG. 10 is a side view of the semiconductor device of FIG. [Figure 11] 1 is a plan view of a semiconductor device after a lead forming process using the lead frame of the first embodiment. [Figure 12] FIG. 12 is a side view of the semiconductor device of FIG. [Figure 13] 1 is an enlarged plan view of a part of a semiconductor device using the lead frame of the first embodiment before a lead forming process. [Figure 14] FIG. 10 is a plan view of a modified example of the lead frame of the first embodiment. [Figure 15] 15 is an enlarged plan view of a portion of the lead frame of FIG. 14. FIG. [Figure 16] FIG. 10 is a plan view of a lead frame according to a second embodiment. [Figure 17] FIG. 11 is a plan view of a lead frame according to a third embodiment. [Figure 18] FIG. 10 is a plan view of an integrated lead frame according to a fourth embodiment.

[0012] Embodiment 1 1 is a plan view showing a lead frame 101 according to a first embodiment. This lead frame 101 constitutes the lead terminals of a semiconductor device having staggered lead terminals. The action and effect that the lead frame 101 provides to a semiconductor device manufactured using the lead frame 101 will be described later, but first the configuration of the lead frame 101 will be described. Note that in this disclosure, the lead terminals may be simply referred to as terminals.

[0013] As shown in FIG. 1 , the lead frame 101 includes a die bond portion 1 on which a semiconductor element is disposed, a first terminal portion 3 in which a plurality of first terminals 2, which are lead terminals, are arranged side by side in a first direction (X direction) that is the width direction of the first terminals 2, a second terminal portion 5 in which a plurality of second terminals 4, which are lead terminals wider than the first terminals 2 in the first direction, are arranged side by side in the first direction and are disposed so as to sandwich the die bond portion 1 between the first terminal portion 3 and the second terminals 4 in a second direction (Y direction) that is the direction in which the first terminals 2 and the second terminals 4 extend, and a frame portion 6 to which the tip ends of the first terminals 2 and the second terminals 4, which are the ends farther from the die bond portion 1, are connected and which surrounds the die bond portion 1 in an annular shape. The first direction (X direction) and the second direction (Y direction) are orthogonal to each other. Although the present disclosure illustrates an example in which the first direction (X direction) and the second direction (Y direction) are orthogonal to each other, the first direction and the second direction (Y direction) do not necessarily have to be orthogonal to each other. For example, the angle at which the first direction intersects with the second direction can be adjusted appropriately in consideration of the productivity of the lead frame.

[0014] The lead frame 101 is formed from a flat plate primarily made of a conductive metal such as aluminum or copper. A semiconductor element is disposed on the die bond portion 1. The first terminal 2 is, for example, a control terminal for a control signal, and the second terminal 4, which is wider than the first terminal 2, is, for example, a power terminal for a main current. The die bond portion 1 is not limited to the rectangular shape shown in FIG. 1 . Depending on the wiring method of the semiconductor device, several electrically independent die bond regions may be provided, or any electrical wiring pattern may be formed. Although FIG. 1 shows a configuration in which all of the first terminals 2 and second terminals 4 are integrally bonded to the die bond portion 1, the configuration of an actual lead frame is not limited to that shown in FIG. 1 . For ease of explanation, FIG. 1 is a simplified drawing of the area surrounding the die bond portion 1. In an actual lead frame, some terminals are not integrally formed with the die bond portion and may ultimately be electrically connected by wire bonding. Other terminals may not be electrically connected to the die bond portion and remain insulated.

[0015] 1 shows a configuration in which the die bond portion 1 is integrated with the lead frame 101, but the die bond portion is not necessarily limited to this and may be formed of, for example, an insulating substrate. A lead frame 102, which is a modified example of such a lead frame 101, is shown in FIG. 2. For example, as shown in FIG. 2, the lead frame member in the die bond region may be removed to form a void 18 in which an insulating substrate can be placed.

[0016] FIG. 3 is an enlarged plan view of the P portion of the lead frame 101 in FIG. 1. The frame portion 6 is provided with a plurality of first recesses 10 recessed along the first terminal 2 in a direction from the die bond portion 1 toward the tip of the first terminal 2. The tip of the first terminal 2A is sandwiched between adjacent first recesses 10 in the first direction, and the first recesses 10 have a linear shape extending in the second direction toward the tip of the first terminal 2A to form the shape of the first terminal 2A. Here, the recess amount of the first recesses 10 in the second direction is denoted as d1. The first terminal portion 3 alternates between first terminals 2A whose tip is sandwiched between adjacent first recesses 10 in the first direction and first terminals 2B whose tip is not sandwiched between adjacent first recesses 10 in the first direction.

[0017] The width of the first recess 10 in the first direction should be sufficient to allow the use of a press die or the like when cutting and separating the first terminal 2A from the frame portion 6. The width of the first recess 10 in the first direction is preferably 0.5 mm to 3 mm. A width less than 0.5 mm may make it difficult to maintain the strength of the press die. Furthermore, the recess depth d1 of the first recess 10 in the second direction is preferably 0.1 mm to 10 mm. A width less than 0.1 mm leaves little room for terminal length adjustment. A width greater than 10 mm requires the frame portion 6 to be increased, increasing the wasted area of ​​the lead frame 101, i.e., the area of ​​the portion that is ultimately removed and not used for the terminal, and thus reducing productivity. More preferably, the recess depth d1 of the first recess 10 in the second direction is between 0.2 mm and 5 mm. This further maintains the terminal length adjustment and productivity. Furthermore, if the width of first recessed portion 10 in the first direction is 0.5 mm to 1 mm, setting the recess amount d1 in the second direction to up to twice that width makes it easier to maintain the strength of the press die. Furthermore, although first recessed portion 10 is rectangular in shape in Fig. 3, the shape of the recessed portion is not limited to rectangular, and may be modified to a triangular shape or the like, as long as it is positioned such that one side of the recessed portion is parallel to and overlaps with an extension of the terminal side surface of first terminal 2A.

[0018] Lead frame 101 is formed by punching a flat metal material, for example, by a punching press process using a die. This lead frame formation process is no different from lead frame formation methods according to conventional techniques. Lead frame 101 of the present disclosure can be manufactured by setting the shape of the die so that first recessed portion 10, which sandwiches the tip end of first terminal 2A, is formed in frame portion 6.

[0019] Next, the effect of extending the terminals in the second direction of the semiconductor device manufactured using the semiconductor lead frame 101 of the first embodiment will be described. In this explanation, we will first describe the process up to forming the semiconductor device using the lead frame 101. Figure 4 is a flow chart showing part of the process of manufacturing the semiconductor device using the lead frame 101, and the explanation will follow this.

[0020] First, in a first forming step, a metal plate is pressed to form a lead frame 101 having a die bond portion 1, a first terminal portion 3 consisting of first terminals 2A and 2B, a second terminal portion 5 consisting of second terminals 4, and a frame portion 6. This is shown in Figure 1. In the first embodiment, in this step, a first recessed portion 10 is formed in the frame portion 6, sandwiching the tip end of the first terminal 2A.

[0021] Next, a mounting molding process is carried out in which a semiconductor element is placed on the lead frame 101 and sealed with resin. FIG. 5 is a plan view showing the lead frame 101 before the mounting molding process. In the mounting molding process, a semiconductor element (not shown) is placed on the die bond portion 1 of the lead frame 101 and electrically connected. Thereafter, the inside of the sealing region 7 is sealed (molded) with a sealing resin, which is an insulating resin, so as to cover the semiconductor element, thereby forming a semiconductor device. FIG. 6 is a plan view of the semiconductor device after the mounting molding process, and FIG. 7 is a side view of the semiconductor device of FIG. 6 as viewed from direction Q. As shown in FIGS. 6 and 7, the semiconductor device after the mounting molding process has the sealing region 7 sealed from the front and back of the lead frame 101 with sealing resin 8.

[0022] Next, in the second formation process, the frame portion 6 of the lead frame 101 is removed. FIG. 8 is a plan view of the semiconductor device before the second formation process. In the first embodiment, as shown in FIG. 8, a cutting line 11 is set for each of the first terminal 2 and the second terminal 4, which is the cutting position, near the frame portion 6. Here, for the first terminal 2A, the cutting line 11 is set in the portion sandwiched between the adjacent first recessed portions 10. In the second formation process, the frame portion 6 is cut and removed by, for example, applying a die for a punching press to the cutting line 11. Note that in FIG. 8, the cutting line 11 is located in the direction toward the sealing resin 8 from the joint with the frame portion 6, and after cutting, a portion of the tip of the first terminal 2 and the second terminal 4 remains on the frame portion 6 side. However, this is depicted for ease of explanation. In order to form the terminals as long as possible, the cutting line 11 is set as close as possible to the frame portion 6, taking into account the accuracy of die alignment, etc., and the cutting is performed so that the portion of the terminal remaining on the frame portion 6 is small.

[0023] FIG. 9 is a plan view of the semiconductor device after the second formation process, and FIG. 10 is a side view of the semiconductor device of FIG. 9 as viewed from the R direction. After the second formation process, the frame portion 6 of the semiconductor device is separated and removed, and each terminal is individually separated, as shown in FIGS. 9 and 10. After the second formation process, the first terminal portion 3 is formed as shown in FIG. 9, with first terminals 2A, which are long terminals, i.e., the length from the junction with the sealing resin 8 to the tip, and first terminals 2B, which are short terminals, alternately arranged. The difference between the terminal lengths of the first terminals 2A and 2B is d1, which is equal to the recess amount in the second direction of the first recess portion. Therefore, the terminal length of the first terminals 2A, which are long terminals, is preferably 0.1 mm to 10 mm longer than that of the first terminals 2B, which are short terminals, and more preferably 0.2 mm to 5 mm longer.

[0024] In the next lead-forming process, the first terminal 2 and the second terminal 4 are bent in a third direction perpendicular to the first and second directions. FIG. 11 is a plan view of the semiconductor device 201 after the lead-forming process, and FIG. 12 is a side view from the S direction in FIG. 11. This third direction (Z direction) is the direction facing the substrate when the semiconductor device 201 is mounted on the external substrate. In the first embodiment, as shown in FIG. 11, the first terminal 2A and the first terminal 2B are bent at different distances from the sealing resin 8 by d1, which is the recess depth of the first recessed portion 10. As a result, the first terminal 2B, which is the short terminal, becomes an inner terminal bent closer to the sealing resin 8, and the first terminal 2A, which is the long terminal, becomes an outer terminal bent farther from the sealing resin 8 than the inner terminal, forming a first terminal portion 3 having an area where the inner terminals and the outer terminals are alternately arranged. This configuration in which the inner terminals and the outer terminals are alternately arranged is called a staggered arrangement.

[0025] The bending positions of the first terminals 2A and 2B in the lead forming process will be described in more detail. FIG. 13 is an enlarged plan view of a portion of the first terminal portion 3 of the semiconductor device 201 before the lead forming process. Here, the bending positions of the first terminals 2A and 2B are indicated by bending lines 12A and 12B, respectively. As described above, before the lead forming process, the first terminal 2A, which is the long terminal, and the first terminal 2B, which is the short terminal, are longer by the recess amount d1 of the first recess portion 10. In the first embodiment, the bending lines 12A and 12B are set so that the distance dA from the base of the first terminal 2A, i.e., the junction point with the sealing resin 8, to the bending line 12A is longer by d1 than the distance dB from the base of the first terminal 2B, i.e., the junction point with the sealing resin 8, to the bending line 12B. In other words, dA - dB = d1. Accordingly, the distance dC from the tip of first terminal 2A to bending line 12A and the distance dD from the tip of first terminal 2B to bending line 12B become equal. By setting bending lines 12A and 12B in this manner, first terminals 2A and 2B are arranged in a staggered pattern with different lengths d1 extending from the junction with sealing resin 8 in the second direction until they bend in plan view, as shown in Fig. 11. Furthermore, the lengths from the bent positions to the tips of first terminals 2A and 2B become equal, as shown in Fig. 12.

[0026] The effects of the present embodiment 1 will now be described. To begin with, the staggered arrangement of the lead terminals of the semiconductor device will be described. The completed semiconductor device is then used with each lead terminal connected to an external substrate, such as a control board. At this time, the bent tip of each lead terminal is inserted into a conductive hole (through-hole) provided in the control board, and fixed in place with a conductive material such as solder.

[0027] When the lead terminals of a semiconductor device are not staggered but are arranged with the same length in a plan view, if the distance between adjacent lead terminals is small, measures such as reducing the diameter of the conductive holes provided in the control board are necessary to ensure insulation. However, reducing the diameter of the conductive holes increases the difficulty of manufacturing the control board. Furthermore, greater precision is required when mounting the semiconductor device on the control board, which reduces processability.

[0028] In contrast, if the lead terminals are arranged in a staggered pattern, the conductive holes in the control board are also arranged in a staggered pattern, which allows for a larger distance between adjacent conductive holes. This reduces the difficulty of manufacturing the control board and improves the processability when mounting semiconductor devices on the control board. For these reasons, a staggered pattern is sometimes used, particularly when it is desired to narrow the spacing between the lead terminals.

[0029] In semiconductor devices with staggered lead terminals, the outer terminals are bent farther from the encapsulating resin than the inner terminals, and therefore require a longer terminal length before bending than the inner terminals. However, expanding the entire lead frame to lengthen the outer terminals reduces the manufacturability of the lead frame and the semiconductor device using it. Furthermore, narrowing the width of the frame reduces the rigidity of the entire lead frame. Furthermore, shortening the length of the bent tip of only the outer terminals makes it difficult to bond them to a control board.

[0030] The lead frame 101 according to the first embodiment has an area in which first terminals 2A sandwiched between first recessed portions 10 adjacent in the first direction and first terminals 2B adjacent to but not sandwiched between first recessed portions 10 are alternately arranged. This allows the first terminals 2A, which become outer terminals, to have their terminal lengths extended in the second direction by the length of the first recessed portions 10 and be cut off from the frame portion 6, making it possible to increase the terminal lengths of the outer terminals without enlarging the lead frame 101. Furthermore, by not providing first recessed portions 10 in the first terminals 2B, which become inner terminals, it is possible to suppress deterioration in the rigidity of the frame portion 6.

[0031] 11, first terminals 2A and 2B are arranged in a staggered manner with different lengths d1 from the junction with sealing resin 8 to the bend in the second direction in plan view, and this d1 is preferably set to 0.1 mm to 10 mm. This is because, in order to obtain the effect of suppressing deterioration in the manufacturing processability of the lead frame and the semiconductor device using the lead frame due to the staggered arrangement, it is desirable for d1 to be 0.1 mm or more, and if it exceeds 10 mm, the width of frame portion 6 must be increased as described above, which reduces productivity.

[0032] Furthermore, in the first embodiment, the first terminal section 3 is configured in a staggered arrangement in which the first terminals 2A sandwiched adjacent to the first recessed sections 10 and the first terminals 2B not sandwiched adjacent to the first recessed sections 10 are alternately arranged, but it is not necessary for all the terminals in the first terminal section 3 to be arranged alternately. The first recessed sections 10 may be formed in the frame section 6 so as to sandwich the tip ends of the first terminals 2 whose terminal length is desired to be increased.

[0033] 13, before the lead forming process, the bending lines 12A and 12B of the first terminals 2A and 2B are set so that the lengths of the portions that will become the base sides after bending differ by the length of the recess d1 of the first recess 10, but this is not limiting. That is, the bending position may vary depending on, for example, the specifications of the control board on which the semiconductor device 201 is mounted, and the length of the bent tip side may also vary accordingly. The bending positions may be determined so that the first terminal 2A formed as a long terminal by the first recess 10 becomes the outer terminal, and the first terminal 2B formed as a short terminal with a terminal length shorter than that of the first terminal 2A becomes the inner terminal.

[0034] In the first embodiment, the first terminal portion 3 is provided with the first recessed portion 10, so that the second formationThe embodiment has been described in which two types of terminals, first terminal 2A and first terminal 2B, having different terminal lengths are formed after the process. However, the present invention is not limited to this, and the first terminal portion may have three or more different terminal lengths. FIG. 14 is a plan view showing a lead frame 103 which is a modified example of the first embodiment. FIG. 15 is a plan view showing an enlarged U portion of the lead frame 103 of FIG. 14. As shown in FIG. 15, in the lead frame 103, in addition to the first recessed portion 10 having a recess amount d1, a first recessed portion 13 having a recess amount d2 larger than d1 is provided on either side of the tip end of the first terminal 2C. With this configuration, the second formation When the frame portion 6 is removed in the process, a first terminal 2A having a terminal length d1 longer than the first terminal 2B and a first terminal 2C having a terminal length d2 longer than the first terminal 2B can be formed, and thus a total of three first terminals 2 having different terminal lengths can be formed.

[0035] Embodiment 2 In the first embodiment, a lead frame 101 has been described in which first terminals 2A and 2B are alternately arranged in a staggered pattern in a first terminal portion 3, and which has a first recessed portion 10 that sandwiches the tip end of the first terminal 2A. In the second embodiment, a lead frame 104 will be described which further has a second recessed portion 14 that sandwiches the tip end of a second terminal 4 of a second terminal portion 5 that is arranged opposite the first terminal portion 3 across the die bond portion 1. Note that the only difference from the first embodiment is the second terminal portion 5, and therefore only this difference will be described.

[0036] 16 is a plan view showing a lead frame 104 according to the second embodiment. As described above, in the first terminal portion 3 of this lead frame 104, the first terminals 2A and 2B are alternately arranged in the first direction (X direction) as in the first embodiment, and the frame portion 6 is provided with first recessed portions 10 that sandwich the tip end of the first terminal 2A. In the second embodiment, the frame portion 6 is further provided with a plurality of second recessed portions 14 that are recessed along the second terminal 4 in the direction from the die bond portion 1 toward the tip end of the second terminal 4. The tip end of the second terminal 4A is sandwiched between adjacent second recessed portions 14 in the first direction, and the second recessed portions 14 are linearly extending in the second direction (Y direction) on the tip end side of the second terminal 4A so as to form the shape of the second terminal 4A. The second terminal 4B does not have a second recessed portion 14 that sandwiches the tip end. Preferably, the width of the second recessed portion 14 in the first direction is 0.5 mm to 3 mm, similar to the first recessed portion 10. Preferably, the recessed amount of the second recessed portion 14 in the second direction is 0.1 mm to 10 mm, similar to the first recessed portion 10, and more preferably in the range of 0.2 mm to 5 mm.

[0037] In the second embodiment, by providing second recessed portions 14 corresponding to second terminals 4A, it is possible to extend the terminal length of second terminals 4A. For example, if there are layout constraints when mounting a semiconductor device using lead frame 104 on a control board and it is necessary to change the terminal length and adjust the position of the tip of the terminal, it is sufficient to provide second recessed portions 14 corresponding only to second terminals 4 whose terminal length is desired to be extended. Furthermore, if second recessed portions 14 are provided corresponding to all second terminals 4, it is possible to narrow the width of frame portion 6 in the bonding region while extending the terminal length of second terminals 4, thereby enabling the external size of lead frame 104 to be reduced.

[0038] Embodiment 3 In embodiment 3, a lead frame 105 is described in which, in addition to the configuration in which a first recess 10 and a second recess 14 are provided in the frame portion 6 described in embodiments 1 and 2, holes for alignment during the process are provided in the portions where these recesses are not provided.

[0039] 17 is a plan view showing a lead frame 105 according to the third embodiment. In this lead frame 105, as in the second embodiment, first terminals 2A and 2B are alternately arranged in a staggered pattern in the first direction (X direction) in the first terminal portion 3, and a first recessed portion 10 is formed in the frame portion 6, recessed along the first terminal 2A in a direction from the die bond portion 1 toward the tip of the first terminal 2A, with the tip of the first terminal 2A sandwiched between them. Furthermore, second terminals 4A and 4B are arranged in the second terminal portion 5, and a second recessed portion 14 is formed in the frame portion 6, recessed along the second terminal 4A in a direction from the die bond portion 1 toward the tip of the second terminal 4A, with the tip of the second terminal 4A sandwiched between them. Furthermore, in the third embodiment, a positioning hole 15, which is a through hole, is formed in the frame portion 6, as shown in FIG. 17.

[0040] The positioning holes 15 are arranged in areas where the first recessed portions 10 and the second recessed portions 14 are not provided. Specifically, in FIG. 17, even in the area of ​​the frame portion 6 on the lower side of the paper where the first recessed portions 10 are provided, the positioning holes 15 are arranged at positions that overlap in the second direction with the tip portions of the first terminals 2B where the first recessed portions 10 are not provided. Similarly, even in the area of ​​the frame portion 6 on the upper side of the paper where the second recessed portions 14 are provided, the positioning holes 15 are arranged at positions that overlap with the tip portions of the first terminals 2B where the second recessed portions 14 are not provided. 2 Positioning hole 15 is disposed at a position overlapping with the tip end of terminal 4B in the second direction. Note that the position of positioning hole 15 is not limited to this, and it need only be such that it does not overlap with the tip end of first terminal 2A or second terminal 4A or first recessed portion 10 or second recessed portion 14 in the second direction. This positioning hole 15 may be formed, for example, by punching press processing using a mold in the first forming step, similar to the formation of each terminal.

[0041] The positioning holes 15 are used for alignment, for example, in the mounting molding process and the second forming process described above. The positions of the holes are read by a reading mechanism attached to the manufacturing equipment, and the position of the lead frame 105 is recognized. In the third embodiment shown in FIG. 17 , the width of the frame 6 is narrow in the left and right regions of the page, making it impossible to provide the positioning holes 15. Furthermore, if the positioning holes 15 were located in the frame 6 at a position overlapping the tip ends of the first terminals 2A and the second terminals 4A, the first recessed portion 10, or the second recessed portion 14 in the second direction, the width of the frame 6 would be locally narrowed, resulting in reduced rigidity and possibly bending or bending. Therefore, by locating the positioning holes 15 at a position not overlapping the tip ends of the first terminals 2A and the second terminals 4A, the first recessed portion 10, or the second recessed portion 14 in the second direction, the reduction in rigidity of the frame 6 is suppressed.

[0042] Embodiment 4 In the first to third embodiments, a lead frame corresponding to a semiconductor device having staggered lead terminals has been described, whereas in the fourth embodiment, an integrated lead frame 106 of a semiconductor device in which multiple lead frames shown in the first to third embodiments are arranged and integrated will be described.

[0043] FIG. 18 is a plan view showing an integrated lead frame 106 of a semiconductor device according to a fourth embodiment. As shown in FIG. 18, the lead frame 106 has a first terminal 2, a second terminal 4, and a frame portion 6, and is configured such that a total of six lead frames (hereinafter referred to as individual lead frames) are arranged, three in the first direction (X direction) and two in the second direction (Y direction), each of which corresponds to one semiconductor device. In FIG. 18, the T portion surrounded by a dotted line corresponds to one individual lead frame. The individual lead frames are similar to the lead frames 101, 102, 103, 104, and 105 shown in the first to third embodiments. For example, the individual lead frame shown in FIG. 18 has a first recess 10 and a second recess 14, sandwiching the tip ends of the first terminal 2A and the second terminal 4, respectively. Note that while FIG. 18 shows the lead frame 106 on which six individual lead frames for six semiconductor devices are arranged, the number of individual lead frames is not limited to this, as long as there is more than one.

[0044] In the lead frame 106, the frame portion 6 of the individual lead frames is shared and integrated between adjacent individual lead frames. This shared frame portion 6 region is particularly referred to as the intermediate portion. That is, an intermediate portion 16 extending in the second direction is provided between adjacent individual lead frames in the first direction, and an intermediate portion 17 extending in the first direction is provided between adjacent individual lead frames in the second direction. Each side of the intermediate portion 17 extending in the first direction is connected to either the first terminal 2 or the second terminal 4. By arranging multiple individual lead frames on one lead frame 106 in this way, it is possible to manufacture multiple semiconductor devices from one lead frame 106 for a single semiconductor device, thereby improving the manufacturing efficiency of semiconductor devices and reducing the amount of lead frame material used. Furthermore, a semiconductor device formed using a lead frame 106 in which the first recess 10 and the second recess 14 are provided in the frame portion 6 (middle portion 17) can have a narrower width of the frame portion 6, so that it is possible to manufacture more semiconductor devices per area of ​​the lead frame while extending the terminal length.

[0045] In the fourth embodiment, a configuration has been described in which a plurality of lead frames having a first recessed portion 10 and a second recessed portion 14 on the first terminal 2A and the second terminal 4, respectively, are arranged. However, this is not limited to this, and a configuration may also be adopted in which a plurality of lead frames having a first recessed portion 10 only on the first terminal portion 3 as described in the first embodiment, or a lead frame having a positioning hole 15 for alignment in a portion of the frame portion 6 that does not have a recessed portion as described in the third embodiment are arranged.

[0046] Although several embodiments of the present disclosure have been described, these embodiments are presented as examples. Various omissions, substitutions, and modifications can be made without departing from the spirit of the present disclosure. Furthermore, each embodiment can be combined. Furthermore, the scope of the present invention is indicated by the claims, not the above description, and all modifications within the meaning and scope of the claims are intended to be included. [Explanation of symbols]

[0047] 101, 102, 103, 104, 105 Lead frame, 106 Integrated lead frame, 1 Die bond portion, 2 First terminal, 3 First terminal portion, 4 Second terminal, 5 Second terminal portion, 6 Frame portion, 7 Sealing area, 8 Sealing resin, 10, 13 First recess portion, 11 Cutting line, 12 Bending line, 14 Second recess portion, 15 Positioning hole, 16, 17 Middle portion, 18 Void portion, 201 Semiconductor device

Claims

1. a first terminal portion in which a plurality of first terminals are arranged side by side in a first direction which is a width direction of the first terminals; a plurality of second terminals, each wider than the first terminal in the first direction, arranged side by side in the first direction, and a second terminal portion arranged between the first terminal portion and a die bond portion or a gap portion on which a semiconductor element is to be disposed; a frame portion to which the die bond portion or the tip portion, which is the end portion of each of the first terminal and the second terminal farther from the gap portion, is connected, the frame portion is provided with a first recessed portion recessed along the first terminal in a direction from the die bond portion or the void portion toward the tip portion, The first terminal portion is a lead frame of a semiconductor device having a first terminal whose tip portion is sandwiched between adjacent first recess portions in the first direction and a first terminal whose tip portion is not sandwiched between adjacent first recess portions in the first direction.

2. 2. The lead frame of a semiconductor device according to claim 1, wherein the first terminal portion has an area in which the first terminals whose tip portions are sandwiched between the first recess portions adjacent in the first direction and the first terminals whose tip portions are not sandwiched between the first recess portions adjacent in the first direction are arranged alternately.

3. the frame portion is provided with a plurality of second recessed portions recessed along the second terminals in a direction from the die bond portion or the void portion toward the tip portion, 3. A lead frame for a semiconductor device as described in claim 1 or claim 2, wherein the second terminal portion has a second terminal whose tip portion is sandwiched between adjacent second recess portions in the first direction and a second terminal whose tip portion is not sandwiched between adjacent second recess portions in the first direction.

4. the frame portion is provided with a plurality of second recessed portions recessed along the second terminals in a direction from the die bond portion or the void portion toward the tip portion, 3. The lead frame for a semiconductor device according to claim 1, wherein the tip portions of all the second terminals are sandwiched between the second recessed portions adjacent to each other in the first direction.

5. 5. The semiconductor device lead frame according to claim 1, wherein positioning holes, which are through holes, are arranged in the frame portion.

6. The lead frame of a semiconductor device as described in claim 5, wherein the positioning hole is provided at a position where the first terminal does not overlap with the first terminal sandwiched between the first recess portion and the first recess portion adjacent to the tip portion in the direction from the die bond portion or the void portion toward the tip portion.

7. The lead frame of a semiconductor device as described in claim 6, wherein the positioning hole is provided at a position where the first terminal overlaps with the first terminal that is not sandwiched between the adjacent first recess portions in the first direction in the direction from the die bond portion or the void portion toward the tip portion.

8. A positioning hole, which is a through hole, is arranged in the frame portion, The lead frame of a semiconductor device described in claim 3 or claim 4, wherein the positioning hole is provided at a position where the first terminal does not overlap with the first terminal sandwiched between adjacent first recesses in the first direction, in the direction from the die bond portion or the void portion toward the tip portion, or where the second terminal does not overlap with the second terminal sandwiched between adjacent second recesses in the first direction, in the direction from the die bond portion or the void portion toward the tip portion.

9. The lead frame of a semiconductor device described in claim 8, wherein the positioning hole is provided at a position where the first terminal overlaps with the first terminal that is not sandwiched between the adjacent first recesses in the first direction in the direction from the die bond portion or the void portion toward the tip portion, or where the second terminal overlaps with the second terminal that is not sandwiched between the adjacent second recesses in the first direction in the direction from the die bond portion or the void portion toward the tip portion.

10. A lead frame for a semiconductor device described in any one of claims 1 to 9, wherein the amount of recess along the first terminal in the direction from the die bond portion or the void portion of the first recess toward the tip portion is in the range of 0.1 mm to 10 mm.

11. 11. An integrated lead frame for a semiconductor device, comprising: a lead frame according to any one of claims 1 to 10, arranged in a row in a second direction which is the extension direction of at least the first terminal and the second terminal; an intermediate portion extending in the first direction of the lead frame between adjacent lead frames in the second direction; and a tip portion of either the first terminal or the second terminal connected to each side of the frame portion extending in the first direction at the intermediate portion.

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