nitride semiconductor devices

A nitride semiconductor device with a layered heterojunction structure and strategic electrode placement mitigates current collapse, improving carrier density and reducing on-resistance for stable performance.

JP7768860B2Active Publication Date: 2025-11-12KK TOSHIBA +1
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Patent Information

Application Number
JP2022143848
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-09-09
Publication Date
2025-11-12
Estimated Expiration
2042-09-09

AI Technical Summary

Technical Problem

Nitride semiconductor devices experience performance degradation due to the current collapse phenomenon, which is characterized by a reduction in carrier density and increased on-resistance due to punch-through and depletion layer expansion.

Method used

The nitride semiconductor device incorporates a stacked structure of nitride semiconductor layers with alternating bandgaps, forming multiple heterojunctions, and positions the drain electrode on these heterojunctions while keeping the gate electrode away from the depletion layer, thereby suppressing depletion layer expansion and maintaining high carrier density.

Benefits of technology

This configuration enhances output current density and reduces on-resistance by preventing current collapse, ensuring stable operation with a low threshold voltage.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a nitride semiconductor device of which a characteristic deterioration due to a current collapse phenomenon is improved.SOLUTION: A nitride semiconductor device of an embodiment, comprises: a first semiconductor layer having a hetero junction; a second semiconductor layer that is provided onto the first semiconductor layer, and includes another hetero junction; a drain electrode that is provided onto the second semiconductor layer; a source electrode that is provided onto the first semiconductor layer; a gate electrode that is provided onto the first semiconductor layer, and is arranged between the drain electrode and the source electrode; and a first insulation layer that is provided so as to cover the first semiconductor layer and the second semiconductor layer between the gate electrode and the drain electrode. The second semiconductor layer is arranged so as to be separated from the gate electrode. A first distance from an end part of the second semiconductor layer to an end part of the gate electrode is shorter than a second distance from the end part of the drain electrode to the end part of the gate electrode.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The embodiments relate to a nitride semiconductor device. [Background technology]

[0002] In recent years, nitride semiconductor devices have been developed as switching devices for controlling current. Nitride semiconductors such as gallium nitride (GaN) have higher carrier density and electron mobility than silicon (Si), making them capable of realizing highly efficient switching devices. However, there is a need to improve the performance degradation caused by the current collapse phenomenon in such nitride semiconductor devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2020 / 161791 [Patent Document 2] Special Publication No. 2018-511169 [Patent Document 3] Japanese Patent Application Laid-Open No. 2011-77386 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the embodiments is to provide a nitride semiconductor device in which degradation of characteristics due to the current collapse phenomenon is improved. [Means for solving the problem]

[0005] A nitride semiconductor device according to the embodiment includes a first nitride semiconductor layer, a second nitride semiconductor layer having a bandgap larger than that of the first nitride semiconductor layer and provided on the first nitride semiconductor layer, a third nitride semiconductor layer provided on the second nitride semiconductor layer, a fourth nitride semiconductor layer having a bandgap larger than that of the third nitride semiconductor layer and provided on the third nitride semiconductor layer, a drain electrode provided on the fourth nitride semiconductor layer, a source electrode provided on the second nitride semiconductor layer, a gate electrode provided on the second nitride semiconductor layer and disposed between the drain electrode and the source electrode, and a first insulating film provided between the gate electrode and the drain electrode to cover the second nitride semiconductor layer and the fourth nitride semiconductor layer. The third nitride semiconductor layer and the fourth nitride semiconductor layer are disposed at a distance from the gate electrode. A first distance from an end of the gate electrode to an end of the third nitride semiconductor layer and the fourth nitride semiconductor layer is shorter than a second distance from an end of the gate electrode to an end of the drain electrode. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a cross-sectional view illustrating the nitride semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is an enlarged view of part A in FIG. [Figure 3] FIG. 3 is a graph showing energy levels for explaining the operation of the nitride semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view illustrating a nitride semiconductor device of a comparative example. [Figure 5] FIG. 5 is a cross-sectional view illustrating the nitride semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In the present specification and the drawings, elements similar to those described above with reference to the previous drawings are given the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0008] (First embodiment) FIG. 1 is a cross-sectional view illustrating the nitride semiconductor device according to the first embodiment. As shown in FIG. 1 , the nitride semiconductor device 1 according to this embodiment includes a first semiconductor layer 10, a second semiconductor layer 20, a drain electrode 50, a gate electrode 60, a source electrode 70, and a first insulating film 81. In this example, the first semiconductor layer 10 is provided on a substrate 2. The substrate 2 is, for example, a Si substrate. The second semiconductor layer 20 is provided on the first semiconductor layer 10. The drain electrode 50 is provided on the second semiconductor layer 20. The second semiconductor layer 20 is provided between the drain electrode 50 and the first semiconductor layer 10. In this example, the drain electrode 50 includes a contact portion 51 and a wiring portion 52. The contact portion 51 is provided on the second semiconductor layer 20. The contact portion 51 is electrically connected to the second semiconductor layer 20. The wiring portion 52 is provided on the contact portion 51. In a plan view, the outer periphery of the wiring portion 52 is located outside the outer periphery of the contact portion 51.

[0009] The gate electrode 60 is provided on the first semiconductor layer 10. A first insulating film 81 is provided between the gate electrode 60 and the second semiconductor layer 20. The first semiconductor layer 10 and the second semiconductor layer 20 are stacked below the drain electrode 50, and the first semiconductor layer 10 is provided below the gate electrode 60, but the second semiconductor layer 20 is not provided.

[0010] The source electrode 70 is provided on the first semiconductor layer 10. Between the source electrode 70 and the gate electrode 60, a first insulating film 81 is provided.

[0011] In this example, the drain electrode 50, the gate electrode 60, and the source electrode 70 are exposed from the first insulating film 81. The second insulating film 82 is provided to cover the drain electrode 50, the gate electrode 60, and the source electrode 70. The first insulating film 81 and the second insulating film are, for example, nitride films.

[0012] The first semiconductor layer 10 includes a first nitride semiconductor layer 11 and a second nitride semiconductor layer 12. The second nitride semiconductor layer 12 is provided on the first nitride semiconductor layer 11. The second nitride semiconductor layer 12 has a band gap larger than the band gap of the first nitride semiconductor layer 11. A heterojunction is formed at the interface between the first nitride semiconductor layer 11 and the second nitride semiconductor layer 12. For example, the first nitride semiconductor layer 11 is an undoped GaN layer. For example, the second nitride semiconductor layer 12 is an AlGaN layer.

[0013] More generally, each of the first nitride semiconductor layer 11 and the second nitride semiconductor layer 12 is represented by the following chemical formula (1).

[0014] Al x In y Ga (1-x-y) N(0≦x≦1, 0≦y≦1, x+y≦1) (1)

[0015] The first nitride semiconductor layer 11 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in the chemical formula (1) are changed within their respective ranges. The second nitride semiconductor layer 12 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in the chemical formula (1) are changed within their respective ranges. The first nitride semiconductor layer 11 and the second nitride semiconductor layer 12 have different bandgaps and form a heterojunction by respectively having appropriate combinations of the composition ratio x and the composition ratio y.

[0016] The second semiconductor layer 20 includes a third nitride semiconductor layer 21 and a fourth nitride semiconductor layer 22. The fourth nitride semiconductor layer 22 is provided on the third nitride semiconductor layer 21. In a plan view, the periphery of the third nitride semiconductor layer 21 substantially coincides with the periphery of the fourth nitride semiconductor layer 22. The fourth nitride semiconductor layer 22 has a band gap larger than the band gap of the third nitride semiconductor layer 21. A heterojunction is formed at the interface between the third nitride semiconductor layer 21 and the fourth nitride semiconductor layer 22. For example, the third nitride semiconductor layer 21 is an undoped GaN layer. For example, the fourth nitride semiconductor layer 22 is an AlGaN layer.

[0017] More generally, the third nitride semiconductor layer 21 and the fourth nitride semiconductor layer 22 are expressed by the above-mentioned chemical formula (1). The third nitride semiconductor layer 21 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in the chemical formula (1) are changed within their respective ranges. The fourth nitride semiconductor layer 22 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in the chemical formula (1) are changed within their respective ranges. The third nitride semiconductor layer 21 and the fourth nitride semiconductor layer 22 have different bandgaps and form a heterojunction by respectively having compositions with appropriate combinations of the composition ratio x and the composition ratio y.

[0018] The composition of each of the first to fourth nitride semiconductor layers is appropriately set based on the difference in band gap between the semiconductor layers, the thickness of each nitride semiconductor layer, and the like.

[0019] As described above, in the nitride semiconductor device 1 according to this embodiment, a repeating structure of two heterojunctions is formed in the thickness direction of the semiconductor layer by stacking the second semiconductor layer 20 on the first semiconductor layer 10. The drain electrode 50 is provided on the repeating structure of heterojunctions, and the gate electrode 60 is provided on a single heterojunction of the first semiconductor layer 10, not on the repeating structure of heterojunctions.

[0020] The gate electrode 60 is provided between the drain electrode 50 and the source electrode 70. The positional relationship between the second semiconductor layer 20 and the drain electrode 50 is determined based on the position of an end 60T of the gate electrode 60. In the following description, the distance between the ends refers to the shortest distance between the periphery of one element and the periphery of the other element in a planar view. For example, the distance d1 from the end 60T of the gate electrode 60 to the end 20T of the second semiconductor layer 20 is the shortest distance between the periphery of the gate electrode 60 and the periphery of the second semiconductor layer 20 in a planar view.

[0021] Distance d2 is the distance from end 60T of gate electrode 60 to end 51T of drain electrode 50. In this example, drain electrode 50 includes contact portion (first portion) 51 and wiring portion (second portion) 52, and distance d2 is the distance from end 60T of gate electrode 60 to end 52T of wiring portion 52. Note that, when the outer periphery of the contact portion is located outside the outer periphery of the wiring portion in plan view, distance d2 is the distance from end 60T of gate electrode 60 to end 51T of contact portion 51.

[0022] In the nitride semiconductor device 1 according to this embodiment, the distance d1 is a positive value. That is, the second semiconductor layer 20 does not contact the gate electrode 60. The distance (first distance) d1 is set to be shorter than the distance (second distance) d2. In the region between the gate electrode 60 and the drain electrode 50, the outer periphery of the second semiconductor layer 20 is located outside the outer periphery of the drain electrode 50 in a plan view.

[0023] In the nitride semiconductor device 1 according to this embodiment, the repeated structure of two heterojunctions increases the carrier density. Therefore, by disposing the drain electrode 50 on the repeated structure of heterojunctions, it is possible to suppress the expansion of a depletion layer near the bottom of the drain electrode 50. By suppressing the expansion of the depletion layer, it is possible to increase the punch-through voltage between the source electrode 70 and the drain electrode 50, and to suppress the influence of the current collapse phenomenon caused by a decrease in the punch-through voltage.

[0024] In the nitride semiconductor device 1 according to this embodiment, the distance d1 from the end 20T of the second semiconductor layer 20, which forms the repeated structure of heterojunctions, to the end 60T of the gate electrode 60 is shorter than the distance d2 from the end 52T of the drain electrode 50 to the end 60T of the gate electrode 60. Therefore, no repeated structure of heterojunctions is provided below the gate electrode 60, and a low threshold voltage can be achieved by a single heterojunction.

[0025] In the above example, the second semiconductor layer 20 is provided between the drain electrode 50 and the first semiconductor layer 10, but this is not limiting. For example, the second semiconductor layer 20 may be provided between the source electrode 70 and the first semiconductor layer 10. Furthermore, the second semiconductor layer 20 does not necessarily have to be provided between the gate electrode 60 and the first semiconductor layer 10, and may be provided between the drain electrode 50 and the first semiconductor layer 10, between the source electrode 70 and the first semiconductor layer 10, or between the first insulating film 81 and the first semiconductor layer 10. In this way, in the manufacturing process of the nitride semiconductor device 1, the drain electrode 50 and the source electrode 70 can be formed in the same process, thereby simplifying the manufacturing process. These points also apply to the second embodiment described later.

[0026] The operation of the nitride semiconductor device 1 according to this embodiment will now be described in detail. FIG. 2 is an enlarged view of part A in FIG. FIG. 3 is a graph showing energy levels for explaining the operation of the nitride semiconductor device according to the first embodiment. In FIG. 2, the positions of the first to fourth nitride semiconductor layers are defined in order to explain the relationship between the energy levels and the carrier density shown in FIG.

[0027] Position y0 is the position of the fourth nitride semiconductor layer 22, and is a position on the connection surface with the first insulating film 81. Position y1 is the position of the third nitride semiconductor layer 21, and is a position on the connection surface with the fourth nitride semiconductor layer 22. Position y2 is the position of the third nitride semiconductor layer 21, and is a position on the connection surface with the second nitride semiconductor layer 12. Position y3 is the position of the second nitride semiconductor layer 12, and is a position on the connection surface with the first nitride semiconductor layer 11. Position y4 is an arbitrary position within the first nitride semiconductor layer 11, and is a position sufficiently distant from the connection surface with the second nitride semiconductor layer 12.

[0028] 3, the horizontal axis represents linear positions extending from position y0 to position y4. The length from position y0 to position y1 represents the thickness of the fourth nitride semiconductor layer 22. The length from position y1 to position y2 represents the thickness of the third nitride semiconductor layer 21. The length from position y2 to position y3 represents the thickness of the second nitride semiconductor layer 12.

[0029] The solid lines in Figure 3 represent the magnitude of the carrier concentration at each position. The upper dashed lines represent the magnitude of the conduction band Ec at each position. The lower dashed lines represent the magnitude of the valence band Ev at each position. Figure 3 shows the change in the band gap from position y0 to position y4. Note that the energy level 0 (eV) represents the Fermi level.

[0030] 3, at position y1, a two-dimensional electron gas (2DEG) is formed on the third nitride semiconductor layer 21 side due to the difference between the band gap of the fourth nitride semiconductor layer 22 and the band gap of the third nitride semiconductor layer 21. The 2DEG of the third nitride semiconductor layer 21 has a high carrier density n and functions as a channel.

[0031] At position y3, a 2DEG is formed on the first nitride semiconductor layer 11 side due to the difference between the band gap of second nitride semiconductor layer 12 and the band gap of first nitride semiconductor layer 11. The carrier density n is also high in the 2DEG of first nitride semiconductor layer 11, and it functions as a channel.

[0032] By appropriately setting the thicknesses of the second nitride semiconductor layer 12, the third nitride semiconductor layer 21, and the fourth nitride semiconductor layer 22, carriers (electrons) in the two 2DEG layers overcome the barrier and allow current to flow. In the region of the heterojunction repeating structure formed by stacking the first semiconductor layer 10 and the second semiconductor layer 20, the substantial carrier density is higher than when there is only one semiconductor layer. Therefore, in the nitride semiconductor device 1 according to this embodiment, the expansion of the depletion layer below the drain electrode 50 is suppressed. Furthermore, in the nitride semiconductor device 1 according to this embodiment, the carrier density during channel formation can be maintained sufficiently high, thereby improving the output current density and achieving a lower on-resistance.

[0033] 1, in the nitride semiconductor device 1 according to this embodiment, the first semiconductor layer 10 is provided, but the second semiconductor layer 20 is not provided, below the gate electrode 60. The threshold value of the nitride semiconductor device 1 is determined by the relationship between the energy levels of the gate electrode 60 and the first semiconductor layer 10, and therefore a sufficiently low threshold value can be achieved.

[0034] The operation of the nitride semiconductor device 1 according to this embodiment will be described with reference to the operation of a nitride semiconductor device of a comparative example. FIG. 4 is a cross-sectional view illustrating a nitride semiconductor device of a comparative example. FIG. 4 shows a cross section corresponding to part A in FIG. 4, the nitride semiconductor device 101 of the comparative example has a first semiconductor layer 10, a drain electrode 50, and a first insulating film 81. A second insulating film 82 is provided to cover the drain electrode 50. Although not shown in FIG. 4, the first insulating film 81 is provided between the gate electrode 60 and the drain electrode 50, similar to the case shown in FIG. 1. The gate electrode 60 is also provided between the source electrode 70 and the drain electrode 50.

[0035] Depending on the operating state of the nitride semiconductor device 101, a high voltage may be applied between the source electrode 70 and the drain electrode 50. Since a voltage equal to or lower than the potential of the source electrode 70 is applied to the gate electrode 60, when a high voltage is applied between the source electrode 70 and the drain electrode 50, a high voltage is also applied between the gate electrode 60 and the drain electrode 50.

[0036] Since the gate electrode 60 is disposed between the source electrode 70 and the drain electrode 50, when a high voltage is applied between the gate electrode 60 and the drain electrode 50, a strong electric field is formed in the first insulating film 81 from the gate electrode 60 toward the drain electrode 50. In this case, the electric field is concentrated at the end 52T, and therefore a high electric field may be generated in a region a1 of the first insulating film 81 near the end 52T.

[0037] When a high electric field region is formed between the gate electrode 60 and the drain electrode 50, the depletion layer expands, and when the depletion layer reaches the drain electrode 50, punch-through occurs, and carriers move from the first semiconductor layer 10 to the first insulating film 81. Because the first insulating film 81 is an insulator, the carriers introduced into the first insulating film 81 are trapped as they are, and the carrier density in the 2DEG of the first semiconductor layer 10 is effectively reduced. This is the current collapse phenomenon caused by punch-through in the depletion layer near the drain electrode 50.

[0038] In the nitride semiconductor device 1 according to this embodiment, the drain electrode 50 is disposed on a repeating structure of two heterojunctions. Each of these two heterojunctions forms a 2DEG, and carriers are generated in each 2DEG. The carrier density is improved and sufficient carrier density is achieved below the drain electrode 50. Even under high voltage application, the depletion layer is unlikely to extend to the vicinity of the drain electrode 50, making punch-through unlikely to occur. Therefore, the nitride semiconductor device 1 according to this embodiment can prevent the current collapse phenomenon caused by punch-through, and can achieve high output current density and low on-resistance.

[0039] In the nitride semiconductor device 1 according to this embodiment, the distance d1 between the end 60T of the gate electrode 60 and the end 20T of the second semiconductor layer 20 is shorter than the distance d2 between the end 60T and the end 52T of the drain electrode 50. Therefore, the repeated structure of two heterojunctions can suppress the expansion of the depletion layer and make punch-through less likely to occur, even if electric field concentration occurs in any region near the drain electrode 50. Therefore, the current collapse phenomenon caused by punch-through can be prevented.

[0040] In the nitride semiconductor device 1 according to this embodiment, the gate electrode 60 is provided on the first semiconductor layer 10 having a single heterojunction. The threshold voltage of the nitride semiconductor device 1 is determined by the relationship between the energy levels of the first semiconductor layer 10 and the gate electrode 60. Therefore, the nitride semiconductor device 1 can achieve stable characteristics without increasing the threshold voltage.

[0041] (Second embodiment) FIG. 5 is a cross-sectional view illustrating the nitride semiconductor device according to the second embodiment. 5, the nitride semiconductor device 201 according to this embodiment includes a first semiconductor layer 10, a second semiconductor layer 220, a third semiconductor layer 230, a fourth semiconductor layer 240, a drain electrode 250, a gate electrode 60, a source electrode 270, a first insulating film 281, and a second insulating film 282. The configurations of the first semiconductor layer 10 and the gate electrode 60 are the same as those in the first embodiment. Hereinafter, the same components are denoted by the same reference numerals, and detailed description thereof will be omitted as appropriate.

[0042] In order to suppress the expansion of the depletion layer near the drain electrode and increase the punch-through voltage, a repeating structure of three or more heterojunctions may be provided, rather than just two. The nitride semiconductor device 201 according to this embodiment has four semiconductor layers below the drain electrode 250, and each of the four semiconductor layers has a heterojunction, forming a repeating structure of four heterojunctions.

[0043] The second semiconductor layer 220 is provided on the first semiconductor layer 10. The third semiconductor layer 230 is provided on the second semiconductor layer 220. The fourth semiconductor layer 240 is provided on the third semiconductor layer 230. The drain electrode 250 is provided on the fourth semiconductor layer 240. In other words, the first semiconductor layer 10, the second semiconductor layer 220, the third semiconductor layer 230, and the fourth semiconductor layer 240 are provided below the drain electrode 250. The first semiconductor layer 10, the second semiconductor layer 220, the third semiconductor layer 230, and the fourth semiconductor layer 240 are stacked in this order from the substrate 2 side toward the drain electrode 250 side.

[0044] As in the first embodiment, the first semiconductor layer 10 includes a first nitride semiconductor layer 11 and a second nitride semiconductor layer 12. The configurations of the first nitride semiconductor layer 11 and the second nitride semiconductor layer 12 are the same as in the first embodiment, and detailed description thereof will be omitted.

[0045] The second semiconductor layer 220 includes a third nitride semiconductor layer 221 and a fourth nitride semiconductor layer 222. The fourth nitride semiconductor layer 222 is provided on the third nitride semiconductor layer 221. In a plan view, the periphery of the third nitride semiconductor layer 221 approximately coincides with the periphery of the fourth nitride semiconductor layer 222. The fourth nitride semiconductor layer 222 has a band gap larger than the band gap of the third nitride semiconductor layer 221. A heterojunction is formed at the interface between the third nitride semiconductor layer 221 and the fourth nitride semiconductor layer 222. For example, the third nitride semiconductor layer 221 is an undoped GaN layer. For example, the fourth nitride semiconductor layer 222 is an AlGaN layer.

[0046] More generally, the third nitride semiconductor layer 221 and the fourth nitride semiconductor layer 222 are expressed by the above-mentioned chemical formula (1). The third nitride semiconductor layer 221 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in chemical formula (1) are changed within their respective ranges. The fourth nitride semiconductor layer 222 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in chemical formula (1) are changed within their respective ranges. The third nitride semiconductor layer 221 and the fourth nitride semiconductor layer 222 have compositions with appropriate combinations of the composition ratio x and the composition ratio y, and thus have different bandgaps and form a heterojunction.

[0047] The third semiconductor layer 230 includes a fifth nitride semiconductor layer 231 and a sixth nitride semiconductor layer 232. The sixth nitride semiconductor layer 232 is provided on the fifth nitride semiconductor layer 231. In a plan view, the periphery of the fifth nitride semiconductor layer 231 substantially coincides with the periphery of the sixth nitride semiconductor layer 232. The sixth nitride semiconductor layer 232 has a band gap larger than the band gap of the fifth nitride semiconductor layer 231. A heterojunction is formed at the interface between the fifth nitride semiconductor layer 231 and the sixth nitride semiconductor layer 232. For example, the fifth nitride semiconductor layer 231 is an undoped GaN layer. For example, the sixth nitride semiconductor layer 232 is an AlGaN layer.

[0048] More generally, the fifth nitride semiconductor layer 231 and the sixth nitride semiconductor layer 232 are expressed by the above-mentioned chemical formula (1). The fifth nitride semiconductor layer 231 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in chemical formula (1) are changed within their respective ranges. The sixth nitride semiconductor layer 232 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in chemical formula (1) are changed within their respective ranges. The fifth nitride semiconductor layer 231 and the sixth nitride semiconductor layer 232 have compositions with appropriate combinations of the composition ratio x and the composition ratio y, and thereby have different bandgaps and form heterojunctions.

[0049] The fourth semiconductor layer 240 includes a seventh nitride semiconductor layer 241 and an eighth nitride semiconductor layer 242. The eighth nitride semiconductor layer 242 is provided on the seventh nitride semiconductor layer 241. In a plan view, the periphery of the seventh nitride semiconductor layer 241 approximately coincides with the periphery of the eighth nitride semiconductor layer 242. The eighth nitride semiconductor layer 242 has a band gap larger than the band gap of the seventh nitride semiconductor layer 241. A heterojunction is formed at the interface between the seventh nitride semiconductor layer 241 and the eighth nitride semiconductor layer 242. For example, the seventh nitride semiconductor layer 241 is an undoped GaN layer. For example, the eighth nitride semiconductor layer 242 is an AlGaN layer.

[0050] More generally, the seventh nitride semiconductor layer 241 and the eighth nitride semiconductor layer 242 are expressed by the above-mentioned chemical formula (1). The seventh nitride semiconductor layer 241 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in chemical formula (1) are changed within their respective ranges. The eighth nitride semiconductor layer 242 can be a layer of a semiconductor having any composition in which the composition ratio x and the composition ratio y in chemical formula (1) are changed within their respective ranges. The seventh nitride semiconductor layer 241 and the eighth nitride semiconductor layer 242 have compositions with appropriate combinations of the composition ratio x and the composition ratio y, and thus have different bandgaps and form heterojunctions.

[0051] The composition of each of the first to eighth nitride semiconductor layers is appropriately set based on the difference in band gap between the semiconductor layers, the thickness of each nitride semiconductor layer, and the like.

[0052] The gate electrode 60 is provided on the first semiconductor layer 10. Below the gate electrode 60, the second semiconductor layer 220, the third semiconductor layer 230, and the fourth semiconductor layer 240 are not provided.

[0053] The drain electrode 250 includes a contact portion 251 and a wiring portion 252. The wiring portion 252 is provided on the contact portion 251. In plan view, the outer periphery of the wiring portion 252 is located outside the outer periphery of the contact portion 251, at least on the gate electrode 60 side. In other words, in plan view, the wiring portion 252 is provided so as to protrude outside the contact portion 251.

[0054] The source electrode 270 includes a contact portion 271 and a wiring portion 272. The wiring portion 272 is provided on the contact portion 271. In plan view, the outer periphery of the wiring portion 272 is located outside the outer periphery of the contact portion 271 on the drain electrode 250 side. In other words, in plan view, the wiring portion 272 is provided so as to protrude outside the contact portion 271.

[0055] The first insulating film 281 is provided between the gate electrode 60 and the contact portion 251 of the drain electrode 250. The first insulating film 281 is provided between the gate electrode 60 and the contact portion 271 of the source electrode 270. In this example, the second insulating film 282 is provided on the first insulating film 281, and is provided between the contact portion 271 of the source electrode 270 and the contact portion 251 of the drain electrode 250. The first insulating film 281 and the second insulating film 282 are, for example, nitride films.

[0056] The wiring portion 272 of the source electrode 270 is electrically connected to, for example, the substrate 2. By setting the source electrode 270 at the same potential as the substrate 2 and providing the wiring portion 272 so that it protrudes, the wiring portion 272 functions as a field plate. By making the wiring portion 272 function as a field plate, concentration of an electric field when a high voltage is applied between the source electrode 270 and the drain electrode 250 is alleviated.

[0057] On the other hand, when a high voltage is applied between the source electrode 270 and the drain electrode 250, a high voltage is also applied between the gate electrode 60 and the drain electrode 250. In this case, a high electric field is applied to the second insulating film 282 and the first insulating film 281 (region a2) near the end 252T of the wiring portion 252 of the drain electrode 250. A high electric field may also be applied to the first insulating film 281 (region a3) near the end 251T of the contact portion 251 of the drain electrode 250. Due to these electric field concentrations, a depletion layer expands in the semiconductor layer near the region a2 and the region a3, and if punch-through occurs, carriers may be trapped.

[0058] The configuration of the first semiconductor layer 10 is the same as in the first embodiment, and includes a first nitride semiconductor layer 11 and a second nitride semiconductor layer 12. The second semiconductor layer 220 includes a third nitride semiconductor layer 221 and a fourth nitride semiconductor layer 222. The third semiconductor layer 230 includes a fifth nitride semiconductor layer 231 and a sixth nitride semiconductor layer 232. The fourth semiconductor layer 240 includes a seventh nitride semiconductor layer 241 and an eighth nitride semiconductor layer 242.

[0059] The relationship between the two nitride semiconductor layers in each semiconductor layer is such that a narrow bandgap nitride semiconductor layer is provided on a wide bandgap nitride semiconductor layer, and a heterojunction that forms a 2DEG is formed between them. In the nitride semiconductor device 201 according to this embodiment, the four semiconductor layers form a repeating structure of four heterojunctions. Therefore, in the repeating heterojunction structure, the carrier density increases according to the number of repeating heterojunctions.

[0060] As in the first embodiment, the positional relationship between the second to fourth semiconductor layers 220 to 240 and the drain electrode 250 is determined based on the position of the end 60T of the gate electrode 60. In this example, the position of the end differs for each semiconductor layer.

[0061] The distance (first distance) d201 is the distance from the end 60T of the gate electrode 60 to the end 220T of the second semiconductor layer 220. The distance (second distance) d202 is the distance from the end 60T of the gate electrode 60 to the end 252T of the wiring portion 252 of the drain electrode 250. The distance (third distance) d203 is the distance from the end 60T of the gate electrode 60 to the end 230T of the third semiconductor layer 230. The distance d204 is the distance from the end 60T of the gate electrode 60 to the end 251T of the contact portion 251 of the drain electrode 250. The distance d205 is the distance from the end 60T of the gate electrode 60 to the end 240T of the fourth semiconductor layer 240.

[0062] Since the gate electrode 60 and each semiconductor layer are disposed at a distance from each other, d201 to d205 are positive values. In this example, distance d201 is a positive value smaller than any of distances d202 to d205. Furthermore, distance d203 is smaller than distance d202, and distance d205 is smaller than distance d204. That is, in this example, the number of repetitions of the heterojunction repeating structure increases as one approaches the drain electrode 250 from the gate electrode 60. The greater the number of repetitions of the repeating structure of the semiconductor layers, the more effectively the carrier density can be suppressed when a high voltage is applied. In this example, the closer one approaches the contact portion 251 of the drain electrode 250 from the gate electrode 60, the more severe the electric field concentration when a high voltage is applied. By increasing the number of repetitions of the repeating structure of the semiconductor layers depending on the state of the electric field concentration, the carrier density during channel formation can be maintained at a substantially constant level.

[0063] In the heterojunction repeating structure, the number of repeating heterojunctions under the drain electrode can be set appropriately and arbitrarily depending on the arrangement of each electrode, the material of the insulating film, etc. Furthermore, when the number of repeating heterojunctions is 3 or more, it is not limited to the above example, and depending on the arrangement of each electrode, the material of the insulating film, etc., the distance from the end 60T of the gate electrode 60 to the ends of two or more semiconductor layers may be set to the same, or the distance from the end 60T to the ends of all semiconductor layers may be set to the same.

[0064] According to the embodiment described above, it is possible to realize a nitride semiconductor device in which the degradation of characteristics due to the current collapse phenomenon is improved.

[0065] Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as within the scope of the invention and its equivalents as set forth in the claims. Furthermore, the above-described embodiments can be implemented in combination with each other. [Explanation of symbols]

[0066] DESCRIPTION OF SYMBOLS 1, 201... nitride semiconductor device, 2... substrate, 10... first semiconductor layer, 11... first nitride semiconductor layer, 12... second nitride semiconductor layer, 20, 220... second semiconductor layer, 21, 221... third nitride semiconductor layer, 22, 222... fourth nitride semiconductor layer, 50, 250... drain electrode, 60... gate electrode, 70, 270... source electrode, 81, 281... first insulating film, 82, 282... second insulating film, 230... third semiconductor layer, 231... fifth nitride semiconductor layer, 232... sixth nitride semiconductor layer, 240... fourth semiconductor layer, 241... seventh nitride semiconductor layer, 242... eighth nitride semiconductor layer

Claims

1. a first nitride semiconductor layer; a second nitride semiconductor layer having a band gap larger than that of the first nitride semiconductor layer and provided on the first nitride semiconductor layer; a third nitride semiconductor layer provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer having a band gap larger than that of the third nitride semiconductor layer and provided on the third nitride semiconductor layer; a drain electrode provided on the fourth nitride semiconductor layer; a source electrode provided on the second nitride semiconductor layer; a gate electrode provided on the second nitride semiconductor layer and disposed between the drain electrode and the source electrode; a first insulating film provided between the gate electrode and the drain electrode to cover the second nitride semiconductor layer and the fourth nitride semiconductor layer; Equipped with The drain electrode is a first portion provided on the fourth nitride semiconductor layer and electrically connected to the fourth nitride semiconductor layer; a second portion disposed on the first portion; Including, In a plan view, an outer periphery of the first portion is disposed outside an outer periphery of the second portion, an end portion of the drain electrode is a portion on the outer periphery of the first portion, the third nitride semiconductor layer and the fourth nitride semiconductor layer are disposed apart from the gate electrode; A nitride semiconductor device, wherein a first distance from an edge of the gate electrode to edges of the third nitride semiconductor layer and the fourth nitride semiconductor layer is shorter than a second distance from the edge of the gate electrode to an edge of the drain electrode.

2. the drain electrode includes a first portion provided on the fourth nitride semiconductor layer and electrically connected to the fourth nitride semiconductor layer, and a second portion provided on the first portion; In a plan view, an outer periphery of the second portion is disposed outside an outer periphery of the first portion, The nitride semiconductor device according to claim 1 , wherein the end of said drain electrode is a portion on the outer periphery of said second portion.

3. A first nitride semiconductor layer; a second nitride semiconductor layer having a band gap larger than that of the first nitride semiconductor layer and provided on the first nitride semiconductor layer; a third nitride semiconductor layer provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer having a band gap larger than that of the third nitride semiconductor layer and provided on the third nitride semiconductor layer; a fifth nitride semiconductor layer provided on the fourth nitride semiconductor layer; a sixth nitride semiconductor layer having a band gap larger than that of the fifth nitride semiconductor layer and provided on the fifth nitride semiconductor layer; a drain electrode provided on the fourth nitride semiconductor layer; a source electrode provided on the second nitride semiconductor layer; a gate electrode provided on the second nitride semiconductor layer and disposed between the drain electrode and the source electrode; a first insulating film provided between the gate electrode and the drain electrode to cover the second nitride semiconductor layer and the fourth nitride semiconductor layer; Equipped with the third nitride semiconductor layer and the fourth nitride semiconductor layer are disposed apart from the gate electrode; a first distance from an edge of the gate electrode to an edge of the third nitride semiconductor layer and an edge of the fourth nitride semiconductor layer is shorter than a second distance from an edge of the gate electrode to an edge of the drain electrode; the drain electrode is provided on the sixth nitride semiconductor layer, the fifth nitride semiconductor layer and the sixth nitride semiconductor layer are disposed apart from the gate electrode; a third distance from an edge of the gate electrode to an edge of the fifth nitride semiconductor layer and an edge of the sixth nitride semiconductor layer is shorter than the second distance; The first distance is shorter than the third distance.

4. Each of the first to sixth nitride semiconductor layers is Al x In y Ga (1-x-y) 4. The nitride semiconductor device according to claim 3, wherein the nitride semiconductor layer is represented by a chemical formula of N(0≦x≦1, 0≦y≦1, x+y≦1), and the values ​​of the composition ratio x and the composition ratio y are set for each of the first to sixth nitride semiconductor layers.

5. The nitride semiconductor device according to claim 1 , wherein the third nitride semiconductor layer and the fourth nitride semiconductor layer are provided between the source electrode and the second nitride semiconductor layer.

6. a first nitride semiconductor layer; a second nitride semiconductor layer provided on the first nitride semiconductor layer; a third nitride semiconductor layer provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer provided on the third nitride semiconductor layer; a drain electrode provided on the fourth nitride semiconductor layer; a source electrode provided on the second nitride semiconductor layer; a gate electrode provided on the second nitride semiconductor layer and disposed between the drain electrode and the source electrode; a first insulating film provided between the gate electrode and the drain electrode to cover the second nitride semiconductor layer and the fourth nitride semiconductor layer; Equipped with The drain electrode is a first portion provided on the fourth nitride semiconductor layer and electrically connected to the fourth nitride semiconductor layer; a second portion disposed on the first portion; Including, In a plan view, an outer periphery of the first portion is disposed outside an outer periphery of the second portion, an end portion of the drain electrode is a portion on the outer periphery of the first portion, the third nitride semiconductor layer and the fourth nitride semiconductor layer are disposed apart from the gate electrode; a first distance from an edge of the gate electrode to edges of the third nitride semiconductor layer and the fourth nitride semiconductor layer is shorter than a second distance from an edge of the gate electrode to an edge of the drain electrode; Each of the first to fourth nitride semiconductor layers is Al x In y Ga (1-x-y) N (0≦x≦1, 0≦y≦1, x+y≦1), and the values ​​of the composition ratio x and the composition ratio y are set for each of the first to fourth nitride semiconductor layers.

Citation Information

Patent Citations

  • High electron mobility transistor, epitaxial substrate, and method of manufacturing high electron mobility transistor

    JP2011077386A

  • Nitride semiconductor field effect transistor

    JP2012114320A

  • Semiconductor device

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  • Compound semiconductor device and method of manufacturing the same

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  • Semiconductor device and semiconductor device manufacturing method

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