Motor device

Abstract

In the present invention, a motor device comprises: a motor driven by AC drive power; an inverter that supplies drive power to the motor; and a controller that generates pulse signals for controlling the drive power, using a carrier and a first command signal indicating the target of the drive power. The controller is provided with a carrier frequency setting unit that sets the carrier frequency of the carrier using a second command signal indicating the target of the drive power. The carrier frequency setting unit sets the carrier frequency in the section corresponding to a first phase range in one cycle of the second command signal to be lower than the carrier frequency in the section corresponding to a second phase range other than the first phase range.

Description

[Technical Field]

[0001] The present disclosure relates to a motor device. [Background technology]

[0002] Patent Documents 1 to 4 disclose techniques related to motor devices. For example, Patent Document 1 discloses a motor device including a motor and an inverter that drives the motor using multiple circuit blocks. In this motor device, each circuit block is controlled by a PWM (Pulse Width Modulation) method. In PWM control, a control signal for each circuit block is generated by comparing a predetermined voltage command with a carrier. Each circuit block is driven in response to the control signal, and an AC current that drives the motor is output from the inverter. A current ripple component that increases motor loss is superimposed on the AC current output from the inverter. In order to suppress the increase in this current ripple component (i.e., to suppress the increase in motor loss), it is considered effective to set the carrier frequency of the carrier to a high value. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-197933 [Patent Document 2] Japanese Patent Application Publication No. 2016-220325 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-271617 [Patent Document 4] Japanese Patent Application Laid-Open No. 2014-072935 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when the carrier frequency is set high, the number of switching operations of the circuit blocks increases, which in turn increases the switching loss and the inverter loss. The increased inverter loss can cause problems such as a decrease in the motor output efficiency.

[0005] The present disclosure describes a motor device that can reduce inverter losses. [Means for solving the problem]

[0006] A motor device according to one embodiment of the present disclosure includes a motor driven by AC drive power, an inverter that supplies the drive power to the motor, and a controller that generates a pulse signal for controlling the drive power using a first command signal indicating a target drive power and a carrier. The controller has a carrier frequency setting unit that sets a carrier frequency of the carrier using a second command signal indicating the target drive power. The carrier frequency setting unit sets the carrier frequency in a section of one cycle of the second command signal that corresponds to a first phase range to be lower than the carrier frequency in a section that corresponds to a second phase range other than the first phase range. [Effects of the Invention]

[0007] According to some aspects of the present disclosure, a motor device capable of reducing inverter loss is provided. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a configuration diagram illustrating an example of a motor device according to an embodiment. [Figure 2] FIG. 2 is a block diagram illustrating an example of a functional configuration of the controller illustrated in FIG. [Figure 3] FIG. 3 is a block diagram showing an example of a functional configuration of the PWM controller shown in FIG. [Figure 4] FIG. 4 is a diagram for explaining an example of setting of the carrier frequency by the carrier frequency setting unit. [Figure 5]FIG. 5 is a diagram for explaining another example of setting of the carrier frequency by the carrier frequency setting unit. [Figure 6] FIG. 6 is a diagram for explaining yet another example of setting of the carrier frequency by the carrier frequency setting unit. [Figure 7] FIG. 7 is a configuration diagram showing a modified example of the motor device. DETAILED DESCRIPTION OF THE INVENTION

[0009] A motor device according to one embodiment of the present disclosure includes a motor driven by AC drive power, an inverter that supplies the drive power to the motor, and a controller that generates a pulse signal for controlling the drive power using a first command signal indicating a target drive power and a carrier. The controller has a carrier frequency setting unit that sets a carrier frequency of the carrier using a second command signal indicating the target drive power. The carrier frequency setting unit sets the carrier frequency in a section of one cycle of the second command signal that corresponds to a first phase range to be lower than the carrier frequency in a section that corresponds to a second phase range other than the first phase range.

[0010] In this motor device, the inverter operates in response to a pulse signal, which supplies drive power to the motor, which then drives the motor. Inverter loss in the inverter tends to decrease as the carrier frequency of the carrier used in the pulse signal decreases. Therefore, in the motor device described above, the carrier frequency of the carrier in a section of one cycle of the second command signal corresponding to a first phase range is set lower than the carrier frequency of the carrier in a section of one cycle of the second command signal corresponding to a second phase range other than the first phase range. In other words, a high carrier frequency is not set throughout the entire cycle of the second command signal, but a low carrier frequency is set only for a portion of the cycle of the second command signal. This reduces inverter loss during one cycle of the second command signal.

[0011] In some embodiments, the first phase range may be a phase range that does not include a zero-crossing point where the positive and negative polarities of the second command signal are reversed during one cycle of the second command signal. In this case, the carrier frequency of the carrier is set lower in a section of one cycle of the second command signal that corresponds to the first phase range that does not include a zero-crossing point than in a section that corresponds to the second phase range. Inverter loss tends to be large in a section where the absolute value of the second command signal is high (i.e., a phase range that does not include a zero-crossing point) and small in a section where the absolute value of the second command signal is low (i.e., a phase range that includes a zero-crossing point). Therefore, by setting the section where the carrier frequency is set lower to the first phase range that does not include a zero-crossing point, inverter loss can be more effectively reduced.

[0012] In some embodiments, the first phase range may be a phase range in one cycle of the second command signal in which the absolute value of the second command signal is equal to or greater than a reference value. As described above, inverter loss tends to be large in sections in which the absolute value of the second command signal is high and small in sections in which the absolute value of the second command signal is low. Therefore, by setting the section in which the carrier frequency is set low to the first phase range in which the absolute value of the second command signal is equal to or greater than the reference value, inverter loss can be more effectively reduced.

[0013] In some embodiments, the first phase range may be a phase range including a peak point in one cycle of the second command signal where the absolute value of the second command signal is maximum. As described above, inverter loss tends to be large in a section where the absolute value of the second command signal is high and small in a section where the absolute value of the second command signal is low. Therefore, by setting the section where the carrier frequency is set low in the first phase range including the peak point, inverter loss can be more effectively reduced.

[0014] In some embodiments, the first phase range may be a phase range that does not include a peak point in one cycle of the second command signal where the absolute value of the second command signal is maximum. This setting also makes it possible to more effectively reduce inverter loss.

[0015] In some aspects, the motor device may further include a motor loss measurement unit that outputs a signal related to motor loss occurring in the motor, and an inverter loss measurement unit that outputs a signal related to inverter loss occurring in the inverter. The carrier frequency setting unit may set the first phase range based on the signal related to motor loss and the signal related to inverter loss. In this case, a section in which the carrier frequency is set low can be determined taking into account the motor loss and the inverter loss. In other words, a section corresponding to the first phase range within one period of the second command signal can be determined.

[0016] An embodiment will be described below with reference to the drawings. In the description of the drawings, identical or corresponding elements are denoted by the same reference numerals, and redundant description may be omitted.

[0017] <Embodiment> The motor device 1 shown in FIG. 1 includes a motor 2, an inverter 20, and a controller 30. The motor device 1 receives power from a power supply 10 and is driven. The motor 2 is, for example, a permanent magnet synchronous motor. The motor 2 may be an IPM (Interior Permanent Magnet) motor or an SPM (Surface Permanent Magnet) motor. The motor 2 rotates when AC power is supplied from the inverter 20. Specifically, the stator of the motor 2 generates a rotating magnetic field in response to the supply of AC power, and the rotor of the motor 2 rotates in response to the rotating magnetic field.

[0018] DC power is supplied to the inverter 20 from the power supply 10. The inverter 20 converts the supplied DC power into three-phase AC power and supplies the converted three-phase AC power to the motor 2. The inverter 20 has circuit blocks 21 and 22, circuit blocks 23 and 24, and circuit blocks 25 and 26, one for each phase of the three-phase AC power. The circuit blocks 21 and 22 supply the single-phase AC power to the motor 2 as U-phase AC power. The circuit blocks 23 and 24 supply the single-phase AC power to the motor 2 as V-phase AC power. The circuit blocks 25 and 26 supply the single-phase AC power to the motor 2 as W-phase AC power.

[0019] The circuit blocks 21 and 22 are connected in series to each other and in parallel to the power supply 10. A terminal 21a of the circuit block 21 is connected to the controller 30. A terminal 21b of the circuit block 21 is connected to the power supply 10 and the circuit blocks 23 and 25. A terminal 21c of the circuit block 21 is connected to the circuit block 22. A terminal 21c of the circuit block 21 is connected to the motor 2.

[0020] The circuit block 21 includes a transistor 21T and a diode 21D. The collector of the transistor 21T constitutes a terminal 21b of the circuit block 21. The emitter of the transistor 21T constitutes a terminal 21c of the circuit block 21. The gate of the transistor 21T constitutes a terminal 21a of the circuit block 21. The input of the diode 21D is connected to the drain of the diode 21D, and the output is connected to the collector of the diode 21D, so as to pass a current from the emitter side to the collector side of the transistor 21T. The diode 21D is connected in parallel to the transistor 21T.

[0021] Thus, in the circuit block 21, when the transistor 21T is in the on state, a current flows from the terminal 21b to the terminal 21c, whereas when the transistor 21T is in the off state, a current flows from the terminal 21c to the terminal 21b.

[0022] A terminal 22a of the circuit block 22 is connected to the controller 30. A terminal 22b of the circuit block 22 is connected to the circuit block 21. A terminal 22b of the circuit block 22 is connected to the motor 2. A terminal 22c of the circuit block 22 is connected to the power supply 10 and the circuit blocks 24 and 26. Like the circuit block 21, the circuit block 22 also includes a transistor 22T and a diode 22D. The transistor 22T and the diode 22D have the same connection configuration as the transistor 21T and the diode 21D, respectively.

[0023] The circuit blocks 23 and 24 are connected in series to each other and in parallel to the power supply 10. The circuit blocks 23 and 24 also have a connection configuration similar to that of the circuit blocks 21 and 22.

[0024] Terminal 23a of circuit block 23 is connected to controller 30. Terminal 23b of circuit block 23 is connected to power supply 10, circuit blocks 21 and 25. Terminal 23c of circuit block 23 is connected to circuit block 24. Terminal 23c of circuit block 23 is connected to motor 2. Like circuit block 21, circuit block 23 also includes transistor 23T and diode 23D. Transistor 23T and diode 23D have the same connection configuration as transistor 21T and diode 21D, respectively.

[0025] A terminal 24a of the circuit block 24 is connected to the controller 30. A terminal 24b of the circuit block 24 is connected to the circuit block 23. A terminal 24b of the circuit block 24 is connected to the motor 2. A terminal 24c of the circuit block 24 is connected to the power supply 10 and the circuit blocks 22 and 26. Like the circuit block 21, the circuit block 24 also includes a transistor 24T and a diode 24D. The transistor 24T and the diode 24D have the same connection configuration as the transistor 21T and the diode 21D, respectively.

[0026] The circuit blocks 25 and 26 are connected in series to each other and in parallel to the power supply 10. The circuit blocks 25 and 26 also have a connection configuration similar to that of the circuit blocks 21 and 22.

[0027] A terminal 25a of the circuit block 25 is connected to the controller 30. A terminal 25b of the circuit block 25 is connected to the power supply 10, and the circuit blocks 21 and 23. A terminal 25c of the circuit block 25 is connected to the circuit block 26. A terminal 25c of the circuit block 25 is connected to the motor 2. Like the circuit block 21, the circuit block 25 also includes a transistor 25T and a diode 25D. The transistor 25T and the diode 25D have the same connection configuration as the transistor 21T and the diode 21D, respectively.

[0028] Terminal 26a of circuit block 26 is connected to controller 30. Terminal 26b of circuit block 26 is connected to circuit block 25. Terminal 26b of circuit block 26 is connected to motor 2. Terminal 26c of circuit block 26 is connected to power supply 10 and circuit blocks 22 and 24. Like circuit block 21, circuit block 26 also includes a transistor 26T and a diode 26D. Transistor 26T and diode 26D have the same connection configuration as transistor 21T and diode 21D, respectively.

[0029] The on / off states of the circuit blocks 21 to 26 are switched in response to control signals S21 to S26 from the controller 30. As a result, three-phase AC power is supplied from the inverter 20 to the motor 2. A current sensor 60 is provided on the line between the inverter 20 and the motor 2. The current sensor 60 detects the current of each phase of the AC power output from the inverter 20 to the motor 2. That is, the current sensor 60 detects the current of the U phase, the V phase, and the W phase, respectively. The current sensor 60 outputs a current signal S1 indicating the current of each phase to the controller 30. The current sensor 60 does not need to detect the current of all three phases, U phase, V phase, and W phase. For example, the current sensor 60 may detect the current of two of the U phase, V phase, and W phase, and obtain the current of the remaining phase by calculation.

[0030] The controller 30 is an electronic control unit that controls the entire inverter 20. The controller 30 is configured by a computer including, for example, a CPU, a ROM, and a RAM. The controller 30 has, for example, a control circuit 31 and a drive circuit 32. A current signal S1 is input to the control circuit 31 from a current sensor 60. The control circuit 31 outputs control signals S11 to S16 to the drive circuit 32 for turning on and off the circuit blocks 21 to 26, respectively, based on the current signal S1. The drive circuit 32 amplifies the control signals S11 to S16 output from the control circuit 31, and outputs the amplified control signals S21 to S26 to the corresponding circuit blocks 21 to 26, respectively.

[0031] The configuration of the control circuit 31 will be described in more detail below with reference to Fig. 2. As shown in Fig. 2, the control circuit 31 has, as its functional configuration, for example, an information detection unit 40 and a signal generation unit 50. The signal generation unit 50 generates control signals S11 to S16 to be provided to the circuit blocks 21 to 26 so that the angular velocity of the motor 2 follows the target angular velocity. The information detection unit 40 outputs signals necessary for control processing, etc. in the signal generation unit 50. For example, the information detection unit 40 outputs signals S2, S3a, and S3b.

[0032] The information detection unit 40 includes, for example, a coordinate converter 41 and an information deriver 42 .

[0033] The coordinate converter 41 receives the current signal S1 and the information signal S3b. The coordinate converter 41 generates a current signal S2 using the current signal S1 and the information signal S3b. The coordinate converter 41 generates the current signal S2 by converting the coordinates of the currents of each phase included in the current signal S1 using rotational position information. The coordinate converter 41 outputs the current signal S2 to the information deriver 42. Furthermore, the coordinate converter 41 outputs the current signal S2 to the signal generator 50.

[0034] The dq coordinate system, which includes the d-axis and q-axis, refers to a rotating coordinate system that rotates together with the rotor of the motor 2. The d-axis and q-axis are orthogonal to each other and to the rotation axis of the motor 2. The d-axis current refers to a current in the d-axis direction. That is, the d-axis current refers to a current for generating magnetic flux in the stator of the motor 2 in the d-axis direction. The q-axis current refers to a current in the q-axis direction. That is, the q-axis current refers to a current for generating magnetic flux in the stator of the motor 2 in the q-axis direction. In this embodiment, a case is illustrated in which the magnet of the rotor of the motor 2 is magnetized with two poles, but the magnet may be magnetized with more than two poles (multi-pole). For example, the magnet may be magnetized with four poles (two pole pairs). When a two-pole magnet is used, there is a one-to-one relationship between the mechanical frequency and the electrical frequency. When a four-pole magnet is used, the electrical frequency is twice the mechanical frequency. In this embodiment, in which a two-pole magnet is used, the section of phase θ=0 to 2π shown in Fig. 4(a), which will be described later, corresponds to one period of the current command. In contrast, in the case in which a four-pole magnet is used, the section of phase θ=0 to π shown in Fig. 4(a), which will be described later, corresponds to one period of the current command.

[0035] The information deriver 42 receives the current signal S2 as input. The information deriver 42 generates information signals S3a and S3b using the current signal S2. The information signal S3a indicates an angular velocity ω. The angular velocity ω represents the angular velocity of the rotor relative to the stator of the motor 2. The information signal S3b indicates a phase θ. The phase θ represents the rotational position of the rotor relative to the stator of the motor 2. The information deriver 42 derives the angular velocity ω and phase θ of the motor 2 based on the d-axis current and q-axis current included in the current signal S2. The information deriver 42 outputs the information signals S3a and S3b to the signal generator 50. Furthermore, the information deriver 42 also outputs the information signal S3b to the coordinate converter 41.

[0036] The signal generating unit 50 includes, for example, a speed controller 51, a current controller 52, a coordinate converter 53, and a PWM controller 54.

[0037] An information signal S3a and a target signal S3c are input to the speed controller 51. The speed controller 51 generates a current command signal S4 using the information signal S3a and the target signal S3c. The target signal S3c is, for example, a d-axis current command set by an operator's input. The current command signal S4 includes a q-axis current command and a d-axis current command. The q-axis current command is a command to reduce the deviation between the angular velocity ω of the motor 2 included in the information signal S3a and a target angular velocity ω. The target angular velocity ω is input from, for example, a higher-level controller. The speed controller 51 outputs the current command signal S4 to the current controller 52.

[0038] The current controller 52 receives the current signal S2 and the current command signal S4. The current controller 52 generates a voltage command signal S5a and a current command signal S5b using the current signal S2 and the current command signal S4. The voltage command signal S5a includes a d-axis voltage command and a q-axis voltage command. The d-axis voltage means a voltage in the same direction as the d-axis current. The q-axis voltage means a voltage in the same direction as the q-axis current. The current command signal S5b indicates the same information as the current command signal S4. The current controller 52 generates a d-axis voltage command by performing a calculation based on the deviation between the d-axis current command and the d-axis current. Similarly, the current controller 52 generates a q-axis voltage command by performing a calculation based on the deviation between the q-axis current command and the q-axis current. The current controller 52 outputs the voltage command signal S5a and the current command signal S5b to the coordinate converter 53.

[0039] The coordinate converter 53 receives the information signal S3b, the voltage command signal S5a, and the current command signal S5b. The coordinate converter 53 uses the voltage command signal S5a and the current command signal S5b to generate a voltage command signal S6a (first command signal) and a current command signal S6b (second command signal). The voltage command signal S6a indicates a U-phase voltage command, a V-phase voltage command, and a W-phase voltage command. The coordinate converter 53 uses rotational position information to perform coordinate conversion on the d-axis voltage command and q-axis voltage command included in the voltage command signal S5a, thereby generating a U-phase voltage command, a V-phase voltage command, and a W-phase voltage command. The current command signal S6b indicates a U-phase current command, a V-phase current command, and a W-phase current command. The coordinate converter 53 generates a U-phase current command, a V-phase current command, and a W-phase current command by coordinate converting the d-axis current command and the q-axis current command included in the current command signal S5b using the rotational position information. The coordinate converter 53 outputs a voltage command signal S6a and a current command signal S6b to the PWM controller 54.

[0040] A voltage command signal S6a and a current command signal S6b are input to the PWM controller 54. The PWM controller 54 generates control signals S11 to S16 using the voltage command signal S6a and the current command signal S6b. The control signals S11 to S16 are pulse signals that control the operations of the circuit blocks 21 to 26. The PWM controller 54 outputs the control signals S11 to S16 to the drive circuit 32 (see FIG. 1).

[0041] The drive circuit 32 generates control signals S21 to S26 by amplifying the control signals S11 to S16, and outputs the control signals S21 to S26 to the corresponding circuit blocks 21 to 26.

[0042] Next, a more detailed configuration of the PWM controller 54 will be described with reference to Fig. 3. As shown in Fig. 3, the PWM controller 54 includes, for example, a carrier frequency setting unit 54a, a carrier generation unit 54b, a comparison unit 54c, and a control signal generation unit 54d.

[0043] A current command signal S6b indicating a current command for each phase is input to the carrier frequency setting unit 54a. The carrier frequency setting unit 54a generates a frequency signal S7 based on the current command signal S6b. The frequency signal S7 includes a carrier frequency for the U phase, a carrier frequency for the V phase, and a carrier frequency for the W phase. In other words, the carrier frequency setting unit 54a sets the carrier frequency for the U phase based on the current command for the U phase, sets the carrier frequency for the V phase based on the current command for the V phase, and sets the carrier frequency for the W phase based on the current command for the W phase. The carrier frequency setting unit 54a outputs the frequency signal S7 to the carrier generating unit 54b.

[0044] The carrier generating unit 54b receives the frequency signal S7 as input. The carrier generating unit 54b generates a carrier S8 using the frequency signal S7. The carrier S8 includes a U-phase carrier, a V-phase carrier, and a W-phase carrier. That is, the carrier generating unit 54b generates the U-phase carrier, the V-phase carrier, and the W-phase carrier in accordance with the frequency signal S7. The carrier S8 may be a triangular wave or a sawtooth wave. The carrier generating unit 54b outputs the carrier S8 to the comparing unit 54c.

[0045] The comparison unit 54c receives the carrier S8 and the voltage command signal S6a. The comparison unit 54c generates an information signal S9 using the carrier S8 and the voltage command signal S6a. The information signal S9 is a pulse signal provided to the inverter 20. Specifically, the comparison unit 54c compares the amplitude of the voltage command for each phase included in the voltage command signal S6a with the amplitude of the carrier for each phase included in the carrier S8. Based on the comparison result, the comparison unit 54c generates the information signal S9 required to generate the control signals S11 to S16. The comparison unit 54c outputs the information signal S9 to the control signal generation unit 54d.

[0046] The control signal generating unit 54d generates control signals S11 to S16, which are pulse signals, based on the information signal S9.

[0047] Here, an example of carrier frequency setting by the carrier frequency setting unit 54a will be described with reference to Fig. 4. (a) of Fig. 4 shows a U-phase current command G1. The vertical axis of (a) of Fig. 4 shows the current value [A] of the current command G1, and the horizontal axis of (a) of Fig. 4 shows the phase θ [rad] of the U-phase current command. (b) of Fig. 4 shows a U-phase carrier G2. The horizontal axis of (b) of Fig. 4 corresponds to the horizontal axis of (a) of Fig. 4.

[0048] Fig. 4(c) shows the V-phase carrier G3. Fig. 4(d) shows the W-phase carrier G4. The horizontal axes of Fig. 4(c) and (d) correspond to the horizontal axis of Fig. 4(a), as well as the horizontal axis of Fig. 4(b). Below, an example of setting the carrier frequency of the U-phase carrier G2 will be described, focusing on the relationship between the current command G1 and the U-phase carrier G2.

[0049] The carrier frequency of the V-phase carrier G3 and the carrier frequency of the W-phase carrier G4 are set in the same manner as the carrier frequency of the U-phase carrier G2, and therefore a description of these settings will be omitted.

[0050] The carrier frequency setting unit 54a switches the carrier frequency of the carrier G2 for each predetermined interval while referring to the current command G1. Specifically, the carrier frequency setting unit 54a sets intervals T1 and T2 within one cycle of the current command G1. The carrier frequency setting unit 54a then sets the carrier frequency (f1) in interval T1 and the carrier frequency (f2) in interval T2 to be different from each other.

[0051] Section T1 is a first phase range within one cycle of current command G1. The "first phase range" is, for example, a phase range within one cycle of current command G1 that does not include zero-crossing points P01, P02, and P03 where the positive and negative current values ​​of current command G1 are inverted. The "first phase range" may be a phase range within one cycle of current command G1 that does not include zero-crossing points P01, P02, and P03 and that includes peak points P11 and P12 where the absolute value of the current value of current command G1 is maximum.

[0052] At the zero crossing point P01, the phase θ of the current command G1 is 0 [rad]. At the zero crossing point P02, the phase θ of the current command G1 is π [rad]. At the zero crossing point P03, the phase θ of the current command G1 is 2π [rad]. At all of the zero crossing points P01, P02, and P03, the current value of the current command G1 is zero. When the phase θ of the current command G1 is π / 2 [rad], the current value of the current command G1 is maximum (peak point P11). When the phase θ of the current command G1 is 3π / 2 [rad], the current value of the current command G1 is minimum (peak point P12).

[0053] Therefore, the above-mentioned "first phase range" includes a phase range between zero-crossing point P01 and zero-crossing point P02 that includes peak point P11, and a phase range between zero-crossing point P02 and zero-crossing point P03 that includes peak point P12. None of these phase ranges includes zero-crossing points P01, P02, and P03. Hereinafter, these phase ranges may be referred to as "section T1."

[0054] The section T1 is, for example, a reference phase θ S1 and the reference phase θ S1 Phase difference Δθ based on D1 and Δθ A1 The section T1 can be defined by, for example, the reference phase θ S1 Phase difference Δθ D1 From the starting phase θ1 delayed by S1 Phase difference Δθ A1 The range may be up to the end phase θ2, which is advanced by the reference phase θ S1 is set in the range greater than 0 [rad] and less than π [rad] (0<θ<π). For example, the reference phase θ S1 As shown in FIG. 4A, the reference phase θ may be set to the phase θ (π / 2 [rad]) indicating the peak point P11. S1 When π / 2 [rad] is set as the phase difference Δθ D1 and θ A1In the example of FIG. 4A, the phase difference Δθ on the side where the phase θ lags is set to a range of 0 [rad] or more and less than π / 2 [rad]. D1 and the phase difference Δθ on the side where the phase θ advances A1 The phase difference Δθ on the side where the phase θ lags is set to the same value. D1 and the phase difference Δθ on the side where the phase θ advances A1 may be different from each other.

[0055] The section T1 is set in a range where the phase θ is greater than 0 [rad] and less than π [rad] (0<θ<π). Furthermore, the section T1 is also set in a range where the phase θ is greater than π [rad] and less than 2π [rad] (π<θ<2π). The section T1 set in a range where the phase θ is greater than π [rad] and less than 2π [rad] is set in a range where the phase θ is greater than π [rad] and less than 2π [rad], for example, S2 and the reference phase θ S2 Phase difference Δθ based on D2 and Δθ A2 The section T1 can be defined by, for example, the reference phase θ S2 Phase difference Δθ D2 From the starting phase θ3 delayed by S2 Phase difference Δθ A2 The range may be up to the end phase θ4 which is advanced by the reference phase θ S2 is set in the range of greater than π [rad] and less than 2π [rad] (π<θ<2π). For example, the reference phase θ S2 As shown in FIG. 4A, the phase difference Δθ may be the phase θ (3π / 2 [rad]) indicating the peak point P12. D2 and Δθ A2 is the phase difference Δθ D1 and Δθ A1 Similarly, they may be equal to each other (Δθ D2 =Δθ A2 ), may be different from each other (Δθ D2 ≠Δθ A2 ).

[0056] On the other hand, section T2 corresponds to a "second phase range" other than the "first phase range" within one cycle of the current command G1. The "second phase range" is all phase ranges within one cycle of the current command G1 other than the "first phase range." Therefore, the "second phase range" includes the phase range in which the phase θ is from 0 [rad] to θ1 [rad], the phase range in which the phase θ is from θ2 [rad] to θ3 [rad], and the phase range in which the phase θ is from θ4 [rad] to 2π [rad]. These phase ranges include the zero-crossing points P01, P02, and P03, respectively. Hereinafter, these phase ranges may be referred to as "section T2" in the following description.

[0057] Therefore, in one cycle of the current command G1, there are arranged in order a section T2 including the zero cross point P01, a section T1 including the peak point P11, a section T2 including the zero cross point P02, a section T1 including the peak point P12, and a section T2 including the zero cross point P03. In other words, the sections T2 and T1 are provided so as to be alternately repeated in one cycle of the current command G1.

[0058] The carrier frequency setting unit 54a sets a carrier frequency (f1) in the section T1 and a carrier frequency (f2) in the section T2. ​​The carrier frequency (f2) is a frequency that prioritizes reducing motor loss generated by the motor 2. In conventional motor devices, the same carrier frequency (f2) is set in all sections. On the other hand, the carrier frequency setting unit 54a sets the carrier frequency (f1) in the section T1 to be lower than the carrier frequency (f2) in the section T2. ​​The carrier frequency (f1) is a frequency that prioritizes reducing inverter loss generated by the inverter 20. In this way, the carrier frequency (f2) of the carrier G2 is set to a high frequency in the section T2, while the carrier frequency (f1) of the carrier G2 is set to a low frequency in the section T1.

[0059] The carrier frequency setting unit 54a sets the carrier frequency of the V-phase carrier G3 and the carrier frequency of the W-phase carrier G4 to the same frequency as the carrier frequency of the U-phase carrier G2. However, the U-phase current command G1 is shifted by 2π / 3 [rad] from the V-phase current command, and the V-phase current command is shifted by 2π / 3 [rad] from the W-phase current command. Therefore, as shown in (b), (c), and (d) of Figure 4, the interval in which the carrier frequency of the V-phase carrier G3 is set to a low frequency and the interval in which the carrier frequency of the W-phase carrier G4 is set to a low frequency are each shifted from the interval T1 in which the carrier frequency (f1) of the U-phase carrier G2 is set to a low frequency. In the section where the carrier frequency of the V-phase carrier G3 is set to a low frequency and the section where the carrier frequency of the W-phase carrier G4 is set to a low frequency, these carrier frequencies may be the same as the carrier frequency (f1) of the U-phase carrier G2, or may be different from the carrier frequency (f1).

[0060] <Action and effect> Next, the effects achieved by the motor device 1 according to this embodiment will be described. In the motor device 1 according to this embodiment, the carrier frequency (f1) of the carrier G2 in the section T1 is set lower than the carrier frequency (f2) of the carrier G2 in the section T2. ​​In other words, a high carrier frequency (f2) is not set in all sections of one cycle of the current command G1 (i.e., all sections including sections T1 and T2), but a low carrier frequency (f1) is set only in section T1, which is a part of one cycle of the current command G1. In the section T1 where the low carrier frequency (f1) is set, inverter loss is kept small compared to the section T2 where the high carrier frequency (f2) is set.

[0061] Inverter loss is loss that occurs in the inverter 20 due to electromagnetic factors. One factor that increases inverter loss is an increase in switching loss. Switching loss also increases as the carrier frequency of the carrier increases. This is because, as the carrier frequency of the carrier increases, the number of times that the circuit blocks 21 to 26 switch increases, and switching loss increases accordingly. Since switching loss occurs when the circuit blocks 21 to 26 transition from on to off, the total switching loss increases as the number of times that the circuit blocks 21 to 26 switch increases. In this way, inverter loss increases as the carrier frequency of the carrier increases. In other words, inverter loss decreases as the carrier frequency of the carrier decreases.

[0062] The frequency characteristics of the electrical resistance of the stator of the motor 2 generally show a rapid increase in resistance value as the frequency of the drive power increases. This is due to the proximity effect and skin effect, among other factors. For example, the resistance value may rise rapidly in the frequency range above 10 kHz. For this reason, it is possible to reduce losses by reducing the high-frequency components in the frequency characteristics of the motor current.

[0063] Therefore, when a low carrier frequency (f1) is set only in a partial section T1 of one cycle of the current command G1, the total switching loss during one cycle of the current command G1 can be reduced compared to when a high carrier frequency (f2) is set throughout the entire cycle of the current command G1. This reduces inverter loss. The same applies to the carrier frequency of the V-phase carrier G3 and the W-phase carrier G4. As a result, the decrease in the output efficiency of the motor 2 can be suppressed.

[0064] Furthermore, when a low carrier frequency (f1) is set only in a partial section T1 of one cycle of the current command G1, the increase in motor loss is suppressed compared to when a low carrier frequency (f1) is set throughout the entire cycle of the current command G1. Motor loss is loss generated in the motor 2 due to electromagnetic factors, such as iron loss or copper loss. One factor that increases motor loss is an increase in current ripple components. The current ripple components increase as the carrier frequency of the carrier increases. When the current ripple components increase, it becomes more difficult to approximate the current command to an ideal sinusoidal wave, and motor loss increases. Therefore, motor loss increases as the carrier frequency decreases.

[0065] Therefore, if a low carrier frequency (f1) is set for all sections of one cycle of the current command G1, motor loss increases, and as a result, the output efficiency of the motor 2 may decrease. In other words, if a low carrier frequency (f1) is set for all sections of one cycle of the current command G1, the increase in inverter loss is suppressed, but motor loss increases. Conversely, if a high carrier frequency (f2) is set for all sections of one cycle of the current command G1, the increase in motor loss is suppressed, but inverter loss increases. In contrast, if a low carrier frequency (f1) is set only for a partial section T1 of one cycle of the current command G1, as in the motor device 1, it is possible to reduce inverter loss while suppressing the increase in motor loss. As a result, it is possible to effectively suppress the decrease in output efficiency of the motor 2.

[0066] In this embodiment, the "first phase range" may be a phase range that does not include zero-crossing points P01, P02, and P03, where the positive and negative current values ​​of the current command G1 are reversed, within one cycle of the current command G1. The inverter loss tends to be large in a section where the absolute value of the current command G1 is high (i.e., section T1 that does not include zero-crossing points P01, P02, and P03), and small in a section where the absolute value of the current command G1 is low (i.e., section T2 that includes zero-crossing points P01, P02, and P03). This is because the larger the absolute value of the current command G1, the greater the switching loss that occurs in one switching operation. When the circuit blocks 21 to 26 transition from on to off, the voltage and current flowing through the circuit blocks 21 to 26 do not switch instantaneously, and there is a section where these voltages and currents overlap. As a result, switching loss occurs, which is expressed as the product of the voltage and the current.

[0067] Therefore, the larger the absolute value of the current value of the current command G1, the greater the switching loss that occurs in one switching operation. Therefore, if the section in which the carrier frequency is set low is set to section T1, which does not include zero-crossing points P01, P02, and P03, the number of switching operations can be reduced, thereby preventing the total switching loss from increasing. This allows inverter loss to be reduced more effectively than if the section in which the carrier frequency is set low is set to section T2, which includes zero-crossing points P01, P02, and P03.

[0068] In this embodiment, the "first phase range" may be a phase range including peak points P11 and P12, where the absolute value of the current value of the current command G1 is maximum, during one cycle of the current command G1. The absolute value of the current value of the current command G1 is maximum at peak points P11 and P12. Therefore, in the section near peak points P11 and P12, switching loss occurring in one switching operation becomes extremely large. Therefore, by setting the section T1, which includes peak points P11 and P12, where the carrier frequency is set low, it is possible to effectively prevent the total switching loss from increasing. This allows inverter loss to be reduced more effectively than when the section T2, which does not include peak points P11 and P12, where the carrier frequency is set low is set.

[0069] The present disclosure is not limited to the above-described embodiment, and various other modifications are possible.

[0070] <Variation 1> FIG. 5 shows another example of carrier frequency setting by the carrier frequency setting unit 54a. FIG. 5(a) shows U-phase current command G1. FIG. 5(b) shows U-phase carrier G21. FIG. 5(c) shows V-phase carrier G31. FIG. 5(d) shows W-phase carrier G41. Hereinafter, as in the above-described embodiment, an example of setting the carrier frequency of carrier G21 will be described, focusing on the relationship between U-phase current command G1 and U-phase carrier G21. In the example shown in FIG. 5, the carrier frequency setting unit 54a sets the "first phase range" in one cycle of current command G1 to a phase range in which the absolute value of the current value of current command G1 is equal to or greater than a reference value is.

[0071] The "reference value is" is a value greater than 0. At zero-crossing points P01, P02, and P03, the absolute value of the current value of the current command G1 is 0. At peak points P11 and P12, the absolute value of the current command G1 is always greater than 0. Therefore, the phase range in which the absolute value of the current command G1 is greater than or equal to the reference value is can be rephrased as the phase range in one cycle of the current command G1 that does not include the zero-crossing points P01, P02, and P03, but includes the peak points P11 and P12. In other words, the phase range in which the absolute value of the current command G1 is greater than or equal to the reference value is includes the phase range between zero-crossing points P01 and P02 that includes the peak point P11, and the phase range between zero-crossing points P02 and P03 that includes the peak point P12. These phase ranges correspond to "section T3" in FIG. 5(a). Hereinafter, these phase ranges may be referred to as "section T3."

[0072] Section T3 between zero-crossing points P01 and P02 is a phase range between two values ​​θ5 [rad] and θ6 [rad] corresponding to the positive-side reference value is of the current value of current command G1. That is, section T3 is a phase range in which the phase θ is greater than or equal to θ5 [rad] and less than or equal to θ6 [rad], and includes peak point P11. Section T3 between zero-crossing points P02 and P03 is a phase range between two values ​​θ7 [rad] and θ8 [rad] corresponding to the negative-side current value -is of current command G1. That is, section T3 is a phase range in which the phase θ is greater than or equal to θ7 [rad] and less than or equal to θ8 [rad], and includes peak point P12. In the example shown in FIG. 5(a), the "reference value is" is set to half (½) of the maximum absolute value of the current value of current command G1. In other words, the positive reference value is is set to half the maximum value imax of the current value of the current command G1, and the negative reference value -is is set to half the minimum value -imax of the current value of the current command G1.

[0073] The "reference value is" does not have to be set to half the maximum absolute value of the current value of the current command G1 and can be changed as appropriate. The "reference value is" may be 2 / 3 or 3 / 4 of the maximum absolute value of the current value of the current command G1. The positive and negative reference values ​​may be set to different values. In this case, depending on the difference between these reference values, the section T3 between the zero crossing point P01 and the zero crossing point P02 and the section T3 between the zero crossing point P02 and the zero crossing point P03 will be different from each other.

[0074] Meanwhile, the "second phase range" other than the phase range in which the absolute value of the current value of the current command G1 is equal to or greater than the reference value is during one cycle of the current command G1 corresponds to "section T4" in FIG. 5(a). The "second phase range" refers to all phase ranges during one cycle of the current command G1 other than the "first phase range," i.e., the phase range in which the absolute value of the current value of the current command G1 is smaller than the reference value is. The phase ranges in which the absolute value of the current value of the current command G1 is smaller than the reference value is include the phase range in which the phase θ is greater than 0 [rad] and smaller than θ5 [rad], the phase range in which the phase θ is greater than θ6 [rad] and smaller than θ7 [rad], and the phase range in which the phase θ is greater than θ8 [rad] and smaller than 2π [rad]. These phase ranges each include the zero-crossing points P01, P02, and P03.

[0075] As in the above-described embodiment, the carrier frequency setting unit 54a sets the carrier frequency (f1) of the carrier G21 in the section T3 to be lower than the carrier frequency (f2) of the carrier G21 in the section T4. Therefore, in the section T3 where the absolute value of the current value of the current command G1 is equal to or greater than the reference value is, the carrier frequency of the carrier G21 is set lower than in the section T4 where the absolute value of the current value of the current command G1 is lower than the reference value is. Therefore, in the section T3, the number of switching operations of the circuit blocks 21 to 26 is smaller than in the section T4.

[0076] As described above, the larger the absolute value of the current command G1, the greater the switching loss that occurs in one switching operation. Therefore, if the section in which the carrier frequency is set low is section T3, where the absolute value of the current command G1 is equal to or greater than the reference value is, the number of switching operations can be reduced, thereby preventing an increase in the total switching loss. In this case, inverter loss can be reduced more effectively than if the section in which the carrier frequency is set low is section T4, where the absolute value of the current command G1 is lower than the reference value is.

[0077] In the example shown in FIG. 5(a), the reference value is is set to half the maximum value at which the absolute value of the current value of the current command G1 is maximized. As described above, in section T3 where the absolute value of the current value of the current command G1 is equal to or greater than the reference value is, the switching loss per switching operation is relatively large. Therefore, by setting the carrier frequency low so as to reduce the number of switching operations in section T3, the total switching loss can be reduced more effectively. This allows for more effective reduction of inverter loss. By setting the carrier frequency of the V-phase carrier G31 and the carrier frequency of the W-phase carrier G41 in the same manner as the carrier frequency of the U-phase carrier G21 described above, the same effect as the example shown in FIG. 5 can be achieved.

[0078] In the example shown in Fig. 5, section T4, in which the carrier frequency of carrier G21 is set high, is shorter than section T2, in which the carrier frequency of carrier G2 is set high, in the embodiment shown in Fig. 4. For this reason, it may be thought that motor loss increases relatively in the example shown in Fig. 5. However, as shown in Fig. 5, section T3, in which the carrier frequency of U-phase carrier G21 is set high, overlaps with sections in which the frequency of V-phase carrier G31 is high and with sections in which the frequency of W-phase carrier G41 is high. In this way, even if a section in which the carrier frequency of a certain phase is set low overlaps with a section in which the carrier frequency of another phase is set high, an increase in motor loss can be suppressed.

[0079] For example, consider the case in FIG. 1 where the current path of the inverter 20 passes through the U-phase circuit block 21 and the W-phase circuit block 26. In this case, during section T3, where the frequency of the U-phase carrier G21 is set low, the on / off driving of the U-phase circuit block 21 is slow. However, as shown in FIG. 5, section T3 overlaps with a section where the carrier frequency of the W-phase carrier G41 is set high. During this section, the on / off driving of the W-phase circuit block 26 is fast. In this way, if a circuit block of one of the phases on the current path of the inverter 20 is driven at high speed, the amount of change in current passing through that current path can be reduced, thereby reducing current ripple. Therefore, in the example shown in FIG. 5, an increase in motor loss is effectively suppressed.

[0080] <Variation 2> Fig. 6 shows another example of carrier frequency setting by the carrier frequency setting unit 54a. Fig. 6(a) shows U-phase current command G1. Fig. 6(b) shows U-phase carrier G22. Fig. 6(c) shows V-phase carrier G32. Fig. 6(d) shows W-phase carrier G42. In the following, as in the above-described embodiment, an example of setting the carrier frequency of U-phase carrier G22 will be described, focusing on the relationship between U-phase current command G1 and U-phase carrier G22.

[0081] In the example shown in FIG. 6, the carrier frequency setting unit 54a sets the "first phase range" in one cycle of the current command G1 to a phase range that does not include the zero-crossing points P01, P02, and P03, and does not include the peak points P11 and P12. In other words, the "first phase range" in one cycle of the current command G1 includes the phase range between the peak point P11 and the zero-crossing point P02, and the phase range between the peak point P12 and the zero-crossing point P03. These phase ranges correspond to "section T5" in FIG. 5. Hereinafter, these phase ranges may be referred to as "section T5" in the following description.

[0082] Section T5 between peak point P11 and zero-crossing point P02 is a phase range in which the phase θ ranges from θ9 [rad] to θ10 [rad]. θ9 is greater than π / 2 [rad] but less than π [rad]. θ10 is greater than θ9 [rad] but less than π [rad]. The phase difference Δθ1 from θ9 to θ10 is greater than 0 [rad] but less than π / 2 [rad]. Section T5 may be defined by θ9 and θ10, or by θ9 and the phase difference Δθ1. Section T5 between peak point P12 and zero-crossing point P03 is a phase range in which the phase θ ranges from θ11 [rad] to θ12 [rad]. θ11 is greater than π / 2 [rad] but less than π [rad]. θ12 is greater than θ11 [rad] but less than π [rad]. The phase difference Δθ2 from θ11 to θ12 is greater than 0 [rad] and less than π / 2 [rad]. Section T5 may be defined by θ11 and θ12, or by θ11 and the phase difference Δθ2. The phase differences Δθ1 and Δθ2 may be equal to each other (Δθ1=Δθ2) or different from each other (Δθ1≠Δθ2).

[0083] Meanwhile, within one cycle of the current command G1, a second phase range other than the "first phase range" corresponds to "section T6" in FIG. 6. The "second phase range" includes a phase range in which the phase θ is greater than 0 [rad] and less than θ9 [rad], a phase range in which the phase θ is greater than θ10 [rad] and less than θ11 [rad], and a phase range in which the phase θ is greater than θ12 [rad] and less than 2π [rad]. These phase ranges include zero-crossing points P01, P02, and P03, respectively. Of these phase ranges, the phase range including zero-crossing point P01 includes peak point P11. The phase range including zero-crossing point P02 includes peak point P12.

[0084] As in the above-described embodiment, the carrier frequency setting unit 54a sets the carrier frequency (f1) of the carrier G22 in section T5 to be lower than the carrier frequency (f2) of the carrier G22 in section T6. Even in this configuration, the same effects as in the above-described embodiment can be obtained. By setting the carrier frequency of the V-phase carrier G32 and the carrier frequency of the W-phase carrier G42 in the same manner as the carrier frequency of the U-phase carrier G22, the same effects as in the example shown in FIG. 6 can be obtained.

[0085] <Variation 3> The configuration of the motor device 1 is not limited to the above-described embodiment, and can be modified as appropriate.

[0086] For example, as shown in FIG. 7 , the motor device 1 may further include an inverter loss measurement unit 71 and a motor loss measurement unit 72. One end 71a of the inverter loss measurement unit 71 is connected to a line connecting the power supply 10 and the inverter 20. The other end 71b of the inverter loss measurement unit 71 is connected to a line connecting the inverter 20 and the motor 2. The inverter loss measurement unit 71 measures the inverter loss by measuring the difference between the energy input to the inverter 20 and the energy output from the inverter 20. The inverter loss measurement unit 71 outputs an information signal S31 indicating the measured inverter loss to the controller 30. One end 72a of the motor loss measurement unit 72 is connected to the line connecting the inverter 20 and the motor 2. The other end 72b of the motor loss measurement unit 72 is connected to the output of the motor 2. The motor loss measurement unit 72 measures the motor loss by measuring the difference between the energy input to the motor 2 and the energy output from the motor 2. The motor loss measurement unit 72 outputs to the controller 30 an information signal S32 indicating the measured motor loss.

[0087] The information signals S31 and S32 are input to a carrier frequency setting unit 54a of the controller 30. The carrier frequency setting unit 54a sets a phase condition using the inverter loss and motor loss contained in the information signals S31 and S32. The "phase condition" refers to a reference phase θ that is a reference for determining the section T1. S1 and θ S2 and the reference phase θ S1 Phase difference Δθ from D1 and Δθ A1 and the reference phase θ S2 Phase difference Δθ from D1 and Δθ A1 and (see Figure 4).

[0088] The carrier frequency setting unit 54a determines the phase conditions for determining the range of the section T1 so as to minimize the total loss of the inverter loss and the motor loss, for example. As described above, the higher the carrier frequency, the greater the switching loss, and the lower the carrier frequency, the smaller the switching loss. Therefore, taking into consideration the balance between the motor loss and the inverter loss, the section T1 is set to a low carrier frequency so as to minimize the total loss. This more reliably achieves the effect of reducing the inverter loss while suppressing an increase in the motor loss. As a result, the output efficiency of the motor 2 can be more reliably reduced.

[0089] <Other variations> In the above-described embodiment, an example has been described in which intervals T1 and T2 are set in one cycle of current command G1. In one cycle of current command G1, another interval may be set in addition to intervals T1 and T2. In this case, the carrier frequency in the other interval may be set higher than the carrier frequency (f1) in interval T1. The carrier frequency in the other interval may be set higher or lower than the carrier frequency (f2) in interval T2.

[0090] In the above-described embodiment, an example has been described in which two sections T1 are set in one cycle of the current command G1. For example, only one section T1 may be set in one cycle of the current command G1. In the above-described embodiment, an example has been described in which the "first command signal" represents the voltage command signal S6a and the "second command signal" represents the current command signal S6b. The "first command signal" and the "second command signal" may both represent the same information.

[0091] [Note] The present disclosure includes the following configurations.

[0092] The motor device disclosed herein is [1] "a motor device comprising: a motor driven by AC drive power; an inverter supplying the drive power to the motor; and a controller generating a pulse signal for controlling the drive power using a first command signal indicating a target for the drive power and a carrier, wherein the controller has a carrier frequency setting unit setting a carrier frequency of the carrier using a second command signal indicating the target for the drive power, and the carrier frequency setting unit sets the carrier frequency in a section corresponding to a first phase range in one cycle of the second command signal to be lower than the carrier frequency in a section corresponding to a second phase range other than the first phase range."

[0093] The motor device of the present disclosure is [2] "the motor device described in [1] above, wherein the first phase range is a phase range that does not include a zero crossing point where the positive and negative signs of the second command signal are reversed during one cycle of the second command signal."

[0094] The motor device of the present disclosure is [3] "the motor device described in [2] above, wherein the first phase range is a phase range in which the absolute value of the second command signal is equal to or greater than a reference value during one cycle of the second command signal."

[0095] The motor device of the present disclosure is [4] "the motor device described in [3] above, wherein the first phase range is a phase range that includes a peak point in one cycle of the second command signal at which the absolute value of the second command signal is maximum."

[0096] The motor device of the present disclosure is [5] "the motor device described in [3] above, wherein the first phase range is a phase range that does not include a peak point in one cycle of the second command signal at which the absolute value of the second command signal is maximum."

[0097] The motor device of the present disclosure is [6] "the motor device according to any one of [1] to [5] above, further comprising a motor loss measurement unit that outputs a signal related to motor loss generated in the motor, and an inverter loss measurement unit that outputs a signal related to inverter loss generated in the inverter, wherein the carrier frequency setting unit sets the first phase range based on the signal related to motor loss and the signal related to inverter loss." [Explanation of symbols]

[0098] 1. Motor device 2 motors 20 Inverter 30 Controllers 54a Carrier frequency setting section 71 Inverter loss measurement section 72 Motor loss measurement section is reference value P01, P02, P03 zero crossing points P11, P12 peak points S6a Voltage command signal (first command signal) S6b Current command signal (second command signal) S11~S16 Control signals (pulse signals) T1~T6 section

Claims

1. a motor driven by AC driving power; an inverter that supplies the driving power to the motor; a controller that generates a pulse signal for controlling the driving power by using a voltage command signal indicating a target value of the driving power and a carrier; The controller a carrier frequency setting unit that sets a carrier frequency of the carrier using a current command signal that indicates a target of the driving power; the carriers include a first-phase carrier corresponding to the driving power of a first phase and a second-phase carrier corresponding to the driving power of a second phase; The carrier frequency setting unit setting the carrier frequency of the first phase carrier in a first section corresponding to a first phase range in one cycle of a current command signal indicating a target drive power of a first phase to be lower than the carrier frequency of the first phase carrier in a second section corresponding to a second phase range other than the first phase range; setting the carrier frequency of the second-phase carrier in a third section corresponding to a third phase range within one cycle of a current command signal indicating a target driving power for the second phase to be lower than the carrier frequency of the second-phase carrier in a fourth section corresponding to a fourth phase range other than the third phase range; A motor device, wherein the first section, in which the carrier frequency of the first phase carrier is set low, overlaps with the fourth section, in which the carrier frequency of the second phase carrier is set high.

2. 2. The motor device according to claim 1, wherein the first phase range is a phase range that does not include a zero crossing point where the positive and negative signs of the current command signal are reversed within one cycle of the current command signal.

3. 3. The motor device according to claim 2, wherein the first phase range is a phase range in which the absolute value of the current command signal is equal to or greater than a reference value during one cycle of the current command signal.

4. 4. The motor device according to claim 3, wherein the first phase range is a phase range including a peak point in one cycle of the current command signal where the absolute value of the current command signal is maximum.

5. 4. The motor device according to claim 3, wherein the first phase range is a phase range that does not include a peak point in one cycle of the current command signal where the absolute value of the current command signal is maximum.

6. a motor loss measurement unit that outputs a signal related to a motor loss generated in the motor; an inverter loss measurement unit that outputs a signal related to an inverter loss occurring in the inverter, The motor device according to claim 1 , wherein the carrier frequency setting unit sets the first phase range based on a signal related to the motor loss and a signal related to the inverter loss.

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