GaN substrate wafer and method for manufacturing the same

By initially producing a GaN wafer with low impurity concentration and then growing a high impurity layer, the method addresses inefficiencies in existing GaN substrate manufacturing, enabling efficient production of high-performance wafers for nitride semiconductor devices.

JP7775708B2Active Publication Date: 2025-11-26MITSUBISHI CHEM CORP
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Patent Information

Application Number
JP2021511860
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-06-12
Filing Date
2020-03-25
Publication Date
2025-11-26
Estimated Expiration
2040-03-25

AI Technical Summary

Technical Problem

Existing methods for manufacturing GaN substrate wafers with low and high impurity concentration regions are inefficient, as they require growing a GaN thick film on a sapphire wafer for each substrate, leading to low manufacturing efficiency.

Method used

A method involving the initial production of a GaN wafer with low impurity concentration followed by growing a GaN layer with high impurity concentration to a specific thickness, resulting in a substrate with a high impurity region only on the front surface, enhancing manufacturing efficiency.

Benefits of technology

This approach allows for the production of a high-performance GaN substrate wafer with a high carrier concentration, suitable for manufacturing nitride semiconductor devices efficiently.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided are: a GaN substrate wafer which allows for improved production efficiency and is preferably used in the manufacture of a nitride semiconductor device in which a device structure is formed on a GaN substrate that has a carrier concentration increased by doping; and a method for manufacturing the GaN substrate wafer. This GaN wafer is (0001) oriented and has a first region provided on the N-polar side of a regrowth interface and a second region provided on the Ga-polar side thereof, the second region has a minimum thickness of 20 to 300 μm, and the second region includes a region that has a donor impurity total concentration that is higher than that of the first region. The region in the second region that is within a predetermined length from the main face of the GaN substrate wafer on the Ga-polar side is defined as a main dope region, and the second region may be doped such that the donor impurity total concentration is 1×1018 atoms / cm3 or more at least in the main dope region.
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Description

[Technical Field]

[0001] The present invention relates mainly to a GaN substrate wafer and a manufacturing method thereof. A GaN substrate wafer is a substrate wafer made of GaN (gallium nitride). A substrate wafer is a wafer that is mainly used as a substrate in the manufacturing process of semiconductor devices. [Background technology]

[0002] The substrates used in currently commercially produced InGaN laser diodes (LDs) are GaN substrates with relatively high carrier concentrations. Recently, research and development of vertical GaN power devices using such GaN substrates has been active.

[0003] When a GaN thick film is grown on a sapphire wafer by HVPE (hydride vapor phase epitaxy), if a region with a low impurity concentration is provided in the lower part of the GaN thick film and a region with a high impurity concentration in the upper part, then when the GaN thick film is peeled off from the sapphire wafer, a GaN substrate wafer is obtained that has a region with a low impurity concentration on the back surface side and a region with a high impurity concentration on the front surface side (Patent Document 1, Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-70154 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-251178 Summary of the Invention [Problem to be solved by the invention]

[0005] When manufacturing a GaN substrate wafer having a low impurity concentration region on the back surface side and a high impurity concentration region on the front surface side using the methods disclosed in Patent Document 1 or Patent Document 2, it is necessary to grow a GaN thick film by HVPE on a sapphire wafer for each GaN substrate wafer produced. Therefore, the methods disclosed in Patent Document 1 or Patent Document 2 cannot be said to have high manufacturing efficiency. [Means for solving the problem]

[0006] The present inventors have found that if a GaN wafer with a low impurity concentration is first manufactured and then a GaN layer with a high impurity concentration is grown to a specific thickness on the GaN wafer, a GaN substrate wafer having a region with a high impurity concentration only on the front surface side can be produced more efficiently. The present invention has been made based on this idea, and its embodiments include the following.

[0007] [1] A (0001) oriented GaN substrate wafer, comprising a first region provided on the N-polarity side of a regrowth interface and a second region provided on the Ga-polarity side, the second region having a minimum thickness of 20 μm or more and 300 μm or less, and the second region including a region having a higher total concentration of donor impurities than the first region. [2] The carrier concentration of at least a part of the region having a higher donor impurity concentration than the first region is 1×10 18 cm -3 The GaN substrate wafer according to [1] above. [3] The GaN substrate wafer according to [1] or [2] above, which satisfies any one of the conditions selected from the following (1) to (3): (1) It has a diameter of 50 mm or more and 55 mm or less and a thickness of 250 μm or more and 450 μm or less. (2) It has a diameter of 100 mm or more and 105 mm or less and a thickness of 350 μm or more and 750 μm or less. (3) It has a diameter of 150 mm or more and 155 mm or less and a thickness of 450 μm or more and 800 μm or less. [4] The second region has a total donor impurity concentration of 1×10 18atoms / cm 3 The GaN substrate wafer according to any one of [1] to [3] above, having a main doped region as described above. [5] The GaN substrate wafer according to [4], wherein in the second region, a region within a specific length from the main surface on the GaN polarity side is the primarily doped region, and the specific length is 1 μm or more. [6] The GaN substrate wafer according to [5] above, wherein the minimum thickness of the second region is 1.2 times or less the specific length. [7] The GaN substrate wafer according to any one of [4] to [6] above, wherein in the primarily doped region, the variation in total donor impurity concentration along the c-axis direction is within a range of ±25% from the median value. [8] The GaN substrate wafer according to any one of [1] to [7] above, wherein the impurity contained in the second region at the highest concentration is Si or Ge. [9] The GaN substrate wafer according to any one of [4] to [7], wherein the impurity contained in the primary doped region at the highest concentration is Si or Ge.

[10] The GaN substrate wafer according to any one of [4] to [9] above, wherein in the primarily doped region, the total concentration of donor impurities excluding Si is 10% or less of the Si concentration.

[11] In the primary doped region, the Ge concentration is 1×10 18 atoms / cm 3 or more, and the Si concentration is 4×10 17 atoms / cm 3 The GaN substrate wafer according to any one of the above [4] to

[10] .

[12] The GaN substrate wafer according to any one of [1] to

[11] above, wherein the impurity concentration of at least one of the first region and the second region satisfies one or more conditions selected from the following (a) to (c): (a) Si concentration is 5×10 16 atoms / cm 3 End (b) O concentration is 3 × 10 16 atoms / cm 3 below (c) H concentration is 1×10 17 atoms / cm 3 below

[13] In the first region, the Si concentration is 1×10 18 atoms / cm 3 The GaN substrate wafer according to any one of [1] to

[12] above, wherein the GaN substrate wafer has a thickness of less than 100 nm.

[14] The GaN substrate wafer according to any one of [1] to

[13] above, wherein the regrowth interface is a rough surface.

[15] The GaN substrate wafer according to any one of [1] to

[14] , wherein the dislocation density in the Ga-polar primary surface is 0.5 to less than 2 times the dislocation density in the first region in the vicinity of the regrowth interface.

[16] The GaN substrate wafer according to any one of [1] to

[15] above, wherein the Ga-polar main surface is a flat surface.

[17] An epitaxial wafer comprising the GaN substrate wafer according to any one of [1] to

[16] above, and a nitride semiconductor layer epitaxially grown on the Ga polarity plane of the GaN substrate wafer.

[18] A method for producing an epitaxial wafer, comprising the steps of: preparing a GaN substrate wafer according to any one of [1] to

[16] above; and growing a nitride semiconductor layer on a Ga-polar face of the GaN substrate wafer to obtain an epitaxial wafer.

[19] A method for manufacturing a semiconductor device, comprising the steps of: preparing a GaN substrate wafer according to any one of [1] to

[16] above; growing a nitride semiconductor layer on a Ga-polar face of the GaN substrate wafer to obtain an epitaxial wafer; and removing at least a portion of the first region of the GaN substrate wafer.

[0008]

[20] A method for manufacturing a GaN substrate wafer, comprising: a second step of growing a (0001)-oriented second GaN thick film on a substrate by HVPE, and then slicing the second GaN thick film to obtain a second c-plane GaN wafer; and a third step of growing a (0001)-oriented GaN film having a thickness of 500 μm or less on the second c-plane GaN wafer by HVPE, wherein the GaN film has a region with a higher total concentration of donor impurities than the second c-plane GaN wafer.

[21] A method for producing a GaN substrate wafer having a first region provided on an N-polarity side and a second region provided on a Ga-polarity side across a regrowth interface, comprising: (i) a first step of growing a first GaN thick film made of intentionally undoped GaN and having a (0001) orientation on a seed wafer by HVPE, and then obtaining at least one first c-plane GaN wafer from the first GaN thick film; (ii) a second step of growing a second GaN thick film, consisting of intentionally undoped GaN and having a (0001) orientation, on the first c-plane GaN wafer by HVPE, and then slicing the second GaN thick film to obtain a second c-plane GaN wafer; (iii) a third step of growing a (0001) oriented GaN film on the second c-plane GaN wafer by HVPE to a thickness of 500 μm or less; The GaN film has a region having a higher total concentration of donor impurities than the second c-plane GaN wafer.

[22] The carrier concentration of at least a part of the region having a higher total concentration of donor impurities than the second c-plane GaN wafer is 1×10 18 cm -3 The method for producing a GaN substrate wafer according to

[20] or

[21] above.

[23] The method for producing a GaN substrate wafer according to any one of

[20] to

[22] above, wherein the GaN substrate wafer satisfies any one of the conditions selected from the following (1) to (3): (1) A diameter of 50 mm or more and 55 mm or less and a thickness of 250 μm or more and 450 μm or less (2) A diameter of 100 mm or more and 105 mm or less and a thickness of 350 μm or more and 750 μm or less (3) A diameter of 150 mm or more and 155 mm or less and a thickness of 450 μm or more and 800 μm or less

[24] The GaN film has a region length of 1 μm or more in the c-axis direction from the top surface of the GaN film, and a total concentration of donor impurities in the region is 1×10 18 atoms / cm 3 The method for producing a GaN substrate wafer having a specifically doped region according to any one of

[20] to

[23] above.

[25] The method for producing a GaN substrate wafer according to

[24] above, wherein the region length in the c-axis direction of the specifically doped region is 20 μm or more.

[26] The method for producing a GaN substrate wafer according to

[24] or

[25] , wherein within the specific doped region, the variation in the total concentration of donor impurities along the c-axis direction is within ±25% of the median value.

[27] The method for producing a GaN substrate wafer according to any one of

[24] to

[26] above, wherein the GaN film has an intervening region with a thickness of 50 μm or less between the specifically doped region and the second c-plane GaN wafer.

[28] The method for producing a GaN substrate wafer according to any one of

[24] to

[27] above, wherein the impurity contained in the specifically doped region at the highest concentration is Si or Ge.

[29] The method for producing a GaN substrate wafer according to any one of

[24] to

[28] above, wherein in the specific doped region, the total concentration of donors excluding Si is 10% or less of the Si concentration.

[30] In the specific doped region, the Ge concentration is 1×10 18 atoms / cm 3 or more, and the Si concentration is 4×10 17 atoms / cm 3 The method for producing a GaN substrate wafer according to any one of

[24] to

[29] above.

[31] The method for producing a GaN substrate wafer according to any one of

[20] to

[30] above, further comprising a thinning step of thinning the GaN film after the third step.

[32] The method for producing a GaN substrate wafer according to

[31] above, wherein the difference in thickness of the GaN film before and after the thinning step is 200 μm or less.

[33] The method for producing a GaN substrate wafer according to any one of

[20] to

[32] above, wherein the GaN substrate wafer and the second c-plane GaN wafer have different offcut orientations.

[34] The method for producing a GaN substrate wafer according to any one of

[20] to

[33] above, further comprising, between the second step and the third step, a planarization step of planarizing the Ga polarity face of the second c-plane GaN wafer obtained in the second step, and a roughening step of roughening the Ga polarity face by etching.

[35] The method for producing a GaN substrate wafer according to any one of

[31] to

[34] , wherein in the thinning step, the GaN film is thinned without slicing. [Effects of the Invention]

[0009] According to the present invention, a high-performance GaN substrate wafer having a high carrier concentration can be provided. Also, according to the present invention, a method for efficiently manufacturing a GaN substrate wafer having a high carrier concentration can be provided. Therefore, the method can be preferably used for manufacturing nitride semiconductor devices in which a device structure is provided on a GaN substrate having a high carrier concentration. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a perspective view showing a GaN substrate wafer according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view showing a GaN substrate wafer according to the embodiment. [Figure 3] FIG. 3 is a cross-sectional view showing a GaN substrate wafer according to an embodiment. [Figure 4] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process for a nitride semiconductor device using a GaN substrate wafer according to an embodiment. [Figure 5] 5A to 5C are cross-sectional views illustrating the steps of a GaN substrate wafer manufacturing method according to an embodiment. [Figure 6] 6A to 6C are cross-sectional views illustrating the steps of a GaN substrate wafer manufacturing method according to an embodiment. [Figure 7] 7A to 7C are cross-sectional views illustrating the steps of a GaN substrate wafer manufacturing method according to an embodiment. [Figure 8] FIG. 8 is a schematic diagram showing the basic configuration of an HVPE apparatus. [Figure 9] FIG. 9 is a diagram showing the carrier concentration of the GaN substrate wafer produced in the example. DETAILED DESCRIPTION OF THE INVENTION

[0011] The following is a detailed description of the embodiments of the present invention. The following description of the components is an example (typical example) of the embodiments of the present invention, and the present invention is not limited to these contents as long as it does not deviate from the gist of the present invention. In the present invention, when expressed as "X to Y" (X and Y are any numbers), unless otherwise specified, it includes the meaning of "X or more and Y or less", as well as "preferably larger than X" and "preferably smaller than Y".

[0012] 1. GaN substrate wafer One embodiment of the present invention relates to a GaN substrate wafer. The GaN substrate wafer according to the embodiment is a (0001)-oriented GaN wafer, and is composed of a first region provided on the N-polarity side of a regrowth interface and a second region provided on the Ga-polarity side. The second region has a minimum thickness of 20 μm or more and 300 μm or less. The second region includes a region in which the total concentration of donor impurities is higher than that of the first region. In this specification, "impurities" refers to components other than Ga and N contained in the GaN substrate. The carrier concentration in at least a portion of the region is 1×10 18 cm -3 More than that, and even 2 x 10 18 cm -3 Above, and 3x10 18 cm -3 More than that, and 4x10 18 cm -3 Above, and 6x10 18 cm -3 Above, and even 8 x 10 18 cm -3 In this specification, when the carrier concentration is mentioned, it means the carrier concentration at room temperature unless otherwise specified.

[0013] A (0001) oriented GaN wafer is a GaN wafer having a main surface (large area surface) parallel or approximately parallel to the (0001) crystal plane, ie, the c-plane, and is also called a c-plane GaN wafer. An example of a GaN substrate wafer according to an embodiment is shown in Figures 1 and 2. Figure 1 is a perspective view, and Figure 2 is a cross-sectional view. The GaN substrate wafer 100 shown in FIGS. 1 and 2 is a free-standing substrate wafer made of only GaN crystals, one of its two main surfaces being an N-polar surface 101 and the other being a Ga-polar surface 102. The N-polar plane 101 and the Ga-polar plane 102 are parallel to each other. The GaN substrate wafer 100 has a (0001) orientation, and the Ga polarity plane 102 is inclined 10 degrees or less (including 0 degrees) from the (0001) crystal plane. The inclination may be 0.2 degrees or more. The inclination is preferably 5 degrees or less, more preferably 2.5 degrees or less. The inclination may be 1.5 degrees or less, or even 1 degree or less.

[0014] The diameter of the GaN substrate wafer 100 is usually 45 mm or more, and may be 95 mm or more, or 145 mm or more, and is typically 50 to 55 mm (about 2 inches), 100 to 105 mm (about 4 inches), 150 to 155 mm (about 6 inches), etc. The preferred range of thickness for the GaN substrate wafer 100 varies depending on the diameter. When the diameter of the GaN substrate wafer 100 is about 2 inches, the thickness is preferably 250 μm or more, more preferably 300 μm or more, even more preferably 350 μm or more, and is preferably 450 μm or less, more preferably 400 μm or less. When the diameter of the GaN substrate wafer 100 is about 4 inches, the thickness is preferably 350 μm or more, more preferably 400 μm or more, and is preferably 750 μm or less, more preferably 650 μm or less, and even more preferably 600 μm or less. When the diameter of the GaN substrate wafer 100 is about 6 inches, the thickness is preferably 450 μm or more, more preferably 550 μm or more, and is preferably 800 μm or less, more preferably 700 μm or less.

[0015] As described above, the GaN substrate wafer 100 is usually disk-shaped, but in modified examples, the shape of the primary surface may be square, rectangular, hexagonal, octagonal, elliptical, or irregular. In such modified examples, the diameter described above can be interpreted as "the shortest length of a straight line passing through the center of gravity on the primary surface."

[0016] The N-polar surface 101 of the GaN substrate wafer 100 is the "backside" surface, and may be mirror-finished, roughened, or matte-finished. The Ga-polar surface 102 of the GaN substrate wafer 100 is the "front surface," and when the GaN substrate wafer 100 is used to manufacture a nitride semiconductor device, a nitride semiconductor layer is typically epitaxially grown on the Ga-polar surface 102 . The Ga polar surface 102 may be an as-grown surface, but is preferably a planarized surface (flat surface) that has been processed by polishing, CMP (Chemical Mechanical Polishing), etching, or the like. The root mean square (RMS) roughness of the Ga polar surface 102 measured with an atomic force microscope (AFM) is preferably less than 5 nm, more preferably less than 2 nm, and even more preferably less than 1 nm, and may be less than 0.5 nm, in a measurement range of 2 μm × 2 μm. The Ga polar surface 102 may be a surface formed by cutting, but is preferably a surface that has been subjected to planarization only by polishing, CMP, etching, or the like without cutting.

[0017] GaN substrate wafer 100 has a regrowth interface 103 between its two main surfaces, with a first region 110 on the N-polarity side and a second region 120 on the Ga-polarity side of regrowth interface 103. The "regrowth interface" refers to the boundary surface that occurs when GaN crystals grow on any substrate, and its existence can be confirmed, for example, by observing a cross section of the GaN substrate wafer using a scanning electron microscope, cathodoluminescence observation, or fluorescence microscope. The regrowth interface 103 is preferably, but not necessarily, parallel to the Ga-polar surface 102. When the regrowth interface 103 is tilted from the Ga-polar surface 102, the thickness of the second region 120 is typically smallest at one end of the tilt direction and largest at the other end. It is preferable that the difference in thickness between the one end and the other end of the second region 120 does not exceed 200 μm. It is assumed that the first region 110 will be removed eventually in the process of manufacturing a nitride semiconductor device using the GaN substrate wafer 100. In other words, it is assumed that the nitride semiconductor device chip manufactured using the GaN substrate wafer 100 will not contain any portion derived from the first region 110. In such a usage mode, there are no particular requirements for the electrical properties of the GaN crystal that forms the first region 110.

[0018] The GaN crystal forming the first region 110 is usually grown by HVPE, and therefore its impurity concentration satisfies one or more conditions selected from the following (a) to (c): In this specification, HVPE stands for hydride vapor phase epitaxy. (a) Si concentration is 5×10 16 atoms / cm 3 End (b) O concentration is 3 × 10 16 atoms / cm 3 below (c) H concentration is 1×10 17 atoms / cm 3 below Preferably, the GaN crystal forming the first region 110 is not intentionally doped, so its Si concentration is 1×10 18 atoms / cm 3 is less than. Intentionally undoped GaN grown by HVPE has a Si concentration of 5×10 17 atoms / cm 3 Below, the O concentration is 2×10 17 atoms / cm 3 Below, H concentration is 5 × 10 16 atoms / cm 3 The following impurity concentrations other than Si, O, and H are 5×1015 atoms / cm 3 The term "intentional doping" refers to adding a target element as a raw material during the process of growing GaN crystal.

[0019] The second region 120 is typically grown by HVPE on top of the first region 110. The regrowth interface 103 exists between the first region 110 and the second region 120 because the steps of growing the first region 110 and the second region 120 are not continuous. The minimum thickness of the second region 120 is at least 20 μm, preferably 40 μm or more, more preferably 50 μm or more, and may be 100 μm or more. The reason for this is that, in the process of manufacturing nitride semiconductor device chips using the GaN substrate wafer 100, after the first region 110 is removed from the substrate wafer 100, the remaining second region 120 can serve as a substrate that supports the structure of the semiconductor device chip. The minimum thickness refers to the thickness at the point where the thickness is smallest. The upper limit of the minimum thickness of the second region 120 is 300 μm. When the Ga polar plane 102 and the regrowth interface 103 are parallel and the thickness of the second region 120 is uniform, the thickness of the second region 120 is considered to be the minimum thickness at all points.

[0020] In the second region 120, a region within a specific length L from the Ga polarity surface 102 of the GaN substrate wafer 100 is defined as a primarily doped region 120a. The second region 120 has a total concentration of donor impurities of 1×10 18 atoms / cm 3 The total concentration of donor impurities is the sum of the concentrations of all types of donor impurities. The specific length L is typically at least 1 μm, and can be 5 μm or more, 10 μm or more, 20 μm or more, 25 μm or more, 50 μm or more, 75 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, etc. The total concentration of donor impurities in at least a portion of the primary doped region 120a is preferably 2×1018 atoms / cm 3 More preferably, 3×10 18 atoms / cm 3 That's 4 x 10 18 atoms / cm 3 That's it, 6 x 10 18 atoms / cm 3 That's it, 8 x 10 18 atoms / cm 3 The above may also be possible. At least a portion, and preferably the entirety, of the primarily doped region 120 a has a higher carrier concentration than the first region 110 .

[0021] In a preferred embodiment, the specific length L is determined so that even when the second region 120 is partially removed from the GaN substrate wafer 100 in addition to the first region 110 to expose the primarily doped region 120a during the manufacturing process of a semiconductor device chip using the GaN substrate wafer 100, the GaN substrate consisting only of the primarily doped region 120a can support the structure of the semiconductor device chip. In this embodiment, the specific length L is at least 20 μm, preferably 40 μm or more, more preferably 50 μm or more, and may be 100 μm or more. In this preferred embodiment, the minimum thickness t120 of the second region 120 is preferably 1.2 times the specific length L or less. In the preferred embodiment, it is desirable that the variation in carrier concentration along the c-axis direction within the primarily doped region 120a be small, and therefore the variation in the total concentration of donor impurities along the c-axis direction within the primarily doped region 120a is preferably within ±25% of the median value, more preferably within ±20%, even more preferably within ±15%, and even more preferably within ±10%. The total concentration of donor impurities in the second region 120, including the primary doped region 120a, is set to 5×10 in order to avoid significant degradation of crystal quality due to excessive doping. 19 atoms / cm 3 Below, and further 2 x 10 19 atoms / cm 3 It can be as follows:

[0022] The dopants added to second region 120 to increase the carrier concentration are donor impurities because donors generally have a higher activation ratio than acceptors in GaN, which is the ratio of the carrier concentration to the dopant concentration in doped GaN. Donor impurities that can be contained in the second region 120 include Group 14 elements such as Si (silicon) and Ge (germanium), and Group 16 elements such as O (oxygen) and S (sulfur).

[0023] The donor impurity contained in the second region 120 or the primarily doped region 120a at the highest concentration is preferably Si or Ge, for two main reasons. First, Si and Ge are donor impurities that exhibit high activation rates, along with O. Second, facet growth is required to obtain heavily O-doped GaN, whereas heavily Si- or Ge-doped GaN can be obtained by c-plane growth.

[0024] Facet growth is a technique for growing (0001)-oriented GaN films with a pitted growth surface, in contrast to c-plane growth, which grows such films with a flat growth surface. Because threading dislocations have the tendency to gather at the bottom of pits, when the second region 120 is formed by facet growth, the uniformity of the threading dislocation density decreases on the Ga-polar surface 102. However, manufacturers of nitride semiconductor devices prefer GaN substrate wafers, which have a highly uniform threading dislocation density. Forming the second region 120 by facet growth is also disadvantageous in terms of productivity of the substrate wafer 100. This is because a facet-grown GaN film requires more processing time to flatten the surface than a c-plane-grown GaN film.

[0025] In one example, by setting the total concentration of donor impurities excluding Si in the primary doped region 120a to 10% or less of the Si concentration, or even 5% or less, or even 1% or less, the carrier concentration in the region can be controlled by adjusting the Si concentration. In a preferred embodiment, the primary doped region 120a is doped with Ge to a concentration of 1×10 18 atoms / cm 3 When the Si concentration in the region is more than 4×10 17 atoms / cm 3 That's all.

[0026] Since the second region 120 is usually grown by HVPE, its impurity concentration satisfies one or more conditions selected from the following (a') to (c'): The conditions for the second region 120 may be independent of the conditions for the first region 110 described above; that is, they may be the same or different. (a') Si concentration is 5×10 16 atoms / cm 3 End (b') O concentration is 3×10 16 atoms / cm 3 below (c') H concentration is 1×10 17 atoms / cm 3 below

[0027] 3, regrowth interface 103 between first region 110 and second region 120 may be rough. For example, regrowth interface 103 may be roughened by etching the surface of first region 110 before growing second region 120. When the direction perpendicular to regrowth interface 103 from first region 110 to second region 120 is defined as the height direction and the difference in height between the highest point and the lowest point at the regrowth interface is defined as roughness r of the regrowth interface, the roughness r may be, for example, 0.3 μm or more and 12 μm or less. The dislocation density in the Ga-polar surface 102 of the GaN substrate wafer 100 may be 0.5 to less than 2 times, 2 to less than 5 times, or 5 to less than 10 times the dislocation density in the first region 110 near the regrowth interface 103. A method for keeping the dislocation density of the Ga-polar surface 102 within the above range includes roughening the regrowth interface 103. "Near the regrowth interface 103" refers to a region extending from the regrowth interface 103 to 1 μm toward the Ga-polar surface 102. When the regrowth interface 103 is rough, the highest point on the regrowth interface is used as the reference.

[0028] 1 to 3, the edges of the GaN substrate wafer 100 may be chamfered. Furthermore, various markings may be applied to the substrate wafer 100 as needed, such as an orientation flat or notch that indicates the crystal orientation, and an index flat that makes it easy to distinguish between the front and back surfaces.

[0029] Semiconductor devices manufactured using the GaN substrate wafer 100 are basically nitride semiconductor devices, which are semiconductor devices in which the main part of the device structure is formed from a nitride semiconductor. Nitride semiconductors are also called nitride III-V compound semiconductors, group III nitride compound semiconductors, GaN-based semiconductors, etc., and include GaN as well as compounds in which part or all of the gallium in GaN is replaced with other Group 13 elements of the periodic table (B, Al, In, etc.).

[0030] There is no limitation on the types of nitride semiconductor devices that can be manufactured using the GaN substrate wafer 100, and examples include light-emitting devices such as laser diodes (LDs) and light-emitting diodes (LEDs), and electronic devices such as rectifiers, bipolar transistors, field-effect transistors, and high-electron-mobility transistors (HEMTs). When a nitride semiconductor device is manufactured using the GaN substrate wafer 100, the GaN substrate wafer 100 is prepared as shown in FIG. 4(a), and then an epitaxial film 300 including at least an n-type nitride semiconductor layer 310 and a p-type nitride semiconductor layer 320 is grown on the Ga-polar surface 102 by metal-organic vapor phase epitaxy (MOVPE) as shown in FIG. 4(b), thereby forming an epitaxial wafer.

[0031] After semiconductor processes that may include etching, ion implantation, electrode formation, protective film formation, etc. are performed, the epitaxial wafer is divided into nitride semiconductor device chips. However, in order to thin the epitaxial wafer before division, a first region 110 of the GaN substrate wafer 100 is usually removed by grinding, etching, or the like, as shown in FIG. 4(c). This thinning process may be performed so that a ring-shaped thick portion remains on the outer periphery of the epitaxial wafer, i.e., the first region 110 of the GaN substrate wafer 100 can be removed only from the portion excluding the outer periphery of the epitaxial wafer. 4(c), the second region 120 is also partially removed from the GaN substrate wafer 100 so that the primarily doped region 120a is exposed on the N-polar surface side of the thinned epitaxial wafer, leaving only the primarily doped region 120a. After an electrode is formed on the surface of the exposed primarily doped region 120a, the epitaxial wafer 300 may be divided.

[0032] 2. GaN substrate wafer manufacturing method Next, a method for manufacturing a GaN substrate wafer according to another embodiment of the present invention will be described. The manufacturing method described below is a preferred mode for manufacturing the GaN substrate wafer according to one embodiment of the present invention described above. Furthermore, a preferred mode of the GaN substrate wafer obtained by the manufacturing method of the GaN substrate wafer described below is the GaN substrate wafer described above. The GaN substrate wafer 100 according to the embodiment can be preferably manufactured using the method described below. This method is applied to the manufacture of a GaN substrate wafer having an N-polar side and a Ga-polar side with a regrowth interface therebetween, and includes the following steps: (ii') a second step of growing a (0001)-oriented second GaN thick film on the substrate by HVPE, and then slicing the second GaN thick film to obtain a second c-plane GaN wafer; (iii') a third step of growing a (0001)-oriented GaN film with a thickness of 500 μm or less on the second c-plane GaN wafer by HVPE, wherein the GaN film has a region having a higher total concentration of donor impurities than the second c-plane GaN wafer.

[0033] Furthermore, it is preferable to add the first step as the process for manufacturing the substrate in the second step, and therefore the first step described below is optional. (i) a first step of growing a first GaN thick film made of intentionally undoped GaN and having a (0001) orientation on a seed wafer by HVPE, and processing the first GaN thick film to obtain at least one first c-plane GaN wafer. (ii) a second step of growing a second GaN thick film, consisting of intentionally undoped GaN and having a (0001) orientation, on the first c-plane GaN wafer obtained in the first step by HVPE, and slicing a second c-plane GaN wafer from the second GaN thick film. (iii) A third step of growing a (0001)-oriented GaN film having a thickness of 500 μm or less on the second c-plane GaN wafer obtained in the second step by HVPE to obtain a stacked structure, with at least a portion of the GaN film being doped to a higher total concentration of donor impurities than the second c-plane GaN wafer. In this specification, "on the wafer" is synonymous with "on the surface of the wafer."

[0034] The first to third steps will be described in more detail below. In the first step, a seed wafer 1 (see Fig. 5(a)) is prepared, and a first GaN thick film 2 made of intentionally undoped GaN with a (0001) orientation is grown on it by HVPE (see Fig. 5(b)). The first GaN thick film 2 is then processed to obtain at least one first c-plane GaN wafer 3 (see Fig. 5(c)).

[0035] An example of the seed wafer 1 is a c-plane sapphire wafer, preferably one with a delamination layer on its main surface. For example, a GaN layer several hundred nanometers thick is grown on the c-plane sapphire wafer via a low-temperature buffer layer by MOVPE, and then a Ti (titanium) layer several tens of nanometers thick is formed on the GaN layer by vacuum deposition. After that, the wafer is annealed in a mixed gas of 80% H2 (hydrogen gas) and 20% NH3 (ammonia) at 1060°C for 30 minutes, thereby forming a c-plane sapphire wafer with a delamination layer. The seed wafer 1 may be a c-plane GaN wafer manufactured in a separate process.

[0036] The first GaN thick film 2 is grown to a thickness that allows at least one free-standing c-plane GaN wafer to be fabricated by processing the first GaN thick film 2. In a preferred example, the first GaN thick film 2 is grown to a thickness of several mm or more, and at least two first c-plane GaN wafers 3 are sliced ​​therefrom. 6(a) is a cross-sectional view showing one of the first c-plane GaN wafers 3 produced in the first step. However, the first c-plane GaN wafer 3 is not limited to that obtained in the first step. In the second step, as shown in FIG. 6(b), a second GaN thick film 4 made of intentionally undoped GaN and having a (0001) orientation is grown by HVPE on the Ga-polar face of the first c-plane GaN wafer 3. Then, as shown in FIG. 6(c), second c-plane GaN wafers 5 are sliced ​​from the second GaN thick film 4. The second GaN thick film 4 is grown to a thickness sufficient to fabricate at least one second c-plane GaN wafer 5 by processing the second GaN thick film 4. In a preferred example, the second GaN thick film 4 is grown to a thickness of several mm or more, and at least two second c-plane GaN wafers 5 are sliced ​​from the second GaN thick film 4.

[0037] As shown in the cross-sectional view of FIG. 7(a), the second c-plane GaN wafer 5 has an N-polar plane and a Ga-polar plane as main surfaces that are parallel to each other. When manufacturing the above-described GaN substrate wafer 100 according to the embodiment, when slicing the second c-plane GaN wafer 5 from the second GaN thick film 4 in the second step, it is preferable, but not essential, that the inclination angle (offcut angle) and inclination direction (offcut direction) of the Ga polarity plane in the second GaN wafer 5 from the (0001) crystal plane be the same as the offcut angle and offcut direction that the GaN substrate wafer 100 should have. The offcut orientation that the GaN substrate wafer 100 should have varies depending on the requirements of the manufacturer of the semiconductor device that uses the GaN substrate wafer 100, and preparing second c-plane GaN wafers 5 having various offcut orientations accordingly can lead to a decrease in the production efficiency of the GaN substrate wafers 100. It should also be noted that the offcut orientation of the second c-plane GaN wafer 5 can change the optimal conditions for growing the GaN film 6 on the second c-plane GaN wafer 5 by HVPE in the next third step.

[0038] The initial thickness t5i of the second c-plane GaN wafer 5 may be thinner than the usual thickness of a GaN substrate wafer used in the manufacture of nitride semiconductor devices, because, unlike a GaN substrate wafer that must withstand a semiconductor process consisting of multiple steps, the second c-plane GaN wafer 5 only needs to be undamaged before the next third step. For example, when the diameter of the second c-plane GaN wafer 5 is about 2 inches, its initial thickness t5i is preferably 300 μm or less, and may be 250 μm or less, or even 200 μm or less. By reducing the initial thickness t5i of the second c-plane GaN wafer 5, the number of second c-plane GaN wafers 5 that can be sliced ​​from the second GaN thick film 4 can be increased.

[0039] 7(b), a (0001)-oriented GaN film 6 having a thickness of 500 μm or less is grown by HVPE on the Ga-polar plane of the second c-plane GaN wafer 5 to obtain a stacked structure. At this time, a regrowth interface is formed between the second c-plane GaN wafer 5 and the GaN film 6. Typically, the Ga polar surface of the second c-plane GaN wafer 5 is flattened by grinding, polishing, CMP, or other suitable techniques before growing the GaN film 6 (flattening step). In one example, the Ga polar surface of the second c-plane GaN wafer 5 may be planarized and then further roughened by etching (roughening step), after which the GaN film 6 may be grown. The dislocation density of the second c-plane GaN wafer 5 is 10 6 cm -2 If the Ga-polar surface is roughened within the first half, the dislocation density of the GaN film 6 grown thereon will not be significantly reduced. Rather, the dislocation density of the GaN film 6 will be at least as high as that of the second c-plane GaN wafer 5, specifically, 0.5 to less than 2 times the dislocation density of the Ga-polar surface of the second c-plane GaN wafer 5, or even higher. The advantage of roughening the Ga polar surface of the second c-plane GaN wafer 5 is that the stacked structure formed by the growth of the GaN film 6 is less likely to crack, and the frequency of crack occurrence can be less than one-tenth of that when the Ga polar surface is not roughened.

[0040] When HCl (hydrogen chloride) is used as an etching gas, the Ga polar surface of GaN can be roughened without using an etching mask. If an HCl supply line for etching is provided in the HVPE apparatus used to grow the GaN film 6, the Ga polar surface of the second c-plane GaN wafer 5 can be roughened in the reactor of the HVPE apparatus immediately before the growth of the GaN film 6. When HCl is used as the etching gas, the preferred etching conditions are as follows: The HCl partial pressure is, for example, 0.002 to 0.05 atm. The H2 partial pressure is, for example, 0.2 to 0.8 atm. The NH3 partial pressure is, for example, 0.01 to 0.05 atm. By flowing NH3, the Ga polarity surface of GaN is roughened more uniformly. The etching temperature is, for example, 900 to 1050°C. The etching time is, for example, 1 to 60 minutes.

[0041] When the roughness of the Ga polar surface of the second c-plane GaN wafer after etching is defined as the difference in height between the highest point and the lowest point, the roughness can be, for example, 0.3 to 12 μm. In etching using HCl, when conditions other than the etching time are fixed, the roughness of the Ga polarity surface of the second c-plane GaN wafer tends to increase with increasing etching time. Curiously, when the Ga polarity plane is etched with HCl to a roughness of 0.6 to 12 μm, the dislocation density of the GaN film 6 grown thereon is several times to up to 10 times higher than that of the second c-plane GaN wafer 5. Therefore, taking into consideration production efficiency, it is preferable to determine the etching time when using HCl as the etching gas so that the roughness of the Ga polarity plane does not exceed 0.5 μm.

[0042] For example, when etching the Ga polar face of the second c-plane GaN wafer 5 under conditions of HCl partial pressure 0.01-0.02 atm, H2 partial pressure 0.05-0.08 atm, NH3 partial pressure 0.01-0.03 atm, and temperature 970-1000°C, the preferred etching time is 5 minutes or less. In one example, the Ga polar surface of the second c-plane GaN wafer 5 may be roughened by forming an etching mask patterned by photolithography and then dry etching. Typical examples of suitable etching mask patterns include dot patterns and net patterns. The dry etching may be RIE (reactive ion etching) using Cl2 (chlorine gas) or a chlorine-containing compound as the etching gas.

[0043] The GaN film 6 has a doped portion having a higher total concentration of donor impurities than the second c-plane GaN wafer 5. The carrier concentration in at least a part of the doped portion is 1×10 18 cm -3 More than that, and even 2 x 10 18 cm -3 Above, and 3x10 18 cm -3 More than that, and 4x10 18 cm -3 Above, and 6x10 18 cm -3 Above, and even 8 x 10 18 cm -3 Preferably used donor impurities are Si and Ge. In a preferred example, a specially doped region 6a may be provided in the GaN film 6. The specially doped region 6a has its upper end (the end on the <0001> side) on the upper surface of the GaN film 6, and preferably has a region length in the c-axis direction of 1 μm or more, and the total concentration of donor impurities within the region is 1×10 18 atoms / cm 3 In other words, this region length is the region where the total concentration of donor impurities is 1×10 18 atoms / cm 3 This means the thickness (height in the thickness direction) of the region that is equal to or greater than this.

[0044] The region length of the specifically doped region 6a in the c-axis direction can be 5 μm or more, 10 μm or more, 20 μm or more, 25 μm or more, 50 μm or more, 75 μm or more, 100 μm or more, 150 μm or more, 200 μm or more, and the like. The total concentration of donor impurities in the specially doped region 6a is preferably 2×10 18 atoms / cm 3 More preferably, 3×10 18 atoms / cm 3 That's 4 x 10 18 atoms / cm 3 That's it, 6 x 10 18 atoms / cm 3 That's it, 8 x 10 18 atoms / cm 3 The above may also be possible. At least a part of, and preferably the entire, specially doped region 6 a has a higher carrier concentration than the second c-plane GaN wafer 5 .

[0045] In a preferred embodiment, the length of the specifically doped region 6 a in the c-axis direction of the GaN film 6 can be set to 20 μm or more, 50 μm or more, 100 μm or more, so that a region having a sufficient carrier concentration can be provided with a thickness of 20 μm or more, 50 μm or more, 100 μm or more on the Ga-polar side of the GaN substrate wafer to be manufactured. In this preferred embodiment, it is desirable that there be no variation in the carrier concentration along the c-axis direction in the specifically doped region 6 a. Therefore, the variation in the total concentration of donor impurities along the c-axis direction in the specifically doped region 6 a is preferably within ±25% of the median value, more preferably within ±20%, even more preferably within ±15%, and even more preferably within ±10%.

[0046] The GaN film 6 may have an intermediate region 6b between the specifically doped region 6a and the second c-plane GaN wafer 5. The intermediate region 6b is not subject to any restrictions regarding doping. For example, only a portion of the intermediate region 6b may be intentionally doped. Here, the intermediate region corresponds to a region of the GaN film 6 that does not correspond to the specifically doped region 6a. In other words, the total concentration of donor impurities in the intermediate region is 1×10 18 atoms / cm 3 is less than. In one example, the intermediate region 6b may be at least partially doped with the same type of dopant as that added to the specifically doped region 6a, and further, the concentration of the dopant may increase continuously or stepwise within the intermediate region 6b as it approaches the specifically doped region 6a. The thickness of the intermediate region 6b may be determined so that the total thickness of the GaN film 6 including the specifically doped region 6a and the intermediate region 6b does not exceed 500 μm, but is preferably 50 μm or less, more preferably 40 μm or less, even more preferably 20 μm or less, and may be 10 μm or less.

[0047] In one example, by setting the total concentration of donor impurities excluding Si in the specific doped region 6a to 10% or less of the Si concentration, or even 5% or less, or even 1% or less, the carrier concentration in the region can be controlled by adjusting the Si concentration. The specific doped region 6a is doped with Ge, and the concentration is 1×10 18 atoms / cm 3 When the Si concentration in the region is more than 4×10 17 atoms / cm 3 That's all. The maximum total concentration of donor impurities in the GaN film 6 is set to 5×10 in order to avoid a significant deterioration in crystal quality due to excessive doping. 19 atoms / cm 3 Below, and further 2 x 10 19 atoms / cm 3 Below, and further 1×10 19 atoms / cm 3 It can be as follows:

[0048] When producing the above-described GaN substrate wafer 100 according to the embodiment, the growth thickness t6g of the GaN film 6 is set between 20 μm and 500 μm, taking into consideration the design thickness of the second region 120 of the GaN substrate wafer. The growth thickness t6g of the GaN film 6 may be the same as the design thickness of the second region 120 in the GaN substrate wafer to be manufactured, but is preferably larger than the design thickness. This is because doing so enables planarization of the surface of the GaN film 6 in the subsequent thinning step. In this case, the growth thickness t6g of the GaN film 6 is preferably 50 μm or more larger than the design thickness of the second region 120, more preferably 100 μm or more larger, and preferably does not exceed the design thickness by more than 200 μm. In other words, the difference in thickness of the GaN film 6 before and after the thinning step is preferably 200 μm or less. When the growth thickness t6g of GaN film 6 is 50 μm or more larger than the design thickness of second region 120, the thickness of GaN film 6 is reduced by 50 μm or more in the subsequent thinning step. In other words, the difference in thickness of GaN film 6 before and after the thinning step is 50 μm or more.

[0049] Since the growth thickness t6g does not exceed 500 μm, the GaN film 6 can be formed in a relatively short time, and therefore, it is possible to grow the GaN film 6 on a large number of second c-plane GaN wafers 5 at once without worrying about the by-product NH4Cl (ammonium chloride) clogging the exhaust system of the HVPE apparatus. Therefore, the throughput in the third step can be extremely high. Furthermore, the shorter time required to form the GaN film 6 may also contribute to reducing costs associated with cleaning and maintaining the HVPE reactor, since the reactor will deteriorate more slowly and have a longer useful life when the time required for each growth step is shorter.

[0050] After the third step, if necessary, a thinning step is carried out to thin the laminated structure obtained in the third step, as shown in FIG. 7(c). In Figure 7(c), the thickness of the second c-plane GaN wafer 5 is reduced from the initial thickness t5i to the final thickness t5f, and the thickness of the GaN film 6 is reduced from the growth thickness t6g to the final thickness t6f, but only either the second c-plane GaN wafer 5 or the GaN film 6 may be processed in the thinning process. When manufacturing the above-described GaN substrate wafer 100 according to the embodiment, in the thinning step, the thicknesses of the second c-plane GaN wafer 5 and the GaN film 6 are reduced until they match the design thicknesses of the first region 110 and the second region 120 in the GaN substrate wafer, respectively. The technique used to process the second c-plane GaN wafer 5 and / or the GaN film 6 in the thinning step can be appropriately selected from grinding, lapping, CMP, dry etching, wet etching, and the like.

[0051] When the offcut orientation of the GaN substrate wafer 100 to be manufactured is the same as the offcut orientation of the second c-plane GaN wafer 5, the N-polarity surface of the layered structure to be processed, i.e., the back surface of the second c-plane GaN wafer 5, can be used as the reference for the plane orientation. When the offcut orientation of the GaN substrate wafer 100 to be manufactured differs from that of the second c-plane GaN wafer 5, i.e., when at least one of the offcut angle and the offcut direction differs, the crystal orientation of the layered structure to be processed is confirmed using an X-ray diffraction device.

[0052] By using the manufacturing method described above, the GaN substrate wafer 100 according to the embodiment can be produced with a high yield. The reason is that there is no process for growing intentionally doped thick GaN films to thicknesses on the order of mm by HVPE, nor a process for slicing the GaN thick films grown in this way. In the first and second steps, the GaN thick film may be grown by HVPE to a thickness on the order of mm. However, the first GaN thick film 2 and the second GaN thick film 4 grown in these steps are not intentionally doped, and therefore morphology abnormalities and cracks are unlikely to occur during growth, and the frequency of cracking during slicing is also low. On the other hand, the GaN film 6 grown in the third step is intentionally doped, but the growth thickness of the GaN film 6 is only 500 μm or less, so morphology abnormalities and cracks are unlikely to occur during growth. Moreover, the GaN film 6 does not need to be sliced. That is, there is no need to perform a slice process in the thinning step described above. In particular, it is preferable that the GaN film 6 formed in the third step undergo the thinning step without being sliced.

[0053] Furthermore, according to the manufacturing method described above, it is possible to reduce the variation in the offcut angle within the main surface of the GaN substrate wafer 100. The reason is that the warpage of the second thick GaN film 4, which is grown homoepitaxially without intentional doping on the first c-plane GaN wafer 3, which is not intentionally doped, can be extremely small, and therefore the variation in offcut angle can be extremely small in the second c-plane GaN wafer 5 sliced ​​from the second thick GaN film 4. The change in warpage caused by laminating the GaN film 6 on the second c-plane GaN wafer 5 in the third step is small, because the growth thickness of the GaN film 6 is small, at 500 μm or less.

[0054] In producing the GaN substrate wafer 100 by the above-described method, an HVPE apparatus that can be used in the first to third steps will be described below with reference to FIG. 8 includes a hot-wall reactor 11, a gallium reservoir 12 and a susceptor 13 disposed within the reactor, and a first heater 14 and a second heater 15 disposed outside the reactor. The first heater 14 and the second heater 15 each surround the reactor 11 in an annular shape.

[0055] The reactor 11 is a quartz tube chamber. Inside the reactor 11, there are a first zone Z1 heated mainly by a first heater 14 and a second zone Z2 heated mainly by a second heater 15. An exhaust pipe PE is connected to the reactor end on the second zone Z2 side. The gallium reservoir 12 located in the first zone Z1 is a quartz vessel having a gas inlet and a gas outlet. The susceptor 13 disposed in the second zone Z2 is made of, for example, graphite. A mechanism for rotating the susceptor 13 can be provided as desired.

[0056] To grow GaN in the HVPE apparatus 10, a seed is placed on the susceptor 13, and the inside of the reactor 11 is heated by the first heater 14 and the second heater 15. At the same time, NH3 (ammonia) diluted with a carrier gas is supplied to the second zone Z2 through the ammonia inlet pipe P1, and HCl (hydrogen chloride) diluted with a carrier gas is supplied to the gallium reservoir 12 through the hydrogen chloride inlet pipe P2. This HCl reacts with metallic gallium in the gallium reservoir 12, and the resulting GaCl (gallium chloride) is transported to the second zone Z2 through the gallium chloride inlet pipe P3.

[0057] In the second zone Z2, NH3 reacts with GaCl, and the resulting GaN crystallizes on a seed placed on a susceptor 13. When doping the growing GaN, a doping gas diluted with a carrier gas is introduced into the second zone Z2 in the reactor 11 through a dopant introduction pipe P4. The portions of the ammonia introduction pipe P1, the hydrogen chloride introduction pipe P2, the gallium chloride introduction pipe P3, and the dopant introduction pipe P4 that are disposed inside the reactor 11 are made of quartz. As a carrier gas for diluting NH3, HCl and the doping gas, H2 (hydrogen gas), N2 (nitrogen gas) or a mixed gas of H2 and N2 is preferably used.

[0058] The preferred conditions for growing GaN using the HVPE apparatus 10 are as follows. The temperature of the gallium reservoir is, for example, 500 to 1000°C, preferably 700°C or higher, and preferably 900°C or lower. The susceptor temperature is, for example, 900 to 1100°C, preferably 930°C or higher, more preferably 950°C or higher, and preferably 1050°C or lower, more preferably 1020°C or lower.

[0059] The V / III ratio, which is the ratio of the NH3 partial pressure to the GaCl partial pressure in the reactor, is, for example, 1 to 20, preferably 2 or more, more preferably 3 or more, and is preferably 10 or less. If the V / III ratio is too large or too small, the morphology of the GaN growth surface will deteriorate, which can lead to a decrease in crystal quality.

[0060] The incorporation efficiency of certain impurities into GaN crystals strongly depends on the crystal orientation of the growth surface. The uniformity of the concentration of such impurities decreases within GaN crystals grown under conditions with poor growth surface morphology. This is due to the presence of facets with various orientations on growth surfaces with poor morphology. A typical example of an impurity whose incorporation efficiency into GaN crystals varies depending on the crystal orientation of the growth surface is O (oxygen), but the inventors have discovered that a similar tendency also exists for Ge (germanium). As will be described later, this is why it is important not to lower the molar ratio of H2 in the carrier gas too much when doping the GaN film 6 with Ge in the third step.

[0061] In addition, using a V / III ratio that is too low increases the concentration of nitrogen vacancies in the growing GaN crystal. The effects of nitrogen vacancies on GaN crystals, GaN substrates using them, and nitride semiconductor devices formed on those GaN substrates are not yet clear, but because nitrogen vacancies are point defects, the concentration should be as low as possible.

[0062] The growth rate of GaN can be controlled by the product of the partial pressures of NH3 and GaCl in the reactor. The growth rate is, for example, 20 to 200 μm / h, and when growing GaN film 6 in the third step, the growth rate is preferably 120 μm / h or less, more preferably 100 μm / h or less, and even more preferably 80 μm / h or less. This is because an excessively high growth rate deteriorates the surface morphology of the growing GaN. When intentionally doping the GaN film 6 in the third step, in order to prevent deterioration of the morphology of the growth surface, it is preferable to gradually increase the supply rate of the doping gas to a predetermined value over several minutes to several tens of minutes from the start of supply. For the same reason, it is preferable to start supplying the doping gas when the GaN film 6 has grown to at least several μm.

[0063] As the doping gas for Si doping, SiH4 (silane), SiH3Cl (monochlorosilane), SiH2Cls (dichlorosilane), SiHCl3 (trichlorosilane) or SiCl4 (tetrachlorosilane) can be preferably used. As the doping gas for Ge doping, GeH4 (germane), GeH3Cl (monochlorogermane), GeH2Cls (dichlorogermane), GeHCl3 (trichlorogermane) or GeCl4 (tetrachlorogermane) can be preferably used.

[0064] The molar ratio of H2 in the carrier gas can affect the impurity concentration of the grown GaN. The molar ratio of H2 in the carrier gas is calculated based on the flow rate of each gas species supplied as a carrier gas from outside the reactor to inside the reactor. Table 1 below shows the results of an investigation into how the impurity concentration of Si- or Ge-doped GaN grown by HVPE at approximately the same growth rate using the same V / III ratio on the Ga-polar face of a c-plane GaN wafer cut from a GaN crystal grown by HVPE on a sapphire substrate changes depending on the molar ratio of H in the carrier gas.

[0065] [Table 1]

[0066] As can be seen from Table 1, the O concentration in Si-doped GaN is 10% or less of the Si concentration when the carrier gas is only N2. Since the only donor other than Si is essentially O, this is equivalent to the total concentration of donors excluding Si being 10% or less of the Si concentration. When the molar ratio of H2 in the carrier gas is increased, the O concentration in Si-doped GaN becomes even lower, reaching less than 1% of the Si concentration when the molar ratio is 0.7.

[0067] On the other hand, in Ge-doped GaN, when the molar ratio of H2 in the carrier gas is 0 (zero), the Ge concentration is more than 10 times higher than when the molar ratio is 0.7, and the ratio of Ge concentration to Si concentration is also higher. Therefore, at first glance, a lower molar ratio of H2 in the carrier gas seems preferable. However, when the molar ratio of H2 in the carrier gas is 0.7, the O concentration is one order of magnitude higher in the former case than in the latter case. The inventors have confirmed that the morphology of the GaN growth surface is worse when the former condition is used, and that this is also the reason for the higher Ge concentration. When the molar ratio of H2 in the carrier gas is too low, GaN crystals with low uniformity of Ge concentration are grown.

[0068] Therefore, when growing Ge-doped GaN, it is preferable to set the molar ratio of H2 in the carrier gas to about 0.3 to 0.7. In the Ge-doped GaN grown in this way, the Ge concentration is 1 × 10 18 atoms / cm 3 When the Si concentration is 4×10 17 atoms / cm 3 That's all. The O concentration in GaN grown by HVPE, whether doped with Si or Ge, tends to decrease with increasing H2 molar ratio in the carrier gas, and decreases by 2 × 10 16 atoms / cm 3 Below, and further 1×10 16 atoms / cm 3 This is due to the improved surface morphology during growth.

[0069] GaN grown using HVPE apparatus 10 may contain O and Si at concentrations detectable by SIMS, even when not intentionally doped. The source of Si is the quartz (SiO2) used in the reactor and its piping, and the source of O is the quartz and / or moisture remaining or infiltrating the reactor. 8, the components arranged in the reactor 11 can be made of quartz and carbon, as well as SiC (silicon carbide), SiNx (silicon nitride), BN (boron nitride), alumina, W (tungsten), Mo (molybdenum), etc. In this way, the concentration of each impurity except for Si, O, and H in the GaN grown using the HVPE apparatus 10 is 5×10 unless intentional doping is performed. 15 atoms / cm 3 It can be as follows: [Example]

[0070] The present invention will be described in more detail below with reference to examples, but the present invention is not limited to these examples and various applications are possible within the scope of the technical concept of the present invention.

[0071] [Example] <Creating a second c-plane GaN wafer (second step)> First, a GaN seed was placed on the susceptor of the HVPE reactor. The GaN seed was a GaN template substrate on sapphire prepared by MOCVD (metal organic chemical vapor deposition), with the c-plane side serving as the growth surface. Next, N2, H2 and NH3 were supplied into the reactor so that the partial pressures thereof became 0.67 atm, 0.31 atm and 0.02 atm, respectively, while the inside of the reactor was heated by a heater installed outside the reactor. After the susceptor temperature reached 1000 °C, the susceptor temperature was kept constant and GaN was grown. The temperature of the gallium reservoir was set at 900 °C. The carrier gas supplied into the reactor during growth was 69 mol% H2 and the rest was N2. GaCl and NH3 were supplied into the reactor such that their partial pressures were 7.9×10 -3 atm and 0.024 atm, respectively, and a second GaN thick film containing no donor impurities was grown to a thickness of about 2.5 mm. The growth rate of the second GaN thick film calculated from the thickness and the growth time was about 40 μm / h. Next, this GaN thick film was sliced parallel to the c-plane to obtain a wafer, and then the Ga-polar surface of the wafer was subjected to planarization by grinding followed by CMP finishing.The slice damage on the N-polar surface side of the wafer was removed by etching. Further, by cutting the wafer, a second c-plane GaN wafer having a thickness of 350 μm and containing no donor impurities was fabricated. Note that if the thickness of the second GaN thick film is increased by increasing the growth time, two or more second c-plane GaN wafers can be obtained.

[0072] <Fabrication of GaN Substrate Wafer (Third Step)> Using the second c-plane GaN wafer as a seed, the c-plane side was set as the growth surface on the susceptor of the HVPE apparatus. Next, while supplying N2, H2, and NH3 into the reactor such that their partial pressures were 0.25 atm, 0.73 atm, and 0.02 atm, respectively, the inside of the reactor was heated by a heater installed outside the reactor. After the susceptor temperature reached 100 °C, the susceptor temperature was kept constant and GaN was grown. The temperature of the gallium reservoir was set at 900 °C. The carrier gas supplied into the reactor during growth was 73 mol% H2 and the rest was N2. For 1 minute immediately after the start of growth, as roughening, HCl and NH3 were supplied into the reactor such that their partial pressures were 1.7×10 -2 atm and 0.024 atm, respectively, and no intentional doping gas was supplied. After the roughening, GaCl and NH3 were added at partial pressures of 7.9 × 10 for 60 minutes. -3 The pressure in the reactor was 0.024 atm and 0.024 atm, and no doping gas was intentionally supplied. 61 minutes after the start of growth, the supply of SiH2Cl2 into the reactor was started, and the supply rate of SiH2Cl2 was gradually increased over 5 minutes. After the supply rate of SiH2Cl2 reached a predetermined value, GaCl, NH3, and SiH2Cl2 were supplied at partial pressures of 7.9 × 10 -3 atm, 0.024 atm and 1.9 × 10 -8 The reactor was supplied with Si at 1000 keV and a GaN film doped with Si as a donor impurity was grown to a thickness of approximately 0.4 mm. The surface of the GaN film was polished without slicing, yielding a Si-doped GaN substrate wafer with a diameter of approximately 60 mm. The growth rate of the Si-doped GaN film calculated from the thickness and growth time was approximately 40 μm / h.

[0073] The GaN substrate wafer obtained by the above manufacturing method is a two-layer substrate having a regrowth interface, a first region on the N-polarity side, and a second region on the Ga-polarity side. The carrier concentration of the Ga-polarity side, i.e., the GaN film, is 4.0×10 18 cm -3 As shown in Figure 9, the carrier concentration on the Ga polarity side was 1.0 × 10 18 cm -3 This is approximately 4.0 x 10 excluding the edges. 18 cm -3 The product was stable at 100°C. No cracks or surface roughness were observed.

[0074] [Reference example] In the above example, the growth time of the Si-doped GaN film was extended by approximately six times, resulting in a GaN film thickness of approximately 2.5 mm. Abnormal growth areas were observed in the resulting GaN substrate wafer (two-layer substrate). The abnormal growth areas referred to here were deep depressions caused by SiNx scattered across several parts of the substrate surface.

[0075] While the present invention has been described above with reference to specific embodiments, these embodiments are presented as examples and do not limit the scope of the present invention. Each embodiment described in this specification can be modified in various ways without departing from the spirit of the invention, and can be combined with features described in other embodiments to the extent possible. [Explanation of symbols]

[0076] 1 seed wafer 2 First GaN thick film 3. First c-plane GaN wafer 4 Second GaN thick film 5 Second c-plane GaN wafer 6 GaN film 6a Specially doped region 6b Intervening region 10 HVPE equipment 11. Reactor 12 Gallium reservoir 13 Susceptor 14 First heater 15 Second heater 100 GaN substrate wafers 101 N polar plane 102 Ga polar surface 103 Regrowth interface 110 First area 120 Second area 120a Main doped region 200 Epitaxial film 210 n-type nitride semiconductor layer 220 p-type nitride semiconductor layer L Specific length

Claims

1. A (0001) oriented GaN substrate wafer, a first region provided on the N-polarity side and a second region provided on the Ga-polarity side across a regrowth interface; The minimum thickness of the second region is 20 μm or more and 300 μm or less, the second region includes a region having a higher total concentration of donor impurities than the first region; the regrowth interface is rough; The roughness of the rough surface is 0.3 μm or more and 0.5 μm or less. GaN substrate wafer.

2. The carrier concentration of at least a part of the region having a higher donor impurity concentration than the first region is 1×10 18 cm -3 The GaN substrate wafer according to claim 1 .

3. 3. The GaN substrate wafer according to claim 1, wherein the GaN substrate wafer satisfies any one of the following conditions (1) to (3): (1) It has a diameter of 50 mm or more and 55 mm or less and a thickness of 250 μm or more and 450 μm or less. (2) It has a diameter of 100 mm or more and 105 mm or less and a thickness of 350 μm or more and 750 μm or less. (3) It has a diameter of 150 mm or more and 155 mm or less and a thickness of 450 μm or more and 800 μm or less.

4. 4. The GaN substrate wafer according to claim 1, wherein the impurity contained in the second region at the highest concentration is Si or Ge.

5. 5. The GaN substrate wafer according to claim 1, wherein the impurity concentration of at least one of the first region and the second region satisfies one or more conditions selected from the following (a) to (c): (a) Si concentration is 5×10 16 atoms / cm 3 End (b) O concentration が3×10 16 atoms / cm 3 the following (c) H concentration が1×10 17 atoms / cm 3 the following

6. In the first region, the Si concentration is 1×10 18 atoms / cm 3 The GaN substrate wafer according to any one of claims 1 to 5, wherein the GaN substrate wafer has a thickness of less than 100 nm.

7. 7. The GaN substrate wafer according to claim 1, wherein the dislocation density in the Ga-polar primary surface is 0.5 to less than 2 times the dislocation density in the first region in the vicinity of the regrowth interface.

8. 8. The GaN substrate wafer according to claim 1, wherein the Ga-polar main surface is a flat surface.

9. The second region has a total donor impurity concentration of 1×10 18 atoms / cm 3 9. The GaN substrate wafer according to claim 1, having a main doped region of at least one of the above.

10. 10. The GaN substrate wafer according to claim 9, wherein in said primarily doped region, the total concentration of donor impurities excluding Si is 10% or less of the Si concentration.

11. In the main doped region, the Ge concentration is 1×10 18 atoms / cm 3 or more, and the Si concentration is 4×10 17 atoms / cm 3 The GaN substrate wafer according to claim 9 or 10.

12. 12. The GaN substrate wafer according to claim 9, wherein in the second region, a region within a specific length from a main surface on the GaN polarity side is the primarily doped region, and the specific length is 1 μm or more.

13. The GaN substrate wafer of claim 12 , wherein the minimum thickness of said second region is equal to or less than 1.2 times said specified length.

14. 14. The GaN substrate wafer according to claim 9, wherein the variation in total donor impurity concentration along the c-axis direction in the primarily doped region is within a range of ±25% from the median value.

15. 15. The GaN substrate wafer according to claim 9, wherein the impurity contained in the primary doped region at the highest concentration is Si or Ge.

16. 16. An epitaxial wafer comprising: the GaN substrate wafer according to claim 1; and a nitride semiconductor layer epitaxially grown on the Ga polar plane of the GaN substrate wafer.

17. A method for producing an epitaxial wafer, comprising the steps of: preparing the GaN substrate wafer according to any one of claims 1 to 15; and growing a nitride semiconductor layer on a Ga-polar plane of the GaN substrate wafer to obtain an epitaxial wafer.

18. 16. A method for manufacturing a semiconductor device, comprising: preparing the GaN substrate wafer according to any one of claims 1 to 15; growing a nitride semiconductor layer on a Ga-polar face of the GaN substrate wafer to obtain an epitaxial wafer; and removing at least a portion of the first region of the GaN substrate wafer.

19. a second step of growing a (0001)-oriented second thick GaN film on the substrate by HVPE and then slicing the second thick GaN film to obtain a second c-plane GaN wafer; a third step of growing a (0001)-oriented GaN film on the second c-plane GaN wafer by HVPE to a thickness of 500 μm or less; and the GaN film has a region having a higher total concentration of donor impurities than the second c-plane GaN wafer, and in the third step, the susceptor temperature is 1100° C. or less.

20. 1. A method for manufacturing a GaN substrate wafer having a first region on an N-polarity side and a second region on a Ga-polarity side across a regrowth interface, comprising: (i) a first step of growing a first thick GaN film, consisting of intentionally undoped GaN and having a (0001) orientation, on a seed wafer by HVPE, and then obtaining at least one first c-plane GaN wafer from the first thick GaN film; (ii) a second step of growing a second thick GaN film, consisting of intentionally undoped GaN and having a (0001) orientation, on the first c-plane GaN wafer by HVPE, and then slicing the second thick GaN film to obtain a second c-plane GaN wafer; (iii) a third step of growing a (0001) oriented GaN film on the second c-plane GaN wafer by HVPE, the GaN film having a thickness of 500 μm or less; and The GaN film has a region having a higher total concentration of donor impurities than the second c-plane GaN wafer.

21. The carrier concentration of at least a part of the region having a higher total concentration of donor impurities than the second c-plane GaN wafer is 1×10 18 cm -3 The method for producing a GaN substrate wafer according to claim 19 or 20.

22. 22. The method for producing a GaN substrate wafer according to claim 19, wherein the GaN substrate wafer satisfies any one of the following conditions (1) to (3): (1) It has a diameter of 50 mm or more and 55 mm or less and a thickness of 250 μm or more and 450 μm or less. (2) It has a diameter of 100 mm or more and 105 mm or less and a thickness of 350 μm or more and 750 μm or less. (3) It has a diameter of 150 mm or more and 155 mm or less and a thickness of 450 μm or more and 800 μm or less.

23. The GaN film has a region length of 1 μm or more in the c-axis direction from the top surface of the GaN film, and a total concentration of donor impurities in the region is 1×10 18 atoms / cm 3 The method for producing a GaN substrate wafer according to any one of claims 19 to 22, having a specifically doped region.

24. 24. The method for producing a GaN substrate wafer according to claim 23, wherein the region length in the c-axis direction of the specifically doped region is 20 μm or more.

25. 25. The method for producing a GaN substrate wafer according to claim 23, wherein the variation in the total concentration of donor impurities along the c-axis direction in the specific doped region is within ±25% of the median value.

26. 26. The method for manufacturing a GaN substrate wafer according to claim 23, wherein the GaN film has an intervening region having a thickness of 50 μm or less between the specific doped region and the second c-plane GaN wafer.

27. 2. The method according to claim 1, wherein the impurity contained in the specific doped region at the highest concentration is Si or Ge.

27. A method for producing a GaN substrate wafer according to any one of 23 to 26.

28. 28. The method for producing a GaN substrate wafer according to claim 23, wherein in the specific doped region, the total concentration of donors excluding Si is 10% or less of the Si concentration.

29. In the specific doped region, the Ge concentration is 1×10 18 atoms / cm 3 or more, and the Si concentration is 4×10 17 atoms / cm 3 The method for producing a GaN substrate wafer according to any one of claims 22 to 28, wherein:

30. 30. The method for producing a GaN substrate wafer according to claim 19, further comprising a thinning step of thinning the GaN film after the third step.

31. 31. The method for producing a GaN substrate wafer according to claim 30, wherein a difference in thickness of the GaN film before and after the thinning step is 200 μm or less.

32. The method for producing a GaN substrate wafer according to any one of claims 19 to 31, wherein the GaN substrate wafer and the second c-plane GaN wafer have different offcut orientations.

33. The method for manufacturing a GaN substrate wafer according to any one of claims 19 to 32, further comprising, between the second step and the third step, a planarization step of planarizing the Ga polar surface of the second c-plane GaN wafer obtained in the second step, and a roughening step of roughening the Ga polar surface by etching.

34. The method for producing a GaN substrate wafer according to any one of claims 30 to 33, wherein the thinning step thins the GaN film without slicing.

Citation Information

Patent Citations

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  • Method for growing group iii nitride crystal

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