Acoustic wave device and module including the same

Abstract

To provide an acoustic wave device suppressing the infiltration of a sealing material into a space 6.SOLUTION: An acoustic wave device 1 includes a wiring board 2, a device chip 3, and a sealing part 5 sealing the device chip, together with the wiring board. The device chip includes a plurality of resonators, a wiring pattern, a bump pad, and a first sealing material infiltration prevention wall B formed between a plurality of the bump pads. The wiring board includes a plurality of bump pads on a wiring board side formed in positions corresponding to the plurality of bump pads, respectively, and a second sealing material infiltration prevention wall C. When A represents a distance between the wiring board and the device chip, B represents a height of the first sealing material infiltration prevention wall, and C represents a height of the second sealing material infiltration prevention wall, A<B+C, A>B, and A>C are satisfied. The first sealing material infiltration prevention wall and the second sealing material infiltration prevention wall are formed in a position where the first and second sealing material infiltration prevention walls do not overlap, in see-through of the top surface in the thickness direction of the device chip.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to an acoustic wave device and a module including the acoustic wave device. [Background technology]

[0002] Patent Document 1 discloses an acoustic wave device that has a hollow space between the acoustic wave device and a substrate, and includes a dam that prevents a sealing material from entering the hollow space from the outside. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-102713 Summary of the Invention [Problem to be solved by the invention]

[0004] By forming a dam so as to surround the IDT (Interdigital Transducer) electrodes and the connection portions in a plan view, it is possible to prevent the sealing material from entering the space of the acoustic wave device.

[0005] However, it is not easy to form a dam that almost completely covers the space between the wiring substrate and the device chip. Flip-chip bonding, which uses ultrasonic waves to bond the bumps while crushing them, has a large manufacturing tolerance for the distance between the wiring substrate and the device chip. Therefore, there is a risk that the device chip will collide with the dam during bonding and be destroyed.

[0006] Furthermore, forming a dam on a wiring substrate that is higher than the distance between the wiring substrate and the device chip hinders miniaturization of the acoustic wave device, because it is necessary to ensure a certain distance between the dam and the mounting area of ​​the device chip to prevent the device chip from colliding with the dam during bonding.

[0007] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to provide an acoustic wave device and a module including the acoustic wave device that prevent an encapsulating material from entering a space in the acoustic wave device without or with reduced adverse effects. [Means for solving the problem]

[0008] The acoustic wave device according to the present disclosure includes: A wiring board; A wiring board is provided opposite the wiring board. , the shape of the main surface is approximately rectangular A device chip; a sealing portion that seals the device chip together with the wiring substrate; Equipped with The device chip comprises: a plurality of resonators; a wiring pattern electrically connecting the plurality of resonators; a plurality of bump pads electrically connected to the wiring pattern; formed between the plurality of bump pads, The bump pads are formed between the four corners of the device chip so as to be approximately parallel to the four sides of the rectangular main surface of the device chip. a first sealing material intrusion prevention wall; Equipped with The wiring board is a plurality of wiring board side bump pads formed at positions corresponding to the plurality of bump pads; The device chip is formed with a plurality of resonators, which are formed continuously or intermittently along the four sides of the substantially rectangular main surface of the device chip, and are substantially parallel to the four sides. A second sealing material intrusion prevention wall; Equipped with When the distance between the wiring substrate and the device chip is A, the height of the first sealing material intrusion prevention wall is B, and the height of the second sealing material intrusion prevention wall is C, A<B+C、A> B, and A>C, The first sealing material intrusion prevention wall and the second sealing material intrusion prevention wall are formed at positions where they do not overlap when seen through from above in the thickness direction of the device chip.

[0009] The condition B<C is regarded as one aspect of the present disclosure.

[0010] In one aspect of the present disclosure, the height of the wiring pattern is the same as B.

[0012] In one aspect of the present disclosure, the second sealing material intrusion prevention wall is made of a metal layer and an insulating layer.

[0013] The second sealing material intrusion prevention wall has a part that is in contact with the device chip when viewed from above in a thickness direction of the device chip. outer edge It is considered one aspect of the present disclosure that the insulating film is formed at a position overlapping the insulating film.

[0014] According to one aspect of the present disclosure, the second sealing material intrusion prevention wall is formed between the plurality of wiring board side bump pads.

[0015] In one aspect of the present disclosure, the second sealing material intrusion prevention wall is disposed closer to a central portion of the device chip than the first sealing material intrusion prevention wall.

[0016] One aspect of the present disclosure is that the second sealing material penetration prevention wall includes a second sealing material penetration prevention wall (inner side) positioned closer to the central portion of the device chip than the first sealing material penetration prevention wall, and a second sealing material penetration prevention wall (outer side) positioned farther from the central portion of the device chip than the first sealing material penetration prevention wall.

[0017] In one aspect of the present disclosure, the device chip is a substrate in which a piezoelectric substrate and a substrate made of sapphire, silicon, alumina, spinel, quartz crystal, or glass are bonded together.

[0018] In one aspect of the present disclosure, the liquid intrusion prevention pattern is formed thinner than the wiring pattern.

[0019] In one aspect of the present disclosure, the device chip has a substrate in which a piezoelectric substrate and a substrate made of sapphire, silicon, alumina, spinel, quartz crystal, or glass are bonded together.

[0020] In one aspect of the present disclosure, the plurality of resonators are surface acoustic wave resonators, and a bandpass filter or a duplexer is formed on the device chip.

[0021] In one aspect of the present disclosure, the plurality of resonators are bulk acoustic resonators, and a band-pass filter or a duplexer is formed on the device chip.

[0022] A module including the acoustic wave device is one aspect of the present disclosure. [Effects of the Invention]

[0023] According to the present disclosure, it is possible to prevent the sealing material from penetrating into the electrodes without causing any adverse effects or while reducing the adverse effects. [Brief explanation of the drawings]

[0024] [Figure 1] 1 is a cross-sectional view of an acoustic wave device according to a first embodiment. [Figure 2] 2 is a diagram showing a main surface of a device chip according to the first embodiment. FIG. [Figure 3] FIG. 3 is a diagram showing a cross-sectional view taken along the line DD shown in FIG. 2. [Figure 4] 13 is a diagram showing an example in which the outer edge portion of the device chip 3 and a part of the second sealing material intrusion prevention wall C are arranged to overlap in a top see-through view. FIG. [Figure 5] 10 is a diagram showing an example in which second sealing material intrusion prevention walls C are formed intermittently so as to surround a plurality of resonators. FIG. [Figure 6] 13 is a diagram showing an example in which the second sealing material intrusion prevention wall C is disposed closer to the center of the device chip 3 than the first sealing material intrusion prevention wall B. FIG. [Figure 7] 10A and 10B are diagrams showing examples in which the second sealing material intrusion prevention wall C is disposed at a position closer to the center of the device chip 3 than the first sealing material intrusion prevention wall B, and at a position not closer. [Figure 8]3 is a diagram showing an example in which the resonator of the acoustic wave device according to the first embodiment is a thin film bulk acoustic resonator. FIG. [Figure 9] FIG. 10 is a longitudinal sectional view of a module to which an acoustic wave device according to a second embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION

[0025] The embodiments will be described with reference to the accompanying drawings. In each drawing, the same or corresponding parts are designated by the same reference numerals. Duplicate descriptions of these parts will be appropriately simplified or omitted.

[0026] Embodiment 1 1 is a cross-sectional view of an acoustic wave device according to Embodiment 1. The acoustic wave device 1 includes a wiring substrate 2. According to one example, the wiring substrate 2 is a multilayer substrate containing resin.

[0027] According to another example, the wiring board 2 is a low temperature co-fired ceramics (LTCC) multilayer board made of a plurality of dielectric layers. Passive elements such as capacitors or inductors may be formed inside the wiring board 2.

[0028] In the example of Figure 1, wiring board 2 has a plurality of wiring board side bump pads 2b on its upper surface, which is the component mounting surface. The lower surface of wiring board 2 is the surface that is attached to, for example, a motherboard. A plurality of conductive pads 2c are provided on the lower surface of wiring board 2. Corresponding wiring board side bump pads 2b and conductive pads 2c are connected to each other by internal conductors 2a or via hole conductors.

[0029] On the wiring substrate 2 is a device chip 3 electrically connected to the wiring substrate 2. The device chip 3 is a surface acoustic wave device chip. The device chip 3 includes a piezoelectric substrate 3a formed of a piezoelectric material.

[0030] According to one example, the piezoelectric substrate 3a is a substrate formed of a piezoelectric single crystal such as lithium tantalate, lithium niobate, or quartz. According to another example, the piezoelectric substrate 3a is a substrate formed of a piezoelectric ceramic.

[0031] According to yet another example, the piezoelectric substrate 3a is a substrate in which a piezoelectric substrate and a support substrate are bonded together. The support substrate is, for example, a substrate made of sapphire, silicon, alumina, spinel, quartz, or glass.

[0032] According to one example, the piezoelectric substrate 3a is a substrate on which a functional element is formed. For example, on the main surface (lower surface) of the device chip 3 that faces the wiring substrate 2, a receiving filter and a transmitting filter are formed.

[0033] The receive filter is configured to allow electrical signals in a desired frequency band to pass through, and is, for example, a ladder-type filter made up of multiple series resonators and multiple parallel resonators.

[0034] The transmit filter is formed so as to allow passage of electrical signals in a desired frequency band, and is, for example, a ladder-type filter made up of multiple series resonators and multiple parallel resonators.

[0035] 1 shows an example in which a plurality of bump pads 3b and a plurality of periodically arranged electrodes 3c are formed on the main surface of a device chip 3. According to one example, the plurality of electrodes 3c are IDT electrodes having comb-like electrode fingers.

[0036] By applying a high frequency electric field from the lead terminal on the power supply side to the IDT electrode, surface acoustic waves are excited, and the surface acoustic waves are converted into a high frequency electric field by the piezoelectric effect, thereby obtaining filter characteristics.

[0037] The bump pads 3b and the wiring board side bump pads 2b are disposed at corresponding positions and are electrically connected by bumps 4. The bumps 4 are made of, for example, Au, a conductive adhesive, or solder.

[0038] The acoustic wave device 1 includes a sealing portion 5. The sealing portion 5 seals the device chip 3 while leaving a space 6 between the wiring substrate 2 and the device chip 3. According to one example, the device chip 3 is mounted on the wiring substrate 2, and then a resin sheet is placed on the device chip 3 so as to straddle the device chip 3.

[0039] In one example, the resin sheet is a sheet of liquid epoxy resin. In another example, the resin sheet can be a synthetic resin other than epoxy resin, such as polyimide. A protective film made of polyethylene terephthalate (PET) can be provided on the upper surface of the resin sheet, and a base film made of polyester can be provided on the lower surface of the resin sheet.

[0040] By placing a resin sheet on the device chip 3, the resin sheet is temporarily fixed to the device chip 3. Then, the structure including the device chip 3, resin sheet, and wiring substrate 2 is passed between upper and lower rollers that have been heated to at least the softening temperature of the resin sheet, so that the resin sheet fills the side surfaces of the device chip 3 and the top surface of the wiring substrate 2. This is called the hot roller lamination method.

[0041] Any method other than the heat roller lamination method may be used as long as it allows lamination as shown in FIG.

[0042] Thereafter, the process proceeds to a press forming step to completely harden the resin sheet. For example, the resin sheet is pressed toward the wiring board 2 using a press machine having upper and lower dies heated to the resin hardening temperature, thereby hardening the resin while suppressing the expansion of the air in the space 6.

[0043] According to this example, the resin sheet is first heated to its softening temperature, then pressurized and deformed to adhere closely to the outer surface of the device chip 3 and the upper surface of the wiring substrate 2, and then heated to a hardening temperature to fix the shape, thereby forming the sealing portion 5. The sealing portion 5 makes the space 6 an airtight space, for example, and reinforces the fixing force of the device chip 3 to the wiring substrate 2.

[0044] 1, the space 6 is an airtight space surrounded by the main surface of the device chip 3, the upper surface of the wiring substrate 2, and the sealing portion 5. Two or more device chips can be mounted on the wiring substrate 2. According to one example, the sealing portion 5 is made of a thermosetting resin.

[0045] In yet another example, the sealing portion may be formed using a metal as the sealing material or by aerosol deposition. In particular, when the sealing material is metal or aluminum nitride formed by aerosol deposition, an acoustic wave device with high heat dissipation properties is provided.

[0046] 2 is a diagram showing an example of the configuration of the main surface of the device chip 3. In this example, the device chip 3 has a plurality of resonators 31 on the main surface. Each resonator has reflectors 32 on both sides. The thickness of the resonator is, for example, 150 nm to 400 nm.

[0047] The substrate also includes a plurality of bump pads 3b and a wiring pattern 3d. The bump pads 3b and the wiring pattern 3d are formed of a suitable metal or alloy, such as silver, aluminum, copper, titanium, or palladium. In another example, the bump pads 3b and the wiring pattern 3d are formed of a laminated metal film formed by stacking multiple metal layers. For example, the thickness of the wiring pattern is 1 μm to 8 μm.

[0048] A first sealing material infiltration prevention wall B is formed between the plurality of bump pads 3b. The first sealing material infiltration prevention wall B is formed between the bump pads at the four corners, approximately parallel to and along the four sides of the substantially rectangular main surface of the device chip 3.

[0049] The first sealing material intrusion prevention wall B may be formed without contacting the bump pad 3b, or may be formed in contact with the bump pad 3bGND, which is at ground potential. When the first sealing material intrusion prevention wall B is formed of metal or the like, the first sealing material intrusion prevention wall B may be formed in contact with the bump pad GND, which is at ground potential, to provide a ground reinforcement or shielding effect. In addition, intrusion of the sealing material into the gap GAP between the first sealing material intrusion prevention wall B and the bump pad 3bGND can be suppressed.

[0050] The second sealing material intrusion prevention wall C shown in Fig. 2 is formed on the wiring substrate 2. As shown in Fig. 2, in a top perspective view, the second sealing material intrusion prevention wall C is arranged so as to surround the device chip 3 and not to overlap with the first sealing material intrusion prevention wall B.

[0051] Fig. 3 is a cross-sectional view taken along line DD shown in Fig. 2. As shown in Fig. 3, a second sealing material intrusion prevention wall C is formed on the wiring substrate 2.

[0052] The device chip 3 is provided with a first sealing material intrusion prevention wall B. Here, the distance A between the wiring substrate 2 and the device chip 3 is smaller than the sum of the height of the first sealing material intrusion prevention wall B and the height of the second sealing material intrusion prevention wall C. In addition, the distance A is larger than the height of the first sealing material intrusion prevention wall B. In addition, the distance A is larger than the height of the second sealing material intrusion prevention wall C.

[0053] According to this configuration, the sealing material that forms the sealing portion 5 can be prevented from entering the space 6 between the wiring substrate 2 and the device chip 3 .

[0054] The distance A between the wiring substrate 2 and the device chip 3 can be set to, for example, 35 μm. The height of the first sealing material intrusion prevention wall B can be set to, for example, 4 μm to 8 μm. The height of the second sealing material intrusion prevention wall C can be set to, for example, 30 μm to 34 μm.

[0055] 2 may be the same height as the bump pad 3b and the first sealing material intrusion prevention wall B. Also, the height of the wiring pattern 3d and the first sealing material intrusion prevention wall B may be the same height as the bump pad 3b and the first sealing material intrusion prevention wall B.

[0056] According to the example shown in FIG. 3, the height of the first sealing material intrusion prevention wall B is smaller than the height of the second sealing material intrusion prevention wall C.

[0057] The first sealing material intrusion prevention wall B can be made of, for example, metal. When the first sealing material intrusion prevention wall B is formed with the same material and to the same height as the wiring pattern 3b, they can be formed simultaneously.

[0058] The second sealing material intrusion prevention wall C can be formed of an insulating material such as solder resist, or may be formed of a metal and / or an insulating material.

[0059] Figure 4 shows the device chip 3 outer edge 10 is a diagram showing an example in which the first sealing material intrusion prevention wall C is arranged to overlap with a part of the second sealing material intrusion prevention wall C in a top perspective view. With this configuration, it is possible to provide a more compact acoustic wave device.

[0060] Fig. 5 is a diagram showing an example in which second sealing material intrusion prevention walls C are formed intermittently so as to surround a plurality of resonators. In the example shown in Fig. 5, the second sealing material intrusion prevention walls C are formed between a plurality of wiring board side bump pads 2b (not shown in Fig. 5, shown in Fig. 1). This configuration may be adopted when there is little adverse effect caused by intrusion of the sealing material in the four corner areas of the device chip 3.

[0061] 6 is a diagram showing an example in which the second sealing material intrusion prevention wall C is disposed closer to the central portion of the device chip 3 than the first sealing material intrusion prevention wall B. As shown in FIG. 6, the second sealing material intrusion prevention wall C is formed so as to continuously surround a plurality of resonators in a region that completely overlaps with the device chip 3 in a top perspective view.

[0062] According to this configuration, it is possible to suppress the intrusion of the sealing material without increasing the size of the acoustic wave device.

[0063] FIG. 7 shows an example in which the second sealing material intrusion prevention wall C is disposed at a position closer to the center of the device chip 3 than the first sealing material intrusion prevention wall B, and at a position not closer.

[0064] As shown in FIG. 7, the second sealing material intrusion prevention wall C(IN) is formed so as to surround a plurality of resonators intermittently in a region that completely overlaps the device chip 3 in a top perspective view.

[0065] Furthermore, by forming the walls intermittently, even if the heights of the first sealing material intrusion prevention wall B and the wiring pattern 3b are the same, the second sealing material intrusion prevention wall C can be formed without colliding with the wiring pattern 3b.

[0066] As shown in FIG. 7, the second sealing material intrusion prevention wall C(OUT) is formed on the device chip 3 in a top perspective view. outer edge The portion is formed so as to overlap with a part of the second sealing material intrusion prevention wall C(OUT). With this configuration, the intrusion of the sealing material can be further suppressed.

[0067] Next, an example in which the resonator is a thin film bulk acoustic resonator will be described with reference to Fig. 8. Fig. 8 is a diagram showing an example in which the resonator of the acoustic wave device according to the first embodiment is a thin film bulk acoustic resonator.

[0068] 8, the chip substrate 60 functions as the device chip 3. For example, the chip substrate 60 is a semiconductor substrate such as silicon, or an insulating substrate such as sapphire, alumina, spinel, or glass.

[0069] The piezoelectric film 62 is provided on the chip substrate 60. For example, the piezoelectric film 62 is made of aluminum nitride.

[0070] The lower electrode 64 and the upper electrode 66 are provided to sandwich the piezoelectric film 62. For example, the lower electrode 64 and the upper electrode 66 are formed of a metal such as ruthenium.

[0071] A gap 68 is formed between the bottom electrode 64 and the chip substrate 60 .

[0072] In the bulk acoustic resonator, the lower electrode 64 and the upper electrode 66 excite an elastic wave in a thickness extensional vibration mode inside the piezoelectric film 62 .

[0073] Although the embodiments described above have focused on one device chip, an acoustic wave device including multiple device chips can be provided. For example, the acoustic wave device can include a second device chip on which a band-pass filter having multiple surface acoustic wave resonators is formed. In yet another example, the acoustic wave device can include a second device chip on which a band-pass filter having multiple thin film bulk acoustic resonators is formed.

[0074] Embodiment 2 9 is a longitudinal sectional view of a module to which the acoustic wave device according to Embodiment 2 is applied. Note that the same reference numerals are used to designate parts that are the same as or correspond to parts in Embodiment 1, and a description of these parts will be omitted.

[0075] In FIG. 9, the module 100 includes a wiring board 130, an integrated circuit component IC, an acoustic wave device 1, an inductor 11, and a sealing portion 117.

[0076] The wiring board 130 is the same as the wiring board 2 of the first embodiment.

[0077] Although not shown, the integrated circuit component IC is mounted inside the wiring board 130. The integrated circuit component IC includes a switching circuit and a low-noise amplifier.

[0078] The acoustic wave device 1 is mounted on the main surface of the wiring substrate 130.

[0079] The inductor 111 is mounted on the main surface of the wiring board 130. The inductor 111 is mounted for impedance matching. For example, the inductor 111 is an integrated passive device (IPD).

[0080] The sealing portion 117 seals a plurality of electronic components including the acoustic wave device 1.

[0081] According to the second embodiment described above, the module 100 includes the acoustic wave device 1. Therefore, it is possible to provide the module 100 with a small mounting area.

[0082] Having described several aspects of at least one embodiment, it should be understood that various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the scope of this disclosure.

[0083] It is to be understood that the embodiments of the methods and apparatus described herein are not limited in their application to the details of construction and the arrangement of components set forth in the foregoing description or illustrated in the accompanying drawings, and that the methods and apparatus may be implemented in other embodiments and practiced or carried out in various ways.

[0084] The specific implementation examples are provided here for illustrative purposes only and are not intended to be limiting.

[0085] The phraseology and terminology used in this disclosure are for the purpose of description and should not be regarded as limiting. The use herein of "including," "comprising," "having," "including" and variations thereof means the inclusion of the items listed thereafter and equivalents thereof and additional items.

[0086] References to "or" may be construed as meaning that any term described using "or" refers to one, more than one, and all of the described terms.

[0087] All references to front, back, left, right, top, bottom, top, bottom, width, length, and front and back are intended for convenience of description. Such references do not limit the components of this disclosure to any one positional or spatial orientation. Accordingly, the foregoing description and drawings are by way of example only. [Explanation of symbols]

[0088] REFERENCE SIGNS LIST 1 acoustic wave device, 2 wiring substrate, 3 device chip, 3a piezoelectric substrate, 3b bump pad, 3c multiple electrodes, 3d wiring pattern, 4 bump, 5 sealing portion, 31 resonator, 32 reflector, B first sealing material intrusion prevention wall, C second sealing material intrusion prevention wall, 100 module, 105 device chip, 111 inductor, 117 sealing portion, 130 wiring substrate

Claims

1. A wiring board; a device chip disposed opposite the wiring substrate and having a substantially rectangular main surface; a sealing portion that seals the device chip together with the wiring substrate; Equipped with The device chip comprises: a plurality of resonators; a wiring pattern electrically connecting the plurality of resonators; a plurality of bump pads electrically connected to the wiring pattern; a first sealing material intrusion prevention wall formed between the plurality of bump pads and extending substantially parallel to the four sides of the substantially rectangular main surface of the device chip, the first sealing material intrusion prevention wall being formed between the bump pads at the four corners; Equipped with The wiring board is a plurality of wiring board side bump pads formed at positions corresponding to the plurality of bump pads; a second sealing material intrusion prevention wall formed continuously or intermittently along and substantially parallel to four sides of the substantially rectangular main surface of the device chip so as to surround the plurality of resonators; Equipped with When the distance between the wiring substrate and the device chip is A, the height of the first sealing material intrusion prevention wall is B, and the height of the second sealing material intrusion prevention wall is C, A<B+C, A>B, and A>C; an elastic wave device, wherein the first sealing material intrusion prevention wall and the second sealing material intrusion prevention wall are formed at positions that do not overlap when seen through from above in the thickness direction of the device chip;

2. The acoustic wave device of claim 1 , wherein B<C.

3. The acoustic wave device according to claim 1 , wherein the height of the wiring pattern is the same as the height B.

4. The acoustic wave device according to claim 1 , wherein the second sealing material intrusion prevention wall is made of a metal layer and an insulating layer.

5. The acoustic wave device according to claim 1 , wherein a portion of the second sealing material intrusion prevention wall is formed at a position overlapping an outer edge of the device chip when seen through from above in a thickness direction of the device chip.

6. The acoustic wave device according to claim 1 , wherein the second sealing material intrusion prevention walls are formed between the plurality of wiring board side bump pads.

7. The acoustic wave device according to claim 1 , wherein the second sealing material intrusion prevention wall is disposed closer to a central portion of the device chip than the first sealing material intrusion prevention wall.

8. 2. The acoustic wave device of claim 1, wherein the second sealing material penetration prevention wall includes a second sealing material penetration prevention wall (inner side) positioned closer to the central portion of the device chip than the first sealing material penetration prevention wall, and a second sealing material penetration prevention wall (outer side) positioned farther from the central portion of the device chip than the first sealing material penetration prevention wall.

9. 2. The acoustic wave device according to claim 1, wherein the device chip is a substrate in which a piezoelectric substrate and a substrate made of sapphire, silicon, alumina, spinel, quartz crystal, or glass are bonded together.

10. 2. The acoustic wave device according to claim 1, wherein the plurality of resonators are surface acoustic wave resonators, and a band-pass filter or a duplexer is formed on the device chip.

11. 2. The acoustic wave device according to claim 1, wherein the plurality of resonators are bulk acoustic resonators, and a band-pass filter or a duplexer is formed on the device chip.

12. A module comprising the acoustic wave device according to claim 1 .

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