Semiconductor chip transfer method and semiconductor chip transfer device

Abstract

To provide a semiconductor chip transfer method capable of reducing the time required for a transfer step of transferring a semiconductor chip from a support substrate to a transfer target substrate.SOLUTION: A transfer method includes: a calculation step of performing the calculation for selecting a semiconductor chip 1 to be transferred from each of a plurality of support substrates S on which the semiconductor chip 1 is supported to each of all of a plurality of transfer target substrates T to which the semiconductor chip is to be transferred, for a first transfer substrate T in each of the plurality of support substrates S, and for a second and subsequent transfer substrates T in each of the plurality of support substrates S; and a transfer step of sequentially transferring the semiconductor chip 1 to an n-th transfer substrate T in each of the plurality of supporting substrates S by sequentially irradiating the plurality of substrate S with the laser beam L while performing the calculation for selecting the semiconductor chip 1 to be transferred from each of the plurality of support substrates S to at least an n+1-th (n is an integer of 1 or more) transfer target substrate T in the calculation step.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a method and an apparatus for transferring a semiconductor chip. [Background technology]

[0002] BACKGROUND ART Conventionally, a method for transferring a semiconductor chip is known (see, for example, Patent Document 1).

[0003] The above-mentioned Patent Document 1 discloses a semiconductor chip transfer method including a semiconductor chip support step of supporting a semiconductor chip on a support substrate and a transfer step of transferring the semiconductor chip from the support substrate to a transfer substrate. In the transfer step, the surface of the support substrate on which the semiconductor chip is supported is arranged to face the surface of the transfer substrate to which the semiconductor chip will be transferred. Then, laser light is irradiated toward the semiconductor chip from the side of the support substrate opposite to the side on which the semiconductor chip was supported. This releases the support state of the semiconductor chip by the support substrate, and the semiconductor chip is transferred to the transfer substrate. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2020 / 166301 Summary of the Invention [Problem to be solved by the invention]

[0005] Although not disclosed in Patent Document 1, the number of semiconductor chips supported on a single support substrate is greater than the number of semiconductor chips to be transferred to a single transfer substrate, allowing semiconductor chips to be transferred from a single support substrate to multiple transfer substrates. Therefore, when transferring semiconductor chips from a support substrate to multiple transfer substrates, a calculation is performed to select the semiconductor chips on the support substrate to be transferred to each of the multiple transfer substrates. Although not disclosed in Patent Document 1, conventionally, semiconductor chips are sequentially transferred from a single support substrate supporting multiple semiconductor chips to multiple transfer substrates until the number of semiconductor chips supported on the single support substrate falls below a predetermined number. Therefore, even when transfer from a support substrate to a transfer substrate is completed, the calculation to select the semiconductor chips to be transferred to the next transfer substrate may not be completed. In this case, it is necessary to wait until the calculation is completed before starting transfer to the next transfer substrate, thereby increasing the time required for the transfer process. Therefore, it is desirable to reduce the time required for the transfer process of transferring semiconductor chips from a support substrate to a transfer substrate.

[0006] The present invention has been made to solve the above-mentioned problems, and one object of the present invention is to provide a semiconductor chip transfer method and a semiconductor chip transfer device that can reduce the time required for the transfer process of transferring a semiconductor chip from a support substrate to a transfer substrate. [Means for solving the problem]

[0007] In order to achieve the above object, a semiconductor chip transfer method according to a first aspect of the present invention is a semiconductor chip transfer method for transferring a semiconductor chip from each of a plurality of support substrates to a plurality of transferee substrates, and includes a calculation step in which a calculation for selecting a semiconductor chip to be transferred from each of the plurality of support substrates on which the semiconductor chip is supported to each of a plurality of transferee substrates to which the semiconductor chip is to be transferred is performed for a first transferee substrate on each of the plurality of support substrates, and for each of the second and subsequent transferee substrates on each of the plurality of support substrates; and a transfer step in which a laser beam is sequentially irradiated onto the plurality of support substrates while performing a calculation in the calculation step to select a semiconductor chip to be transferred from each of the plurality of support substrates to at least an n+1th transferee substrate (n is an integer greater than or equal to 1) of the transferee substrates, thereby sequentially transferring the semiconductor chip to the nth transferee substrate on each of the plurality of support substrates.

[0008] As described above, the semiconductor chip transfer method according to this first aspect includes a calculation step in which a calculation to select a semiconductor chip to be transferred to each of a plurality of transfer substrates to which semiconductor chips are transferred from a plurality of support substrates is performed for a first transfer substrate on each of the plurality of support substrates and for each subsequent transfer substrate on each of the plurality of support substrates, and a transfer step in which, while performing a calculation to select a semiconductor chip to be transferred to at least an n+1th transfer substrate (n is an integer greater than or equal to 1) from each of the plurality of support substrates in the calculation step, a transfer step in which a semiconductor chip is sequentially transferred to an nth transfer substrate on each of the plurality of support substrates is sequentially performed. This makes it possible to perform a calculation to select a semiconductor chip to be transferred to at least the n+1th transfer substrate while a semiconductor chip is being sequentially transferred to the nth transfer substrate on each of the plurality of support substrates. Therefore, it is possible to reduce the time required to wait for the calculation to be completed before starting transfer to the next transfer substrate, which is caused by the calculation to select a semiconductor chip to be transferred to the n+1th transfer substrate being incomplete after the transfer step for the nth transfer substrate is completed. As a result, the time required for the transfer step of transferring the semiconductor chip from the supporting substrate to the transfer substrate can be reduced.

[0009] In the semiconductor chip transfer method according to the first aspect, the transfer step preferably involves sequentially transferring semiconductor chips to the nth transfer substrate on each of the plurality of support substrates until a calculation is completed to select a semiconductor chip to be transferred to the n+1th transfer substrate from at least each of the plurality of support substrates. This configuration allows the calculation to be completed while the semiconductor chips are being sequentially transferred to the nth transfer substrate on each of the plurality of support substrates. This further reduces the wait time required to start transfer to the next transfer substrate, which occurs when the calculation to select a semiconductor chip to be transferred to the n+1th transfer substrate is not yet completed after the transfer step to the nth transfer substrate is completed. This further reduces the time required for the transfer step of transferring semiconductor chips from the support substrate to the transfer substrate.

[0010] In the semiconductor chip transfer method according to the first aspect, the number of the plurality of support substrates is preferably preset as the minimum number that allows for the completion of calculations for selecting a semiconductor chip to be transferred to the final transfer substrate from each of the plurality of support substrates in a pre-final transfer step in which a semiconductor chip is sequentially transferred to the but-before-final transfer substrate on each of the plurality of support substrates. This configuration allows for the completion of calculations for selecting a semiconductor chip to be transferred to the final transfer substrate from the first support substrate during the pre-final transfer step in which a semiconductor chip is transferred from each of the plurality of support substrates. This further reduces the wait time required for the start of transfer to the final transfer substrate, which occurs when the calculations for selecting a semiconductor chip to be transferred to the final transfer substrate are not completed after the pre-final transfer step is completed. This further reduces the time required for the transfer step in which semiconductor chips are transferred from the support substrate to the transfer substrate.

[0011] A semiconductor chip transfer device according to a second aspect of the present invention is a semiconductor chip transfer device that transfers semiconductor chips from each of a plurality of support substrates to a plurality of transferee substrates, and includes: a support substrate holding unit that holds the support substrate on which the semiconductor chip is provided; a transferee substrate holding unit that holds the transferee substrate onto which the semiconductor chip provided on the support substrate is to be transferred; a laser light irradiation unit that irradiates laser light onto the support substrate; and a control unit that controls the irradiation of laser light by the laser light irradiation unit, wherein the control unit is configured to perform a calculation to select a semiconductor chip to be transferred from each of the plurality of support substrates on which the semiconductor chip is supported onto each of a plurality of transferee substrates onto which the semiconductor chip is to be transferred, for a first transferee substrate on each of the plurality of support substrates, and also for second and subsequent transferee substrates on each of the plurality of support substrates, and to control the sequential transfer of the semiconductor chip onto the nth transferee substrate on each of the plurality of support substrates by sequentially irradiating the laser light onto the plurality of support substrates while performing a calculation to select a semiconductor chip to be transferred from each of the plurality of support substrates to at least an n+1th transferee substrate (n is an integer greater than or equal to 1).

[0012] In a semiconductor chip transfer apparatus according to a second aspect of the present invention, as described above, the control unit is configured to perform a calculation for selecting a semiconductor chip to be transferred to each of a plurality of transfer substrates to which semiconductor chips are transferred from each of a plurality of support substrates, for the first transfer substrate on each of the plurality of support substrates, and to perform the calculation for selecting a semiconductor chip to be transferred to at least an n+1th (n is an integer greater than or equal to 1) transfer substrate on each of the plurality of support substrates, while performing the calculation for selecting a semiconductor chip to be transferred to at least an n+1th transfer substrate on each of the plurality of support substrates. As a result, similar to the first aspect, while transferring to the n+1th transfer substrate, the calculation for selecting a semiconductor chip to be transferred to at least the n+1th transfer substrate can be performed. Therefore, the waiting time for starting transfer to the next transfer substrate until the calculation for selecting a semiconductor chip to be transferred to the n+1th transfer substrate is completed after the transfer process to the nth transfer substrate is completed can be reduced. As a result, it is possible to provide a semiconductor chip transfer device that can reduce the time required for the transfer step of transferring a semiconductor chip from a support substrate to a transfer substrate. [Effects of the Invention]

[0013] According to the present invention, as described above, it is possible to provide a semiconductor chip transfer method and a semiconductor chip transfer device that can reduce the time required for the transfer process of transferring a semiconductor chip from a support substrate to a transfer substrate. [Brief explanation of the drawings]

[0014] [Figure 1] 1A to 1C are diagrams for explaining a semiconductor chip transfer method according to an embodiment. [Figure 2] FIG. 2 is a schematic diagram showing a support substrate on which a semiconductor chip is supported. [Figure 3] 10A and 10B are diagrams for explaining a combination of a plurality of support substrates and a plurality of transfer substrates. [Figure 4]FIG. 10 is a diagram for explaining the flow of a calculation process and a transfer process according to an embodiment. [Figure 5] 1 is a schematic diagram illustrating an overall configuration of a transfer device according to an embodiment. [Figure 6] FIG. 2 is a diagram illustrating functional blocks of a control unit. [Figure 7] 1A to 1C are diagrams for explaining a semiconductor chip transfer method according to an embodiment. [Figure 8] 10A to 10C are diagrams for explaining a semiconductor chip transfer method according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0015] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described with reference to the accompanying drawings.

[0016] A method for transferring a semiconductor chip 1 according to one embodiment will be described with reference to FIGS.

[0017] (Outline of transfer method for semiconductor chip 1) 1, the method for transferring a semiconductor chip 1 is a method for transferring a semiconductor chip 1 to a transfer substrate T by irradiating a laser beam L onto the semiconductor chip 1 supported on a support substrate S via the support substrate S. For example, the method for transferring a semiconductor chip 1 is a method for manufacturing a display panel of a display device such as an EL display device by peeling the semiconductor chip 1 from the support substrate S using a known peeling technique such as a laser lift-off method and transferring the semiconductor chip 1 to the transfer substrate T. The method for transferring a semiconductor chip 1 is also a method for transferring a semiconductor chip 1 from each of a plurality of support substrates S to a plurality of transfer substrates T.

[0018] A semiconductor chip 1 of 50 μm×50 μm or less called a micro light-emitting diode (LED) is used as the semiconductor chip 1. Note that the semiconductor chip 1 is not limited to a micro LED, and various semiconductor elements can be used.

[0019] The support substrate S is formed of a material that transmits the laser light L, such as a SiO2 (silicon dioxide) substrate or a sapphire substrate. The support substrate S supports a plurality of semiconductor chips 1 via a release layer 2 formed on the support substrate S. Although not shown, the interval between adjacent semiconductor chips 1 on the support substrate S is smaller than the interval between adjacent semiconductor chips 1 on a transfer substrate T transferred from the support substrate S. Furthermore, the number of semiconductor chips 1 supported on one support substrate S is greater than the number of semiconductor chips 1 transferred to one transfer substrate T. As shown in FIG. 2, the plurality of semiconductor chips 1 are arranged in a matrix on the support substrate S at predetermined intervals via the release layer 2 (see FIG. 1). The support substrate S has a circular shape. The shape of the support substrate S is not particularly limited.

[0020] 1, the peeling layer 2 is made of a material that decomposes to generate a gas component when irradiated with laser light from the laser light irradiating unit 50. The peeling layer 2 is made of, for example, polyimide or silicon.

[0021] The transfer substrate T is, for example, a substrate for manufacturing a micro LED display panel by transferring a large number of micro LEDs on a support substrate S to the transfer substrate T. The transfer substrate T has an adhesive layer 21 formed thereon for adhering the transferred semiconductor chip 1. The transfer substrate T may have wiring formed thereon that can be connected to the transferred semiconductor chip 1. The transfer substrate T has a rectangular shape (not shown). Note that the transfer substrate T may also be, for example, a semiconductor chip holding substrate that temporarily holds the semiconductor chip 1 transferred from the support substrate S. The shape of the transfer substrate T is not particularly limited.

[0022] As will be described later, the method for transferring a semiconductor chip 1 includes a calculation step in which a calculation to select a semiconductor chip 1 to be transferred from each of a plurality of support substrates S on which the semiconductor chip 1 is supported to each of a plurality of transfer substrates T to which the semiconductor chip 1 is to be transferred is performed for the first transfer substrate T on each of the plurality of support substrates S, and for the second and subsequent transfer substrates T on each of the plurality of support substrates S; and a transfer step in which the semiconductor chip 1 is sequentially transferred to the nth transfer substrate T on each of the plurality of support substrates S by sequentially irradiating laser light L onto the plurality of support substrates S while performing the calculation to select a semiconductor chip 1 to be transferred from each of the plurality of support substrates S to at least the n+1th (n is an integer greater than or equal to 1)th transfer substrate T in the calculation step.

[0023] In the process of transferring the semiconductor chips 1 from the support substrate S on which the semiconductor chips 1 are supported to the transfer substrates T, the semiconductor chips 1 are transferred from each of the support substrates S to the transfer substrates T. As shown in FIG. 3, the transfer process includes one first support substrate S1 on which the semiconductor chips 1 are supported, five transfer substrates T (T11 to T1Q) onto which the semiconductor chips 1 are sequentially transferred from the first support substrate S1, and one Pth support substrate SP on which the semiconductor chips 1 are supported, and five transfer substrates T (TP1 to TPQ) onto which the semiconductor chips 1 are sequentially transferred from the Pth support substrate SP. Here, the total number of support substrates S is P (P is an integer of 2 or greater). Furthermore, the total number of transfer substrates T onto which the semiconductor chips 1 are transferred for one support substrate S is Q (Q is an integer of 2 or greater). Note that the above-mentioned n+1 is an integer equal to or less than Q.

[0024] (Calculation and transcription process flow) As shown in FIG. 4, in the transfer process, the semiconductor chip 1 is transferred from a first support substrate S1 among the multiple support substrates S to the first transferee substrate T11 in the first support substrate S1. After the transfer to the first transferee substrate T11 in the first support substrate S1 is completed, the first support substrate S1 is replaced with a second support substrate S2, and the first transferee substrate T11 in the first support substrate S1 is replaced with the first transferee substrate T21 in the second support substrate S2. After the replacement with the second support substrate S2 and the transferee substrate T21 is completed, the semiconductor chip 1 is transferred from the second support substrate S2 to the transferee substrate T21. Similarly, the semiconductor chip 1 is transferred from the P-th support substrate SP to the first transferee substrate TP1 in the P-th support substrate SP. In this way, the semiconductor chip 1 is sequentially transferred from each of the first to P-th support substrates S1 to SP to the first transferee substrates T11 to TP1 in each of the first to P-th support substrates S1 to SP.

[0025] After the transfer of the semiconductor chip 1 onto the first transferee substrate T11-TP1 in each of the first to Pth support substrates S1-SP is completed, the transfer of the semiconductor chip 1 onto the second transferee substrate T12-TP2 in each of the first to Pth support substrates S1-SP begins. The transfer of the semiconductor chip 1 onto the Qth transferee substrates T1Q-TPQ in each of the first to Pth support substrates S1-SP is also performed sequentially in the same manner as the transfer of the semiconductor chip 1 onto the first and second transferee substrates T in each of the first to Pth support substrates S1-SP.

[0026] Furthermore, in the calculation step, calculation C1 is executed to select a semiconductor chip 1 to be transferred from each of the plurality of support substrates S1-SP to each of the transfer substrates T11-TP1, which is the first transfer substrate T, calculation C2 is executed to select a semiconductor chip 1 to be transferred from each of the plurality of support substrates S1-SP to each of the transfer substrates T12-TP2, which is the second transfer substrate T, and thereafter calculation CQ is executed to select a semiconductor chip 1 to be transferred from each of the plurality of support substrates S1-SP to each of the transfer substrates T1Q-TPQ, which is the Qth transfer substrate T. Execution of calculations C1-CQ is started in order before the start of the transfer step, and at least calculation C1 to select a semiconductor chip 1 to be transferred from each of the plurality of support substrates S1-SP to each of the transfer substrates T11-TP1 is completed before the start of the transfer step.

[0027] After calculation C1 is completed, the semiconductor chip 1 is transferred to the first transferee substrate T11-TP1 in each of the first to Pth support substrates S1-SP. While the semiconductor chip 1 is being transferred to the first transferee substrate T11-TP1 in each of the first to Pth support substrates S1-SP, calculation C2 is performed to select the semiconductor chip 1 to be transferred from the multiple support substrates S1-SP to the transferee substrates T12-TP2. After calculation C2 is completed, calculation C3 is performed to select the semiconductor chip 1 to be transferred from the multiple support substrates S1-SP to the transferee substrates T13-TP3. Similarly, calculation CQ is performed to select the semiconductor chip 1 to be transferred from the multiple support substrates S1-SP to the transferee substrates T1Q-TPQ. In this way, calculations C1-CQ to select the semiconductor chip 1 to be transferred from the multiple support substrates S1-SP to each of the multiple transferee substrates T are performed in parallel with the transfer process.

[0028] The calculation CQ for selecting the semiconductor chip 1 to be transferred from the multiple support substrates S1 to SP to the transferee substrates T1Q to TPQ is completed in the pre-final transfer process in which the semiconductor chip 1 is transferred to at least the Q-1th transferee substrate T, which is the substrate just before the final Q.

[0029] Based on the result of calculation C1, the semiconductor chip 1 is transferred onto the first transferred substrate T11-TP1 in each of the first to Pth support substrates S1-SP. Based on the result of calculation C2, the semiconductor chip 1 is transferred onto the second transferred substrate T12-TP2 in each of the first to Pth support substrates S1-SP. Similarly, based on the result of calculation CQ, the semiconductor chip 1 is transferred onto the Qth transferred substrate T1Q-TPQ in each of the first to Pth support substrates S1-SP.

[0030] (Transfer device 100 for semiconductor chip 1) As shown in Fig. 5, the transfer device 100 for the semiconductor chip 1 includes a support substrate holding unit 30, a transferee substrate holding unit 40, a laser light irradiation unit 50, a control unit 61, and a memory unit 66. The transfer device 100 is configured to execute a transfer method for the semiconductor chip 1. In the drawing, the left-right direction of the transfer device 100 is defined as the X direction. The up-down direction of the transfer device 100 is defined as the Z direction. The direction perpendicular to the X and Z directions of the transfer device 100 is defined as the Y direction.

[0031] The support substrate holding unit 30 holds a support substrate S on which a semiconductor chip 1 is provided. The support substrate holding unit 30 holds the support substrate S supporting the semiconductor chip 1 with the surface supporting the semiconductor chip 1 facing downward. The support substrate holding unit 30 has an opening 31. The support substrate S held by the support substrate holding unit 30 is irradiated with laser light L emitted from the laser light irradiation unit 50 through the opening 31. The support substrate holding unit 30 is configured to be movable relative to the transferred substrate holding unit 40 in at least the X-axis and Y-axis directions by a first movement mechanism 32. The support substrate holding unit 30 is also configured to be moved by the first movement mechanism 32 to a predetermined support substrate exchange area (not shown) so that the support substrate S can be exchanged in the support substrate exchange area.

[0032] The transferred substrate holding unit 40 holds a transferred substrate T onto which the semiconductor chip 1 supported on the support substrate S is transferred. The transferred substrate holding unit 40 holds the transferred substrate T on an upper surface 41. The transferred substrate holding unit 40 is configured to be movable relative to the support substrate holding unit 30 in at least the X-axis direction and the Y-axis direction by a second movement mechanism 42. The transferred substrate holding unit 40 is also configured to be moved by the second movement mechanism 42 to a predetermined transferred substrate exchange area (not shown) so that the transferred substrate T can be exchanged in the transferred substrate exchange area.

[0033] The position of the support substrate holding part 30 is moved by the first moving mechanism 32, the position of the transferred substrate holding part 40 is moved by the second moving mechanism 42, or both of these positions are moved, thereby adjusting the relative position of the support substrate S to the transferred substrate T and the relative position of the semiconductor chip 1 supported on the support substrate S to the transferred substrate T.

[0034] The laser light irradiation unit 50 is configured to irradiate the support substrate S with laser light L. The laser light irradiation unit 50 includes a laser light source 51, a galvanometer mirror 52, and an fθ lens 53. The laser light source 51 is a light source that emits laser light L. The galvanometer mirror 52 is rotatable about two intersecting axes, and reflects the laser light L at an arbitrary angle. The fθ lens 53 focuses the laser light L from the galvanometer mirror 52 onto the support substrate S.

[0035] The laser light irradiation unit 50 irradiates the surface of the support substrate S held by the support substrate holding unit 30 opposite to the surface supporting the semiconductor chip 1 with laser light L via the galvanometer mirror 52 and the fθ lens 53. The laser light L is selectively irradiated onto the semiconductor chip 1 supported on the support substrate S by the galvanometer mirror 52 and the fθ lens 53. When the laser light L is irradiated onto the peeling layer 2 (see FIG. 1) via the support substrate S, the semiconductor chip 1 is peeled off from the support substrate S by laser lift-off, and the semiconductor chip 1 is transferred from the support substrate S to the transfer substrate T.

[0036] The control unit 61 is provided in the control device 60. The control device 60 is configured by, for example, a PC (personal computer). The control device 60 includes the control unit 61 and a storage unit 66.

[0037] The control unit 61 is configured with a processor such as a CPU (Central Processing Unit), and performs various controls by executing programs stored in the storage unit 66. The control unit 61 executes calculations C2 to CQ to select the semiconductor chip 1 to be transferred onto each of the plurality of transfer substrates T onto which the semiconductor chip 1 is transferred from the plurality of support substrates S1 to SP.

[0038] 4, the control unit 61 performs control to sequentially transfer the semiconductor chip 1 to the n-th transfer substrate T in each of the first to P-th support substrates S1 to SP by sequentially irradiating the first to P-th support substrates S1 to SP with laser light while performing a calculation to select a semiconductor chip 1 to be transferred to at least an n+1-th (n is an integer equal to or greater than 1) transfer substrate T from the multiple support substrates S1 to SP. As an example, the control unit 61 performs control to sequentially transfer the semiconductor chip 1 to the transfer substrates T11 to TP1, which are the first transfer substrate T in each of the first to P-th support substrates S1 to SP, by sequentially irradiating the first to P-th support substrates S1 to SP with laser light while performing a calculation C2 to select a semiconductor chip 1 to be transferred to at least an n+1-th transfer substrate T in each of the multiple support substrates S1 to SP.

[0039] Furthermore, the control unit 61 controls the sequential transfer of the semiconductor chip 1 to the nth transfer substrate T in each of the first to Pth support substrates S1 to SP until a calculation is completed to select a semiconductor chip 1 to be transferred to the n+1th transfer substrate T from at least the plurality of support substrates S1 to SP. That is, the control unit 61 completes the calculation to select a semiconductor chip 1 to be transferred to the n+1th transfer substrate T from at least the plurality of support substrates S1 to SP by the time the transfer of the semiconductor chip 1 to the nth transfer substrate T in each of the first to Pth support substrates S1 to SP is completed. As an example, the control unit 61 controls the sequential transfer of the semiconductor chip 1 to the first transfer substrates T11 to TP1, which are the first transfer substrates T in each of the first to Pth support substrates S1 to SP, until a calculation C2 is completed to select a semiconductor chip 1 to be transferred to a transfer substrate T12 to TP2, which are the second transfer substrate T, from at least the plurality of support substrates S1 to SP. In addition, before starting to transfer the semiconductor chip 1 to the nth transfer substrate T on each of the first to Pth support substrates S1 to SP, the control unit 61 may complete calculations to select the semiconductor chip 1 to be transferred to the n+1th transfer substrate T from the multiple support substrates S1 to SP.

[0040] The total number P of the multiple support substrates S is preset as the minimum number that can complete the calculation CQ for selecting the semiconductor chip 1 to be transferred from each of the multiple support substrates S1 to SP to each of the final transfer substrates T, T1Q to TPQ, in the final pre-transfer process in which a semiconductor chip 1 is sequentially transferred to the Q-1th transfer substrate, which is the substrate just before the final Q of the transfer substrate T in each of the multiple support substrates S.

[0041] (Function blocks of the control unit 61) As shown in FIG. 6, the control unit 61 includes a selection calculation unit 62, a light source control unit 63, an optical control unit 64, and a substrate replacement control unit 65.

[0042] The selection calculation unit 62 executes calculations C1 to CQ to select semiconductor chips 1 to be transferred from the plurality of support substrates S1 to SP onto each of the transfer substrates T. As described above, the distance between adjacent semiconductor chips 1 on the support substrate S is smaller than the distance between adjacent semiconductor chips 1 on the transfer substrate T transferred from the support substrate S. Furthermore, as the number of transfer substrates T increases, the number of semiconductor chips 1 remaining on the support substrate S decreases, and the remaining semiconductor chips 1 become scattered on the support substrate S. Therefore, calculations are performed to select the semiconductor chips 1 to be transferred from the semiconductor chips 1 supported on the support substrate S.

[0043] While the semiconductor chips 1 are being transferred in sequence from each of the plurality of support substrates S1 to SP to each of the plurality of transfer substrates T, the selection calculation unit 62 continuously performs calculations C1 to CQ to select the semiconductor chips 1 to be transferred from the plurality of support substrates S1 to SP to each of the transfer substrates T.

[0044] Before the transfer process from the first support substrate S1 to the transferee substrate T11 is started, the selection calculation unit 62 starts calculations C1 to CQ to select semiconductor chips 1 to be transferred from the multiple support substrates S1 to SP to each of the transferee substrates T, and completes at least calculation C1. The semiconductor chips 1 of the support substrate S selected to be transferred to each of the transferee substrates T by the calculations of the selection calculation unit 62 are stored in the memory unit 66.

[0045] During transfer of the semiconductor chip 1, the light source control unit 63 controls the laser light irradiation unit 50 (see FIG. 4) to irradiate the laser light L and to stop the irradiation.

[0046] The optical control unit 64 controls the adjustment of the galvanometer mirror 52 (see FIG. 3) in order to irradiate the semiconductor chip 1 on the support substrate S selected by the calculation of the selection calculation unit 62 with the laser light L.

[0047] The substrate exchange control unit 65 controls one or both of the movement of the support substrate holding unit 30 (see FIG. 5) by the first moving mechanism 32 (see FIG. 5) and the movement of the transferred substrate holding unit 40 (see FIG. 5) by the second moving mechanism 42 (see FIG. 5). The substrate exchange control unit 65 is configured to align the semiconductor chip 1 to be transferred on the support substrate S with the target position on the transferred substrate T to which the semiconductor chip 1 is to be transferred so that they face each other.

[0048] The substrate exchange control unit 65 also controls the first moving mechanism 32 to move the support substrate holding unit 30 to a support substrate exchange area (not shown) and exchange the support substrate S held by the support substrate holding unit 30 in the support substrate exchange area. The substrate exchange control unit 65 also controls the second moving mechanism 42 to move the transferred substrate holding unit 40 to a transferred substrate exchange area (not shown) and exchange the transferred substrate T held by the transferred substrate holding unit 40 in the transferred substrate exchange area.

[0049] 4, after transfer onto the first transferred substrate T11 on the first support substrate S1 is completed, the substrate exchange control unit 65 performs control to exchange the first support substrate S1 held by the support substrate holding unit 30 with the second support substrate S2, and to exchange the first transferred substrate T11 on the first support substrate S1 held by the transferred substrate holding unit 40 with the first transferred substrate T21 on the second support substrate S2. Then, after transfer onto the first transferred substrate T21 on the second support substrate S2 is completed, the substrate exchange control unit 65 performs control to exchange the second support substrate S2 held by the support substrate holding unit 30 with the third support substrate S3, and to exchange the first transferred substrate T21 on the second support substrate S2 held by the transferred substrate holding unit 40 with the first transferred substrate T31 on the third support substrate S3. The third to Pth support substrates S3 to SP and the first transferred substrates T31 to TP1 among the third to Pth support substrates S3 to SP are similarly controlled to be sequentially exchanged. The second to Qth transferred substrates T among the first to Pth support substrates S1 to SP are also similarly controlled to be sequentially exchanged.

[0050] The storage unit 66 includes a volatile storage device and a non-volatile storage device, and stores programs and various information related to the transfer of the transfer device 100.

[0051] A display unit 67 and an input unit 68 are connected to the control device 60. The display unit 67 is, for example, a liquid crystal display device. The display unit 67 may also be an electroluminescence display device, a projector, or a head-mounted display. The input unit 68 is, for example, a mouse. The input unit 68 may also be a keyboard or a touch panel.

[0052] (Example) A method for transferring a semiconductor chip 1 according to an embodiment will be described with reference to Fig. 7. The support substrate S supporting the semiconductor chip 1 used in the method for transferring a semiconductor chip 1 according to the embodiment is the same as the support substrate S described in the embodiment, and the transferee substrate T is also the same as the transferee substrate T described in the embodiment.

[0053] 7 is an example of the experimental result of the time from the start of execution of calculation C1 by the selection calculation unit 62 to select a semiconductor chip 1 to be transferred from each of the first to sixth support substrates S1 to S6 to each of the first transfer substrates T11 to T61, until calculation C1 to select the semiconductor chip 1 is completed and the transfer process from the first support substrate S1 to the first transfer substrate T11 is started. Also, the "calculation wait time" is an example of the experimental result of the time from the completion of the transfer process to the nth transfer substrate T to the completion of calculation by the selection calculation unit 62 to select a semiconductor chip 1 to be transferred from each of the first to sixth support substrates S1 to S6 to each of the n+1th transfer substrate T, until the transfer process to the n+1th transfer substrate T is started.

[0054] 7 is an example of an experimental result of the time from the start of transfer onto each of the n-th transfer substrates T to the completion of transfer onto each of the n-th transfer substrates T. Also, the "calculation time" shown in FIG. 7 is an example of an experimental result of the time required for the selection calculation unit 62 to perform calculations to select the semiconductor chip 1 to be transferred onto each of the n-th transfer substrates T from each of the first to sixth support substrates S1 to S6. Also, the arrows shown in FIG. 3 indicate the transfer order of the transfer substrates T to be transferred from the support substrate S in the transfer method of the semiconductor chip 1.

[0055] As the number of transferred substrates T increases, the number of semiconductor chips 1 remaining on the support substrate S decreases and the semiconductor chips 1 remaining on the support substrate S become scattered. Therefore, compared with the calculation time and transfer time for selecting the semiconductor chips 1 to be transferred to the transfer substrate T that is transferred first from the same support substrate S, the calculation time and transfer time for selecting the semiconductor chips 1 to be transferred to the transfer substrate T that is transferred later become longer.

[0056] In the example, the calculation times C1 to C5 for selecting the semiconductor chips 1 to be transferred onto the first to fifth transfer substrates T for the first to sixth support substrates S1 to S6 were 8 minutes, 14 minutes, 18 minutes, 23 minutes, and 41 minutes, respectively.

[0057] In the method for transferring a semiconductor chip 1 according to the embodiment, after the transfer step to the nth transfer substrate T was completed, no "calculation wait time" occurred because the selection calculation unit 62 had not yet completed the calculation to select the semiconductor chip 1 to be transferred to each of the (n+1)th transfer substrates T. For example, when the transfer step to the third transfer substrate T for each of the first to sixth support substrates S1 to S6 was completed, no "calculation wait time" occurred because the selection calculation unit 62 had not yet completed the calculation C4 to select the semiconductor chip 1 to be transferred from each of the first to sixth support substrates S1 to S6 to each of the fourth transfer substrates T. As a result, the total time required for the transfer step of the semiconductor chip 1 from each of the first to sixth support substrates S1 to S6 to the first to fifth transfer substrates T was 2 hours and 44 minutes. Furthermore, the time required for the transfer step of the semiconductor chip 1 from the first support substrate S1 to the first to fifth transfer substrates T was 34 minutes.

[0058] (Comparative Example) Next, a transfer method of a semiconductor chip 1 according to a comparative example will be described with reference to Fig. 8. The support substrate S supporting the semiconductor chip 1 and the transfer substrate T used in the transfer method of a semiconductor chip 1 according to the comparative example are both similar to the support substrate S and the transfer substrate T of the embodiment.

[0059] 7. Furthermore, the "calculation waiting time," "transfer time," "calculation time," and arrows shown in FIG. 8 are the same as the "calculation waiting time," "transfer time," "calculation time," and arrows shown in FIG.

[0060] The method for transferring a semiconductor chip 1 according to the comparative example differs from the method for transferring a semiconductor chip 1 according to the embodiment in the order of transfer from the support substrate S to the transferee substrates T. In the method for transferring a semiconductor chip 1 according to the comparative example, the semiconductor chip 1 is sequentially transferred from a first support substrate S1 to five transferee substrates T. After the transfer from the first support substrate S1 to the five transferee substrates T is completed, the first support substrate S1 is replaced with a second support substrate S2, and the semiconductor chip 1 is sequentially transferred from the second support substrate S2 to the five transferee substrates T. Similarly, the third to sixth support substrates S3 to S6 are sequentially transferred to the five transferee substrates T. The calculation method and calculation order for selecting the semiconductor chip 1 to be transferred in the method for transferring a semiconductor chip 1 according to the comparative example are the same as the calculation method and calculation order for selecting the semiconductor chip 1 to be transferred in the method for transferring a semiconductor chip 1 according to the embodiment.

[0061] 8, the calculation time for selecting the semiconductor chips 1 to be transferred onto the first to fifth transfer substrates T for the first to sixth support substrates S1 to S6 according to the comparative example was the same as the calculation time for selecting the semiconductor chips 1 to be transferred according to the embodiment. That is, the calculation time for selecting the semiconductor chips 1 to be transferred onto the first to fifth transfer substrates T for the first to sixth support substrates S1 to S6 according to the comparative example was 8 minutes, 14 minutes, 18 minutes, 23 minutes, and 41 minutes, respectively.

[0062] The method for transferring semiconductor chips 1 according to the comparative example involves sequentially transferring semiconductor chips 1 from one support substrate S to five transfer substrates T without replacing the support substrate S. Therefore, after the transfer process to the nth transfer substrate T is completed, the selection calculation unit is not yet finished with the calculation to select the semiconductor chips 1 to be transferred to each of the (n+1)th transfer substrates T, resulting in a "calculation wait time." For example, after the transfer process to the third transfer substrate T is completed, the selection calculation unit is not yet finished with the calculation C4 to select the semiconductor chips 1 to be transferred from each of the first to sixth support substrates to each of the fourth transfer substrates T, resulting in an 18-minute "calculation wait time." As a result, the total time required for the transfer process of semiconductor chips 1 from each of the first to sixth support substrates S1 to S6 to the first to fifth transfer substrates T was 4 hours and 1 minute. Furthermore, the total time required for the transfer process of semiconductor chips 1 from the first support substrate S1 to the first to fifth transfer substrates T was 1 hour and 51 minutes.

[0063] In the method for transferring a semiconductor chip 1 according to the embodiment, it was possible to suppress the occurrence of a "calculation waiting time" caused by the selection calculation unit 62 not completing the calculation for selecting the semiconductor chip 1 to be transferred from each of the first to sixth support substrates S1 to S6 to each of the (n+1)th transfer substrates T after the transfer step to the nth transfer substrate T was completed. Therefore, the method for transferring a semiconductor chip 1 according to the embodiment was able to reduce the time required for the transfer step compared to the method for transferring a semiconductor chip 1 according to the comparative example.

[0064] (Effects of this embodiment) In this embodiment, the following effects can be obtained.

[0065] As described above, the method for transferring a semiconductor chip 1 of this embodiment includes a calculation step in which a calculation for selecting a semiconductor chip 1 to be transferred to each of a plurality of transfer substrates T to which the semiconductor chip 1 is transferred from each of a plurality of support substrates S is performed for the first transfer substrate T in each of the plurality of support substrates S, and for the second and subsequent transfer substrates T in each of the plurality of support substrates S, and a transfer step in which, while performing a calculation for selecting a semiconductor chip 1 to be transferred to at least the n+1th (n is an integer equal to or greater than 1) transfer substrate T from each of the plurality of support substrates S in the calculation step, the semiconductor chip 1 is sequentially transferred to the nth transfer substrate T in each of the plurality of support substrates S. This makes it possible to perform a calculation for selecting a semiconductor chip 1 to be transferred to at least the n+1th transfer substrate T while the semiconductor chip 1 is being sequentially transferred to the nth transfer substrate T in each of the plurality of support substrates S. Therefore, after the transfer step to the nth transfer substrate T is completed, it is possible to reduce the time required to wait until the calculation is completed before starting transfer to the next transfer substrate T, which is caused by the selection calculation unit 62 not completing the calculation to select the semiconductor chip 1 to be transferred to the (n+1)th transfer substrate T. As a result, it is possible to reduce the time required for the transfer step of transferring the semiconductor chip 1 from the support substrate S to the transfer substrate T.

[0066] Furthermore, in this embodiment, as described above, the transfer process sequentially transfers the semiconductor chip 1 to the nth transfer substrate T on each of the multiple support substrates S until the calculation for selecting the semiconductor chip 1 to be transferred from at least each of the multiple support substrates S to the n+1th transfer substrate T is completed. This makes it possible to complete the calculation for selecting the semiconductor chip 1 to be transferred from at least the first support substrate S1 to the n+1th transfer substrate T while the semiconductor chip 1 is being sequentially transferred to the nth transfer substrate on each of the multiple support substrates S. Therefore, after the transfer process to the nth transfer substrate T is completed, the occurrence of a wait time until the calculation is completed before starting transfer to the next transfer substrate T can be further reduced, which is caused by the selection calculation unit 62 not completing the calculation for selecting the semiconductor chip 1 to be transferred to the n+1th transfer substrate T. Therefore, the time required for the transfer process of transferring the semiconductor chip 1 from the support substrate S to the transfer substrate T can be further reduced.

[0067] Furthermore, in this embodiment, as described above, the number of the multiple support substrates S is preset as the minimum number that allows for completing the calculation to select the semiconductor chip 1 to be transferred from each of the multiple support substrates S to the final transfer substrate T in the pre-final transfer process in which the semiconductor chip 1 is sequentially transferred to the but-before-final transfer substrate T from each of the multiple support substrates S. This makes it possible to complete the calculation to select the semiconductor chip to be transferred from the first support substrate S1 to the final transfer substrate T during the pre-final transfer process in which the semiconductor chip 1 is transferred from each of the preset multiple support substrates S. Therefore, after the pre-final transfer process is completed, it is possible to further reduce the occurrence of a wait time before starting transfer to the final transfer substrate T until the calculation is completed, which is caused by the selection calculation unit 62 not completing the calculation to select the semiconductor chip 1 to be transferred to the final transfer substrate T. Therefore, it is possible to further reduce the time required for the transfer process in which the semiconductor chip 1 is transferred from the support substrate S to the transfer substrate T.

[0068] Furthermore, in the transfer apparatus 100 for the semiconductor chip 1 of this embodiment, as described above, the control unit 61 is configured to perform a calculation for selecting a semiconductor chip 1 to be transferred from each of the plurality of support substrates S on which the semiconductor chip 1 is supported onto each of all of the plurality of transfer substrates T to which the semiconductor chip 1 is transferred, for the first transfer substrate T on each of the plurality of support substrates S, and to perform the calculation for the second and subsequent transfer substrates T on each of the plurality of support substrates S, and to sequentially irradiate the plurality of support substrates S with laser light while performing a calculation for selecting a semiconductor chip 1 to be transferred from each of the plurality of support substrates S onto at least the n+1th (n is an integer equal to or greater than 1) transfer substrate T, thereby sequentially transferring the semiconductor chip 1 onto the nth transfer substrate T on each of the plurality of support substrates S. As a result, similar to the transfer method for the semiconductor chip 1 of the first embodiment described above, while the semiconductor chip 1 is being sequentially transferred onto the nth transfer substrate T on each of the plurality of support substrates S, it is possible to perform a calculation for selecting a semiconductor chip 1 to be transferred onto at least the n+1th transfer substrate T. Therefore, after the transfer step to the nth transfer substrate T is completed, it is possible to reduce the time required to wait until the calculation is completed before starting transfer to the next transfer substrate T, which is caused by the selection calculation unit 62 not completing the calculation to select the semiconductor chip 1 to be transferred to the (n+1)th transfer substrate T. As a result, it is possible to provide a transfer device 100 for a semiconductor chip 1 that can reduce the time required for the transfer step of transferring the semiconductor chip 1 from the support substrate S to the transfer substrate T.

[0069] [Variations] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present invention is defined by the claims rather than the above description of the embodiments, and further includes all modifications (variations) within the meaning and scope of the claims.

[0070] For example, in the above embodiment, the transfer process sequentially transfers the semiconductor chip 1 to the nth transfer substrate T on each of the multiple support substrates S1 to SP until the calculation to select the semiconductor chip 1 to be transferred to the n+1th transfer substrate T from at least each of the multiple support substrates S1 to SP is completed. However, the present invention is not limited to this. For example, the transfer process does not necessarily require transferring the semiconductor chip 1 to the nth transfer substrate T on each of the multiple support substrates S1 to SP until the calculation to select the semiconductor chip 1 to be transferred to the n+1th transfer substrate T from each of the multiple support substrates S1 to SP is completed. Even in this case, by transferring the semiconductor chip 1 to the nth transfer substrate T on each of the multiple support substrates S1 to SP while performing the calculation to select the semiconductor chip 1 to be transferred to the n+1th or more transfer substrates T from each of the multiple support substrates S1 to SP, the calculation wait time for the n+1th transfer substrate T can be shortened. Therefore, the time required for the transfer process can be reduced.

[0071] Furthermore, in the above embodiment, an example was shown in which the number of the multiple support substrates S was set in advance as the minimum number that allows for completing the calculation to select the semiconductor chip 1 to be transferred to the final transfer substrate T on the first support substrate S1 in the final pre-transfer process, but the present invention is not limited to this. For example, the number of the multiple support substrates S may be a number less than the minimum number. Even in this case, by performing the calculation to select the semiconductor chip 1 to be transferred to the n+1th or more transfer substrates T from each of the multiple support substrates S1 to SP while transferring the semiconductor chip 1 to the nth transfer substrate T on each of the multiple support substrates S1 to SP, the calculation wait time for the n+1th transfer substrate T can be shortened. Therefore, the time required for the transfer process can be reduced.

[0072] In the above embodiment, the selection calculation unit 62 continuously performs calculations to select the semiconductor chips 1 to be transferred from each of the plurality of support substrates S1 to SP to each of the plurality of transfer substrates T while the semiconductor chips 1 are being transferred in sequence to each of the plurality of transfer substrates T on each of the plurality of support substrates S1 to SP, but the present invention is not limited to this. For example, the selection calculation unit 62 may intermittently perform calculations to select the semiconductor chips 1 to be transferred from each of the plurality of support substrates S1 to SP to each of the plurality of transfer substrates T.

[0073] In the above embodiment, the laser light irradiation unit 50 includes the laser light source 51, the galvanometer mirror 52, and the fθ lens 53, but the present invention is not limited to this. For example, a polygon mirror may be used instead of the galvanometer mirror 52, and a mask may be used instead of the galvanometer mirror 52 and the fθ lens 53. [Explanation of symbols]

[0074] 1. Semiconductor chip 30 Support board holding part 40 Transferred substrate holder 50 Laser light irradiation unit 61 Control Unit 100 Transfer device S Support board S1 1st support board T Transferred substrate L laser light

Claims

1. A semiconductor chip transfer method for transferring semiconductor chips from a plurality of support substrates to a plurality of transfer substrates, the method comprising: a calculation step of selecting a semiconductor chip to be transferred from each of a plurality of support substrates on which a semiconductor chip is supported to each of a plurality of transfer substrates to which the semiconductor chip is to be transferred, the calculation step being performed for a first transfer substrate in each of the plurality of support substrates, and for a second or subsequent transfer substrate in each of the plurality of support substrates; a transfer step of sequentially transferring the semiconductor chip to the n-th transfer substrate on each of the plurality of support substrates by sequentially irradiating the plurality of support substrates with laser light while performing a calculation in the calculation step to select the semiconductor chip to be transferred from each of the plurality of support substrates to at least the n+1th transfer substrate (n is an integer greater than or equal to 1).

2. 2. The semiconductor chip transfer method according to claim 1, wherein the transfer step sequentially transfers the semiconductor chip to the n-th transfer substrate on each of the plurality of support substrates until a calculation for selecting the semiconductor chip to be transferred from each of the plurality of support substrates to the n+1-th transfer substrate is completed.

3. 3. The semiconductor chip transfer method according to claim 1, wherein the number of the plurality of support substrates is preset as the minimum number that can complete a calculation to select the semiconductor chip to be transferred from each of the plurality of support substrates to the final substrate in a pre-final transfer process in which the semiconductor chip is sequentially transferred to the substrate just before the final substrate on each of the plurality of support substrates.

4. A semiconductor chip transfer apparatus that transfers semiconductor chips from a plurality of support substrates onto a plurality of transfer substrates, a support substrate holding section that holds a support substrate on which a semiconductor chip is provided; a transfer substrate holder that holds a transfer substrate onto which the semiconductor chip provided on the support substrate is transferred; a laser light irradiation unit that irradiates the support substrate with laser light; a control unit that controls the irradiation of laser light by the laser light irradiation unit, The control unit a calculation for selecting the semiconductor chip to be transferred from each of the plurality of support substrates on which the semiconductor chip is supported to each of the plurality of transfer substrates to which the semiconductor chip is to be transferred is performed for a first transfer substrate in each of the plurality of support substrates, and is also performed for a second or subsequent transfer substrate in each of the plurality of support substrates; A semiconductor chip transfer device configured to control the sequential transfer of the semiconductor chip to the nth transfer substrate on each of the plurality of support substrates by sequentially irradiating the plurality of support substrates with laser light while performing calculations to select the semiconductor chip to be transferred from each of the plurality of support substrates to at least the n+1th transfer substrate (n is an integer greater than or equal to 1).

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