Solar cell unit, solar cell unit quality determination device, solar cell unit etching device, and solar cell unit manufacturing method

Abstract

Provided is a solar battery unit with which the determination of the quality of a solar battery cell used in a low-light environment can be performed in a shorter time and with improved accuracy. A solar battery unit 1 includes, on a large-sized semiconductor substrate 11: cell regions 2 where back electrode-type solar battery cells are formed; and a margin region 3 other than the cell regions. The cell regions 2 have a first conductive type region where a first conductive type (for example, a p-type) semiconductor layer and a first electrode layer are formed, and a second conductive type region where a second conductive type (for example, an n-type) semiconductor layer and a second electrode layer are formed. The margin region 3 has a first conductive type unit region 4 of a unit area, a second conductive type unit region 5 of a unit area, and a pn short-circuit region 6. The first conductive type semiconductor layer is formed in the first conductive type unit region 4; the second conductive type semiconductor layer is formed in the second conductive type unit region 5; and the first conductive type semiconductor layer, the second conductive type semiconductor layer, and a third electrode layer that electrically short-circuits the first and second conductive-type semiconductor layers are formed in the pn short-circuit region 6.

Description

[Technical Field]

[0001] The present invention relates to a solar cell unit, a quality determination device for a solar cell unit, an etching device for a solar cell unit, and a method for manufacturing a solar cell unit. [Background technology]

[0002] Solar cells are sometimes installed in electronic devices such as IoT (Internet of Things) devices and wearable devices. Such electronic devices come in a variety of shapes and are also small in size from the standpoint of design. Therefore, solar cells installed in such electronic devices must be small or have a variety of shapes that fit the shape of the electronic device.

[0003] Such solar cells are obtained by forming one or more solar cells on a large semiconductor substrate (wafer) of a specified size (for example, a 6-inch semi-square shape), and then cutting out the one or more solar cells by, for example, laser dicing. Hereinafter, the large semiconductor substrate on which one or more solar cells are formed before laser dicing will be referred to as a solar cell unit. In addition, in a solar cell unit, the area where the solar cells are formed will be referred to as the cell area, and the other area will be referred to as the blank area.

[0004] In the manufacture of solar cell units, a wet etching method is used, particularly for patterning the electrode layer in the cell region. One technique for inspecting (evaluating) leakage current due to insufficient etching of the electrode layer is to measure photoluminescence characteristics. Patent Documents 1 and 2 disclose techniques for irradiating a semiconductor substrate with light, observing the photoluminescence intensity from the semiconductor substrate, and inspecting (evaluating) the etching of a semiconductor device based on the photoluminescence intensity. Patent Documents 1 and 2 also disclose techniques for such wet etching methods, for irradiating a semiconductor substrate with light, observing the photoluminescence intensity from the semiconductor substrate, and determining the completion of etching based on the photoluminescence intensity. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 6-13446 [Patent Document 2] Japanese Patent Application Laid-Open No. 2008-210947 Summary of the Invention [Problem to be solved by the invention]

[0006] Electronic devices such as IoT devices and wearable devices are designed to operate in high-illumination environments (e.g., 1 sun (1000 W / m)) that correspond to outdoor sunlight. 2 )), but also in low-illuminance environments corresponding to indoor lighting environments (for example, environments where the current density is 1 / 1000 to 1 / 100 of the current density obtained outdoors). Therefore, solar cells mounted on such electronic devices are required to have high photoelectric conversion efficiency not only in high-illuminance environments but also in low-illuminance environments.

[0007] In manufacturing such solar cell units, when determining the pass / fail of the photoelectric conversion characteristics of the cell region (solar cell) based on the photoluminescence intensity described above, the photoluminescence intensity may be high and determined to be good when irradiated with light corresponding to a high-illuminance environment, but low and determined to be bad when irradiated with light corresponding to a low-illuminance environment. This is thought to be due to the following factors: That is, even if leakage current is negligible in a high-illuminance environment, it may become a significant leakage current in a low-illuminance environment. In other words, even if insufficient etching is negligible in a high-illuminance environment, it may become a significant insufficient etching in a low-illuminance environment.

[0008] In this regard, it is conceivable to determine the pass / fail of the photoelectric conversion characteristics of a cell region (solar cell) based on the photoluminescence intensity when irradiated with light corresponding to a low-illuminance environment, instead of the photoluminescence intensity when irradiated with light corresponding to a high-illuminance environment. However, when irradiated with light corresponding to a low-illuminance environment, a detectable photoluminescence intensity cannot be obtained unless the irradiation time is extended, resulting in a long measurement time. Furthermore, if the photoluminescence intensity is low, the measurement accuracy will decrease due to the lower measurement limit of the detector or the influence of noise. Furthermore, at low illuminance output, the output of the light source will not be stable, resulting in a decrease in measurement accuracy.

[0009] Furthermore, in the manufacture of such solar cell units, when the etching completion determination technique based on the photoluminescence intensity described above is used, the photoluminescence intensity may be high when irradiated with light corresponding to a high-illuminance environment, but low when irradiated with light corresponding to a low-illuminance environment. This is thought to be due to the following factors, as described above. That is, even if leakage current is negligible in a high-illuminance environment, it may become a significant leakage current in a low-illuminance environment. In other words, even if insufficient etching is negligible in a high-illuminance environment, it may become a significant insufficient etching in a low-illuminance environment.

[0010] Therefore, the present invention aims to provide a solar cell unit, a solar cell unit quality determination device, and a solar cell unit manufacturing method that can shorten the time and improve the accuracy of determining the quality of solar cells used in low-light environments. Another object of the present invention is to provide a method for manufacturing a solar cell unit and an etching apparatus for a solar cell unit that can appropriately etch the electrode layer of a solar cell used in a low-illumination environment. [Means for solving the problem]

[0011] The solar cell unit according to the present invention is a solar cell unit having a cell region in which back electrode solar cells are formed on a large-sized semiconductor substrate, and a remaining blank region. The cell region has a first conductivity type region and a second conductivity type region, where the first conductivity type is one of p-type and n-type, and the second conductivity type is the other of p-type and n-type. In the first conductivity type region, a first conductivity type semiconductor layer and a first electrode layer are formed on the back side of the large-sized semiconductor substrate, and in the second conductivity type region, a second conductivity type semiconductor layer and a second electrode layer are formed on the back side of the large-sized semiconductor substrate. The blank region has a first conductivity type unit region of a unit area, a second conductivity type unit region of a unit area, and a pn short-circuit region. In the first conductivity type unit region, a first conductivity type semiconductor layer is formed on the back surface side of the large-sized semiconductor substrate, in the second conductivity type unit region, a second conductivity type semiconductor layer is formed on the back surface side of the large-sized semiconductor substrate, and in the pn short circuit region, a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and a third electrode layer that electrically shorts the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are formed on the back surface side of the large-sized semiconductor substrate.

[0012] The solar cell unit quality determination device according to the present invention includes a light irradiation unit that irradiates light onto a main surface of the large-sized semiconductor substrate, a photoluminescence observation unit that observes photoluminescence intensity from the large-sized semiconductor substrate, and a quality determination unit that determines the quality of solar cells in the cell region of the solar cell unit based on the photoluminescence intensity. The light irradiation unit irradiates the main surface of the large-sized semiconductor substrate with light of an intensity that is lower than the high illuminance and higher than the low illuminance, assuming that the solar cells in the cell region of the solar cell unit are used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment. The pass / fail judgment unit calculates the photoluminescence intensity of the cell region, the photoluminescence intensity of the first conductivity type unit region, and the photoluminescence intensity of the second conductivity type unit region using the photoluminescence intensity of the pn short-circuit region as a reference, compares the calculated photoluminescence intensity of the cell region with the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region, and judges solar cells in a cell region whose photoluminescence intensity deviates by a predetermined amount or more from the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region to have defective photoelectric conversion characteristics in the low-illuminance environment.

[0013] The method for manufacturing a solar cell unit according to the present invention is a method for manufacturing a solar cell unit having a cell region in which back electrode type solar cells are formed on a large-sized semiconductor substrate and a remaining blank region. The cell region has a first conductivity type region and a second conductivity type region, the first conductivity type being one of p-type and n-type, and the second conductivity type being the other of p-type and n-type. The blank region has a first conductivity type unit region of a unit area, a second conductivity type unit region of a unit area, and a pn short-circuit region. The method for manufacturing the solar cell unit includes forming a first conductivity type semiconductor layer in the first conductivity type region of the cell region on the back surface side of the large-sized semiconductor substrate, forming a second conductivity type semiconductor layer in the second conductivity type region of the cell region on the back surface side of the large-sized semiconductor substrate, forming a first conductivity type semiconductor layer in the first conductivity type unit region in the blank region on the back surface side of the large-sized semiconductor substrate, forming a second conductivity type semiconductor layer in the second conductivity type unit region in the blank region on the back surface side of the large-sized semiconductor substrate, and forming a first conductivity type semiconductor layer in the pn short-circuit region in the blank region on the back surface side of the large-sized semiconductor substrate. the semiconductor layer forming step of forming a first electrode layer corresponding to the first conductivity type semiconductor layer in the first conductivity type region of the cell region, a second electrode layer corresponding to the second conductivity type semiconductor layer in the second conductivity type region of the cell region, and a third electrode layer corresponding to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the pn short circuit region of the marginal region and electrically shorting them; and the quality determining step of determining the quality of the solar cell in the cell region of the solar cell unit.In the quality determination step, assuming that the solar cell in the cell region of the solar cell unit is used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment, a main surface of the large-sized semiconductor substrate is irradiated with light having an intensity lower than the high illuminance and higher than the low illuminance, and the photoluminescence intensity from the cell region in the large-sized semiconductor substrate is observed, and the photoluminescence intensities from the first conductivity type unit region, the second conductivity type unit region, and the pn short-circuit region in the large-sized semiconductor substrate are observed, and the photoluminescence intensity from the pn short-circuit region is determined. Using the photoluminescence intensity as a reference, the photoluminescence intensity of the cell region, the photoluminescence intensity of the first conductivity type unit region, and the photoluminescence intensity of the second conductivity type unit region are calculated, and the calculated photoluminescence intensity of the cell region is compared with the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region, and solar cells in a cell region whose photoluminescence intensity deviates by a predetermined amount or more from the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region are determined to have poor photoelectric conversion characteristics in a low-illuminance environment.

[0014] Another method for manufacturing a solar cell unit according to the present invention is a method for manufacturing a solar cell unit having a cell region in which back electrode type solar cells are formed on a semiconductor substrate, and includes a semiconductor layer formation process of forming a first conductivity type semiconductor layer in a part of the cell region on the back surface side of the semiconductor substrate and forming a second conductivity type semiconductor layer in another part of the cell region on the back surface side of the semiconductor substrate, and an electrode layer formation process of depositing a conductive film continuously on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the cell region on the back surface side of the semiconductor substrate, and etching the conductive film to form patterned electrode layers on each of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. In the electrode layer formation process, assuming that the solar cell in the cell region of the solar cell unit is used in a high-illuminance environment corresponding to an outdoor sunlight environment and a low-illuminance environment corresponding to an indoor lighting environment, the main surface of the semiconductor substrate is sequentially irradiated with light of at least two different intensities, namely, the high-illuminance and the low-illuminance, and the photoluminescence intensities from the semiconductor substrate are sequentially observed, and the completion of etching of the conductive film is determined based on the photoluminescence intensities for the at least two intensities of light.

[0015] The etching apparatus for a solar cell unit according to the present invention is an etching apparatus for forming an electrode layer in a cell region of a solar cell unit having a semiconductor substrate in which back electrode type solar cells are formed, and includes: an etching unit that etches a conductive film continuously deposited on a first conductivity type semiconductor layer and a second conductivity type semiconductor layer in the cell region on the back side of the semiconductor substrate to form the electrode layer patterned on each of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; a light irradiation unit that sequentially irradiates light of at least two different intensities, high illuminance and low illuminance, onto a main surface of the semiconductor substrate in the etching unit, assuming that the solar cells in the cell region of the solar cell unit are used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment; a photoluminescence observation unit that sequentially observes photoluminescence intensities from the semiconductor substrate in the etching unit; and an etching completion determination unit that determines the completion of etching of the conductive film based on the photoluminescence intensities for the at least two intensities of light. [Effects of the Invention]

[0016] According to the present invention, it is possible to reduce the time required and improve the accuracy of determining whether a solar cell used in a low-illuminance environment is good or bad. Furthermore, according to the present invention, it is possible to appropriately etch the electrode layer of a solar cell used in a low-illumination environment. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 2 is a view of the solar cell unit according to the first embodiment as seen from the back side. [Figure 2] 2 is an enlarged view of a cell region (solar cell), a first conductivity type unit region, a second conductivity type unit region, and a pn short-circuit region in the solar cell unit shown in FIG. 1. FIG. [Figure 3] 3 is a cross-sectional view of the cell region (solar cell) shown in FIG. 2 taken along line III-III. [Figure 4]4 is a cross-sectional view taken along line IV-IV of the first-conductivity type unit region, the second-conductivity type unit region, and the pn short-circuit region shown in FIG. 2. FIG. [Figure 5A] 5A to 5C are diagrams illustrating a semiconductor layer forming step in the method for manufacturing a solar cell unit according to the first embodiment. [Figure 5B] 5A to 5C are diagrams illustrating a transparent conductive film forming step in the method for manufacturing a solar cell unit according to the first embodiment. [Figure 5C] 5A to 5C are diagrams illustrating a metal electrode layer forming step in the method for manufacturing the solar cell unit according to the first embodiment. [Figure 5D] 5A to 5C are diagrams illustrating a transparent electrode layer forming step in the method for manufacturing the solar cell unit according to the first embodiment. [Figure 6A] 5A to 5C are diagrams illustrating a semiconductor layer forming step in the method for manufacturing a solar cell unit according to the first embodiment. [Figure 6B] FIG. 4 is a diagram showing a transparent electrode layer forming step (transparent conductive film forming step) in the method for manufacturing the solar cell unit according to the first embodiment. [Figure 6C] 5A to 5C are diagrams illustrating a metal electrode layer forming step in the method for manufacturing the solar cell unit according to the first embodiment. [Figure 7] 3A and 3B are diagrams showing a quality determining step and a quality determining device in the method for manufacturing the solar cell unit according to the first embodiment. [Figure 8] FIG. 10 is a view of the solar cell unit according to the second embodiment as seen from the back side. [Figure 9] 9 is an enlarged view of a cell area (solar cell) in the solar cell unit shown in FIG. [Figure 10] 10 is a cross-sectional view of the cell region (solar cell) shown in FIG. 9 taken along line XX. [Figure 11A] 10A and 10B are diagrams illustrating a semiconductor layer forming step in the method for manufacturing a solar cell unit according to a second embodiment. [Figure 11B] 10A and 10B are diagrams illustrating a transparent conductive film forming step in the method for manufacturing a solar cell unit according to a second embodiment. [Figure 11C] FIG. 10 is a diagram showing a metal electrode layer forming step in the method for manufacturing a solar cell unit according to the second embodiment. [Figure 11D] FIG. 10 is a diagram showing a transparent electrode layer forming step in the method for manufacturing a solar cell unit according to the second embodiment. [Figure 12] FIG. 10 is a diagram showing an etching apparatus for a solar cell unit according to a second embodiment. [Figure 13A] FIG. 10 is a diagram for explaining the separation distance between transparent electrode layers. [Figure 13B] FIG. 10 is a diagram for explaining the separation distance between transparent electrode layers. [Figure 13C] FIG. 10 is a diagram for explaining the separation distance between transparent electrode layers. [Figure 14A] FIG. 10 is a graph showing the relationship between the etching time of the transparent electrode layer and the open-circuit voltage Voc of the semiconductor substrate. [Figure 14B] FIG. 10 is a diagram showing the relationship between the fill factor FF of the semiconductor substrate and the etching time of the transparent electrode layer. [Figure 14C] FIG. 10 is a diagram showing the relationship between the fill factor FF and the open circuit voltage Voc of a semiconductor substrate. [Figure 15] FIG. 10 is a graph showing the relationship between the etching time of the transparent electrode layer and the photoluminescence intensity of the semiconductor substrate. [Figure 16] FIG. 10 is a diagram showing an etching apparatus for a solar cell unit according to a modified example of the second embodiment. [Figure 17] FIG. 10 is a diagram showing an example of the relationship between photoluminescence intensity in a high-illuminance environment and photoluminescence intensity in a low-illuminance environment. DETAILED DESCRIPTION OF THE INVENTION

[0018] An example of an embodiment of the present invention will be described below with reference to the accompanying drawings. The same or equivalent parts in each drawing are designated by the same reference numerals. For convenience, hatching and reference numerals may be omitted. In such cases, reference should be made to other drawings.

[0019] [First embodiment] In the first embodiment, a technique for determining whether a solar cell unit is good or bad based on photoluminescence intensity will be described.

[0020] (solar cell unit) FIG. 1 is a view of the solar cell unit according to the first embodiment as viewed from the back side. The solar cell unit 1 shown in FIG. 1 includes a semiconductor substrate (large-sized semiconductor substrate) (Wafer) 11 of a specified size (for example, a 6-inch semi-square shape). The solar cell unit 1 has, on the main surface of the semiconductor substrate 11, a plurality of cell regions 2 in which a plurality of solar cells are formed, and a blank region 3 other than the cell regions 2. The solar cell unit 1 also has, in part of the blank region 3, a first-conductivity-type unit region 4, a second-conductivity-type unit region 5, and a pn short-circuit region 6.

[0021] <Cell area: solar cell> The cell region 2 is an area that will become a back electrode type (also called back contact type or back junction type) heterojunction solar cell when cut out from the solar cell unit 1 by, for example, laser dicing.

[0022] Solar cells are sometimes installed in electronic devices such as IoT (Internet of Things) devices and wearable devices. Such electronic devices come in a variety of shapes and are also small in size from the standpoint of design. Therefore, solar cells installed in such electronic devices must be small or have a variety of shapes that fit the shape of the electronic device.

[0023] Fig. 2 is an enlarged view of the cell region (solar cell), first-conductivity type unit region, second-conductivity type unit region, and pn short-circuit region in the solar cell unit shown in Fig. 1. Fig. 3 is a cross-sectional view of the cell region (solar cell) shown in Fig. 2 taken along line III-III, and Fig. 4 is a cross-sectional view of the first-conductivity type unit region, second-conductivity type unit region, and pn short-circuit region shown in Fig. 2 taken along line IV-IV.

[0024] 2 and 3, the cell region 2 has a first conductivity type region 7 and a second conductivity type region 8 on the main surface of the semiconductor substrate 11. Hereinafter, the main surface of the semiconductor substrate 11 that receives light will be referred to as the light-receiving surface, and the main surface of the semiconductor substrate 11 opposite the light-receiving surface will be referred to as the back surface.

[0025] The first conductivity type region 7 has a so-called comb shape and includes a plurality of finger portions 7f corresponding to the teeth of the comb and busbar portions 7b corresponding to supports for the teeth of the comb. The busbar portions 7b extend in a first direction (X direction) along one side of the semiconductor substrate 11, and the finger portions 7f extend from the busbar portions 7b in a second direction (Y direction) that intersects with the first direction.

[0026] Similarly, the second conductivity type region 8 has a so-called comb shape and includes a plurality of finger portions 8f corresponding to the teeth of the comb and busbar portions 8b corresponding to supports for the teeth of the comb. The busbar portions 8b extend in a first direction (X direction) along one side of the semiconductor substrate 11 opposite the other side, and the finger portions 8f extend in a second direction (Y direction) from the busbar portions 8b.

[0027] The finger portions 7f and 8f are strip-shaped extending in the second direction (Y direction) and are alternately arranged in the first direction (X direction). Note that, in the following, a comb-like shape is shown as an example of the first conductivity type region 7 and the second conductivity type region 8, but the first conductivity type region 7 and the second conductivity type region 8 are not limited to this and may be formed in various shapes.

[0028] In the cell region 2, a passivation layer 13 and an optical adjustment layer 15 are formed in this order on the light-receiving surface side of the semiconductor substrate 11. In the cell region 2, a passivation layer 23, a first-conductivity-type semiconductor layer 25, and a first electrode layer 27 are formed in this order on a portion of the back surface side of the semiconductor substrate 11 (first-conductivity-type region 7). In the cell region 2, a passivation layer 33, a second-conductivity-type semiconductor layer 35, and a second electrode layer 37 are formed in this order on another portion of the back surface side of the semiconductor substrate 11 (second-conductivity-type region 8).

[0029] The semiconductor substrate 11 is formed of a crystalline silicon material such as single crystal silicon or polycrystalline silicon. The semiconductor substrate 11 is, for example, an n-type semiconductor substrate obtained by doping a crystalline silicon material with an n-type dopant. The semiconductor substrate 11 may also be a p-type semiconductor substrate obtained by doping a crystalline silicon material with a p-type dopant. An example of an n-type dopant is phosphorus (P). An example of a p-type dopant is boron (B). The semiconductor substrate 11 functions as a photoelectric conversion substrate that absorbs incident light from the light-receiving surface side and generates photocarriers (electrons and holes).

[0030] By using crystalline silicon as the material for the semiconductor substrate 11, dark current is relatively small, and a relatively high output (stable output regardless of illuminance) can be obtained even when the intensity of incident light is low.

[0031] Passivation layer 13 is formed on the light-receiving surface side of semiconductor substrate 11. Passivation layer 23 is formed in first conductivity type region 7 on the back surface side of semiconductor substrate 11. Passivation layer 33 is formed in second conductivity type region 8 on the back surface side of semiconductor substrate 11. Passivation layers 13, 23, and 33 are formed of a material containing, for example, an intrinsic (i-type) amorphous silicon material as its main component. Passivation layers 13, 23, and 33 suppress recombination of carriers generated in semiconductor substrate 11 and increase carrier collection efficiency.

[0032] Optical adjustment layer 15 is formed on passivation layer 13 on the light-receiving surface side of semiconductor substrate 11. Optical adjustment layer 15 functions as an anti-reflection layer that prevents reflection of incident light, and also functions as a protective layer that protects the light-receiving surface side of semiconductor substrate 11 and passivation layer 13. Optical adjustment layer 15 is formed from an insulating material such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or a composite thereof.

[0033] The first conductivity type semiconductor layer 25 is formed on the passivation layer 23, i.e., in the first conductivity type region 7 on the back surface side of the semiconductor substrate 11. The first conductivity type semiconductor layer 25 is formed of, for example, an amorphous silicon material. The first conductivity type semiconductor layer 25 is a p-type semiconductor layer obtained by doping, for example, an amorphous silicon material with a p-type dopant (for example, the above-mentioned boron (B)).

[0034] The second conductivity type semiconductor layer 35 is formed on the passivation layer 33, i.e., in the second conductivity type region 8 on the back surface side of the semiconductor substrate 11. The second conductivity type semiconductor layer 35 is formed of, for example, an amorphous silicon material. The second conductivity type semiconductor layer 35 is, for example, an n-type semiconductor layer in which an amorphous silicon material is doped with an n-type dopant (for example, the above-mentioned phosphorus (P)). Note that the first conductivity type semiconductor layer 25 may be an n-type semiconductor layer, and the second conductivity type semiconductor layer 35 may be a p-type semiconductor layer.

[0035] The first conductivity type semiconductor layer 25 and the passivation layer 23, and the second conductivity type semiconductor layer 35 and the passivation layer 33 form strips extending in the second direction (Y direction) and are arranged alternately in the first direction (X direction). Parts of the second conductivity type semiconductor layer 35 and the passivation layer 33 may overlap parts of the adjacent first conductivity type semiconductor layer 25 and the passivation layer 23 (not shown).

[0036] The first electrode layer 27 corresponds to the first conductivity type semiconductor layer 25, specifically, is formed on the first conductivity type semiconductor layer 25 in the first conductivity type region 7 on the back surface side of the semiconductor substrate 11. The second electrode layer 37 corresponds to the second conductivity type semiconductor layer 35, specifically, is formed on the second conductivity type semiconductor layer 35 in the second conductivity type region 8 on the back surface side of the semiconductor substrate 11. The first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29 stacked in this order on the first conductivity type semiconductor layer 25. The second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39 stacked in this order on the second conductivity type semiconductor layer 35.

[0037] The first transparent electrode layer 28 and the second transparent electrode layer 38 are formed of a transparent conductive material. The transparent conductive material is not particularly limited, but an example thereof is ITO (Indium Tin Oxide: a composite oxide of indium oxide and tin oxide).

[0038] The first metal electrode layer 29 and the second metal electrode layer 39 are not particularly limited, but are formed from, for example, a conductive paste material containing a particulate metal material such as silver, copper, or aluminum, an insulating resin material, and a solvent.

[0039] The first electrode layer 27 and the second electrode layer 37, i.e., the first transparent electrode layer 28, the second transparent electrode layer 38, the first metal electrode layer 29, and the second metal electrode layer 39, form strips extending in the second direction (Y direction) and are arranged alternately in the first direction (X direction). The first transparent electrode layer 28 and the second transparent electrode layer 38 are separated from each other, and the first metal electrode layer 29 and the second metal electrode layer 39 are also separated from each other.

[0040] The width of the first transparent electrode layer 28 in the first direction (X direction) is narrower than the width of the first metal electrode layer 29 in the first direction (X direction), and the width of the second transparent electrode layer 38 in the first direction (X direction) is narrower than the width of the second metal electrode layer 39 in the first direction (X direction).

[0041] <Margin area> 2 and 4 , in the marginal region 3, a passivation layer 13 and an optical adjustment layer 15 are formed in this order on the light-receiving surface side of the semiconductor substrate 11. In addition, in the marginal region 3, passivation layers 23 and 33 may be stacked on the back surface side of the semiconductor substrate 11. The marginal region 3 has a first-conductivity-type unit region 4, a second-conductivity-type unit region 5, and a pn short-circuit region 6.

[0042] <<First Conductivity Type Unit Area>> The first conductivity type unit region 4 is a region of unit area. In the first conductivity type unit region 4, a passivation layer 23 and a first conductivity type semiconductor layer 25 are sequentially formed on the back surface side of the semiconductor substrate 11. The size of the unit area is not particularly limited, but it may be set according to the detection resolution of the photoluminescence observation unit in the pass / fail determination device described later.

[0043] <<Second conductivity type unit region>> The second conductivity type unit region 5 is a region of unit area. In the second conductivity type unit region 5, a passivation layer 33 and a second conductivity type semiconductor layer 35 are sequentially formed on the back surface side of the semiconductor substrate 11. The size of the unit area is not particularly limited, but it may be set according to the detection resolution of the photoluminescence observation unit in the pass / fail determination device described later.

[0044] <<pn short - circuit region>> In the pn short - circuit region 6, a passivation layer 23 and a first conductivity type semiconductor layer 25 are sequentially formed on a part of the back surface side of the semiconductor substrate 11, and a passivation layer 33 and a second conductivity type semiconductor layer 35 are sequentially formed on another part of the back surface side of the semiconductor substrate 11. Also, in the pn short - circuit region 6, a third electrode layer 27A corresponding to the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 and electrically short - circuiting them is formed. The size of the pn short - circuit region 6 is not particularly limited, but it may be set according to the detection resolution of the photoluminescence observation unit described later.

[0045] (Method for manufacturing a solar cell unit) Next, a method for manufacturing a solar cell unit according to the first embodiment will be described with reference to Figures 5A to 5D, 6A to 6C, and 7. Figures 5A and 6A are views showing a semiconductor layer forming step in the method for manufacturing a solar cell unit according to the first embodiment, and Figures 5B and 6B are views showing a transparent conductive film forming step (transparent electrode layer forming step) in the method for manufacturing a solar cell unit according to the first embodiment. Figures 5C and 6C are views showing a metal electrode layer forming step in the method for manufacturing a solar cell unit according to the first embodiment, and Figure 5D is a view showing a transparent electrode layer forming step in the method for manufacturing a solar cell unit according to the first embodiment. Furthermore, Figure 7 is a view showing a pass / fail determination step and a pass / fail determination device in the method for manufacturing a solar cell unit according to the first embodiment.

[0046] First, as shown in Fig. 5A, a passivation layer 23 and a first-conductivity-type semiconductor layer 25 are formed on a portion of the rear surface side of the semiconductor substrate 11, specifically, on the first-conductivity-type region 7 in the cell region 2. Furthermore, as shown in Fig. 6A, the passivation layer 23 and the first-conductivity-type semiconductor layer 25 are formed on a portion of the first-conductivity-type unit region 4 and the pn short-circuit region 6 in the marginal region 3 (semiconductor layer formation step).

[0047] For example, a passivation layer material film and a first conductivity type semiconductor layer material film may be formed in sequence on the entire back surface side of semiconductor substrate 11 using a CVD method or a PVD method, and then passivation layer 23 and first conductivity type semiconductor layer 25 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique.

[0048] The etching solution for the p-type semiconductor layer material film may be, for example, an acidic solution such as hydrofluoric acid containing ozone or a mixture of nitric acid and hydrofluoric acid, and the etching solution for the n-type semiconductor layer material film may be, for example, an alkaline solution such as an aqueous potassium hydroxide solution.

[0049] Alternatively, when a passivation layer and a first conductivity type semiconductor layer are stacked on the back side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 23 and the first conductivity type semiconductor layer 25 may be deposited and patterned simultaneously using a mask.

[0050] 5A, a passivation layer 33 and a second-conductivity-type semiconductor layer 35 are formed in another part of the back surface side of the semiconductor substrate 11, specifically, in the second-conductivity-type region 8 in the cell region 2. Furthermore, as shown in FIG. 6A, a passivation layer 33 and a second-conductivity-type semiconductor layer 35 are formed in another part of the second-conductivity-type unit region 5 and the pn short-circuit region 6 in the marginal region 3 (semiconductor layer formation step).

[0051] For example, as described above, a passivation layer material film and a second conductivity type semiconductor layer material film may be formed in this order on the entire back surface of the semiconductor substrate 11 using a CVD method or a PVD method, and then the passivation layer 33 and the second conductivity type semiconductor layer 35 may be patterned using an etching method that uses a resist or a metal mask generated using a photolithography technique or a printing technique, or using a known lift-off method.

[0052] Alternatively, when a passivation layer and a second conductivity type semiconductor layer are stacked on the back side of the semiconductor substrate 11 using a CVD method or a PVD method, the passivation layer 33 and the second conductivity type semiconductor layer 35 may be deposited and patterned simultaneously using a mask.

[0053] In this semiconductor layer formation step, the passivation layer 23 or the passivation layer 33 may be formed in the marginal region 3 on the back surface side of the semiconductor substrate 11. Furthermore, the passivation layer 13 and the optical adjustment layer 15 may be formed on the entire surface of the light-receiving surface side of the semiconductor substrate 11, that is, on the entire surface of the light-receiving surface side of the cell region 2, the marginal region 3, the first-conductivity-type unit region 4, the second-conductivity-type unit region 5, and the pn short-circuit region 6.

[0054] Next, as shown in Fig. 5B, a transparent conductive film 28Z is formed continuously over the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 in the cell region 2. Furthermore, as shown in Fig. 6B, a transparent electrode layer 28A is formed continuously over the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 in the pn short-circuit region 6 of the marginal region 3 (transparent conductive film forming step: transparent electrode layer forming step). The transparent conductive film 28Z and the transparent electrode layer 28A can be formed by, for example, a CVD method or a PVD method.

[0055] 5C, a first metal electrode layer 29 is formed on the first conductivity type semiconductor layer 25 via the transparent conductive film 28Z in the cell region 2, and a second metal electrode layer 39 is formed on the second conductivity type semiconductor layer 35 via the transparent conductive film 28Z. Furthermore, as shown in FIG. 6C, a metal electrode layer 29A is formed on the transparent electrode layer 28A in the pn short-circuit region 6 of the marginal region 3 (metal electrode layer forming step).

[0056] The first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A are formed by printing a printing material (e.g., ink). Methods for forming the first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A include screen printing, inkjet printing, gravure coating, and dispenser methods. Among these, screen printing is preferred.

[0057] The printing material contains particulate (for example, spherical) metal material in an insulating resin material. The printing material may contain a solvent or the like to adjust viscosity or coatability.

[0058] Examples of insulating resin materials include matrix resins, etc. More specifically, the insulating resin is preferably a polymer compound, and particularly preferably a thermosetting resin or an ultraviolet-curing resin, and representative examples thereof include epoxy, urethane, polyester, and silicone-based resins.

[0059] Examples of the metal material include silver, copper, aluminum, etc. Among these, a silver paste containing silver particles is preferred.

[0060] For example, the proportion of the metal material contained in the printing material is 85% or more and 95% or less by weight relative to the entire printing material.

[0061] Next, after printing the first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A, the insulating resin in the first metal electrode layer 29, the second metal electrode layer 39, and the metal electrode layer 29A is cured by heat treatment or ultraviolet irradiation treatment.

[0062] 5D, the transparent conductive film 28Z is patterned by etching using the first metal electrode layer 29 and the second metal electrode layer 39 as a mask to form the first transparent electrode layer 28 and the second transparent electrode layer 38, which are separated from each other and patterned, on the first conductivity-type semiconductor layer 25 and the second conductivity-type semiconductor layer 35, respectively (transparent electrode layer formation step). Examples of the etching method include wet etching, and examples of the etching solution include an acidic solution such as hydrochloric acid (HCl). Through these steps, the solar cell unit 1 of the first embodiment is completed.

[0063] 7, light is irradiated onto the solar cell unit 1 (semiconductor substrate 11), the photoluminescence intensity from the solar cell unit 1 (semiconductor substrate 11) is observed, and the quality of the solar cells in the cell region 2 in the solar cell unit 1 is determined based on the photoluminescence intensity (quality determination step). Below, a quality determination device and quality determination method for the solar cell unit 1 will be described.

[0064] (Device and method for determining quality of solar cell unit) Next, with reference to Fig. 7, a solar cell unit 1 quality determination device according to the first embodiment, i.e., a device for determining the quality of the photoelectric conversion characteristics of the cell region (solar cell) 2, will be described, as well as a solar cell unit 1 quality determination method according to the first embodiment, i.e., a method for determining the quality of the photoelectric conversion characteristics of the solar cell in the cell region 2 in the quality determination step described above. As shown in Fig. 7, quality determination device 100 is a device that determines the quality of the photoelectric conversion characteristics of the solar cell in the cell region 2 in the state of solar cell unit 1 described above. Quality determination device 100 includes a light irradiation unit 110, a photoluminescence observation unit 120, and a quality determination unit 130.

[0065] The light irradiating unit 110 irradiates light onto the solar cell unit 1, i.e., the light-receiving surface or back surface of the semiconductor substrate 11. Since the back surface is shielded from light by a metal electrode layer, it is preferable to irradiate light onto the light-receiving surface. The light irradiating unit 110 is, for example, a light irradiating device that irradiates light with a wavelength corresponding to the photoluminescence characteristics of the semiconductor substrate 11.

[0066] The light irradiating section 110 is configured to irradiate the solar cells in the cell region 2 of the solar cell unit 1 with high illuminance (for example, 1 sun (1000 W / m)) corresponding to an outdoor sunlight environment. 2 )) and when used in a low-illuminance environment corresponding to an indoor lighting environment (for example, an environment where the current density is 1 / 1000 to 1 / 100 of the current density obtained outdoors), the solar cell unit, i.e., the semiconductor substrate 11, is irradiated with light of an intensity lower than high illuminance and higher than low illuminance.

[0067] The photoluminescence observation unit 120 observes the photoluminescence intensity from the solar cell unit 1, that is, from the semiconductor substrate 11. The photoluminescence observation unit may be a known photoluminescence intensity measuring device incorporating a CCD image sensor or the like.

[0068] Specifically, the photoluminescence observation unit 120 observes the photoluminescence intensity from the cell region 2, as well as the photoluminescence intensity from the first conductivity type unit region 4, the second conductivity type unit region 5, and the pn short-circuit region 6. For example, the photoluminescence observation unit 120 may simultaneously observe the photoluminescence intensity from each of the regions 2, 4, 5, and 6, and perform resolved analysis and composite analysis for each pixel.

[0069] The quality determining unit 130 determines the quality of the photoelectric conversion characteristics of the solar cell in the cell region 2 based on the photoluminescence intensity. The quality determining unit 130 calculates in advance a first-conductivity-type region area ratio as the area ratio of the first-conductivity-type regions 7 in the cell region 2 to the first-conductivity-type unit regions 4. The quality determining unit 130 also calculates in advance a second-conductivity-type region area ratio as the area ratio of the second-conductivity-type regions 8 in the cell region 2 to the second-conductivity-type unit regions 5.

[0070] First, the quality determination unit 130 calculates the photoluminescence intensity of the cell region 2 based on the photoluminescence intensity of the pn short-circuited region 6. The quality determination unit 130 also calculates the photoluminescence intensity of the first-conductivity-type unit region 4 based on the photoluminescence intensity of the pn short-circuited region 6. The quality determination unit 130 also calculates the photoluminescence intensity of the second-conductivity-type unit region 5 based on the photoluminescence intensity of the pn short-circuited region 6.

[0071] Next, the quality determining unit 130 compares the calculated photoluminescence intensity of the cell region 2 with the calculated photoluminescence intensities of the first conductivity type unit region 4 and the second conductivity type unit region 5. The quality determining unit 130 then determines that a solar cell in the cell region 2 having a photoluminescence intensity that deviates by a predetermined amount or more from the calculated photoluminescence intensities of the first conductivity type unit region 4 and the second conductivity type unit region 5 has defective photoelectric conversion characteristics in a low-illuminance environment.

[0072] At this time, the quality determination unit 130 takes into consideration the area ratio of the first conductivity type region 7 of the cell region 2 to the first conductivity type unit region 4, and the area ratio of the second conductivity type region 8 of the cell region 2 to the second conductivity type unit region 5.

[0073] Specifically, the quality determining unit 130 calculates a first-conductivity-type region reference photoluminescence intensity by multiplying the photoluminescence intensity of the first-conductivity-type unit region 4, which is based on the photoluminescence intensity of the pn short-circuited region 6, by the first-conductivity-type region area ratio. The quality determining unit 130 also calculates a second-conductivity-type region reference photoluminescence intensity by multiplying the photoluminescence intensity of the second-conductivity-type unit region 5, which is based on the photoluminescence intensity of the pn short-circuited region 6, by the second-conductivity-type region area ratio. The quality determining unit 130 then calculates a reference photoluminescence intensity by adding the first-conductivity-type region reference photoluminescence intensity and the second-conductivity-type region reference photoluminescence intensity.

[0074] Then, the quality determining unit 130 compares the calculated photoluminescence intensity of the cell region 2 with the calculated reference photoluminescence intensity. The quality determining unit 130 determines that a solar cell in the cell region 2 having a photoluminescence intensity that deviates from the calculated reference photoluminescence intensity by a predetermined amount or more has poor photoelectric conversion characteristics in a low-illuminance environment.

[0075] The pass / fail judgment unit 130 is configured with an arithmetic processor such as a DSP (Digital Signal Processor) or an FPGA (Field-Programmable Gate Array). The various functions of the pass / fail judgment unit 130 are realized by executing predetermined software (programs, applications) stored in a storage unit, for example. The various functions of the pass / fail judgment unit 130 may be realized by a combination of hardware and software, or may be realized only by hardware (electronic circuits).

[0076] The quality determination unit 130 also includes a storage unit. The storage unit stores the first conductivity type region area ratio and the second conductivity type region area ratio that are calculated in advance. The storage unit also stores in advance a reference value (predetermined value) of an allowable deviation in photoluminescence intensity, which is a reference value for determining the quality of the photoelectric conversion characteristics of the solar cell in the cell region 2. The storage unit is, for example, a rewritable memory such as an EEPROM, or a rewritable disk such as an HDD (Hard Disk Drive) or SSD (Solid State Drive).

[0077] Here, when determining the pass / fail of the photoelectric conversion characteristics of a cell region (solar cell) based on photoluminescence intensity, the photoluminescence intensity may be high and determined to be good when irradiated with light corresponding to a high-illuminance environment, but low and determined to be bad when irradiated with light corresponding to a low-illuminance environment. This is thought to be due to the following factors: That is, even if leakage current is negligible in a high-illuminance environment, it may become a significant leakage current in a low-illuminance environment. In other words, even if insufficient etching of the transparent electrode layer is negligible in a high-illuminance environment, it may become a significant insufficient etching of the transparent electrode layer in a low-illuminance environment.

[0078] In this regard, it is conceivable to determine the pass / fail of the photoelectric conversion characteristics of a cell region (solar cell) based on the photoluminescence intensity when irradiated with light corresponding to a low-illuminance environment, instead of the photoluminescence intensity when irradiated with light corresponding to a high-illuminance environment. However, when irradiated with light corresponding to a low-illuminance environment, a detectable photoluminescence intensity cannot be obtained unless the irradiation time is extended, resulting in a long measurement time. Furthermore, if the photoluminescence intensity is low, the measurement accuracy will decrease due to the lower measurement limit of the detector or the influence of noise. Furthermore, at low illuminance output, the output of the light source will be unstable, reducing measurement accuracy and reproducibility.

[0079] In this regard, according to the solar cell unit 1 of this embodiment, the first-conductivity-type unit region 4, the second-conductivity-type unit region 5, and the pn short-circuit region 6 are formed in a portion of the marginal region 3. Therefore, according to the solar cell unit 1, the solar cell unit 1 quality determination device 100, and the quality determination process in the solar cell unit 1 manufacturing method of this embodiment, when measuring the photoluminescence characteristics of the cell region 2 (solar cell) in the solar cell unit 1 (semiconductor substrate 11), a quality determination standard is calculated based on the first-conductivity-type unit region 4, the second-conductivity-type unit region 5, and the pn short-circuit region 6, and the quality of the cell region 2 (solar cell) being subjected to quality determination can be determined relative to the calculated standard. In this way, since evaluation is possible using a relative value rather than an absolute value, leakage current, i.e., insufficient etching, can be determined independently of the intensity of the irradiated light. Therefore, leakage current in a low-illuminance environment, i.e., insufficient etching of the transparent electrode layer, can be determined with high accuracy even when the irradiated light is set to a higher illuminance than the low illuminance corresponding to a low-illuminance environment.

[0080] In this way, the irradiated light can be made stronger than the low irradiance corresponding to a low-illuminance environment, thereby shortening the irradiation time required to obtain a detectable photoluminescence intensity and shortening the measurement time. Furthermore, the photoluminescence intensity can be increased, thereby reducing the effect of the detector's lower measurement limit or noise, and improving measurement accuracy. Furthermore, the output of the light source can be increased, resulting in a stable light source output, improving measurement accuracy and reproducibility.

[0081] Here, in solar cell devices mounted on small electronic devices such as small IoT devices or wearable devices, multiple solar cell cells are laid out on a large semiconductor substrate (wafer) of a specified size (for example, a 6-inch semi-square shape). In this regard, according to the solar cell unit 1, the solar cell unit 1 quality determination device 100, and the solar cell unit 1 manufacturing method of this embodiment, multiple cell regions can be observed simultaneously depending on the detection resolution of the photoluminescence observation unit, thereby improving productivity.

[0082] A commonly known method for evaluating the photoelectric conversion characteristics of the cell region 2 of a solar cell unit is to measure the current-voltage characteristics (IV characteristics) by physical contact using a needle and calculate the photoelectric conversion efficiency. However, with this method, the proportion of the area damaged by physical contact to the total area of ​​the cell region increases due to the miniaturization of solar cells, resulting in a significant decrease in carrier lifetime, i.e., photoelectric conversion efficiency, at low illuminance. In this regard, the solar cell unit 1, solar cell unit 1 quality assessment device 100, and solar cell unit 1 manufacturing method of this embodiment are based on photoluminescence characteristics without physical contact, and therefore can avoid a decrease in carrier lifetime, i.e., photoelectric conversion efficiency, at low illuminance, caused by damage due to physical contact.

[0083] Incidentally, when measuring photoluminescence under light irradiation corresponding to a low-illuminance environment, the output of the light source is unstable at low illuminance output, which reduces measurement accuracy and reproducibility. In response to this problem, it is conceivable to keep the output of the light source constant and attenuate the light irradiation intensity using an ND filter. In this regard, according to this embodiment, the output of the light source can be increased, making the ND filter unnecessary.

[0084] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and various modifications and variations are possible. For example, in the first embodiment described above, when considering the area ratio of the first-conductivity-type region 7 of the cell region 2 to the first-conductivity-type unit region 4 and the area ratio of the second-conductivity-type region 8 of the cell region 2 to the second-conductivity-type unit region 5, the reference values ​​of the first-conductivity-type unit region 4 and the second-conductivity-type unit region 5 are multiplied by the area ratio. However, the measurement result of the cell region 2 may be divided by the area ratio.

[0085] Specifically, the quality determination unit in the solar cell unit quality determination device and the quality determination step in the solar cell unit manufacturing method include: calculating a first cell area ratio and a second cell area ratio as the area ratios of the first conductivity type regions and the second conductivity type regions in the cell region, a first conductivity type region area ratio as the area ratio of the first conductivity type regions in the cell region to the first conductivity type unit region, and a second conductivity type region area ratio as the area ratio of the second conductivity type regions in the cell region to the second conductivity type unit region; a first cell unit area photoluminescence intensity obtained by dividing the photoluminescence intensity of the cell area, based on the photoluminescence intensity of the pn short-circuited area, by the first cell area ratio and the first conductivity type area ratio, and a second cell unit area photoluminescence intensity obtained by dividing the photoluminescence intensity of the cell area, based on the photoluminescence intensity of the pn short-circuited area, by the second cell area ratio and the second conductivity type area ratio; comparing the calculated photoluminescence intensity of the first cell unit region with the calculated photoluminescence intensity of the first conductivity type unit region, and comparing the calculated photoluminescence intensity of the second cell unit region with the calculated photoluminescence intensity of the second conductivity type unit region; Solar cells in a cell region having a first cell unit region photoluminescence intensity that deviates by a predetermined amount or more from the calculated photoluminescence intensity of the first conductivity type unit region, and / or solar cells in a cell region having a second cell unit region photoluminescence intensity that deviates by a predetermined amount or more from the calculated photoluminescence intensity of the second conductivity type unit region, may be determined to have poor photoelectric conversion characteristics in a low-illuminance environment.

[0086] In the first embodiment described above, a plurality of sets, each consisting of a first conductivity type unit region 4, a second conductivity type unit region 5, and a pn short-circuit region 6, are arranged for each cell region 2, but it is sufficient to arrange at least one set. From the viewpoint of performance variations on the main surface of a large-sized semiconductor substrate, it is preferable to arrange one set near each cell region 2, as in the embodiment described above.

[0087] In the first embodiment described above, a solar cell unit having a plurality of cell regions (solar cells), a quality determination device thereof, and a manufacturing method thereof are exemplified. However, the present invention is not limited to this, and can also be applied to a solar cell unit having one cell region (solar cell), a quality determination device thereof, and a manufacturing method thereof.

[0088] In the first embodiment described above, the manufacturing method is exemplified in which the transparent electrode layer is etched using the metal electrode layer as a mask, but the present invention is not limited to this. For example, the features of the present invention can also be applied to a manufacturing method in which the transparent electrode layer is etched using a general metal mask or resist as a mask.

[0089] In addition, in the first embodiment described above, wet etching using an etching solution is exemplified, but the present invention is not limited to this. For example, the features of the present invention can also be applied to dry etching.

[0090] Furthermore, in the first embodiment described above, heterojunction solar cells and solar cell units are exemplified as shown in FIG. 3, but the present invention is not limited to heterojunction solar cells and solar cell units, and is applicable to various solar cell cells and solar cell units such as homojunction solar cells.

[0091] In the first embodiment described above, the solar cell and solar cell unit have a crystalline silicon substrate, but are not limited thereto. For example, the solar cell and solar cell unit may have a gallium arsenide (GaAs) substrate.

[0092] [Second embodiment] In the second embodiment, a technique for determining the completion of etching of a solar cell unit based on photoluminescence intensity will be described.

[0093] (solar cell unit) Fig. 8 is a view of the solar cell unit according to the second embodiment as viewed from the back side. The solar cell unit 1 shown in Fig. 8 includes a semiconductor substrate (large-sized semiconductor substrate) (Wafer) 11 of a specified size (for example, a 6-inch semi-square shape). The solar cell unit 1 has, on the main surface of the semiconductor substrate 11, a plurality of cell regions 2 in which a plurality of solar cells are formed, and a blank region 3 other than the cell regions 2.

[0094] <Cell area: solar cell> The cell region 2 is an area that will become a back electrode type (also called back contact type or back junction type) heterojunction solar cell when cut out from the solar cell unit 1 by, for example, laser dicing.

[0095] Solar cells are sometimes installed in electronic devices such as IoT (Internet of Things) devices and wearable devices. Such electronic devices come in a variety of shapes and are also small in size from the standpoint of design. Therefore, solar cells installed in such electronic devices must be small or have a variety of shapes that fit the shape of the electronic device.

[0096] Fig. 9 is an enlarged view of a cell region (solar cell) in the solar cell unit shown in Fig. 8, and Fig. 10 is a cross-sectional view of the cell region (solar cell) shown in Fig. 9 taken along line XX. As shown in Fig. 9 and Fig. 10, the cell region 2 has a first conductivity type region 7 and a second conductivity type region 8 on the main surface of a semiconductor substrate 11. Hereinafter, the main surface of the semiconductor substrate 11 on the light-receiving side will be referred to as the light-receiving surface, and the main surface of the semiconductor substrate 11 opposite the light-receiving surface will be referred to as the back surface.

[0097] The first conductivity type region 7 has a so-called comb shape, as described above, and includes a plurality of finger portions 7f corresponding to the teeth of the comb and busbar portions 7b corresponding to the support portions of the teeth. The second conductivity type region 8 also has a so-called comb shape, as described above, and includes a plurality of finger portions 8f corresponding to the teeth of the comb and busbar portions 8b corresponding to the support portions of the teeth of the comb.

[0098] In the cell region 2, a passivation layer 13 and an optical adjustment layer 15 are formed in this order on the light-receiving surface side of the semiconductor substrate 11. In the cell region 2, a passivation layer 23, a first-conductivity-type semiconductor layer 25, and a first electrode layer 27 are formed in this order on a portion of the back surface side of the semiconductor substrate 11 (first-conductivity-type region 7). In the cell region 2, a passivation layer 33, a second-conductivity-type semiconductor layer 35, and a second electrode layer 37 are formed in this order on another portion of the back surface side of the semiconductor substrate 11 (second-conductivity-type region 8).

[0099] The semiconductor substrate 11, passivation layers 13, 23, and 33, optical adjustment layer 15, first conductivity type semiconductor layer 25, second conductivity type semiconductor layer 35, first electrode layer 27, and second electrode layer 37 are as described above. As described above, the first electrode layer 27 has a first transparent electrode layer 28 and a first metal electrode layer 29. The second electrode layer 37 has a second transparent electrode layer 38 and a second metal electrode layer 39.

[0100] <Margin area> In the marginal region 3, a passivation layer 13 and an optical adjustment layer 15 may be formed in this order on the light-receiving surface side of the semiconductor substrate 11. In addition, in the marginal region 3, a passivation layer 23 and a first conductivity type semiconductor layer 25 may be formed on the back surface side of the semiconductor substrate 11, or a passivation layer 33 and a second conductivity type semiconductor layer 35 may be formed.

[0101] (Solar cell unit manufacturing method) Next, a method for manufacturing a solar cell unit according to the second embodiment will be described with reference to Figures 11A to 11D. Figure 11A is a diagram showing a semiconductor layer forming step in the method for manufacturing a solar cell unit according to the second embodiment, and Figure 11B is a diagram showing a transparent conductive film forming step in the method for manufacturing a solar cell unit according to the second embodiment. Figure 11C is a diagram showing a metal electrode layer forming step in the method for manufacturing a solar cell unit according to the second embodiment, and Figure 11D is a diagram showing a transparent electrode layer forming step in the method for manufacturing a solar cell unit according to the second embodiment. Figures 11A to 11D show the back side of semiconductor substrate 11, and the front side of semiconductor substrate 11 is omitted.

[0102] 11A, a passivation layer 23 and a first-conductivity-type semiconductor layer 25 are formed on a portion of the back surface of the semiconductor substrate 11, specifically, on the first-conductivity-type region 7 in the cell region 2 (semiconductor layer forming step). Next, a passivation layer 33 and a second-conductivity-type semiconductor layer 35 are formed on another portion of the back surface of the semiconductor substrate 11, specifically, on the second-conductivity-type region 8 in the cell region 2 (semiconductor layer forming step). The method for forming these semiconductor layers may be the same as that described above.

[0103] In this semiconductor layer formation step, the passivation layer 23 and the first conductivity type semiconductor layer 25 may be formed in the marginal region 3 on the back surface side of the semiconductor substrate 11, or the passivation layer 33 and the second conductivity type semiconductor layer 35 may be formed (not shown). Also, the passivation layer 13 and the optical adjustment layer 15 may be formed on the entire surface of the light-receiving surface side of the semiconductor substrate 11, that is, on the entire surface of the light-receiving surface side of the cell region 2 and the marginal region 3 (not shown).

[0104] 11B, a transparent conductive film 28Z is formed continuously over the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 in the cell region 2 (transparent conductive film forming process). As a method for forming the transparent conductive film 28Z, for example, a CVD method or a PVD method is used, as described above.

[0105] 11C, a first metal electrode layer 29 is formed on the first conductivity-type semiconductor layer 25 via the transparent conductive film 28Z in the cell region 2, and a second metal electrode layer 39 is formed on the second conductivity-type semiconductor layer 35 via the transparent conductive film 28Z (metal electrode layer forming step). As described above, methods for forming the first metal electrode layer 29 and the second metal electrode layer 39 include printing methods using a printing material (e.g., ink), such as screen printing, inkjet printing, gravure coating, and dispenser methods. Among these, screen printing is preferred.

[0106] 11D, the transparent conductive film 28Z is patterned by etching using the first metal electrode layer 29 and the second metal electrode layer 39 as a mask to form the first transparent electrode layer 28 and the second transparent electrode layer 38 that are separated from each other (transparent electrode layer forming step). For example, the etching method may be wet etching, and the etching solution may be an acidic solution such as hydrochloric acid (HCl).

[0107] At this time, the completion of etching of the transparent conductive film 28Z is determined based on the photoluminescence characteristics, the details of which will be described later in the description of an etching apparatus and an etching method for the solar cell unit 1. Through the above steps, the back electrode type solar cell unit 1 of the second embodiment is completed.

[0108] (Photovoltaic unit etching equipment) Next, with reference to Fig. 12, an etching apparatus for a solar cell unit 1 according to a second embodiment, i.e., an etching apparatus for a transparent electrode layer in a cell region (solar cell) 2, will be described. Fig. 12 is a diagram showing an etching apparatus for a solar cell unit according to a second embodiment, i.e., an etching apparatus for a transparent electrode layer in a cell region (solar cell). As shown in Fig. 12, an etching apparatus 200 is an etching apparatus for forming a first transparent electrode layer 28 and a second transparent electrode layer 38 in the cell region (solar cell) 2 in the transparent electrode layer forming step described above. The etching apparatus 200 includes an etching section 210, a light irradiation section 220, a photoluminescence observation section 230, and an etching completion determination section 240.

[0109] The etching unit 210 etches the transparent conductive film 28Z formed continuously on the first conductivity-type semiconductor layer 25 and the second conductivity-type semiconductor layer 35 in the cell region 2 on the back surface side of the semiconductor substrate 11 shown in FIG. 11C to form the first transparent electrode layer 28 and the second transparent electrode layer 38 patterned on the first conductivity-type semiconductor layer 25 and the second conductivity-type semiconductor layer 35, respectively, as shown in FIG. 11D. For example, as described above, an etching method using the first metal electrode layer 29 and the second metal electrode layer 39 as a mask is used. An example of the etching method is wet etching, and the etching unit 210 is an etching solution bath. An example of the etching solution is an acid solution such as hydrochloric acid (HCl).

[0110] The light irradiation unit 220 irradiates light onto the light-receiving surface or back surface of the semiconductor substrate 11 in the etching unit 210. Since the back surface is shielded from light by a metal electrode layer, it is preferable to irradiate light onto the light-receiving surface. The light irradiation unit 220 is, for example, a light irradiation device that irradiates light with a wavelength corresponding to the photoluminescence characteristics of the semiconductor substrate 11.

[0111] The light irradiating section 220 is configured to irradiate the solar cells in the cell region 2 of the solar cell unit 1 with high illuminance (for example, 1 sun (1000 W / m)) corresponding to an outdoor sunlight environment. 2)) and in a low-illuminance environment corresponding to an indoor lighting environment (for example, an environment where the current density is 1 / 100 to 1 / 1000 of the current density obtained outdoors), light of two different intensities, high illuminance and low illuminance, are sequentially irradiated onto the main surface of the semiconductor substrate 11 in the etching portion 210.

[0112] However, if the output of the light source is reduced as a method for generating low-illuminance light, the output of the light source may become unstable, and accuracy and reproducibility may decrease. In this regard, a preferable method for generating low-illuminance light is to keep the output of the light source constant and use an ND filter to reduce the light.

[0113] The photoluminescence observation unit 230 sequentially observes the photoluminescence intensity from the semiconductor substrate 11 in the etching unit 210. The photoluminescence observation unit may be a known photoluminescence intensity measuring device incorporating a CCD image sensor or the like. For example, the photoluminescence observation unit 230 may simultaneously observe the photoluminescence intensity of each cell region 2 and perform resolved analysis and composite analysis for each pixel.

[0114] The etching completion determination unit 240 determines the completion of etching of the transparent conductive film 28Z based on the photoluminescence intensities for the two intensities of light. Specifically, if the photoluminescence intensity for high-intensity light is equal to or greater than a predetermined value, but the photoluminescence intensity for low-intensity light is less than the predetermined value, the etching completion determination unit 240 determines that etching of the transparent conductive film 28Z is not yet complete, because there is a leakage current due to insufficient etching that is negligible at high illuminance but not at low illuminance. The predetermined value may be set in advance taking into account the high-illuminance and low-illuminance environments in which the solar cells in the cell region 2 of the solar cell unit 1 are used.

[0115] The etching completion determination unit 240 determines the completion of etching of the transparent conductive film 28Z when the photoluminescence intensity for high-intensity light is equal to or greater than a predetermined value and the photoluminescence intensity for low-intensity light is equal to or greater than a predetermined value.

[0116] If the photoluminescence intensity for high-intensity light is less than a predetermined value even after a predetermined time has elapsed, the etching completion determination unit 240 determines that the defect is due to factors other than insufficient etching of the transparent conductive film 28Z, since there is a possibility that the defect is due to factors other than leakage current caused by insufficient etching. The predetermined time may be set in advance taking into consideration the film formation conditions and etching conditions of the transparent conductive film 28Z.

[0117] The etching completion determination unit 240 is configured with an arithmetic processor such as a DSP (Digital Signal Processor) or an FPGA (Field-Programmable Gate Array). The various functions of the etching completion determination unit 240 are realized by executing predetermined software (programs, applications) stored in a storage unit, for example. The various functions of the etching completion determination unit 240 may be realized by a combination of hardware and software, or may be realized only by hardware (electronic circuits).

[0118] The etching completion determination unit 240 also includes a storage unit. The storage unit pre-stores a photoluminescence intensity threshold (predetermined value) for determining the completion of etching and an etching time (predetermined time). The storage unit is, for example, a rewritable memory such as an EEPROM, or a rewritable disk such as an HDD (Hard Disk Drive) or an SSD (Solid State Drive).

[0119] (Method of etching solar cell unit) Next, a method for etching the solar cell unit 1 according to the second embodiment, that is, a method for etching the transparent electrode layers 28, 38 of the cell region (solar cell) 2 in the transparent electrode layer forming step described above, will be described.

[0120] 12, the semiconductor substrate 11 on which the transparent conductive film 28Z is successively formed on the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35 is immersed (wet etching) in an etching unit 210. As a result, the transparent conductive film 28Z is etched using the first metal electrode layer 29 and the second metal electrode layer 39 formed on the transparent conductive film 28Z as a mask, and the first transparent electrode layer 28 and the second transparent electrode layer 38 patterned on the first conductivity type semiconductor layer 25 and the second conductivity type semiconductor layer 35, respectively, are formed as shown in FIG.

[0121] At this time, the light irradiating unit 220 irradiates the light receiving surface or back surface of the semiconductor substrate 11 with light of a wavelength according to the photoluminescence characteristics of the semiconductor substrate 11. Specifically, the light irradiating unit 220 sequentially irradiates the main surface of the semiconductor substrate 11 in the etching unit 210 with light of two different intensities, high illuminance and low illuminance. Then, the photoluminescence observing unit 230 sequentially observes the photoluminescence intensities from the semiconductor substrate 11.

[0122] Here, there is a correlation between the performance (open circuit voltage Voc, fill factor FF) of the semiconductor substrate 11 and the photoluminescence intensity characteristics of the semiconductor substrate 11 relative to the separation distance between the transparent electrode layers 28 and 38.

[0123] 13A to 13C are diagrams for explaining the separation distance between the transparent electrode layers 28, 38. Fig. 13A is a diagram for explaining (i) a case where the etching of the transparent electrode layers 28, 38 is insufficient and the separation distance between the transparent electrode layers 28, 38 is small, Fig. 13B is a diagram for explaining (ii) a case where the etching of the transparent electrode layers 28, 38 is appropriate and the separation distance between the transparent electrode layers 28, 38 is appropriate, and Fig. 13C is a diagram for explaining (iii) a case where the etching of the transparent electrode layers 28, 38 is excessive and the separation distance between the transparent electrode layers 28, 38 is large.

[0124] 14A is a graph showing the relationship between the open-circuit voltage Voc of the semiconductor substrate 11 and the etching time of the transparent electrode layers 28 and 38, FIG. 14B is a graph showing the relationship between the fill factor FF of the semiconductor substrate 11 and the etching time of the transparent electrode layers 28 and 38, and FIG. 14C is a graph showing the relationship between the fill factor FF and the open-circuit voltage Voc of the semiconductor substrate 11. FIG. 15 is a graph showing the relationship between the photoluminescence intensity of the semiconductor substrate 11 and the etching time of the transparent electrode layers 28 and 38.

[0125] 13A, (i) when the etching of the transparent electrode layers 28, 38 is insufficient and the separation distance between the transparent electrode layers 28, 38 is small, the Voc and FF of the semiconductor substrate 11 are low, as shown in (i) of FIG. 14A and (i) of FIG. 13B. In this case, the photoluminescence intensity of the semiconductor substrate 11 is also low, as shown in (i) of FIG. 15.

[0126] Thereafter, as etching of the transparent electrode layers 28, 38 progresses and the distance between the transparent electrode layers 28, 38 increases, Voc and FF of the semiconductor substrate 11 increase. At this time, the photoluminescence intensity of the semiconductor substrate 11 also increases.

[0127] 13B, (ii) when the etching of the transparent electrode layers 28, 38 becomes appropriate (optimal) and the separation distance between the transparent electrode layers 28, 38 becomes appropriate (optimal), Voc and FF of the semiconductor substrate 11 become maximum as shown in (ii) of Figure 14A and (ii) of Figure 14B. At this time, as shown in (ii) of Figure 15, the photoluminescence intensity of the semiconductor substrate 11 also becomes maximum, or the change in the photoluminescence intensity becomes saturated and the increase (change) in the photoluminescence intensity per unit time becomes a predetermined value or less.

[0128] Furthermore, as the etching of the transparent electrode layers 28, 38 progresses and the distance between the transparent electrode layers 28, 38 increases, the FF decreases while the Voc of the semiconductor substrate 11 remains at its maximum. At this time, the photoluminescence intensity of the semiconductor substrate 11 remains at its maximum.

[0129] That is, as shown in Fig. 13C, (iii) if the transparent electrode layers 28, 38 are excessively etched and the separation distance between the transparent electrode layers 28, 38 is too large, the Voc of the semiconductor substrate 11 remains at its maximum but the FF decreases, as shown in Fig. 14A (iii) and Fig. 14B (iii). In this case, the photoluminescence intensity of the semiconductor substrate 11 remains at its maximum, as shown in Fig. 15 (iii).

[0130] As a result, (ii) the point at which the PL intensity reaches its maximum (saturates), or the point at which the decrease (change) in the photoluminescence intensity per unit time is below a predetermined value, is the point at which etching of the transparent electrode layers 28, 38 is appropriate (optimal).

[0131] FIG. 17 shows an example of the relationship between photoluminescence intensity under a high-illuminance environment and photoluminescence intensity under a low-illuminance environment. When determining the completion of etching of a transparent conductive film based on photoluminescence intensity, as shown by the diamond-shaped points in FIG. 17, the photoluminescence intensity may be high when irradiated with light corresponding to a high-illuminance environment (e.g., 1 sun), but low when irradiated with light corresponding to a low-illuminance environment (e.g., an environment where the current density is 1 / 110 of the current density under a high-illuminance environment). This is thought to be due to the following factors: A leakage current that is negligible under a high-illuminance environment may become a significant leakage current under a low-illuminance environment. In other words, a leakage current that is negligible under a high-illuminance environment may become a significant leakage current under a low-illuminance environment. In other words, a leakage current that is negligible under a high-illuminance environment may become a significant leakage current under a low-illuminance environment.

[0132] Therefore, the etching completion determination unit 240 determines the completion of etching of the transparent conductive film 28Z based on the photoluminescence intensities for the two intensities of light. Specifically, when the photoluminescence intensity for high-intensity light is equal to or greater than a predetermined value but the photoluminescence intensity for low-intensity light is less than the predetermined value, as shown by the diamond-shaped points in Fig. 17, the etching completion determination unit 240 determines that etching of the transparent conductive film 28Z is not yet completed, because there is a leakage current due to insufficient etching that is negligible at high illuminance but not at low illuminance.

[0133] Then, the etching completion judgment unit 240 judges that etching of the transparent conductive film 28Z has ended when the photoluminescence intensity for high-intensity light becomes equal to or greater than a predetermined value, as shown by the circular points in Figure 17, and the photoluminescence intensity for low-intensity light becomes equal to or greater than a predetermined value.

[0134] If the photoluminescence intensity against high-intensity light is less than a predetermined value even after a predetermined time has elapsed, as shown by the triangular point in Figure 17, the etching completion judgment unit 240 judges that the defect is due to factors other than insufficient etching of the transparent conductive film 28Z, since there is a possibility that the defect is due to factors other than leakage current caused by insufficient etching.

[0135] As described above, the manufacturing method of the solar cell unit 1 and the etching apparatus 200 for the solar cell unit 1 of this embodiment determine the end of etching of the transparent conductive film 28Z based on the photoluminescence characteristics not only in a high-illuminance environment but also in a low-illuminance environment. This makes it possible to reduce leakage current due to insufficient etching, which is negligible in a high-illuminance environment but not in a low-illuminance environment. This allows for appropriate etching of the transparent electrode layers 28, 38 of the cell region (solar cell) 2 used in a low-illuminance environment. This improves the photoelectric conversion efficiency of the cell region (solar cell) 2 in low-illuminance environments.

[0136] Furthermore, according to the manufacturing method of the solar cell unit 1 and the etching apparatus 200 for the solar cell unit 1 of this embodiment, it is possible to distinguish between a decrease in photoelectric conversion efficiency (lifetime) caused by leakage current due to insufficient etching and a decrease in photoelectric conversion efficiency (lifetime) caused by other factors.

[0137] Here, in solar cell cells to be mounted on small electronic devices such as small IoT devices or wearable devices, multiple solar cell cells are laid out on a large semiconductor substrate (wafer) of a specified size (for example, a 6-inch semi-square shape). In this regard, according to the manufacturing method of the solar cell unit 1 and the etching apparatus 200 for the solar cell unit 1 of this embodiment, multiple cell regions can be observed simultaneously depending on the detection resolution of the photoluminescence observation section, thereby improving productivity.

[0138] A known method for determining the end of etching is to measure current or resistance through physical contact using a needle. However, with this method, the proportion of the area damaged by physical contact to the total area of ​​the cell region increases due to the miniaturization of solar cells, resulting in a significant decrease in carrier lifetime, i.e., photoelectric conversion efficiency, at low illuminance. In this regard, the solar cell unit 1 manufacturing method and solar cell unit 1 etching apparatus 200 of this embodiment are based on photoluminescence characteristics without physical contact, and therefore can avoid a decrease in carrier lifetime, i.e., photoelectric conversion efficiency, at low illuminance, that would be caused by damage due to physical contact.

[0139] However, when actually mass-producing products, it is difficult to set the optimal etching time. For example, when a transparent electrode layer is simultaneously formed on multiple semiconductor substrates using the PVD method, the film thickness of the transparent electrode layer varies depending on the position within the PVD equipment. If the film thickness of the transparent electrode layer varies depending on the semiconductor substrate (wafer), it is difficult to set the optimal etching time when etching the transparent electrode layers of multiple semiconductor substrates simultaneously.

[0140] In this regard, as shown in Figure 16, when multiple semiconductor substrates 11 are simultaneously immersed in the etching section 210 using a cassette 115 and etched, at least one semiconductor substrate 11 (thick) having the thickest film thickness of the transparent conductive film 28Z, and at least one semiconductor substrate 11 (thin) having the thinnest film thickness of the transparent conductive film 28Z, among the multiple semiconductor substrates 11, may be the subject of light irradiation, photoluminescence intensity observation, and etching completion determination.

[0141] For example, at least one semiconductor substrate 11 (thick) having the thickest transparent conductive film 28Z and at least one semiconductor substrate 11 (thin) having the thinnest transparent conductive film 28Z are set at opposite ends of a cassette 115, and the photoluminescence intensity is observed at both ends of the cassette 115. This allows the multiple transparent electrode layers 28, 38 to be etched more appropriately even if the thicknesses of the transparent electrode layers 28, 38 vary for each semiconductor substrate 11.

[0142] In addition, when using a cassette 115 to simultaneously immerse multiple semiconductor substrates 11 in the etching section 210 and etch them, it is sufficient to only subject at least one semiconductor substrate 11 (thickness) among the multiple semiconductor substrates 11 that has the thickest film thickness of the transparent conductive film 28Z to light irradiation, photoluminescence intensity observation, and etching completion determination.

[0143] For example, at least one semiconductor substrate 11 (thickness) having the thickest transparent conductive film 28Z is set at one end of the cassette 115, and the photoluminescence intensity at that end of the cassette 115 is observed.

[0144] Although the above describes an embodiment of the present invention, the present invention is not limited to the above embodiment and various modifications and variations are possible. For example, in the above embodiment, the completion of etching was determined based on the photoluminescence characteristics for light of two intensities, high illuminance and low illuminance. However, the present invention is not limited to this. The completion of etching may be determined based on the photoluminescence characteristics for light of three or more intensities between high illuminance and low illuminance, including at least one light of an intensity between high illuminance and low illuminance. In this case, the light irradiation unit 220 sequentially irradiates the principal surface of the semiconductor substrate 11 in the etching unit 210 with light of at least two different intensities, high illuminance and low illuminance. The photoluminescence observation unit 230 sequentially observes the photoluminescence intensities from the semiconductor substrate 11 in the etching unit 210. The etching completion determination unit 240 determines the completion of etching of the conductive film based on the photoluminescence intensities for light of at least two intensities.

[0145] Furthermore, in the second embodiment described above, a manufacturing method and etching apparatus for a solar cell unit 1 having a plurality of cell regions (solar cells) 2 has been exemplified. However, the present invention is not limited to this, and can also be applied to a manufacturing method and etching apparatus for a solar cell unit having one cell region (solar cell).

[0146] Furthermore, in the second embodiment described above, a manufacturing method and etching apparatus for a solar cell unit 1 having a marginal region 3 has been exemplified. However, the present invention is not limited to this, and is also applicable to a manufacturing method and etching apparatus for a solar cell unit without a marginal region, that is, a solar cell unit having one cell region (solar cell).

[0147] In the second embodiment described above, a method and apparatus for etching a transparent electrode layer using a metal electrode layer as a mask are illustrated, but the present invention is not limited thereto. For example, the features of the present invention can also be applied to a method and apparatus for etching a transparent electrode layer using a general metal mask or resist as a mask.

[0148] In the second embodiment described above, wet etching using an etching solution is exemplified, but the present invention is not limited to this. For example, the features of the present invention can also be applied to dry etching.

[0149] In addition, in the above-mentioned second embodiment, a heterojunction solar cell and solar cell unit are exemplified as shown in FIG. 10, but the present invention is not limited to heterojunction solar cell and solar cell unit, and is applicable to various solar cell and solar cell units such as homojunction solar cells.

[0150] In the second embodiment described above, the solar cell and solar cell unit have a crystalline silicon substrate, but are not limited thereto. For example, the solar cell and solar cell unit may have a gallium arsenide (GaAs) substrate. [Explanation of symbols]

[0151] 1 solar cell unit 2 Cell area (solar cell) 3 Margin area 4 First conductivity type unit area 5 Second conductivity type unit area 6 pn short circuit area 7 First conductivity type region 7b, 8b busbar section 7f,8f finger part 8 Second conductivity type region 11 Semiconductor substrate (large semiconductor substrate) 13,23,33 Passivation layer 15 Optical adjustment layer 25 First conductivity type semiconductor layer 27 1st electrode layer 27A 3rd electrode layer 28 First transparent electrode layer (electrode layer) 28A transparent electrode layer 28Z Transparent conductive film (conductive film) 29 First metal electrode layer 29A Metal electrode layer 35 Second conductivity type semiconductor layer 37 Second electrode layer 38 Second transparent electrode layer (electrode layer) 39 Second metal electrode layer 100 Good / bad judgement device 110 Light irradiation unit 120 Photoluminescence Observation Unit (PL Observation Unit) 130 Good / bad judgement section 200 Etching equipment 210 Etching section 215 cassettes 220 light irradiation unit 230 Photoluminescence Observation Section 240 Etching completion determination unit

Claims

1. A solar cell unit having a cell area in which back electrode type solar cells are formed and a blank area other than the cell area on a large semiconductor substrate, the cell region has a first conductivity type region and a second conductivity type region, the first conductivity type being one of p-type and n-type, and the second conductivity type being the other of p-type and n-type; In the first conductivity type region, a first conductivity type semiconductor layer and a first electrode layer are formed on the back surface side of the large-sized semiconductor substrate, In the second conductivity type region, a second conductivity type semiconductor layer and a second electrode layer are formed on the back surface side of the large-sized semiconductor substrate, the blank area has a first conductivity type unit area of ​​a unit area, a second conductivity type unit area of ​​a unit area, and a pn short-circuit area; In the first conductivity type unit region, a first conductivity type semiconductor layer is formed on a back surface side of the large-sized semiconductor substrate, In the second conductivity type unit region, a second conductivity type semiconductor layer is formed on a back surface side of the large-sized semiconductor substrate, In the pn short-circuit region, a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and a third electrode layer that electrically short-circuits the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are formed on the back surface side of the large-sized semiconductor substrate. Solar cell unit.

2. The solar cell unit quality determination device according to claim 1, a light irradiation unit that irradiates a main surface of the large-sized semiconductor substrate with light; a photoluminescence observation unit for observing the photoluminescence intensity from the large-sized semiconductor substrate; a quality determination unit that determines the quality of the solar cells in the cell region of the solar cell unit based on the photoluminescence intensity; Equipped with The light irradiation unit Assuming that the solar cell in the cell region of the solar cell unit is used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment, Irradiating a main surface of the large-sized semiconductor substrate with light having an intensity lower than the high illuminance and higher than the low illuminance; The quality determination unit calculating the photoluminescence intensity of the cell region, the photoluminescence intensity of the first conductivity type unit region, and the photoluminescence intensity of the second conductivity type unit region based on the photoluminescence intensity of the pn short-circuit region; comparing the calculated photoluminescence intensity of the cell region with the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region; determining that a solar cell in a cell region having a photoluminescence intensity that deviates by a predetermined amount or more from the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region has a defective photoelectric conversion characteristic in the low illuminance environment; A device for determining whether a solar cell unit is good or bad.

3. 3. The solar cell unit quality determination device according to claim 2, wherein the quality determination unit compares the calculated photoluminescence intensity of the cell region with the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region, taking into account an area ratio of the first conductivity type region of the cell region to the first conductivity type unit region and an area ratio of the second conductivity type region of the cell region to the second conductivity type unit region.

4. The quality determination unit calculating a first-conductivity-type region area ratio as an area ratio of the first-conductivity-type region of the cell region to the first-conductivity-type unit region, and a second-conductivity-type region area ratio as an area ratio of the second-conductivity-type region of the cell region to the second-conductivity-type unit region; calculating a first-conductivity-type region reference photoluminescence intensity by multiplying the photoluminescence intensity of the first-conductivity-type unit region, which is based on the photoluminescence intensity of the pn short-circuited region, by the first-conductivity-type region area ratio, and a second-conductivity-type region reference photoluminescence intensity by multiplying the photoluminescence intensity of the second-conductivity-type unit region, which is based on the photoluminescence intensity of the pn short-circuited region, by the second-conductivity-type region area ratio; calculating a reference photoluminescence intensity by adding the reference photoluminescence intensity of the first conductivity type region and the reference photoluminescence intensity of the second conductivity type region; comparing the calculated photoluminescence intensity of the cell region with the calculated reference photoluminescence intensity; determining that a solar cell in a cell region having a photoluminescence intensity that deviates from the calculated reference photoluminescence intensity by a predetermined amount or more has poor photoelectric conversion characteristics in the low illuminance environment; The solar cell unit quality determination device according to claim 3 .

5. A method for manufacturing a solar cell unit having a cell region in which back electrode type solar cells are formed and a blank region other than the cell region on a large-sized semiconductor substrate, comprising: the cell region has a first conductivity type region and a second conductivity type region, the first conductivity type being one of p-type and n-type, and the second conductivity type being the other of p-type and n-type; the blank area has a first conductivity type unit area of ​​a unit area, a second conductivity type unit area of ​​a unit area, and a pn short-circuit area; The method for manufacturing the solar cell unit includes: a semiconductor layer forming step of forming a first conductivity type semiconductor layer in the first conductivity type region of the cell region on the back surface side of the large-sized semiconductor substrate, forming a second conductivity type semiconductor layer in the second conductivity type region of the cell region on the back surface side of the large-sized semiconductor substrate, forming a first conductivity type semiconductor layer in the first conductivity type unit region of the marginal region on the back surface side of the large-sized semiconductor substrate, forming a second conductivity type semiconductor layer in the second conductivity type unit region of the marginal region on the back surface side of the large-sized semiconductor substrate, and forming a first conductivity type semiconductor layer and a second conductivity type semiconductor layer in the pn short-circuit region of the marginal region on the back surface side of the large-sized semiconductor substrate; an electrode layer forming step of forming a first electrode layer corresponding to the first conductivity type semiconductor layer in the first conductivity type region of the cell region, a second electrode layer corresponding to the second conductivity type semiconductor layer in the second conductivity type region of the cell region, and a third electrode layer corresponding to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the pn short-circuit region of the marginal region and electrically short-circuiting them; a quality determination step of determining quality of the solar cells in the cell region of the solar cell unit; Including, In the quality determination step, Assuming that the solar cell in the cell region of the solar cell unit is used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment, irradiating a main surface of the large-sized semiconductor substrate with light having an intensity lower than the high illuminance and higher than the low illuminance, observing a photoluminescence intensity from the cell region in the large-sized semiconductor substrate, and observing a photoluminescence intensity from the first conductivity type unit region, the second conductivity type unit region, and the pn short-circuit region in the large-sized semiconductor substrate; calculating the photoluminescence intensity of the cell region, the photoluminescence intensity of the first conductivity type unit region, and the photoluminescence intensity of the second conductivity type unit region based on the photoluminescence intensity of the pn short-circuit region; comparing the calculated photoluminescence intensity of the cell region with the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region; determining that a solar cell in a cell region having a photoluminescence intensity that deviates by a predetermined amount or more from the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region has a defective photoelectric conversion characteristic in a low illuminance environment; A method for manufacturing a solar cell unit.

6. 6. The method for manufacturing a solar cell unit according to claim 5, wherein in the pass / fail determination step, the calculated photoluminescence intensity of the cell region is compared with the calculated photoluminescence intensities of the first conductivity type unit region and the second conductivity type unit region, taking into account an area ratio of the first conductivity type region of the cell region to the first conductivity type unit region and an area ratio of the second conductivity type region of the cell region to the second conductivity type unit region.

7. In the quality determination step, calculating a first-conductivity-type region area ratio as an area ratio of the first-conductivity-type region of the cell region to the first-conductivity-type unit region, and a second-conductivity-type region area ratio as an area ratio of the second-conductivity-type region of the cell region to the second-conductivity-type unit region; calculating a first-conductivity-type region reference photoluminescence intensity by multiplying the photoluminescence intensity of the first-conductivity-type unit region, which is based on the photoluminescence intensity of the pn short-circuited region, by the first-conductivity-type region area ratio, and a second-conductivity-type region reference photoluminescence intensity by multiplying the photoluminescence intensity of the second-conductivity-type unit region, which is based on the photoluminescence intensity of the pn short-circuited region, by the second-conductivity-type region area ratio; calculating a reference photoluminescence intensity by adding the reference photoluminescence intensity of the first conductivity type region and the reference photoluminescence intensity of the second conductivity type region; comparing the calculated photoluminescence intensity from the cell region with the calculated reference photoluminescence intensity; A cell region having a photoluminescence intensity that deviates from the calculated reference photoluminescence intensity by a predetermined amount or more is determined to have poor photoelectric conversion characteristics under a low-illuminance environment. The method for manufacturing the solar cell unit according to claim 6 .

8. 8. The method for manufacturing a solar cell unit according to claim 5, wherein in the electrode layer forming step, a conductive film is continuously formed on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the cell region on the back surface side of the large-sized semiconductor substrate, and the conductive film is etched to form the first electrode layer and the second electrode layer patterned on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively.

9. the first electrode layer and the second electrode layer are transparent electrode layers, and the conductive film is a transparent conductive film; The method for manufacturing a solar cell unit according to claim 8 , wherein in the electrode layer forming step, a metal electrode layer is formed on the transparent conductive film, and the transparent conductive film is etched using the metal electrode layer as a mask.

10. The method for manufacturing a solar cell unit according to claim 8 , wherein the etching is wet etching using an etching solution.

11. A method for manufacturing a solar cell unit having a cell region in which back electrode type solar cells are formed on a semiconductor substrate, comprising: a semiconductor layer forming step of forming a first conductivity type semiconductor layer in a part of the cell region on the back surface side of the semiconductor substrate and forming a second conductivity type semiconductor layer in another part of the cell region on the back surface side of the semiconductor substrate; an electrode layer forming step of depositing a conductive film continuously on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the cell region on the back surface side of the semiconductor substrate, and etching the conductive film to form patterned electrode layers on each of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; Including, In the electrode layer forming step, Assuming that the solar cell in the cell region of the solar cell unit is used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment, sequentially irradiating the main surface of the semiconductor substrate with light of at least two different intensities, the high illuminance and the low illuminance, sequentially observing the photoluminescence intensity from the semiconductor substrate; determining completion of etching of the conductive film based on the photoluminescence intensities for the at least two intensities of light; A method for manufacturing a solar cell unit.

12. In the electrode layer forming step, completion of etching of the conductive film is determined when the photoluminescence intensity for the high-intensity light is equal to or greater than a predetermined value and the photoluminescence intensity for the low-intensity light is equal to or greater than a predetermined value. The method for manufacturing the solar cell unit according to claim 11 .

13. In the electrode layer forming step, when the photoluminescence intensity for the high-intensity light is equal to or greater than a predetermined value and the photoluminescence intensity for the low-intensity light is less than a predetermined value, it is determined that etching of the conductive film is not yet completed. The method for manufacturing the solar cell unit according to claim 11 or 12.

14. In the electrode layer forming step, if the photoluminescence intensity to the high-intensity light is less than a predetermined value even after a predetermined time has elapsed, it is determined that the defect is due to a factor other than insufficient etching of the conductive film. The method for manufacturing the solar cell unit according to any one of claims 11 to 13.

15. the electrode layer is a transparent electrode layer, and the conductive film is a transparent conductive film; The method for manufacturing a solar cell unit according to any one of claims 11 to 14, wherein in the electrode layer forming step, a metal electrode layer is formed on the transparent conductive film, and the transparent conductive film is etched using the metal electrode layer as a mask.

16. The method for manufacturing a solar cell unit according to any one of claims 11 to 15, wherein the etching is wet etching using an etching solution.

17. In the electrode layer forming step, simultaneously etching a plurality of said semiconductor substrates using a cassette; Among the plurality of semiconductor substrates, at least one semiconductor substrate having the thickest conductive film is subjected to light irradiation, photoluminescence intensity observation, and etching completion determination. The method for manufacturing the solar cell unit according to any one of claims 11 to 16.

18. In the electrode layer forming step, simultaneously etching a plurality of said semiconductor substrates using a cassette; Among the plurality of semiconductor substrates, at least one semiconductor substrate having the thickest conductive film and at least one semiconductor substrate having the thinnest conductive film are subjected to light irradiation, photoluminescence intensity observation, and etching completion determination. The method for manufacturing the solar cell unit according to any one of claims 11 to 16.

19. 1. An etching apparatus for forming an electrode layer in a cell region in a solar cell unit having a semiconductor substrate and back electrode type solar cells formed therein, comprising: an etching unit that etches a conductive film that is continuously formed on the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the cell region on the back surface side of the semiconductor substrate, to form the electrode layer patterned on each of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; a light irradiation unit that sequentially irradiates the main surface of the semiconductor substrate in the etching portion with light of at least two different intensities, i.e., the high illuminance and the low illuminance, when it is assumed that the solar cell in the cell region of the solar cell unit is used in a high illuminance environment corresponding to an outdoor sunlight environment and a low illuminance environment corresponding to an indoor lighting environment; a photoluminescence observation unit that sequentially observes the photoluminescence intensity from the semiconductor substrate in the etching unit; an etching completion determination unit that determines completion of etching of the conductive film based on the photoluminescence intensities for the at least two intensities of light; An etching apparatus for a solar cell unit, comprising:

20. the etching completion determination unit determines completion of etching of the conductive film when the photoluminescence intensity for the high-illuminance light is equal to or greater than a predetermined value and the photoluminescence intensity for the low-illuminance light is equal to or greater than a predetermined value. The solar cell unit etching apparatus according to claim 19.

21. the etching completion determination unit determines that etching of the conductive film is not yet completed when the photoluminescence intensity with respect to the high-illuminance light is equal to or greater than a predetermined value and the photoluminescence intensity with respect to the low-illuminance light is less than a predetermined value.

21. The etching apparatus for a solar cell unit according to claim 19 or 20.

22. the etching completion determination unit determines that the defect is due to a factor other than insufficient etching of the conductive film when the photoluminescence intensity to the high-intensity light is less than a predetermined value even after a predetermined time has elapsed. The etching device for a solar cell unit according to any one of claims 19 to 21.

23. the electrode layer is a transparent electrode layer, and the conductive film is a transparent conductive film; 23. The etching device for a solar cell unit according to claim 19, wherein the etching section etches the transparent conductive film using a metal electrode layer formed on the transparent conductive film as a mask.

24. 24. The etching device for a solar cell unit according to claim 19, wherein the etching section performs wet etching using an etching solution.

25. the etching unit simultaneously etches a plurality of the semiconductor substrates using a cassette; the light irradiation unit, the photoluminescence observation unit, and the etching completion determination unit perform light irradiation, photoluminescence intensity observation, and etching completion determination on at least one semiconductor substrate having the thickest conductive film among the plurality of semiconductor substrates. The etching device for a solar cell unit according to any one of claims 19 to 24.

26. the etching unit simultaneously etches a plurality of the semiconductor substrates using a cassette; the light irradiation unit, the photoluminescence observation unit, and the etching completion determination unit perform light irradiation, photoluminescence intensity observation, and etching completion determination on at least one semiconductor substrate having the thickest conductive film and at least one semiconductor substrate having the thinnest conductive film among the plurality of semiconductor substrates; The etching device for a solar cell unit according to any one of claims 19 to 24.

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