Mounting boards and circuit boards

The mounting board design surrounds electronic components with an insulator wall and sets specific dimensional relationships to enhance shock absorption, improving reliability by reducing force application on components.

JP7779853B2Active Publication Date: 2025-12-03TDK CORP
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Patent Information

Application Number
JP2022563740
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-11-19
Filing Date
2021-11-15
Publication Date
2025-12-03
Estimated Expiration
2041-11-15

AI Technical Summary

Technical Problem

As mounting components become smaller, their strength weakens, leading to a decrease in the reliability of mounting boards against external forces and shocks.

Method used

A mounting board design where electronic components and bonding material are surrounded by a wall formed by an insulator, with specific dimensional relationships between the component and wall to enhance shock absorption, and additional structural elements to mitigate force application.

Benefits of technology

Improves the reliability of the mounting board by effectively protecting electronic components from external forces and shocks, maintaining functionality under stress.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A mounting board comprising: an electronic component having at least a pair of first terminals; and a circuit board having at least a pair of second terminals. The first terminals and the second terminals are electrically connected by means of a bonding material including a metallic element. The electronic component and the bonding material are disposed in a wall formed of an insulator. The lower surface of the electronic component is lower than the upper surface of the wall. The value of (dimension d1 - dimension d2) is less than or equal to 10 μm, where dimension d1 corresponds to a long side of a region enclosed by the wall, and dimension d2 corresponds to a long side of the electronic component.
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Description

[Technical Field]

[0001] The present invention relates to a mounting board and a circuit board. [Background technology]

[0002] Electrical appliances, such as smartphones, smartwatches, and portable game consoles, are becoming increasingly important. Many electrical appliances use electronic components, which are mounted on circuit boards. Because many of these electrical appliances are portable, miniaturization is extremely important, and as a result, there is a growing demand for smaller and thinner electronic components and circuit boards. Many technologies have been developed to further promote this miniaturization and thinning. For example, Patent Document 1 discloses a technology for obtaining a thin substrate with improved mounting accuracy by forming a recess on one side of a substrate that is approximately the same size as the electronic component to be mounted, and then penetrating and connecting protruding electrode terminals to a wiring circuit formed on the back side. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-197822 Summary of the Invention [Problem to be solved by the invention]

[0004] In recent years, as mounting components have become smaller, the strength of the components themselves has weakened. This has resulted in a decrease in the reliability of mounting boards against external forces and shocks. For this reason, there is a demand for mounting boards that maintain high reliability even when mounting components become smaller.

[0005] An object of the present invention is to provide a mounting board and a circuit board that can improve reliability. [Means for solving the problem]

[0006] The mounting board of the present invention is a mounting board comprising an electronic component having at least a pair of first terminals and a circuit board having at least a pair of second terminals, wherein the first terminals and the second terminals are electrically joined by a bonding material containing a metal element, the electronic component and the bonding material are arranged within a wall formed by an insulator, the bottom surface of the electronic component is lower than the top surface of the wall, and when the long side of the area surrounded by the wall is dimension d1 and the long side of the electronic component is dimension d2, the value of (dimension d1 - dimension d2) is 10 μm or less.

[0007] In the mounting board according to the present invention, the electronic components and bonding material are disposed within a wall formed by an insulator, and are therefore surrounded by the wall. This allows for a shock-absorbing wall structure to be provided around the electronic components and bonding material. Furthermore, by setting the value of (dimension d1 - dimension d2) to 10 μm or less, the gap between the electronic components and the wall can be made sufficiently small. Therefore, when the mounting board is subjected to an external force in the direction of the long side of the electronic components, the wall can more easily protect the electronic components. As a result, the reliability of the mounting board can be improved.

[0008] A structural member may be disposed between the electronic component and the bonding material and the wall, thereby reducing the force applied to the electronic component, the bonding material, and the terminals, thereby improving reliability.

[0009] The structural material may be present above the upper surface of the wall, whereby the electronic components are surrounded by the structural material at a height higher than the upper surface of the wall, thereby further mitigating the force applied to the electronic components and improving reliability.

[0010] A first spacer lower than the upper surface of the wall may be disposed between the pair of second terminals. In this way, the presence of the first spacer between the terminals makes it difficult for force applied to the electronic component to be applied to the bonding material, thereby improving reliability.

[0011] A second spacer may be disposed on the inner periphery of the wall, the second spacer being lower than the top surface of the wall. The presence of the second spacer between the terminal and the wall reduces the likelihood of force applied to the electronic component being applied to the bonding material, thereby improving reliability.

[0012] If the height of the top surface of the wall is dimension h1 and the height of the top surface of the electronic component is dimension h2, the value of (dimension h2 - dimension h1) may be 9 μm or less. By keeping the height relationship between the electronic component and the wall within this range, force is less likely to be applied to the electronic component, improving reliability.

[0013] The electronic component may have a step at its bottom, and a component may be disposed between the bottom and the circuit board. The step contacts the component, further reducing the force applied to the electronic component and improving reliability.

[0014] The inner surface of the wall may have a tapered shape. When a thermal shock is applied, a force is applied from the wall to the bonding material due to the difference in thermal expansion coefficient between the wall and the substrate. However, by having the inner surface of the wall have a tapered shape, the force from the wall on the electronic component side is less likely to be applied to the bonding material, making it less likely that the electronic component will peel off from the circuit board during a thermal shock test.

[0015] The circuit board of the present invention is a circuit board having at least a pair of second terminals, wherein a bonding material containing a metal element is disposed on the second terminals, and the pair of second terminals and the bonding material are disposed within a wall formed by an insulator, and when the total height of the second terminals and the bonding material is dimension h3, dimension h3 is 1 μm or more and 20 μm or less, and when the width of the space formed by the wall is dimension d5, dimension d5 is 8 μm or more and 68 μm or less.

[0016] According to the circuit board of the present invention, when an electronic component is mounted, a mounting board can be obtained that provides the same functions and effects as those described above. [Effects of the Invention]

[0017] According to the present invention, it is possible to provide a mounting board and a circuit board that can improve reliability. [Brief explanation of the drawings]

[0018] [Figure 1] 1 is a schematic cross-sectional view showing a mounting substrate according to an embodiment of the present invention. [Figure 2] FIG. 2 is a schematic plan view of the mounting board as viewed from above. [Figure 3] 1 is a schematic cross-sectional view showing a circuit board according to an embodiment of the present invention. [Figure 4] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 5] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 6] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 7] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 8] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 9] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 10] FIG. 10 is a schematic cross-sectional view showing a mounting board according to a modified example. [Figure 11] 1 is a table showing the conditions and test results of Examples and Comparative Examples. DETAILED DESCRIPTION OF THE INVENTION

[0019] A mounting board 1 according to an embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing the mounting board 1 according to the embodiment of the present invention. As shown in Fig. 1, the mounting board 1 includes an electronic component 2 and a circuit board 3. The mounting board 1 is constructed by mounting the electronic component 2 on the circuit board 3 via a bonding material 4.

[0020] The electronic component 2 includes a main body 6 and a pair of terminals 7 (first terminals). The main body 6 is a member for fulfilling the function of the electronic component 2. The terminals 7 are metal parts formed on the main surface of the main body 6. The terminals 7 may be made of Cu, Ti, Au, Ni, Sn, Bi, P, B, In, Ag, Zn, Pd, Mo, Pt, Cr, or an alloy selected from at least two of these elements. The electronic component 2 may be formed, for example, of a micro LED. The micro LED is a component that emits light in response to input from the circuit board 3.

[0021] The circuit board 3 includes a base material 8, a wall 9, and a pair of terminals 10 (second terminals). The base material 8 is a flat body of the circuit board 3. The wall 9 is a resin layer formed on the upper surface of the base material 8. Examples of materials that can be used for the wall 9 include epoxy resin, acrylic resin, phenolic resin, melamine resin, urea resin, alkyd resin, SiOx, and ceramics. Epoxy resin and acrylic resin are particularly preferred for use as the material for the wall 9. The terminal 10 is a metal portion formed on the main surface of the base material 8. Examples of materials that can be used for the terminal 10 include Ni, Cu, Ti, Cr, Al, Mo, Pt, Au, and alloys selected from at least two of these metals.

[0022] The bonding material 4 is a member that electrically bonds the terminals 7 of the electronic component 2 and the terminals 10 of the circuit board 3. The bonding material 4 contains a metal element and is composed of an alloy containing the metal element. The bonding material 4 is composed of an alloy containing, for example, Sn, Bi, or Au as a metal element. The bonding material 4 functions as solder. As a result, the terminals 10, the bonding material 4, and the terminals 7 are stacked between the substrate 8 and the main body 6, in this order from the top surface of the substrate 8. Note that the solder bonding is performed after the terminals 10, the bonding material 4, and the terminals 7 are stacked. Therefore, a structure in which the metals of the terminals 10, the bonding material 4, and the terminals 7 are melted and diffused is formed. This structure after solder bonding may contain a brittle intermetallic compound (IMC). The presence of a brittle intermetallic compound tends to reduce reliability. Therefore, the effect of surrounding the soldered structure with a resin wall 9 becomes more pronounced.

[0023] A pair of recesses 11 are formed in the wall 9. The recesses 11 are formed by through-holes that penetrate the wall 9. As a result, the upper surface of the base material 8 is exposed at the bottom of the recesses 11. The recesses 11 are rectangular when viewed in the thickness direction of the circuit board 3 (see FIG. 2). The lower surface 6f of the main body 6 of the electronic component 2 is lower than the upper surface 9a of the wall 9. The electronic component 2, the bonding material 4, and the terminals 10 are arranged in the recesses 11 formed in the wall 9, and are thereby surrounded by the wall 9.

[0024] FIG. 2 is a schematic plan view of the mounting substrate 1 as viewed from above. As shown in FIG. 2, the recess 11 of the wall 9 has a pair of long sides 11a and 11b and a pair of short sides 11c and 11d. Thus, the area surrounded by the wall 9 is defined by the sides 11a, 11b, 11c, and 11d. The main body 6 of the electronic component 2 has a pair of long sides 6a and 6b and a pair of short sides 6c and 6d. Small gaps are formed between the sides 11a, 11b, 11c, and 11d of the recess 11 and the sides 6a, 6b, 6c, and 6d of the main body 6. As shown in FIG. 1, small gaps are also formed between the terminals 7, bonding material 4, and terminal 10 on one side and the short side 11c of the recess 11. Small gaps are also formed between the terminals 7, bonding material 4, and terminal 10 on the other side and the short side 11d of the recess 11.

[0025] Next, the dimensional relationship between the elements of the mounting substrate 1 will be described with reference to FIGS. 1 and 2. In the following description, the term "height" refers to the height relative to the top surface of the substrate 8. As shown in FIG. 1, the height of the top surface 9a of the wall 9 is defined as dimension h1, and the height of the top surface 6e of the main body 6 of the electronic component 2 is defined as dimension h2. Here, dimension h1 is preferably 3 μm or more, and more preferably 4 μm or more. Furthermore, dimension h1 is preferably 30 μm or less, and more preferably 15 μm or less. Dimension h2 is preferably 9 μm or more, and more preferably 10 μm or more. Furthermore, dimension h2 is preferably 39 μm or less, and more preferably 15 μm or less. The value of (dimension h2 - dimension h1) is preferably 9 μm or less, and more preferably 6 μm or less. The lower limit of (dimension h2 - dimension h1) is not particularly limited; if it does not affect manufacturing, the lower limit may be 0 μm or -3 μm. The dimensions h1 and h2 can be measured by cutting the mounting substrate 1 vertically and observing the cross section with an SEM.

[0026] As shown in FIG. 2, the area surrounded by the wall 9, i.e., the long sides 11a and 11b of the recess 11, have a dimension d1, and the long sides 6a and 6b of the main body 6 of the electronic component 2 have a dimension d2. In this case, the dimension d1 is preferably 8 μm or more, and more preferably 16 μm or more. The dimension d1 is preferably 68 μm or less, and more preferably 35 μm or less. The dimension d2 is preferably 7 μm or more, and more preferably 15 μm or more. The dimension d2 is preferably 58 μm or less, and more preferably 25 μm or less. The value of (dimension d1 - dimension d2) is preferably 10 μm or less, and more preferably 6 μm or less. The lower limit of (dimension d1 - dimension d2) is not particularly limited, and may be set to 0 μm if it does not affect manufacturing.

[0027] The area surrounded by the wall 9, i.e., the short sides 11c and 11d of the recess 11, are defined as dimension d3, and the short sides 6c and 6d of the main body 6 of the electronic component 2 are defined as dimension d4. In this case, dimension d3 is preferably 5 μm or more, and more preferably 9 μm or more. Dimension d3 is preferably 44 μm or less, and more preferably 35 μm or less. Dimension d4 is preferably 4 μm or more, and more preferably 8 μm or more. Dimension d4 is preferably 58 μm or less, and more preferably 25 μm or less. The value of (dimension d3 - dimension d4) is preferably 10 μm or less, and more preferably 6 μm or less. The lower limit of (dimension d3 - dimension d4) is not particularly limited, and may be set to 0 μm if it does not affect manufacturing.

[0028] Corners of the recess 11 of the wall 9, and corners of the main body 6 and terminals 7 and 10 may be rounded. The corners may be set to, for example, 1 μm, 5 μm, or 10 μm.

[0029] As shown in FIG. 2, if the recess 11 in the wall 9 is rectangular, the dimension of the long side corresponds to dimension d1. If the recess 11 in the wall 9 is square, the dimension of one of the sides corresponds to dimension d1. If the recess 11 in the wall 9 is circular, the diameter corresponds to dimension d1. If the recess 11 in the wall 9 is elliptical, the major axis corresponds to dimension d1. If the recess 11 in the wall 9 is a polygon with five or more sides, the distance between each vertex and the side facing that vertex is measured, and the longest distance is taken as dimension d1. The method for determining dimension d2 according to the shape of the main body 6 is the same as for dimension d1.

[0030] Next, a method for manufacturing the mounting board 1 and the configuration of the circuit board 3 during the manufacturing process will be described.

[0031] First, a circuit board 3 as shown in FIG. 3 is prepared. In this state, a bonding material 4 is disposed on the terminals 10. This bonding material 4 is in a state prior to being bonded to the electronic component 2, and is therefore at least thicker than the bonding material 4 in the state of the mounting substrate 1 of FIG. 1. This bonding material 4 may be a metal containing metal elements that form a low-temperature solder, and may have any microstructure as long as its overall composition has a low melting point. For example, at the stage of distributing the circuit board 3, the bonding material 4 may have a layered structure having two or more metal layers. Alternatively, the circuit board 3 may be distributed in a state in which it has been preheated to form an alloy consisting of two or more metals.

[0032] In this state, the terminal 10 and the bonding material 4 are disposed in the recess 11 formed in the wall 9, and are surrounded by the wall 9. If the total thickness of the terminal 10 and the bonding material 4 is defined as dimension h3, dimension h3 is preferably 1 μm or more, and more preferably 3 μm or more. Dimension h3 is preferably 20 μm or less, and more preferably 9 μm or less. The width of the space formed by the wall 9 is defined as dimension d5. The space formed by the wall 9 corresponds to the internal space of the recess 11. Therefore, the width of the space is defined by the width of the recess 11. Dimension d5 is preferably 8 μm or more, and more preferably 16 μm or more. Dimension d5 is preferably 68 μm or less, and more preferably 35 μm or less.

[0033] The electronic component 2 is placed on the circuit board 3. At this time, a pair of terminals 7 of the electronic component 2 is placed on a pair of bonding materials 4, respectively. The circuit board 3 and electronic component 2 in this state are heated to perform soldering. The heating method may be any of a reflow method in which the components are heated in an oven or the like, a thermocompression bonding method in which the electronic component 2 is heated while being pressure-bonded, or a light heating method in which the components are heated by applying light, or a combination of these. In this way, the electronic component 2 is mounted on the circuit board 3, and the mounting board 1 is completed.

[0034] The functions and effects of the mounting board 1 and the circuit board 3 according to this embodiment will be described.

[0035] In the mounting board 1, the electronic component 2 and the bonding material 4 are disposed within a wall 9 formed of an insulator, and are thereby surrounded by the wall 9. This allows the wall 9 to provide an impact-absorbing structure around the electronic component 2 and the bonding material 4. Furthermore, by setting the value of (dimension d1 - dimension d2) to 10 μm or less, the gap between the electronic component 2 and the wall 9 can be made sufficiently small. Therefore, when the mounting board 1 receives an external force in the direction of the long side of the electronic component 2, the wall 9 can more easily protect the electronic component 2. As a result, the reliability of the mounting board 1 can be improved.

[0036] If the height of the upper surface 9a of the wall 9 is dimension h1 and the height of the upper surface 6e of the electronic component 2 is dimension h2, the value of (dimension h2 - dimension h1) may be 9 μm or less. When the height relationship between the electronic component 2 and the wall 9 is within this range, force is less likely to be applied to the electronic component 2, improving reliability.

[0037] According to the circuit board 3 of this embodiment, when an electronic component 2 is mounted, a mounting board 1 that provides the same functions and effects as those described above can be obtained.

[0038] The present invention is not limited to the above-described embodiments.

[0039] For example, as shown in FIG. 4, a component 20 may be disposed between the electronic component 2 and bonding material 4 and the wall 9. This supports the electronic component 2, making it less likely to peel off from the circuit board 3. Furthermore, the force applied to the electronic component 2, bonding material 4, and terminals 7 and 10 is alleviated, improving reliability. In the example shown in FIG. 4, the upper surface 20a of the component 20 is disposed at a lower position than the upper surface 9a of the wall 9. Examples of materials that can be used for the component 20 include epoxy resin, acrylic resin, phenolic resin, melamine resin, urea resin, alkyd resin, SiOx, and ceramics. Epoxy resin and acrylic resin are particularly preferred.

[0040] 5, the component 20 may be located above the upper surface 9a of the wall 9. The upper surface 20a of the component 20 is disposed above the upper surface 9a of the wall 9. This allows the electronic component 2 to be surrounded by the component 20 at a height higher than the upper surface 9a of the wall 9, thereby further reducing the force applied to the electronic component 2 and improving reliability.

[0041] As shown in FIG. 6(a), a spacer 30 (first spacer) that is lower than the upper surface 9a of the wall 9 may be disposed between a pair of terminals 10. As shown in FIG. 6(a), the spacer 30 extends from one long side 11a to the other long side 11b of the wall 9. However, the length of the spacer 30 is not particularly limited. In this way, the presence of the spacer 30 between the terminals 10 makes it difficult for the force applied to the electronic component 2 to be applied to the bonding material 4, thereby improving reliability.

[0042] As shown in FIG. 7 , a spacer 40 (second spacer) lower than the upper surface 9a of the wall 9 may be disposed on the inner periphery of the wall 9. The presence of the spacer 40 between the terminal 10 and the wall 9 reduces the likelihood that force applied to the electronic component 2 will be applied to the bonding material 4, improving reliability. The spacer 40 may be provided over the entire inner periphery of the wall 9, or may be provided over only a portion of the inner periphery. The spacers 30, 40 may be made of the same material as the component 20. The width of the spacers 30, 40 may be 10 μm or less, and more preferably 9 μm or less. The hardness of the materials may satisfy the following relationship: "substrate 8 > wall 9 ≧ spacers 30, 40 ≧ component 20."

[0043] As shown in Figure 8, a step 50 is formed at the bottom of the main body 6 of the electronic component 2 by a bottom surface 6f and a step surface 6g. A component 20 is disposed between the bottom and the circuit board 3. An upper surface 20a of the component 20 reaches the bottom surface 6f and the step surface 6g. The contact between the step 50 and the component 20 further reduces the force applied to the electronic component 2, improving reliability.

[0044] As shown in FIG. 9, the four wall surfaces of the wall 9 do not have to be connected. In that case, as shown in FIG. 9(a), when the walls 9 (portions corresponding to the long sides 11a and 11b) sandwiching the long sides 6a and 6b of the electronic component 2 are projected onto the electronic component 2, there only needs to be portions that overlap with the short sides 6c and 6d of the electronic component 2. The same applies to the wall surfaces on the short sides 11c and 11d sides. However, as shown in FIG. 9(b), when a component 20 is provided, the projection does not need to overlap with the short sides 11c and 11d of the electronic component 2, but the component 20 needs to be structured to be caught by the wall 9.

[0045] Furthermore, in the above embodiment, one electronic component 2 is arranged inside the wall 9, but a plurality of electronic components 2 may be arranged inside the wall 9. The arrangement of the plurality of electronic components 2 is not particularly limited.

[0046] 10, the inner surfaces of the walls 9 corresponding to the sides 11a, 11b, 11c, and 11d of the recess 11 may have a tapered shape that widens toward the electronic component 2. When a thermal shock is applied, a force is applied from the walls 9 to the bonding material 4 due to the difference in thermal expansion coefficient between the walls 9 and the base material 8. However, by having the inner surfaces of the walls 9 have a tapered shape, the force from the wall 9 on the electronic component 2 side is less likely to be applied to the bonding material 4, making it less likely that the electronic component 2 will peel off from the circuit board 3 during a thermal shock test. Note that when defining the width dimension d5 of the recess 11 (see FIG. 3), the width dimension at the top end of the recess 11 (i.e., the position of the upper surface of the wall 9) is defined as dimension d5. In other words, dimension d5 is determined at the point where the width dimension of the recess 11 is greatest.

[0047] [Example] Examples of a mounting substrate according to the present disclosure will be described below, but the present disclosure is not limited to the following examples.

[0048] First, the mounting boards of Examples 1 to 7 and Comparative Example 1 were produced by the following manufacturing method. First, a base material 8 on which terminals 10 were formed was prepared. A glass epoxy substrate was used as the base material 8. Cu terminals coated with Ni film were used as the terminals 10. 100 pairs of terminals 10 were formed on the base material 8. Next, a pair of Bi / Sn laminated pads was formed to a desired thickness on the terminals 10 as the bonding material 4. Pairs of bonding materials 4 were formed in 100 locations on the base material 8.

[0049] Next, walls 9 were formed on the substrate 8 to surround the terminals 10 and the bonding material 4. Epoxy resin was used for the walls 9. As a result, the circuit board 3 shown in FIG. 3 was obtained. Next, LED chips were mounted on the circuit board 3 as the electronic components 2. 100 LED chips were mounted on the circuit board 3. The LED chips had Au terminals as the terminals 7. Next, the mounting substrate 1 in this state was reflowed at 150°C to 190°C. This resulted in the circuit board 3 and electronic components 2 being bonded together. The dimensions of Examples 1 to 7 and Comparative Example 1, as well as the presence or absence of components, are shown in the table of FIG. 11. In the table of FIG. 11, "d5-s" refers to the width of the space formed by the walls in the short direction, and "d5-l" refers to the width of the space formed by the walls in the long direction. "d5-l" corresponds to "d5" shown in FIG. 3.

[0050] The following tests were conducted on the mounting boards of Examples 1 to 7 and Comparative Example 1 described above. The resulting mounting boards were allowed to free-fall 10 times from a height of 30 cm. Next, the ratio of the number of LED chips remaining after the test to the total number of LED chips on the mounting board before the test was measured as the "LED remaining rate." The ratio of the number of LED chips that were emitting light among the remaining LED chips was measured as the "emission rate of remaining LEDs." Note that a remaining LED emission rate of 50% or more was considered OK. The ratio of the number of LED chips that were emitting light to the number of LED chips before the test was measured as the "OK rate after the test." The test results are shown in the table in Figure 11.

[0051] First, it was confirmed that in Comparative Example 1, the (dimension d1 - dimension d2) was too wide, so the LED chip could not be protected from the shock during the test, and the LED chip was easily removed from the circuit board. In contrast, it was confirmed that in Examples 1 to 7, many LED chips remained, and the remaining LED chips were also able to emit light at a high rate.

[0052] From Examples 1, 2, and 3, it can be seen that by setting (dimension d1 - dimension d2) within an appropriate range, a portion of the LED chip comes into contact with the wall, and the wall absorbs the impact on the LED chip and the joint during the test, resulting in a high LDE survival rate and LED incidence rate. From Example 4, it can be seen that because (dimension h2 - dimension h1) is larger than in Example 2, the contact between the LED chip and the wall is slightly reduced, and the impact of the LED chip is transmitted to the bonding material, resulting in a slightly reduced number of LED chips that can withstand the test. From Examples 5 and 6, it can be seen that because (dimension h2 - dimension h1) is even larger than in Example 4, the contact between the LED chip and the wall is slightly reduced, and the impact of the LED chip is transmitted to the bonding material, resulting in a slightly reduced number of LED chips that can withstand the test and a slightly reduced residual LED emission rate. From Example 7, it can be seen that good results were obtained in all items. [Explanation of symbols]

[0053] 1...mounting board, 2...electronic component, 3...circuit board, 4...bonding material, 6...main body, 7...terminal (first terminal), 9...wall, 10...terminal (second terminal), 20...component, 30...spacer (first spacer), 40...spacer (second spacer), 50...step.

Claims

1. A mounting board including an electronic component having at least a pair of first terminals and a circuit board having at least a pair of second terminals, the first terminal and the second terminal are electrically joined by a joining material containing a metal element; the electronic component and the bonding material are disposed within a wall formed by an insulator, a lower surface of the electronic component is lower than an upper surface of the wall; When the long side of the area surrounded by the wall is dimensioned as d1 and the long side of the electronic component is dimensioned as d2, The value of (dimension d1 - dimension d2) is 10 μm or less, A mounting board, wherein a first spacer is disposed between the pair of second terminals and is lower than the upper surface of the wall.

2. The mounting board according to claim 1 , wherein a component is disposed between the electronic component and the bonding material and the wall.

3. The mounting substrate of claim 2 , wherein the component is above the top surface of the wall. Mounting board.

4. A mounting board comprising an electronic component having at least a pair of first terminals and a circuit board having at least a pair of second terminals, the first terminal and the second terminal are electrically joined by a joining material containing a metal element; the electronic component and the bonding material are disposed within a wall formed by an insulator, a lower surface of the electronic component is lower than an upper surface of the wall; When the long side of the area surrounded by the wall is dimensioned as d1 and the long side of the electronic component is dimensioned as d2, The value of (dimension d1 - dimension d2) is 10 μm or less, a component is disposed between the electronic component and the bonding material and the wall; A mounting substrate, wherein the component is above the top surface of the wall.

5. 5. The mounting board according to claim 1, wherein a second spacer is disposed on an inner periphery of the wall, the second spacer being lower than the upper surface of the wall.

6. The mounting substrate according to any one of claims 1 to 5, wherein, when the height of the upper surface of the wall is dimension h1 and the height of the upper surface of the electronic component is dimension h2, the value of (dimension h2 - dimension h1) is 9 μm or less.

7. 7. The mounting board according to claim 1, wherein a step is provided at a lower portion of the electronic component, and a component is disposed between the lower portion and the circuit board.

8. 8. The mounting board according to claim 1, wherein the inner surface of the wall has a tapered shape.

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