Bonded silicon wafer and manufacturing method thereof

Abstract

To provide a joint silicon wafer with a small thickness and a high infrared reflectance, and a method for manufacturing the joint silicon wafer.SOLUTION: A joint silicon wafer includes: a supporting substrate silicon wafer; a monocrystalline silicon layer on the supporting substrate silicon wafer; and an infrared reflection silicon film between the supporting substrate silicon wafer and the monocrystalline silicon layer. The infrared reflection silicon film includes amorphous silicon and a thickness of the infrared reflection silicon film is at least 16 nm.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a bonded silicon wafer and a method for manufacturing the same. [Background technology]

[0002] Known examples of bonded silicon wafers include MEMS devices and semiconductor devices that use room-temperature bonding equipment (see, for example, Patent Document 1). Meanwhile, in recent years, highly sensitive infrared light receiving sensors have become necessary in fields such as surveillance cameras and automobile collision prevention sensors, and efforts are being sought to utilize silicon wafers that have traditionally been used as sensors in the visible light region. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-72249 Summary of the Invention [Problem to be solved by the invention]

[0004] Both single crystal silicon and silicon oxide have low reflectivity to infrared light and are relatively transparent. Therefore, if single crystal silicon or silicon oxide is used as the infrared reflective layer of an infrared light receiving sensor, the infrared reflective layer must be approximately 100 μm thick. If the thickness of the infrared reflective layer can be reduced, the infrared light receiving sensor can be made smaller. Therefore, an object of the present invention is to provide a bonded silicon wafer that is thin and has high infrared reflectivity, and a method for manufacturing the same. [Means for solving the problem]

[0005] The present inventors conducted research to solve the above-mentioned problems and investigated the use of amorphous silicon instead of silicon oxide, which has been commonly used as an infrared-reflecting silicon film in silicon wafer-based devices. Amorphous silicon has a higher infrared reflectivity than silicon oxide and can be formed using room-temperature bonding technology, so they expected it to have advantages in terms of manufacturing process. However, amorphous silicon films formed using conventional room-temperature bonding technology are too thin to adequately reflect infrared light. The present inventors further investigated the use of amorphous silicon and discovered that controlling the thickness of the amorphous silicon layer or combining it with a polycrystalline silicon layer significantly improves the infrared reflectivity. The present invention was completed based on the above-mentioned findings and has the following gist:

[0006] <1> A bonded silicon wafer having a silicon wafer for a support substrate, a single crystal silicon layer on the silicon wafer for a support substrate, and an infrared-reflecting silicon film provided between the silicon wafer for a support substrate and the single crystal silicon layer, wherein the infrared-reflecting silicon film contains amorphous silicon and has a thickness of 16 nm or more.

[0007] <2> The infrared reflective silicon film is made of amorphous silicon. <1> 2. The bonded silicon wafer according to claim 1.

[0008] <3> The infrared reflective silicon film has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. <1> 2. The bonded silicon wafer according to claim 1.

[0009] <4> The thickness of the infrared reflective silicon film is 25 nm or more. <1> ~ <3> 2. The bonded silicon wafer according to claim 1.

[0010] <5> The thickness of the single crystal silicon layer is 3 μm or more and 30 μm or less. <1> ~ <4> 2. The bonded silicon wafer according to claim 1.

[0011] <6> the above <2> , <4> , <5> 1. A method for manufacturing a bonded silicon wafer according to claim 1, comprising: an amorphous silicon film formation step of forming an amorphous silicon film layer having a thickness of 15 nm or more on a surface of the silicon wafer for use as a support substrate; an activation treatment step of performing an activation treatment under vacuum at room temperature on the surface of the amorphous silicon film layer and the surface of the silicon wafer for use as a single crystal silicon layer to turn both surfaces into activated regions; a bonding step, subsequent to the activation treatment step, of bringing both activated regions into contact under vacuum at room temperature to bond both activated regions together, thereby forming the infrared reflective silicon film; and a thickness reduction step of reducing the thickness of the silicon wafer for use as a single crystal silicon layer to obtain the single crystal silicon layer after the bonding step.

[0012] <7> the above <2> , <4> , <5> a bonding step of bonding the activated regions together in a vacuum at room temperature to form the infrared-reflecting silicon film; and a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer.

[0013] <8> the above <2> , <4> , <5> 2. A method for producing a bonded silicon wafer according to claim 1, comprising: an amorphous silicon film formation step of forming an amorphous silicon film layer having a total thickness of 16 nm or more on each surface of the silicon wafer for support substrate and the silicon wafer for single crystal silicon layer; an activation treatment step of performing an activation treatment under vacuum at room temperature on the surface of each amorphous silicon film layer on the surface of the silicon wafer for support substrate and the silicon wafer for single crystal silicon layer to turn both surfaces into activated regions; a bonding step, following the activation treatment step, of bringing both activated regions into contact under vacuum at room temperature to bond both activated regions together to form the infrared reflective silicon film; and a thickness reduction step of reducing the thickness of the silicon wafer for single crystal silicon layer to obtain the single crystal silicon layer after the bonding step.

[0014] <9> the above <3> ~ <5> a polycrystalline silicon film formation step of forming a polycrystalline silicon film layer having a thickness of 15 nm or more on a surface of the silicon wafer for use as a support substrate; an activation treatment step of performing an activation treatment under vacuum at room temperature on the surface of the polycrystalline silicon film layer and the surface of the silicon wafer for use as a single crystal silicon layer to turn both surfaces into activated regions; a bonding step of, following the activation treatment step, bringing both activated regions into contact under vacuum at room temperature to bond both activated regions together, thereby forming the infrared reflective silicon film; and a thickness reduction step of reducing the thickness of the silicon wafer for use as a single crystal silicon layer to obtain the single crystal silicon layer after the bonding step.

[0015] <10> the above <3> ~ <5> 1. A method for producing a bonded silicon wafer according to any one of the preceding claims, comprising: a polycrystalline silicon film formation step of forming a polycrystalline silicon film layer having a thickness of 15 nm or more on a surface of a silicon wafer for a single crystal silicon layer; an activation treatment step in which an activation treatment is performed on a surface of the polycrystalline silicon film layer and a surface of the support substrate silicon wafer under vacuum at room temperature to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

[0016] <11> the above <3> ~ <5> a polycrystalline silicon film formation step of forming a polycrystalline silicon film having a total thickness of 16 nm or more on each surface of the silicon wafer for support substrate and the silicon wafer for single crystal silicon layer; an activation treatment step of performing an activation treatment under vacuum at room temperature on the surfaces of the silicon wafer for support substrate and the polycrystalline silicon film layer on the surfaces of the silicon wafer for single crystal silicon layer to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

[0017] Hereinafter, the method of forming an activation region on each of the silicon wafer for the support substrate and the silicon wafer for the single crystal silicon layer and bonding the two wafers together at their activation regions in a vacuum at room temperature will be referred to as the "vacuum room temperature bonding method." [Effects of the Invention]

[0018] According to the present invention, it is possible to provide a bonded silicon wafer that is thin and has high infrared reflectivity, and a method for producing the same. [Brief explanation of the drawings]

[0019] [Figure 1]1 is a schematic cross-sectional view illustrating an outline of a bonded silicon wafer according to the present invention. FIG. [Figure 2A] 1 is a schematic cross-sectional view illustrating a bonded silicon wafer according to the present invention, in which an infrared-reflecting silicon film is made of amorphous silicon. [Figure 2B] 1 is a schematic cross-sectional view illustrating a first embodiment of a bonded silicon wafer according to the present invention, in which an infrared-reflecting silicon film has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. [Figure 2C] FIG. 2 is a schematic cross-sectional view illustrating a second embodiment of a bonded silicon wafer according to the present invention, in which the infrared-reflecting silicon film has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. [Figure 2D] FIG. 10 is a schematic cross-sectional view illustrating a third embodiment of a bonded silicon wafer according to the present invention, in which the infrared-reflecting silicon film has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. [Figure 3] 1A to 1C are schematic cross-sectional views illustrating a first embodiment of a method for producing a bonded silicon wafer according to the present invention. [Figure 4] 5A to 5C are schematic cross-sectional views illustrating a second embodiment of a method for producing a bonded silicon wafer according to the present invention. [Figure 5] 5A to 5C are schematic cross-sectional views illustrating a third embodiment of the method for producing a bonded silicon wafer according to the present invention. [Figure 6] 10A to 10C are schematic cross-sectional views illustrating a fourth embodiment of the method for producing a bonded silicon wafer according to the present invention. [Figure 7] FIG. 1 is a conceptual diagram showing an example of an apparatus used when performing vacuum room temperature bonding in one embodiment of a method for producing bonded silicon wafers according to the present invention. [Figure 8] 1 is a cross-sectional view of a bonded silicon wafer for explaining a method for measuring the infrared reflectance of a bonded silicon wafer according to one embodiment of the present invention. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0020] (1. Overview) Before describing the embodiments according to the present invention, the correspondence between the drawings will be explained. FIG. 1 is a schematic cross-sectional view of a bonded silicon wafer 1 according to the present invention. In this case, the infrared-reflecting silicon film 30 may be amorphous silicon or may have a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. FIG. 2A shows a bonded silicon wafer in which the infrared-reflecting silicon film 30 is made of amorphous silicon. Also, FIGS. 2B to 2D show three aspects of the infrared-reflecting silicon film 30 in a bonded silicon wafer in which the infrared-reflecting silicon film 30 is made of a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer, which will be referred to below as a first aspect, a second aspect, and a third aspect, respectively.

[0021] 3 is a schematic cross-sectional view illustrating an embodiment (hereinafter referred to as the first embodiment) of a method for manufacturing a bonded silicon wafer 2 when the infrared reflective silicon film is made of amorphous silicon. In the first embodiment shown in FIG. 3, the amorphous silicon film layer 131 is formed on the support substrate silicon wafer 110, but instead, the amorphous silicon film layer can be formed on the single crystal silicon layer silicon wafer 120.

[0022] FIG. 4 is a schematic cross-sectional view illustrating an embodiment (hereinafter, referred to as the second embodiment) of a method for manufacturing a bonded silicon wafer 2 in which an amorphous silicon film 231 is provided on both the silicon wafer 210 for the support substrate and the silicon wafer 220 for the single crystal silicon layer, in the case where the infrared reflective silicon film is made of amorphous silicon.

[0023] 5 is a schematic cross-sectional view illustrating an embodiment (hereinafter, referred to as the third embodiment) of a method for manufacturing a bonded silicon wafer 3 having an infrared-reflecting silicon film according to the first aspect, in which the infrared-reflecting silicon film has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. In the third embodiment shown in FIG. 5, a polycrystalline silicon film layer 335 is formed on a silicon wafer 310 for a support substrate. However, if a polycrystalline silicon film layer is instead formed on a silicon wafer 320 for a single-crystal silicon layer, a bonded silicon wafer 4 having an infrared-reflecting silicon film according to the second aspect can be manufactured.

[0024] FIG. 6 is a schematic cross-sectional view illustrating an embodiment (hereinafter, referred to as the fourth embodiment) of a method for manufacturing a bonded silicon wafer 5 having an infrared-reflecting silicon film 430 according to the third aspect, in which the infrared-reflecting silicon film 430 has a stacked structure of an amorphous silicon layer and a polycrystalline silicon layer.

[0025] An embodiment of the present invention will be described in detail below with reference to the drawings. First, bonded silicon wafers 1 to 5 according to the present invention will be outlined with reference to FIG. 1 and FIGS. 2A to 2D. Here, the infrared-reflecting silicon film 30 in the bonded silicon wafer 1 of FIG. 1 may be amorphous silicon or may have a stacked structure of an amorphous silicon layer and a polycrystalline silicon layer. Next, methods for manufacturing bonded silicon wafers according to first to fourth embodiments for obtaining bonded silicon wafers 2 to 5 will be described, along with details of each component. After that, specific embodiments applicable to the present invention will be described. Note that in each drawing, the thickness of each component is exaggerated for ease of explanation. Therefore, the thickness of each component differs from the actual thickness ratio.

[0026] (2. Bonded Silicon Wafers) Referring to Figure 1, a bonded silicon wafer 1 according to the present invention comprises a support substrate silicon wafer 10, a single crystal silicon layer 21 made of single crystal silicon on the support substrate silicon wafer 10, and an infrared-reflecting silicon film 30 provided between the support substrate silicon wafer 10 and the single crystal silicon layer 21, the infrared-reflecting silicon film 30 containing amorphous silicon. In the bonded silicon wafer 2 of Figure 2A, the infrared-reflecting silicon film 30 is made of amorphous silicon, while in the bonded silicon wafers 3 to 5 of Figures 2B to 2D, the infrared-reflecting silicon film 30 has a stacked structure of an amorphous silicon layer and a polycrystalline silicon layer. Here, the single crystal silicon used as the material for the support substrate silicon wafer 10 and the single crystal silicon layer 21 is transparent to infrared light, whereas the amorphous silicon and polycrystalline silicon used as the material for the infrared-reflecting silicon film 30 are opaque to infrared light. By setting the infrared-reflecting silicon film 30, which is made of amorphous silicon alone or amorphous silicon and polycrystalline silicon, to a thickness of 16 nm or more, a bonded silicon wafer with a thin thickness and high infrared reflectivity can be obtained. The infrared-reflecting silicon film 30 may be amorphous silicon or may have a stacked structure of amorphous silicon layers and polycrystalline silicon layers, but a thickness less than 16 nm will not sufficiently reflect infrared rays. The thickness of the infrared-reflecting silicon film 30 is preferably 20 nm or more, more preferably 25 nm or more, and even more preferably 30 nm or more. The thicker the infrared-reflecting silicon film 30, the closer its reflectivity becomes to 100%, but it generally saturates at 25 nm. There is no particular upper limit, but from the perspective of miniaturizing the bonded silicon wafer 1, it is possible to set the upper limit to 40 nm. Furthermore, the thickness of the single-crystal silicon layer 21, onto which infrared rays are incident, is not particularly limited, but is preferably 3 μm or more and 30 μm or less. Depending on the application of bonded silicon wafer 1, the thickness of single crystal silicon layer 21 may be set to 5 μm or more, 10 μm or more, 20 μm or less, or 15 μm or less.

[0027] FIG. 2A shows a schematic diagram of a bonded silicon wafer in which the infrared-reflecting silicon film 30 is made of amorphous silicon.

[0028] 2B to 2D each schematically show first to third embodiments in which the infrared reflective silicon film 30 has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer.

[0029] In the infrared reflective silicon film 30 of the first embodiment shown in FIG. 2B, a polycrystalline silicon layer 35 is provided on the front surface side of the support substrate silicon wafer 10, and an amorphous silicon layer 32 is provided on the front surface side of the single crystal silicon layer 21.

[0030] In the infrared reflective silicon film 30 of the second embodiment shown in FIG. 2C, a polycrystalline silicon layer 35 is provided on the front surface side of the single crystal silicon layer 21, and an amorphous silicon layer 32 is provided on the front surface side of the silicon wafer 10 for supporting substrate.

[0031] 2D , the infrared-reflecting silicon film 30 has a polycrystalline silicon layer 35a and a polycrystalline silicon layer 35b provided on the front surface sides of both the support substrate silicon wafer 10 and the single-crystal silicon layer 21. The amorphous silicon layer 32 is provided between the polycrystalline silicon layer 35a and the polycrystalline silicon layer 35b.

[0032] In the first to third embodiments in which the infrared-reflecting silicon film 30 has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer, whether the infrared-reflecting silicon film 30 is formed in the order of a polycrystalline silicon layer and an amorphous silicon layer from the support substrate silicon wafer 10 side, an amorphous silicon layer and a polycrystalline silicon layer from the support substrate silicon wafer 10 side, or a polycrystalline silicon layer, an amorphous silicon layer and a polycrystalline silicon layer from the support substrate silicon wafer 10 side is determined by the embodiment of the manufacturing method. Furthermore, although not shown, the laminated structures shown in the first to third embodiments may further include a laminated structure consisting of either or both of an amorphous silicon layer and a polycrystalline silicon layer. In any case, in the bonded silicon wafers 2 to 5 according to the present invention, the laminated structure of the amorphous silicon layer and the polycrystalline silicon layer similarly functions as an infrared-reflecting silicon film. Below, embodiments for manufacturing the bonded silicon wafers 2 to 5 are sequentially described.

[0033] (3. First Embodiment of Method for Manufacturing Bonded Silicon Wafers) A method for manufacturing a bonded silicon wafer 100 according to the first embodiment will be described with reference to Fig. 3. This embodiment is a method for manufacturing the bonded silicon wafer 2 of Fig. 2A, and is an embodiment in which the infrared-reflecting silicon film 30 in the bonded silicon wafer 1 of Fig. 1 is made of amorphous silicon.

[0034] The method for manufacturing the bonded silicon wafer 100 includes an amorphous silicon film layer forming step (see S110 and S120 in FIG. 3) of forming an amorphous silicon film layer 131 having a thickness of 15 nm or more on the surface of the silicon wafer 110 for the support substrate, and an activation process of performing an activation process on the surface of the amorphous silicon film layer 131 of the silicon wafer 110 for the support substrate and the surface of the silicon wafer 120 for the single-crystal silicon layer in a vacuum at room temperature to form activation regions 132a, 132b on both surfaces. 2b (see S130 and S140 in FIG. 3), a bonding step (see S150 in FIG. 3) of forming the infrared-reflecting silicon film 130 by bringing both activated regions 132a, 132b into contact with each other in a vacuum at room temperature and bonding the activated regions 132a, 132b together, and a thickness reduction step (see S160 in FIG. 3) of reducing the thickness of the silicon wafer 120 for the single-crystal silicon layer to obtain the single-crystal silicon layer 121 after the bonding step. Each step will be described in detail below.

[0035] <Amorphous silicon film layer formation process> In the amorphous silicon film layer formation step (see S110 and S120 in FIG. 3 ), an amorphous silicon film layer 131 made of amorphous silicon is formed on the surface of the support substrate silicon wafer 110. The amorphous silicon film layer 131 can be formed by a common method. The thickness of the amorphous silicon film layer 131 formed here is set to 15 nm or more so that the amorphous silicon region functions as an infrared-reflecting silicon film when a bonded silicon wafer is formed. During the activation process, an activated region made of amorphous silicon is formed to a depth of approximately 1 nm from the surface of each silicon wafer, so that when the silicon wafers are bonded together, an infrared-reflecting silicon film 130 with a thickness of 16 nm or more is formed. The thickness of the amorphous silicon film 131 formed in this step is preferably 19 nm or more, more preferably 24 nm or more, and even more preferably 29 nm or more. Although there is no particular upper limit to the thickness of the amorphous silicon film layer 131, the upper limit is about 40 nm in consideration of industrial productivity.

[0036] <<Formation of Amorphous Silicon Film Forming Layer by CVD Method>> Moreover, the amorphous silicon film forming layer 131 made of amorphous silicon can be formed on the surface of the silicon wafer 110 for a support substrate by using a CVD method such as a plasma CVD method. If the film is formed while the temperature of the silicon wafer 110 for a support substrate is set to 500°C or higher and 600°C or lower, an amorphous silicon film forming layer made of amorphous silicon can be grown.

[0037] <<Activation Treatment Step>> Next, in the activation treatment step (see S130 and S140 in FIG. 3), an activation treatment for performing a vacuum room-temperature bonding method is performed. That is, an activation treatment of irradiating the surfaces of the amorphous silicon film forming layer 131 of the silicon wafer 110 for a support substrate and the silicon wafer 120 for a single crystal silicon layer with an ion beam or a neutral atom beam 910 under vacuum and room temperature is performed to form activation regions 132a and 132b on the respective surfaces of the silicon wafer 110 for a support substrate and the silicon wafer 120 for a single crystal silicon layer. Also, as will be described later, although it depends on the implantation energy on the surface of each silicon wafer, an activation region made of amorphous silicon is formed up to a depth position of approximately 1 nm from the surface on the side irradiated with the beam.

[0038] <<Bonding Step>> Then, following this activation treatment step, in a bonding step (see S150 in FIG. 3 ), the activated regions 132a, 132b of the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are brought into contact with each other in a vacuum at room temperature, thereby bonding the two silicon wafers together via the amorphous silicon film layer 131. At this time, amorphous silicon is formed to a depth of approximately 1 nm not only in the activated region 132a on the surface of the amorphous silicon film layer 131 on the support substrate silicon wafer 110 but also in the activated region 132b on the surface of the single crystal silicon layer silicon wafer 120 on which the amorphous silicon film layer 131 is not formed. Therefore, during bonding, an infrared reflective silicon film 130 made of amorphous silicon and having a thickness of 16 nm or more is formed, including the amorphous silicon film layer 131.

[0039] <<Bonding by vacuum room temperature bonding method>> 3 and 7, a bonding method using vacuum room-temperature bonding for performing the activation treatment step and the bonding step will be described. The vacuum room-temperature bonding method is a method for bonding a support substrate silicon wafer 110 and a single-crystal silicon layer silicon wafer 120 at room temperature without heating them. In this embodiment, an activation treatment is performed by irradiating the surface of the amorphous silicon film layer 131 of the support substrate silicon wafer 110 and the surface of the single-crystal silicon layer silicon wafer 120 with an ion beam or a neutral atom beam in a vacuum at room temperature, thereby forming activated regions 132a and 132b on both surfaces, respectively (see also S130 and S140 in FIG. 3). As a result, dangling bonds appear in the activated regions 132a and 132b. Therefore, when both of the activated regions are subsequently brought into contact under vacuum at room temperature, a bonding force is instantaneously exerted, and the silicon wafer 110 for the support substrate and the silicon wafer 120 for the single crystal silicon layer are firmly bonded together with the activated regions 132a and 132b as bonding surfaces, thereby bonding the two together (see also S150 in FIG. 3).

[0040] The activation process can be performed by accelerating ionized elements in a plasma atmosphere toward the substrate surface, or by accelerating ionized elements from an ion beam device toward the substrate surface. Referring to Figure 7, the activation process will be described using a conceptual diagram showing an example of an apparatus that realizes this process. A vacuum room-temperature bonding apparatus 930 includes a plasma chamber 931, a gas inlet 932, a vacuum pump 933, a pulse voltage application device 934, and wafer fixing tables 935a and 935b.

[0041] First, the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are placed and fixed on wafer fixing stages 935a and 935b in the plasma chamber 931, respectively. Next, the pressure inside the plasma chamber 931 is reduced by a vacuum pump 933, and then a source gas is introduced into the plasma chamber 931 through a gas inlet 932. Subsequently, a pulse voltage application device 934 applies a negative voltage in pulses to the wafer fixing stages 935a and 935b (together with the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120). This generates plasma of the source gas, and ions of the source gas contained in the generated plasma can be accelerated and irradiated toward the surfaces of the amorphous silicon film layer 131 formed on the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120.

[0042] The element to be irradiated may be at least one selected from the group consisting of Ar, Ne, Xe, H, He, and Si.

[0043] See S140 in FIG. 3. As described above, the activation process in the vacuum room-temperature bonding method forms amorphous silicon regions and dangling bonds in both the amorphous silicon film layer 131 and the silicon wafer 120 for the single-crystal silicon layer, extending from the surface on the side irradiated with the beam to a depth of approximately 1 nm. In this embodiment, since the amorphous silicon film layer 131 is made of amorphous silicon, an activated region 132a is formed in the silicon wafer 110 for the support substrate, with the thickness of the amorphous silicon region remaining unchanged. Furthermore, an activated region 132b made of amorphous silicon is formed in the silicon wafer 120 for the single-crystal silicon layer. These amorphous silicon regions formed in both silicon wafers also function as gettering layers. For example, the activated region 132a made of amorphous silicon is useful in that it can suppress outward diffusion of oxygen and impurities in the silicon wafer 110 for the support substrate into the silicon wafer 120 for the single-crystal silicon layer.

[0044] -Specific aspects of the vacuum room temperature bonding method- The chamber pressure in the plasma chamber 931 was 1×10 -5 Pa or less. -5 This is because, if the pressure is equal to or less than Pa, there is no risk of the sputtered elements re-adhering to the substrate surface, resulting in a decrease in the rate of dangling bond formation.

[0045] The pulse voltage applied to the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 may be set so that the acceleration energy of the irradiated element relative to the substrate surface is 100 eV or more and 10 keV or less. If it is 100 eV or more, there is no risk of the irradiated element depositing on the substrate surface, and if it is 10 keV or less, there is no risk of the irradiated element being implanted into the substrate, so dangling bonds can be stably formed.

[0046] The frequency of the pulse voltage determines the number of times that the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are irradiated with ions or neutral atoms. The frequency of the pulse voltage may be 10 Hz or more and 10 kHz or less. If the frequency of the pulse voltage is 10 Hz or more, the variation in the irradiation of ions or neutral atoms can be absorbed, thereby stabilizing the amount of irradiation of ions or neutral atoms. If the frequency of the pulse voltage is 10 kHz or less, plasma formation by glow discharge is stable.

[0047] The pulse width of the pulse voltage determines the time during which the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are irradiated with ions or neutral atoms. The pulse width is preferably 1 μsec or more and 10 ms or less. If the pulse width is 1 μsec or more, the support substrate and the single crystal silicon layer substrate can be stably irradiated with ions or neutral atoms. If the pulse width is 10 ms or less, plasma formation by glow discharge is stable.

[0048] As described above, the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 are not heated, so the temperature of each wafer is room temperature (usually 30° C. to 90° C.).

[0049] <Thickness reduction process for silicon wafers for single crystal silicon layers> After the activation treatment step and bonding step using the vacuum room temperature bonding method described above, a thickness reduction step (see S160 in FIG. 3 ) is performed on the silicon wafer 120 for the single crystal silicon layer. In this step, the silicon wafer 120 for the single crystal silicon layer is reduced in thickness from the side opposite to the bonded surface to obtain a single crystal silicon layer 121 made of single crystal silicon. The thickness reduction can be achieved, for example, by grinding and polishing the silicon wafer 120 for the single crystal silicon layer. This allows a bonded silicon wafer 100 having a single crystal silicon layer 121 of a desired thickness to be obtained. The thickness of the single crystal silicon layer 121 can be determined appropriately depending on the device to be formed thereon, and is preferably 3 μm to 30 μm, but may also be 5 μm or more, 10 μm or more, 20 μm or less, or 15 μm or less. For this grinding and polishing, known grinding and polishing methods can be suitably used. Specifically, surface grinding and mirror polishing can be used.

[0050] The bonded silicon wafer 100 thus obtained includes a support substrate silicon wafer 110, a single crystal silicon layer 121 on the support substrate silicon wafer 110, and an infrared reflective silicon film 130 made of amorphous silicon provided between the support substrate silicon wafer 110 and the single crystal silicon layer 121. The amorphous silicon of the infrared reflective silicon film 130 essentially comprises an amorphous silicon film 131 provided on the front surface side of the support substrate silicon wafer 110 and an activated region 132b formed on the front surface of the single crystal silicon layer silicon wafer 120, and the amorphous silicon film layer 131 includes an activated region 132a formed on the front surface of the amorphous silicon film layer 131.

[0051] The first embodiment of the method for manufacturing a bonded silicon wafer has been described above with reference to Fig. 3. In this first embodiment, the amorphous silicon film layer 131 is formed on the silicon wafer 110 for the support substrate. However, as an alternative modification of the first embodiment, the bonded silicon wafer 100 shown in Fig. 1 can also be manufactured by going through the same steps as in the first embodiment, except that the amorphous silicon film layer 131 is formed on the silicon wafer 120 for the single crystal silicon layer. That is, the method includes an amorphous silicon film layer forming step of forming the amorphous silicon film layer 131 made of amorphous silicon on the surface of the silicon wafer 120 for the single crystal silicon layer, and an activation process of irradiating the surface of the silicon wafer 110 for the support substrate and the surface of the amorphous silicon film layer 131 on the silicon wafer 120 for the single crystal silicon layer with an ion beam or neutral atom beam 910 in a vacuum at room temperature to form activated regions 132a, 132b on the silicon wafer 110 for the support substrate and the silicon wafer 120 for the single crystal silicon layer. The bonded silicon wafer 100 can be manufactured by an activation process in which the amorphous silicon film layer 131 is formed on each of the wafers 120, a bonding process in which the activation regions 132a, 132b are brought into contact with each other in a vacuum at room temperature following the activation process, thereby bonding the support substrate silicon wafer 110 and the single crystal silicon layer silicon wafer 120 together via the amorphous silicon film layer 131, and a thickness reduction process in which the single crystal silicon layer silicon wafer 120 is reduced in thickness from the side opposite to the bonded surface to form the single crystal silicon layer 121. The formation of the amorphous silicon film layer 131, the vacuum room temperature bonding method, the grinding and polishing techniques for thickness reduction, and the like can be similar to those described above in the first embodiment, and therefore redundant explanations will be omitted.

[0052] (4. Second Embodiment of Method for Manufacturing Bonded Silicon Wafers) A method for manufacturing a bonded silicon wafer 200 according to the second embodiment will be described with reference to Figure 4. Bonded silicon wafer 200 manufactured in this embodiment is a bonded silicon wafer in which infrared-reflecting silicon film 30 in Figure 1 is made of amorphous silicon, similar to bonded silicon wafer 100 manufactured in the first embodiment. For the sake of simplicity, components and steps that are the same as those in the first embodiment are generally designated by the same reference numerals in the ones and tens digits, and detailed descriptions of the configuration will be omitted, and the same applies hereinafter.

[0053] The method for manufacturing the bonded silicon wafer 200 includes an amorphous silicon film layer forming step (see S210 and S220 in FIG. 4) of forming amorphous silicon film layers 231a and 231b having a total thickness of 16 nm or more on the surfaces of the silicon wafer 210 for the support substrate and the silicon wafer 220 for the single-crystal silicon layer, and a step of performing an activation treatment in vacuum at room temperature on the surfaces of the amorphous silicon film layers 231a and 231b on the surfaces of the silicon wafer 210 for the support substrate and the silicon wafer 220 for the single-crystal silicon layer. The method includes an activation process (see S230 and S240 in FIG. 4) for converting both surfaces into activation regions 232a, 232b, a bonding process (see S250 in FIG. 4) for contacting both activation regions 232a, 232b in vacuum at room temperature following the activation process, and bonding both activation regions 232a, 232b together to form the infrared-reflecting silicon film 230, and a thickness reduction process (see S260 in FIG. 4) for reducing the thickness of the silicon wafer 220 for single crystal silicon layer to obtain the single crystal silicon layer 221 after the bonding process.

[0054] <Amorphous silicon film layer formation process> While the first embodiment forms the amorphous silicon film layer 131 only on the support substrate silicon wafer 110, the second embodiment differs in that amorphous silicon film layers 231a and 231b are formed on both the support substrate silicon wafer 210 and the single-crystal silicon layer silicon wafer 220. The amorphous silicon film layers 231a and 231b are formed using the same method as in the first embodiment, and a CVD method or the like can be applied. The amorphous silicon film layers 231a and 231b formed here have a total thickness of 16 nm or more so that the infrared-reflecting silicon film 230 efficiently reflects infrared rays when the bonded silicon wafer 200 is formed. The amorphous silicon film layers 231a and 231b may have the same thickness or different thicknesses. In the manufacturing method of the second embodiment, because both surfaces to be activated are amorphous silicon, the thickness of the infrared-reflecting silicon film 230 after bonding is the same as the total thickness of the amorphous silicon film layers 231a and 231b formed before bonding. The total thickness of the amorphous silicon film layers 231a and 231b is preferably 20 nm or more, more preferably 25 nm or more, and even more preferably 30 nm or more. There is no particular upper limit to the total thickness of the amorphous silicon film layer 231, but considering industrial productivity, the upper limit is approximately 40 nm.

[0055] <Activation treatment process and bonding process> In the second embodiment, the activation process involves activating the surfaces of the amorphous silicon film layers 231a and 231b to form activated regions 232a and 232b on the surfaces of both silicon wafers. Then, in the bonding process, the activated regions 232a and 232b are bonded together in a vacuum at room temperature, as in the first embodiment.

[0056] <Thickness reduction process> The thickness reduction step can also be carried out in the same manner as in the first embodiment.

[0057] The bonded silicon wafer 200 thus obtained includes a support substrate silicon wafer 210, a single crystal silicon layer 221 on the support substrate silicon wafer 210, and an infrared reflective silicon film 230 made of amorphous silicon provided between the support substrate silicon wafer 210 and the single crystal silicon layer 221. The amorphous silicon of the infrared reflective silicon film 230 essentially consists of an amorphous silicon film layer 231a provided on the surface of the support substrate silicon wafer 210 and an amorphous silicon film layer 231b provided on the surface of the single crystal silicon layer silicon wafer 220, with the amorphous silicon film layer 231a including an activated region 232a formed on the surface of the amorphous silicon film layer 231a and the amorphous silicon film layer 231b including an activated region 232b formed on the surface of the amorphous silicon film layer 231b.

[0058] (5. Third Embodiment of Method for Manufacturing Bonded Silicon Wafers) A method for manufacturing a bonded silicon wafer 300 according to the third embodiment will be described with reference to Fig. 5. This embodiment is a method for manufacturing bonded silicon wafers 2 and 3 of the aspects shown in Fig. 2B and 2C, and unlike the first and second embodiments, infrared-reflecting silicon film 330 of this embodiment has a stacked structure of an amorphous silicon layer and a polycrystalline silicon layer.

[0059] The method for manufacturing the bonded silicon wafer 300 includes a polycrystalline silicon film layer forming step (see S310 and S320 in FIG. 5) of forming a polycrystalline silicon film layer 331 having a thickness of 15 nm or more on the surface of the support substrate silicon wafer 310, and an activation process of applying an activation process to the surface of the polycrystalline silicon film layer 331 of the support substrate silicon wafer 310 and the surface of the single-crystal silicon layer silicon wafer 320 in a vacuum at room temperature to form both surfaces into activated regions 332 a and 332 b. The method includes an activation process (see S330 and S340 in FIG. 5), a bonding process (see S350 in FIG. 5) following the activation process, in which both activation regions 332 a and 332 b are brought into contact with each other in a vacuum at room temperature to bond both activation regions 332 a and 332 b together, thereby forming an infrared-reflecting silicon film 330, and a thickness reduction process (see S360 in FIG. 5) following the bonding process, in which the thickness of the silicon wafer 320 for single-crystal silicon layer is reduced to obtain the single-crystal silicon layer 321.

[0060] <Polycrystalline silicon film layer formation process> In the polycrystalline silicon film layer formation step (see S310 and S320 in FIG. 5 ), a polycrystalline silicon film layer 335 made of polycrystalline silicon is formed on the surface of the support substrate silicon wafer 310. The polycrystalline silicon film layer 335 can be formed by a conventional method. The thickness of the polycrystalline silicon film layer 335 formed here is set to 15 nm or more so that, when the bonded silicon wafer 300 is formed, a region consisting of a stacked structure of polycrystalline silicon and amorphous silicon functions as an infrared-reflecting silicon film. During the activation process, an activated region made of amorphous silicon is formed to a depth of approximately 1 nm from the surface of each silicon wafer, so that, when the silicon wafers are bonded together, an infrared-reflecting silicon film 330 having a thickness of 16 nm or more is formed. The thickness of the polycrystalline silicon film 335 formed in this step is preferably 19 nm or more, more preferably 24 nm or more, and even more preferably 29 nm or more. There is no particular upper limit to the thickness of the polycrystalline silicon film layer 335, but in consideration of industrial productivity, the upper limit is about 40 nm.

[0061] <<Formation of Polycrystalline Silicon Film Layer by CVD Method>> Also, the polycrystalline silicon film layer 335 made of polycrystalline silicon can be formed on the surface of the silicon wafer 310 for the support substrate by using a CVD method such as the plasma CVD method. If the film is formed while the temperature of the silicon wafer 310 for the support substrate is set at 700 °C or higher and 900 °C or lower, a polycrystalline silicon film layer made of polycrystalline silicon can be grown.

[0062] <Activation Treatment Step> The activation treatment may be performed in the same manner as in the above-described first and second implementation steps. That is, referring to S330 and S340 in FIG. 5, an activation treatment of irradiating the surfaces of the polycrystalline silicon film layer 335 of the silicon wafer 310 for the support substrate and the surface of the silicon wafer 320 for the single-crystalline silicon layer with an ion beam or a neutral atom beam 910 is performed under vacuum at room temperature, and activation regions 332a and 332b are formed on the silicon wafer 310 for the support substrate and the silicon wafer 320 for the single-crystalline silicon layer, respectively. Also, as will be described later, an activation region made of amorphous silicon is formed up to a depth position of approximately 1 nm from the surface on the side irradiated with the beam on the surface of each silicon wafer.

[0063] <Bonding Step> In the bonding step (refer to S350 in FIG. 5), following the activation treatment step, the silicon wafer 310 for the support substrate and the silicon wafer 320 for the single-crystalline silicon layer can be bonded via the polycrystalline silicon film layer 335 by bringing the two activation regions 332a and 332b into contact with each other under vacuum at room temperature. At this time, since at least 1 nm or more of amorphous silicon is also formed on the surface of the silicon wafer 320 for the single-crystalline silicon layer on which the polycrystalline silicon film layer 335 is not formed, an infrared reflection silicon film 330 made of polycrystalline silicon and amorphous silicon with a thickness of 16 nm or more is formed together with the polycrystalline silicon film layer 335 at the time of bonding.

[0064] <Thinning Step> The subsequent thickness reduction step can be carried out in the same manner as in the first and second embodiments.

[0065] The bonded silicon wafer 300 thus obtained includes a support substrate silicon wafer 310, a single crystal silicon layer 321 on the support substrate silicon wafer 310, and an infrared-reflecting silicon film 330 provided between the support substrate silicon wafer 310 and the single crystal silicon layer 321. The infrared-reflecting silicon film 330 includes a polycrystalline silicon film-formed layer 335 made of polycrystalline silicon, and an activated region 332. The activated region 332 is derived from the above-mentioned activated region 332a and activated region 332b.

[0066] The third embodiment of the method for manufacturing a bonded silicon wafer 300 according to the first aspect has been described above with reference to Fig. 5. In this first embodiment, a polycrystalline silicon film layer 335 is formed on a silicon wafer 310 for a support substrate. However, as a modified version of the third embodiment, a bonded silicon wafer 4 according to the second aspect shown in Fig. 2C can be manufactured by carrying out the same steps as in the third embodiment, except that a polycrystalline silicon film layer 335 is formed on a silicon wafer 320 for a single crystal silicon layer. That is, the bonded silicon wafer 4 according to the second aspect can be manufactured by the following steps: a polycrystalline silicon film formation step of forming a polycrystalline silicon film layer 335 made of polycrystalline silicon on the surface of the silicon wafer 320 for the single crystal silicon layer; an activation treatment step of irradiating the surfaces of the silicon wafer 310 for the support substrate and the silicon wafer 320 for the single crystal silicon layer with an ion beam or a neutral atom beam under vacuum at room temperature to form activated regions 332 a, 332 b in the silicon wafer 310 for the support substrate and the silicon wafer 320 for the single crystal silicon layer, respectively; a bonding step of bonding the silicon wafer 310 for the support substrate and the silicon wafer 320 for the single crystal silicon layer together via the polycrystalline silicon film layer 335 under vacuum at room temperature following the activation treatment step, by bringing both activated regions 332 a, 332 b into contact with each other under vacuum at room temperature; and a thickness reduction step of reducing the thickness of the silicon wafer 320 for the single crystal silicon layer from the opposite side to the bonded surface to form the single crystal silicon layer 321 made of single crystal silicon. The formation of the polycrystalline silicon film layer 335, the vacuum room temperature bonding method, the grinding and polishing method for reducing the thickness, etc. can be similar to those described above in the third embodiment, so duplicated explanations will be omitted.

[0067] (6. Fourth Embodiment of Method for Manufacturing Bonded Silicon Wafers) A method for manufacturing a bonded silicon wafer 400 according to a fourth embodiment will be described with reference to Fig. 6. This embodiment is a method for manufacturing a bonded silicon wafer 5 of the third aspect shown in Fig. 2D. In addition, the infrared-reflecting silicon film 430 of this embodiment is made of polycrystalline silicon and amorphous silicon, as in the third embodiment.

[0068] The method for manufacturing the bonded silicon wafer 400 includes a polycrystalline silicon film formation step (see S410 and S420 in FIG. 6) of forming polycrystalline silicon film layers 435a and 435b having a total thickness of 16 nm or more on the surfaces of the silicon wafer 410 for the support substrate and the silicon wafer 420 for the single-crystal silicon layer, respectively, and an activation process of performing an activation treatment on the surfaces of the polycrystalline silicon film layers 435a and 435b on the surfaces of the silicon wafer 410 for the support substrate and the silicon wafer 420 for the single-crystal silicon layer in a vacuum at room temperature to bond both the polycrystalline silicon film layers 435a and 435b. The method includes an activation process (see S430 and S440 in FIG. 6) for converting one surface into activation regions 432a, 432b, a bonding process (see S450 in FIG. 6) for contacting both activation regions 432a, 432b in a vacuum at room temperature following the activation process, and bonding both activation regions 432a, 432b together to form an infrared-reflecting silicon film 430, and a thickness reduction process (see S460 in FIG. 4) for reducing the thickness of the silicon wafer 420 for single-crystal silicon layer to obtain a single-crystal silicon layer 421 after the bonding process.

[0069] <Polycrystalline silicon film layer formation process> While the third embodiment differs in that the polycrystalline silicon layer 335 is formed only on the support substrate silicon wafer 310, the fourth embodiment differs in that polycrystalline silicon layers 435a and 435b are formed on both the support substrate silicon wafer 410 and the single-crystal silicon layer silicon wafer 420. The polycrystalline silicon layers 435a and 435b are formed by the same method as in the third embodiment, and a CVD method or the like can be applied. The polycrystalline silicon layers 435a and 435b formed here have a total thickness of 16 nm or more so that the infrared-reflecting silicon film 430 efficiently reflects infrared light when the bonded silicon wafer 400 is formed. The polycrystalline silicon layers 435a and 435b may have the same or different thicknesses. In the manufacturing method of the fourth embodiment, because both surfaces to be activated are polycrystalline silicon, the total thickness of the infrared-reflecting silicon film 430 after bonding is the same as the total thickness of the polycrystalline silicon layers 435a and 435b formed before bonding. The total thickness of the polycrystalline silicon film layers 435a, 435b is preferably 20 nm or more, more preferably 25 nm or more, and even more preferably 30 nm or more. There is no particular upper limit to the total thickness of the infrared reflective silicon film 430, but considering industrial productivity, the upper limit is approximately 40 nm. In the fourth embodiment, a polycrystalline silicon film layer is formed on each of the support substrate silicon wafer 410 and the single crystal silicon layer silicon wafer 420. However, a polycrystalline silicon film layer may be formed on one of the silicon wafers and an amorphous silicon film layer may be formed on the other.

[0070] <Activation treatment process and bonding process> In the fourth embodiment, the activation process involves activating the surfaces of the polycrystalline silicon film layers 435a and 435b to form activated regions 432a and 432b on the surfaces of both silicon wafers. Then, in the bonding process, the activated regions 432a and 432b are bonded together in a vacuum at room temperature, as in the third embodiment.

[0071] <Thickness reduction process> The thickness reduction step can also be performed in the same manner as described in the first and second embodiments referred to in the third embodiment.

[0072] The bonded silicon wafer 400 thus obtained includes a support substrate silicon wafer 410, a single-crystal silicon layer 421 on the support substrate silicon wafer 410, and an infrared-reflecting silicon film 430 provided between the support substrate silicon wafer 410 and the single-crystal silicon layer 421. The infrared-reflecting silicon film 430 has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer. The laminated structure of the amorphous silicon layer and the polycrystalline silicon layer includes a polycrystalline silicon film layer 435a and a polycrystalline silicon film layer 435b provided on the front surface sides of both the support substrate silicon wafer 410 and the single-crystal silicon layer 421, respectively. The polycrystalline silicon film layer 435a is made of polycrystalline silicon and an activated region 432a made of amorphous silicon provided on its surface. The polycrystalline silicon film layer 435b is made of polycrystalline silicon and an activated region 432b made of amorphous silicon provided on its surface.

[0073] In the first to fourth embodiments, it is also preferable to perform a planarization process on the surfaces of the amorphous silicon film layer and the polycrystalline silicon film layer prior to the activation process. That is, in the first and second embodiments, it is preferable to perform planarization on the amorphous silicon film layers 131 and 231, respectively, and in the third and fourth embodiments, it is preferable to perform planarization on the polycrystalline silicon film layers 335 and 435, respectively.

[0074] Although the planarization conditions are not particularly limited, it is preferable to planarize the amorphous silicon film layer or polycrystalline silicon film layer so that the surface roughness Ra is 3 nm or less, and it is more preferable to set the polishing stock removal to 30 nm or less. This is because planarization ensures more reliable bonding after activation. For planarization, known chemical mechanical polishing (CMP) methods can be suitably used. Furthermore, the surface roughness Ra in this specification follows the definition of arithmetic mean roughness Ra specified in JIS B 0601 (2001).

[0075] The bonded silicon wafer according to the present invention can be manufactured by the manufacturing methods of the first to fourth embodiments described above.

[0076] (7. Specific Embodiments) Specific embodiments of silicon wafers applicable to the silicon wafer 10 for a support substrate and the silicon wafer 20 for a single crystal silicon layer (single crystal silicon layer 21) that can be used in the present invention will be described below.

[0077] The surface orientation of the silicon wafer is arbitrary, and a (100) wafer or a (110) wafer may be used.

[0078] The thickness of the silicon wafer can be appropriately determined depending on the application, and can be 300 μm to 1.5 mm. As already mentioned, the thickness of the single crystal silicon layer made of single crystal silicon obtained from the silicon wafer for single crystal silicon layer is appropriately determined in the range of 100 nm to 1 mm.

[0079] The silicon wafer may be doped with a dopant such as boron (B), phosphorus (P), arsenic (As), or antimony (Sb), or may be doped with carbon (C) or nitrogen (N) to obtain desired properties.

[0080] There is no limitation on the diameter of the silicon wafer. The present invention can be applied to silicon wafers with a general diameter of 300 mm or 200 mm. Of course, the present invention can also be applied to silicon wafers with a diameter larger than 300 mm or smaller than 300 mm.

[0081] In this specification, the term "silicon wafer" may refer to a so-called "bulk" silicon wafer on whose surface no other layer, such as an epitaxial layer or an infrared-reflecting silicon film made of silicon oxide or the like, is formed, or may refer to an epitaxial silicon wafer on which another layer, such as an epitaxial layer, is separately formed. A native oxide film having a thickness of about several angstroms may be formed on the surface of the silicon wafer, and such a native oxide film may be present, or may be removed as necessary using a known cleaning method or the like. [Example]

[0082] The present invention will be described in more detail below using examples, but the present invention is not limited to the following examples in any way.

[0083] [Experimental Example 1] (Example 1-1) As the silicon wafer for the support substrate and the silicon wafer for the single crystal silicon layer, an n-type CZ silicon wafer (dopant: phosphorus) having a diameter of 8 inches (203.2 mm) and a thickness of 500 μm was prepared. Next, the silicon wafer for the support substrate was introduced into a plasma CVD apparatus, and the degree of vacuum in the apparatus was reduced to 1×10 -5 The pressure was kept below 100 Pa. Then, with the stage temperature maintained at 500°C, silane gas (CHSiH) was flowed at 55 sccm as the source gas and H gas at 110 sccm as the carrier gas, and an amorphous silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer for the support substrate by plasma CVD.

[0084] Next, both the silicon wafer for the support substrate and the silicon wafer for the single crystal silicon layer were introduced into a chamber, and the degree of vacuum was adjusted to 1×10-5 The pressure was kept below 100 Pa. Subsequently, the surfaces of the silicon wafer for the support substrate and the wafer for the active layer were activated by irradiating them with argon ions at 1.4 keV, forming activated regions (amorphous silicon) on the surfaces of both silicon wafers. The two substrates were then bonded together with their activated regions attached in a vacuum at room temperature.

[0085] The silicon wafer for the single crystal silicon layer was ground and polished from the side opposite to the bonding surface so as to leave a thickness of 10 μm, thereby obtaining a bonded silicon wafer according to Invention Example 1-1.

[0086] TEM observation of the bonded interface of the bonded silicon wafers thus obtained confirmed the formation of amorphous silicon with a thickness of 16 nm, which means that an activated region of 1 nm was formed when the surface of the silicon wafer for the single crystal silicon layer was activated.

[0087] (Example 1-2) In Example 1-1, an amorphous silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Example 1-2, an amorphous silicon film layer having a thickness of 20 nm was formed. The bonded silicon wafer according to Example 1-2 was produced under the same conditions as those of Example 1-1.

[0088] (Examples 1-3) In Example 1-1, an amorphous silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Example 1-3, an amorphous silicon film layer having a thickness of 25 nm was formed. The bonded silicon wafer according to Example 1-3 was produced under the same conditions as those of Example 1-1.

[0089] (Examples 1-4) In Example 1-1, an amorphous silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Example 1-4, an amorphous silicon film layer having a thickness of 30 nm was formed. The bonded silicon wafer according to Example 1-4 was produced under the same conditions as those of Example 1-1.

[0090] (Conventional Example 1) A silicon wafer for a support substrate and a silicon wafer for a single crystal silicon layer were prepared similarly to those in Example 1-1. Next, without forming an amorphous silicon film layer or other layers on either substrate, both substrates were subjected to an activation treatment in a vacuum room temperature environment to form activated regions on both wafers, and the activated regions of both wafers were bonded together.

[0091] Then, the silicon wafer for the single crystal silicon layer was ground and polished from the side opposite to the bonding surface so as to leave a thickness of 10 μm, thereby obtaining a bonded silicon wafer according to Conventional Example 1.

[0092] (Comparative Example 1) A silicon wafer for a support substrate and a silicon wafer for a single crystal silicon layer were prepared similarly to those in Invention Example 1-1. Then, while an amorphous silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer for a support substrate by plasma CVD in Invention Example 1-1, a bonded silicon wafer according to Comparative Example 1 was produced under the same conditions as Invention Example 1-1, except that an amorphous silicon film layer with a thickness of 10 nm was formed in Comparative Example 1.

[0093] (Evaluation: Infrared reflectance evaluation) To evaluate the infrared reflectivity of the infrared-reflective silicon film, a film thickness measurement device (CHRocodile IT500, manufactured by Precitec) was used to irradiate infrared light onto the surface of the bonded silicon wafer and detect the signal intensity of the reflected light. The principle of infrared reflectivity measurement using the FTIR (Fourier Transform Infrared) method with this measurement device is briefly explained with reference to Figure 8. The laser light source used as the incident light for this measurement device is a superluminescence diode. Using this measurement device, near-infrared light L1 was irradiated onto the bonded silicon wafer, and the resulting reflected light L2 and reflected light L3 were detected to calculate the infrared reflectivity L2 / L3. Here, reflected light L2 is the light reflected from surface 528A of bonded silicon wafer 500, and reflected light L3 is the light reflected from the interface between single-crystal silicon layer 521 and region 530 formed by amorphous silicon. The unreflected infrared light continues to region 510 of the single-crystal silicon on the support substrate.

[0094] The results are shown in Table 1. From the evaluation results, it was confirmed that the amorphous silicon regions in Invention Examples 1-1 to 1-4 functioned sufficiently as an infrared reflective film, whereas the amorphous silicon regions formed in Conventional Example and Comparative Example 1 were insufficient to function as an infrared reflective film.

[0095] [Table 1]

[0096] [Experimental Example 2] (Example 2-1) As the silicon wafer for the support substrate and the silicon wafer for the single crystal silicon layer, an n-type CZ silicon wafer (dopant: phosphorus) having a diameter of 8 inches (203.2 mm) and a thickness of 500 μm was prepared. Next, the silicon wafer for the support substrate was introduced into a plasma CVD apparatus, and the degree of vacuum in the apparatus was reduced to 1×10 -5The pressure was kept below 800 Pa. Then, with the stage temperature maintained at 800°C, silane gas (CHSiH) was flowed at 55 sccm as the source gas and H gas at 110 sccm as the carrier gas, and a polycrystalline silicon film layer with a thickness of 15 nm was formed on the surface of the silicon wafer for the support substrate by plasma CVD.

[0097] Next, both the silicon wafer for the support substrate and the silicon wafer for the single crystal silicon layer were introduced into a chamber, and the degree of vacuum was adjusted to 1×10 -5 The pressure was kept below 100 Pa. Subsequently, the surfaces of the silicon wafer for the support substrate and the wafer for the active layer were activated by irradiating them with argon ions at 1.4 keV, forming activated regions (amorphous silicon) on the surfaces of both silicon wafers. The two substrates were then bonded together with their activated regions attached in a vacuum at room temperature.

[0098] The silicon wafer for the single crystal silicon layer was ground and polished from the side opposite to the bonding surface so as to leave a thickness of 10 μm, thereby obtaining a bonded silicon wafer.

[0099] TEM observation of the bonded interface of the bonded silicon wafers thus obtained confirmed the formation of a 1 nm thick amorphous silicon region in addition to a 15 nm thick polycrystalline silicon film layer. In other words, it was found that a 1 nm thick activated region was formed when the surface of the silicon wafer for the single crystal silicon layer was activated.

[0100] (Example 2-2) In Example 2-1, a polycrystalline silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Example 2-2, a polycrystalline silicon film layer having a thickness of 20 nm was formed. A bonded silicon wafer according to Example 2-2 was produced under the same conditions as those of Example 2-1.

[0101] (Example 2-3) In Example 2-1, a polycrystalline silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Example 2-3, a polycrystalline silicon film layer having a thickness of 25 nm was formed. A bonded silicon wafer according to Example 2-3 was produced under the same conditions as those of Example 2-1.

[0102] (Examples 2-4) In Example 2-1, a polycrystalline silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Example 2-4, a polycrystalline silicon film layer having a thickness of 30 nm was formed. A bonded silicon wafer according to Example 2-4 was produced under the same conditions as those of Example 2-1.

[0103] (Comparative Example 2) In Example 2-1, a polycrystalline silicon film layer having a thickness of 15 nm was formed on the surface of the silicon wafer for use as a support substrate by plasma CVD, whereas in Comparative Example 1, a polycrystalline silicon film layer having a thickness of 10 nm was formed. A bonded silicon wafer according to Comparative Example 2 was produced under the same conditions as those of Example 2-1.

[0104] (Evaluation: Infrared reflectance evaluation) The infrared reflectance in Experimental Example 2 was evaluated using the above-mentioned film thickness measuring device, as in Experimental Example 1. In Experimental Example 2, reflected light L2 is light reflected from surface 528A of bonded silicon wafer 500, and reflected light L3 is light reflected from the interface between single crystal silicon layer 521 and region 530 formed of amorphous silicon and polycrystalline silicon.

[0105] The results are shown in Table 2. From the evaluation results, it was confirmed that the regions formed from amorphous silicon and polycrystalline silicon in Inventive Examples 2-1 to 2-4 function as infrared reflective films, while the regions formed from amorphous silicon and polycrystalline silicon in Comparative Example 2 were insufficient to function as an infrared reflective film.

[0106] [Table 2] [Industrial Applicability]

[0107] According to the present invention, A bonded silicon wafer having a small thickness and high infrared reflectance can be obtained. [Explanation of symbols]

[0108] 1,2,3,4,5,100,200,300,400 bonded silicon wafers 10,110,210,310,410 Silicon wafers for support substrates 120, 220, 320, 420 Silicon wafers for single crystal silicon layers 30,130,230,330,430 Infrared reflective silicon film 131,231 Amorphous silicon deposition layer 35,335,435 Polycrystalline silicon deposition layer

Claims

1. a silicon wafer for a support substrate; a single crystal silicon layer on the support substrate silicon wafer; a bonded silicon wafer having an infrared reflective silicon film provided between the support substrate silicon wafer and the single crystal silicon layer, the infrared-reflective silicon film includes amorphous silicon; The thickness of the infrared reflective silicon film is 16 nm or more and 40 nm or less, The bonded silicon wafer, wherein the infrared reflective silicon film has a laminated structure of an amorphous silicon layer and a polycrystalline silicon layer.

2. 2. The bonded silicon wafer according to claim 1, wherein the infrared-reflecting silicon film has a thickness of 25 nm or more.

3. 2. The bonded silicon wafer according to claim 1, wherein the single crystal silicon layer has a thickness of 3 μm or more and 30 μm or less.

4. A silicon wafer for a support substrate; a single crystal silicon layer on the support substrate silicon wafer; a bonded silicon wafer having an infrared reflective silicon film provided between the support substrate silicon wafer and the single crystal silicon layer, the infrared-reflective silicon film includes amorphous silicon; The thickness of the infrared reflective silicon film is 16 nm or more and 40 nm or less, The infrared reflective silicon film is a method for producing a bonded silicon wafer made of amorphous silicon, the method comprising: forming an amorphous silicon film layer having a thickness of 15 nm or more and 39 nm or less on a surface of the support substrate silicon wafer; an activation treatment step of performing an activation treatment on a surface of the amorphous silicon film layer and a surface of the silicon wafer for the single crystal silicon layer under vacuum at room temperature to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

5. A silicon wafer for a support substrate; a single crystal silicon layer on the support substrate silicon wafer; a bonded silicon wafer having an infrared reflective silicon film provided between the support substrate silicon wafer and the single crystal silicon layer, the infrared-reflective silicon film includes amorphous silicon; The thickness of the infrared reflective silicon film is 16 nm or more and 40 nm or less, The infrared reflective silicon film is a method for producing a bonded silicon wafer made of amorphous silicon, the method comprising: an amorphous silicon film formation step of forming an amorphous silicon film layer having a thickness of 15 nm or more and 39 nm or less on a surface of a silicon wafer for a single crystal silicon layer; an activation treatment step of performing an activation treatment on a surface of the amorphous silicon film layer and a surface of the support substrate silicon wafer under vacuum at room temperature to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

6. A silicon wafer for a support substrate; a single crystal silicon layer on the support substrate silicon wafer; a bonded silicon wafer having an infrared reflective silicon film provided between the support substrate silicon wafer and the single crystal silicon layer, the infrared-reflective silicon film includes amorphous silicon; The thickness of the infrared reflective silicon film is 16 nm or more and 40 nm or less, The infrared reflective silicon film is a method for producing a bonded silicon wafer made of amorphous silicon, the method comprising: an amorphous silicon film formation step of forming an amorphous silicon film layer having a total thickness of 16 nm to 40 nm on each surface of the silicon wafer for support substrate and the silicon wafer for single crystal silicon layer; an activation treatment step of performing an activation treatment on the surface of each amorphous silicon film layer on the surface of the silicon wafer for support substrate and the silicon wafer for single crystal silicon layer under vacuum at room temperature to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

7. 2. A method for producing a bonded silicon wafer according to claim 1, comprising: a polycrystalline silicon film formation step of forming a polycrystalline silicon film layer having a thickness of 15 nm or more and 39 nm or less on a surface of the support substrate silicon wafer; an activation treatment step in which an activation treatment is performed on a surface of the polycrystalline silicon film layer and a surface of the silicon wafer for the single crystal silicon layer under vacuum at room temperature to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

8. 2. A method for producing a bonded silicon wafer according to claim 1, comprising: a polycrystalline silicon film formation step of forming a polycrystalline silicon film layer having a thickness of 15 nm or more and 39 nm or less on a surface of a silicon wafer for a single crystal silicon layer; an activation treatment step in which an activation treatment is performed on a surface of the polycrystalline silicon film layer and a surface of the support substrate silicon wafer under vacuum at room temperature to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

9. 2. The method for producing a bonded silicon wafer according to claim 1, further comprising: a polycrystalline silicon film formation step of forming polycrystalline silicon film layers having a total thickness of 16 nm to 40 nm on each surface of the silicon wafer for support substrate and the silicon wafer for single crystal silicon layer; an activation treatment step of performing an activation treatment under vacuum at room temperature on the surfaces of the silicon wafer for support substrate and the polycrystalline silicon film layer on the surfaces of the silicon wafer for single crystal silicon layer to make both surfaces into activated regions; a bonding step of bonding both of the activated regions together in the vacuum at room temperature, thereby forming the infrared reflective silicon film, following the activation treatment step; a thickness reduction step of reducing the thickness of the silicon wafer for the single crystal silicon layer to obtain the single crystal silicon layer after the bonding step; A method for producing a bonded silicon wafer, comprising:

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