Anomaly detection device, anomaly detection method, and program

Abstract

To detect anomalies in an excellent-accuracy and high-speed manner with a simplified configuration.SOLUTION: An anomaly detection device comprises an input unit, a reservoir unit, an output unit, and a determination unit. The input unit outputs a plurality of intermediary signals in accordance with a time-series input signal detected by observing an observation target device. The reservoir unit acquires the plurality of intermediary signals, and outputs a plurality of output signals each having a waveform having reproducibility in respect to a waveform of the input signal. The output unit generates a plurality of multiplication signals by multiplying output weights preset with respect to each of the plurality of output signals, and generates an integral signal obtained by time integration through adding up the plurality of multiplication signals. The determination unit determines whether the observation target device is normal or abnormal based on a result of comparison between the integral signal and a preset threshold, and outputs a determination signal representing a determination result. The output weights represent a positive prescribed value or a negative prescribed value, and are respectively set for the plurality of output signals.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to an abnormality detection device, an abnormality detection method, and a program. [Background technology]

[0002] Artificial intelligence (AI) is used for a variety of automated and labor-saving processes. Neural networks are known as a representative AI algorithm. Deep neural networks (DNNs), which are multi-layered neural networks, are used in deep learning algorithms. Recurrent neural networks (RNNs), which are recursively connected from neurons closer to the output to neurons closer to the input, are used for time-series data processing. Long-Short-Term Memory (LSTM) is also known as a neural network that has improved representation capabilities for short-term and long-term memory. LSTM has even greater applicability for time-series data processing.

[0003] RNNs and LSTMs used in time-series data processing are calculated using a general-purpose computing device called a CPU (Central Processing Unit). However, because RNNs and LSTMs require more computation than NNs, they are often calculated using a GP-GPU (General Purpose Graphical Processing Unit). RNNs and LSTMs require even more computation during training. This results in longer training times and greater power consumption during training. Therefore, deep learning, RNNs, and LSTMs require precise parameter tuning during training to achieve high performance.

[0004] On the other hand, reservoir computing is known as an algorithm for time-series data processing that requires a small amount of computation during learning. Reservoir computing includes an input unit, a reservoir unit, and an output unit. Reservoir computing does not require the reservoir unit to be trained. However, reservoir computing requires high accuracy of the weights between the reservoir unit and the output unit in order to output a desired signal.

[0005] The reservoir unit is implemented in hardware using various media such as electronic circuits. The signal output from the reservoir unit is generally an analog signal. Reservoir computing allows the output weight calculation in the output unit to be performed at high speed using a multiply-accumulate calculator based on analog circuits.

[0006] In reservoir computing, the reservoir section can be realized using an optical waveguide. This allows for faster processing in the reservoir section. However, when the reservoir section is realized using an optical waveguide, calculations in the output section must be performed digitally, which limits the processing speed in the output section.

[0007] Furthermore, when reservoir computing is implemented using an analog circuit for the output section, the output weights must be expressed at a very high resolution, for example, 256 or more levels, which results in a large circuit size. Reservoir computing can also perform processing in the output section digitally after analog-to-digital conversion. However, even in this case, reservoir computing processing is limited by the output section. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] US Patent Application Publication No. 2020 / 0363660 [Non-patent literature]

[0009] [Non-Patent Document 1] Mitsumasa Nakajima et al., "Training a Physical Neural Network Using the Extended DFA Method and Its Optoelectronic Implementation," Proceedings of the 69th Spring Meeting of the Japan Society of Applied Physics, 23p-E102-13, Japan Society of Applied Physics, 2022 Summary of the Invention [Problem to be solved by the invention]

[0010] The problem to be solved by the present invention is to detect abnormalities accurately and quickly with a simple configuration. [Means for solving the problem]

[0011] An anomaly detection device according to an embodiment includes an input unit, a reservoir unit, an output unit, and a determination unit. The input unit acquires a time-series input signal detected by observing an observed device and outputs a plurality of intermediate signals corresponding to the input signal. The reservoir unit acquires the plurality of intermediate signals and outputs a plurality of output signals, each having a waveform that is reproducible to the waveform of the input signal. The output unit acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a predetermined output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time. The determination unit determines whether the observed device is normal or abnormal based on a comparison result between the integrated signal and a predetermined threshold, and outputs a determination signal representing the determination result. The output weight by which each of the plurality of output signals is multiplied represents a predetermined positive value or a predetermined negative value, and is set for each of the plurality of output signals. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a diagram showing an anomaly detection device together with an observation target device. [Figure 2] 1 is a diagram showing the configuration of an abnormality detection device according to a first embodiment. [Figure 3] FIG. 10 is a diagram showing a simulation result of an integral signal. [Figure 4] FIG. 2 is a diagram showing a first example of the configuration of a determination unit. [Figure 5] FIG. 10 is a diagram showing a second example of the configuration of the determination unit. [Figure 6] FIG. 10 is a diagram showing a third example of the configuration of the determination unit. [Figure 7] FIG. 2 is a diagram showing a first example of the configuration of an output unit. [Figure 8] FIG. 10 is a diagram showing a second example of the configuration of the output unit. [Figure 9] FIG. 10 is a diagram showing a third example of the configuration of the output unit. [Figure 10] FIG. 10 is a diagram showing a fourth example of the configuration of the output unit. [Figure 11] FIG. 10 is a diagram showing the configuration of an abnormality detection device according to a second embodiment. [Figure 12] FIG. 10 is a diagram showing the configuration of an abnormality detection device according to a third embodiment. [Figure 13] FIG. 1 is a diagram showing an example of a hardware configuration of an information processing apparatus. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0014] (First embodiment) FIG. 1 is a diagram showing an anomaly detection device 10 according to the first embodiment together with an observation target device 100. As shown in FIG.

[0015] The anomaly detection device 10 detects whether an anomaly has occurred in the observed device 100. The observed device 100 operates continuously. For example, the observed device 100 is a power line switching device or a power supply device in a power conversion facility or a power supply facility. The observed device 100 is not limited to such devices, and may be any device that operates continuously.

[0016] The anomaly detection device 10 detects anomalies that occur momentarily in the observed device 100. For example, even during periods when the observed device 100 is operating normally, the observed device 100 may occasionally momentarily operate or behave differently from its normal state. Such operation or behavior may be a sign of, for example, a failure or a significant performance degradation in the observed device 100. The anomaly detection device 10 according to the embodiment can discover a sign of a failure or a significant performance degradation in the observed device 100 by continuously detecting such momentary anomalies in the observed device 100 in real time.

[0017] The anomaly detection device 10 acquires an input signal whose value changes over time, i.e., a time-series input signal, which is detected by observing the observed device 100. In this embodiment, the time-series input signal is an analog signal. The time-series input signal may also be a digital signal generated by analog-to-digital conversion of the analog signal at a predetermined sampling interval.

[0018] The input signal is detected by observing the observed device 100, and is a signal that, under normal conditions, becomes a predetermined value when averaged over time. For example, if the observed device 100 is a device that outputs AC power, the input signal may be a signal that represents the amplitude of the AC power output by the observed device 100. The input signal may also be a signal that detects the ground potential or power supply potential of the observed device 100. The input signal may include noise, such as white noise, that averages out to zero.

[0019] Then, based on the acquired input signal, the anomaly detection device 10 outputs a determination signal indicating whether an abnormality has occurred in the observed device 100 or whether the observed device 100 is normal. The determination signal is transmitted to an information processing device managed by an administrator or the like. The determination signal may be transmitted to a server or the like via a network, for example, and then transmitted from the server or the like to an information processing device managed by the administrator or the like.

[0020] 2 is a diagram showing the configuration of the abnormality detection device 10 according to the first embodiment. The abnormality detection device 10 includes an input unit 22, a reservoir unit 24, an output unit 26, a determination unit 28, and a setting unit 30.

[0021] The input unit 22 acquires an input signal. The input unit 22 generates a plurality of time-series intermediate signals according to the acquired input signal. The input unit 22 supplies the generated intermediate signals to the reservoir unit 24. Each of the plurality of intermediate signals is a signal obtained by multiplying the input signal by a plurality of input weights that are set in advance.

[0022] When the input signal is an analog signal and the reservoir unit 24 is an analog circuit, the input unit 22 generates a plurality of intermediate signals, each of which is an analog signal, from the input signal by analog calculation. When the input signal is a digital signal and the reservoir unit 24 is a digital circuit, the input unit 22 generates a plurality of intermediate signals, each of which is a digital signal, from the input signal by digital calculation. When the input signal is an analog signal and the reservoir unit 24 is realized as a digital circuit, the input unit 22 performs analog-to-digital conversion on the input signal to generate a plurality of intermediate signals, each of which is a digital signal.

[0023] In this embodiment, the input section 22 generates a plurality of intermediate signals, each of which is an analog voltage signal.

[0024] Each of the multiple input weights is set in advance by the setting unit 30. Each of the multiple input weights may have any precision or resolution. For example, each of the multiple input weights may be binary. In this case, each of the multiple input weights may be binary, representing 0 or 1, or binary, representing -1 or +1. By representing each of the multiple input weights as binary, the input unit 22 can reduce the amount of calculation and perform processing at high speed, and further reduce the amount of information to be stored, thereby reducing the circuit scale or software program. Note that the input unit 22 may further perform processing to add or subtract a reference signal or an offset to or from the input signal.

[0025] The reservoir unit 24 acquires a plurality of intermediate signals and outputs a plurality of output signals, each having a waveform that is reproducible to the waveform of the input signal. In this embodiment, the reservoir unit 24 is realized by an analog circuit, and outputs a plurality of output signals, each of which is an analog voltage signal, based on the plurality of intermediate signals, each of which is an analog voltage signal.

[0026] The reservoir unit 24 is a recurrent neural network that includes multiple neurons and multiple synapses and is internally recursively connected. When executed on a digital computer, the reservoir unit 24 may be realized by a processor executing a software program such as an Echo State Network or a Liquid State Machine. Alternatively, the reservoir unit 24 may be a physical reservoir made of electronic components or materials that are responsive to output a signal corresponding to an input signal.

[0027] In this embodiment, the reservoir unit 24 is configured by a recurrent neural network including a plurality of delay elements. Each of the plurality of delay elements receives one of a plurality of intermediate signals and delays the received intermediate signal. In this case, a synaptic weight is set for each of the plurality of delay elements in the reservoir unit 24, and each of the plurality of delay elements has a delay amount corresponding to the set synaptic weight. In this case, the reservoir unit 24 may randomly switch the connection relationship of the plurality of delay elements. The reservoir unit 24 outputs signals output from any two or more of the plurality of delay elements as a plurality of output signals.

[0028] The reservoir unit 24 has reproducibility, i.e., when it receives an input signal with the same waveform, it performs the same operation and outputs multiple output signals with the same waveform. In other words, the reservoir unit 24 operates deterministically. Therefore, each of the multiple output signals output from the reservoir unit 24 is a signal that is nonlinear with respect to the input signal but corresponds to the input signal. The reservoir unit 24 temporarily stores information represented by the input signal. The internal coupling strength and connection relationships of the reservoir unit 24 are randomly set. Therefore, the reservoir unit 24 can output multiple output signals with randomness that mimics the mechanisms of nature. Such a reservoir unit 24 can perform recursive and dynamic signal processing like the human brain.

[0029] The output unit 26 acquires the plurality of output signals output from the reservoir unit 24. The output unit 26 generates a plurality of multiplied signals by multiplying each of the acquired plurality of output signals by a preset output weight. Furthermore, the output unit 26 generates an integrated signal by adding the generated plurality of multiplied signals and integrating them over time.

[0030] In this embodiment, the output section 26 is realized by an analog circuit, acquires a plurality of output signals each of which is an analog voltage signal, and outputs an integrated signal which is also an analog voltage signal.

[0031] Each of the multiple output weights is set in advance by the setting unit 30. Each of the multiple output weights represents a predetermined positive value or a predetermined negative value. For example, each of the multiple output weights represents -1 or +1. Therefore, the output unit 26 multiplies the output signal by an output weight representing a predetermined positive value, thereby outputting a multiplied signal having the same polarity as the output signal and whose absolute value is multiplied by a predetermined value. Furthermore, the output unit 26 multiplies the output signal by an output weight representing a predetermined negative value, thereby outputting a multiplied signal having the opposite polarity to the output signal and whose absolute value is multiplied by a predetermined value.

[0032] Furthermore, the output weights by which the plurality of output signals are multiplied are set independently for each of the plurality of output signals by the setting unit 30. More specifically, the values ​​of the plurality of output weights are set based on random values. The output unit 26 then supplies to the determination unit 28 an integrated signal obtained by adding and time-integrating the plurality of multiplied signals thus generated.

[0033] The determination unit 28 acquires the integrated signal from the output unit 26. A threshold value is set in advance for the determination unit 28 by the setting unit 30. The determination unit 28 determines whether the observed device 100 is normal or abnormal based on the result of comparing the integrated signal with the preset threshold value. More specifically, if the absolute value of the integrated signal is greater than the threshold value, the determination unit 28 determines that the observed device 100 is abnormal, and if the absolute value of the integrated signal is equal to or less than the threshold value, the determination unit 28 determines that the observed device 100 is normal.

[0034] In this embodiment, the determination unit 28 is realized by an analog circuit, acquires an integrated signal that is an analog voltage signal, and sets a threshold voltage represented by an analog voltage as the threshold. The determination unit 28 then compares an absolute value signal, which is an analog voltage signal obtained by converting the integrated signal into an absolute value, with the threshold voltage to determine whether the observed device 100 is normal or abnormal.

[0035] Prior to the operation of abnormality determination, the setting unit 30 sets a plurality of input weights for the input unit 22, a plurality of synapse weights for the reservoir unit 24, and a plurality of output weights for the output unit 26. Prior to the operation of abnormality determination, the setting unit 30 sets the internal connections of the reservoir unit 24.

[0036] For example, the setting unit 30 may set multiple input weights, multiple synapse weights, multiple output weights, and internal connections of the reservoir unit 24 in accordance with a random number generated by a random number generator. Alternatively, the setting unit 30 may receive a random number when the anomaly detection device 10 is shipped from a factory or prior to the implementation of the anomaly detection device 10, and set multiple input weights, multiple synapse weights, and multiple output weights in accordance with the received random number.

[0037] Furthermore, the setting unit 30 sets a threshold value for the determination unit 28 prior to the operation of determining an abnormality. The setting unit 30 may set the threshold value according to information received from an external device such as an input device operated by a user. The setting unit 30 may also set the threshold value according to information received from an external device when the abnormality detection device 10 is shipped from a factory or prior to the implementation of the abnormality detection device 10.

[0038] FIG. 3 is a diagram showing the results of a simulation of the integral signal output from the abnormality detection device 10. In FIG.

[0039] Fig. 3A shows the simulation results of the integral signal obtained when white noise is provided as an input signal to the anomaly detection device 10. Fig. 3B shows the simulation results of the integral signal obtained when a signal obtained by adding an additive signal to white noise is provided as an input signal to the anomaly detection device 10.

[0040] As shown in FIG. 3, the amplitude of the integrated signal shown in A does not exceed a certain threshold voltage (Vth). In contrast, there is a period in which the amplitude of the integrated signal shown in B and A exceeds the threshold voltage (Vth). The portion where the amplitude is greater than the threshold voltage (Vth) is presumed to be the effect of adding an additional signal to white noise. In other words, the portion where the amplitude is greater than the threshold voltage (Vth) is presumed to represent a momentary abnormality in the observed device 100. Therefore, the abnormality detection device 10 can detect the occurrence of an abnormality in the observed device 100 by comparing the integrated signal with the threshold voltage (Vth).

[0041] As described above, the anomaly detection device 10 can detect anomalies in the observed device 100 with a simple configuration such as an analog circuit, without complex learning processing or complex numerical processing. This allows the anomaly detection device 10 to be implemented at low cost and to be placed, for example, near the observed device 100. Furthermore, the anomaly detection device 10 does not need to send large amounts of data to a server or the like, or perform complex information processing on the server, so it can detect anomalies quickly and in real time.

[0042] Fig. 4 is a diagram showing a first example of the configuration of the determination unit 28. The determination unit 28 may have, for example, the configuration shown in Fig. 4. The determination unit 28 according to the first example shown in Fig. 4 includes an absolute value circuit 42 and a comparison circuit 44.

[0043] The absolute value circuit 42 receives the integrated signal, which is a voltage signal, from the output section 26. The absolute value circuit 42 then generates an absolute value signal that represents the absolute value of the integrated signal by voltage.

[0044] The comparison circuit 44 receives the absolute value signal from the absolute value circuit 42. Furthermore, a threshold voltage representing a threshold is set in the comparison circuit 44 from the setting unit 30. When the absolute value signal is equal to or less than the threshold voltage, the comparison circuit 44 outputs a determination signal having a value representing normality (for example, 0). When the absolute value signal is greater than the threshold voltage, the comparison circuit 44 outputs a determination signal having a value representing abnormality (for example, 1).

[0045] The determining section 28 according to the first example having such a configuration can generate a determination signal indicating whether the observed device 100 is normal or abnormal, based on the integrated signal.

[0046] Fig. 5 is a diagram showing a second example of the configuration of the determination unit 28. The determination unit 28 may have, for example, the configuration shown in Fig. 5. The determination unit 28 according to the second example shown in Fig. 5 includes a positive-side comparison circuit 46, a negative-side comparison circuit 48, and a logical OR circuit 50.

[0047] The positive-side comparison circuit 46 receives the integrated signal, which is a voltage signal, from the output unit 26. The positive-side comparison circuit 46 also receives a positive-side threshold voltage. The positive-side threshold voltage is a voltage whose absolute value represents the threshold set by the setting unit 30 and whose polarity is positive. The positive-side comparison circuit 46 outputs a positive-side determination signal that is a value indicating an abnormality (e.g., 1) when the integrated signal is greater than the positive-side threshold voltage, and a value indicating normality (e.g., 0) when the integrated signal is equal to or less than the positive-side threshold voltage.

[0048] The negative comparison circuit 48 receives the integral signal from the output unit 26. The negative comparison circuit 48 also receives a negative threshold voltage. The negative threshold voltage is a voltage whose absolute value represents the threshold set by the setting unit 30 and whose polarity is negative. The negative comparison circuit 48 outputs a negative determination signal that is a value indicating an abnormality (e.g., 1) when the integral signal is smaller than the negative threshold voltage, and a value indicating normality (e.g., 0) when the integral signal is equal to or greater than the negative threshold voltage.

[0049] The logical sum circuit 50 receives the positive-side determination signal and the negative-side determination signal. The logical sum circuit 50 outputs a determination signal representing the logical sum of the positive-side determination signal and the negative-side determination signal. That is, if either the positive-side determination signal or the negative-side determination signal has a value representing an abnormality, the logical sum circuit 50 outputs a value representing an abnormality (e.g., 1), and if both the positive-side determination signal and the negative-side determination signal have values ​​representing normality, the logical sum circuit 50 outputs a value representing normality (e.g., 0).

[0050] The determining section 28 according to the second example having such a configuration can also generate a determination signal indicating whether the observed device 100 is normal or abnormal, based on the integrated signal.

[0051] Fig. 6 is a diagram showing a third example of the configuration of the determination unit 28. The determination unit 28 may have, for example, the configuration shown in Fig. 6. The determination unit 28 according to the third example shown in Fig. 6 includes an absolute value circuit 42 and first to Mth comparison circuits 52-1 to 52-M (M is an integer of 2 or more).

[0052] The first to M-th threshold values ​​are set in the determination unit 28 by the setting unit 30. The determination unit 28 acquires the first to M-th threshold voltages that represent the first to M-th threshold values ​​set by the setting unit 30.

[0053] The first threshold voltage is the smallest of the first to Mth threshold voltages. The mth threshold voltage (m is an integer between 1 and M) is the mth smallest of the first to Mth threshold voltages. The Mth threshold voltage is the Mth smallest, i.e., the largest, of the first to Mth threshold voltages.

[0054] The absolute value circuit 42 receives the integrated signal and generates an absolute value signal that represents the absolute value of the integrated signal in the form of a voltage.

[0055] The first comparison circuit 52-1 acquires a first threshold voltage and outputs a first determination signal that is a value (e.g., 1) indicating an abnormality when the absolute value signal is greater than the first threshold voltage, and a value (e.g., 0) indicating a normality when the absolute value signal is equal to or less than the first threshold voltage.

[0056] The mth comparison circuit 52-m acquires the mth threshold voltage and outputs the mth determination signal, which is a value (e.g., 1) indicating an abnormality when the absolute value signal is greater than the mth threshold voltage, and is a value (e.g., 0) indicating a normality when the absolute value signal is equal to or less than the mth threshold voltage.

[0057] The Mth comparison circuit 52-M acquires the Mth threshold voltage and outputs an Mth determination signal that is a value indicating an abnormality (e.g., 1) if the absolute value signal is greater than the Mth threshold voltage, and a value indicating a normality (e.g., 0) if the absolute value signal is equal to or less than the Mth threshold voltage.

[0058] The determination unit 28 outputs first to Mth determination signals. The first to Mth determination signals represent the level of abnormality of the observed device 100. When all of the first to Mth determination signals represent normality, the observed device 100 is normal. When the first determination signal is abnormal and the others are normal, the first to Mth determination signals represent the smallest level of first-level abnormality. When the first to mth determination signals are abnormal and the others are normal, the first to Mth determination signals represent the mth level of m-th abnormality. When all of the determination signals are abnormal, the first to Mth determination signals represent the largest level of M-th level abnormality.

[0059] The determining unit 28 according to the third example having such a configuration can generate a determination signal that indicates the level of abnormality in the observed device 100.

[0060] 7 is a diagram showing a first example of the configuration of the output section 26. The output section 26 may have the configuration shown in FIG.

[0061] 7 acquires a plurality of output signals, each of which is a voltage signal, from the reservoir unit 24. The output unit 26 according to the first example includes a plurality of multiplication circuits 62 and an integration circuit 64.

[0062] Each of the multiple multiplication circuits 62 acquires one of the multiple output signals. Furthermore, a corresponding one of the multiple output weights is set for each of the multiple multiplication circuits 62 by the setting unit 30. Each of the multiple multiplication circuits 62 multiplies the acquired output signal by the corresponding set output weight to generate one of the multiple multiplication signals.

[0063] Here, each of the plurality of output weights is a predetermined positive value or a predetermined negative value, and is set for each of the plurality of output signals. In this embodiment, each of the plurality of output weights is −1 or +1.

[0064] Therefore, when the corresponding output weight is a predetermined positive value, each of the multiple multiplication circuits 62 can multiply the acquired output signal by the corresponding output weight to output a multiplied signal having the same polarity as the output signal, the absolute value of which is obtained by multiplying the absolute value of the output signal by the predetermined value. Also, when the corresponding output weight is a predetermined negative value, each of the multiple multiplication circuits 62 can multiply the acquired output signal by the corresponding output weight to output a multiplied signal having the opposite polarity to the output signal, the absolute value of which is obtained by multiplying the absolute value of the output signal by the predetermined value.

[0065] The integrator circuit 64 includes a summing circuit 66 and an accumulating circuit 68 .

[0066] The adder circuit 66 acquires the multiple multiplication signals generated by the multiple multiplication circuits 62. The adder circuit 66 adds the multiple acquisition multiplication signals to generate an added signal.

[0067] The storage circuit 68 acquires the sum signal from the adder circuit 66. The storage circuit 68 accumulates the sum signal and integrates it over time. For example, if the sum signal is a voltage signal, the storage circuit 68 is a capacitor. The storage circuit 68 then supplies the signal obtained by integrating the sum signal over time to the determination unit 28 as an integrated signal.

[0068] In this way, the output section 26 can generate a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and can generate an integrated signal by adding the plurality of multiplied signals and integrating them over time.

[0069] 8 is a diagram showing a second example of the configuration of the output section 26. The output section 26 may have a configuration as shown in FIG.

[0070] For example, each of the multiple multiplication circuits 62 includes a polarity inversion circuit 70. The polarity inversion circuit 70 includes a non-inverting amplifier circuit 72, an inverting amplifier circuit 74, and a switching circuit 76.

[0071] The non-inverting amplifier circuit 72 is configured with an operational amplifier and a resistor, and outputs a voltage obtained by multiplying the input voltage by a predetermined amount with the same polarity. The non-inverting amplifier circuit 72 acquires a corresponding output signal, which is a voltage signal, and outputs a voltage signal of the same polarity obtained by multiplying the acquired output signal by a predetermined amount.

[0072] The inverting amplifier circuit 74 is configured with an operational amplifier and a resistor, and outputs a voltage obtained by multiplying an input voltage by a predetermined factor with reverse polarity. The inverting amplifier circuit 74 acquires a corresponding output signal, which is a voltage signal, and outputs a voltage signal with reverse polarity obtained by multiplying the acquired output signal by a predetermined factor. In this embodiment, the inverting amplifier circuit 74 amplifies the input voltage by an amplification factor with the same absolute value as the non-inverting amplifier circuit 72 but with reverse polarity.

[0073] The switching circuit 76 switches between the voltage signal output from the non-inverting amplifier circuit 72 and the voltage signal output from the inverting amplifier circuit 74 according to a set output weight, and outputs the result as a multiplication signal. For example, when the output weight is a predetermined positive value (e.g., +1), the switching circuit 76 outputs the voltage signal output from the non-inverting amplifier circuit 72 as a multiplication signal. For example, when the output weight is a predetermined negative value (e.g., −1), the switching circuit 76 outputs the voltage signal output from the non-inverting amplifier circuit 72 as a multiplication signal.

[0074] When the set output weight is a predetermined positive value, the polarity inversion circuit 70 can output a multiplied signal having the same polarity as the output signal and an absolute value obtained by multiplying the absolute value of the output signal by a predetermined factor.Furthermore, when the set output weight is a predetermined negative value, the polarity inversion circuit 70 can output a multiplied signal having the opposite polarity to the output signal and an absolute value obtained by multiplying the absolute value of the output signal by a predetermined factor.

[0075] The summing circuit 66 is a circuit including an operational amplifier and resistors. For example, the summing circuit 66 includes a first operational amplifier 78, a plurality of input resistors 80, a non-inverting input resistor 82, and a feedback resistor 84.

[0076] The input resistors 80 correspond one-to-one to the multiplication circuits 62. All of the input resistors 80 have the same resistance value. Each of the input resistors 80 is connected between the output terminal of the corresponding multiplication circuit 62 and the inverting input terminal of the first operational amplifier 78.

[0077] A non-inverting input resistor 82 is connected between the non-inverting input terminal of the first operational amplifier 78 and ground. A feedback resistor 84 is connected between the output terminal of the first operational amplifier 78 and the inverting input terminal.

[0078] The adder circuit 66 configured in this way can generate an added signal by adding together a plurality of multiplied signals generated by a plurality of multiplier circuits 62 .

[0079] 9 is a diagram showing a third example of the configuration of the output section 26. The integrating circuit 64 included in the output section 26 may have a configuration as shown in FIG.

[0080] For example, the integrating circuit 64 according to the third example includes a first operational amplifier 78, a plurality of input resistors 80, a non-inverting input resistor 82, and a feedback capacitor 90. The integrating circuit 64 according to the third example is configured to include a feedback capacitor 90 instead of the feedback resistor 84 in the adder circuit 66 shown in Fig. 8. The feedback capacitor 90 is connected between the output terminal and the inverting input terminal of the first operational amplifier 78.

[0081] The integrator circuit 64 configured in this way also functions as a circuit that performs summing and integration operations using an operational amplifier, and can therefore generate an integrated signal by adding multiple multiplied signals and integrating them over time.

[0082] 10 is a diagram showing a fourth example of the configuration of the output section 26. The integrating circuit 64 included in the output section 26 may have a configuration as shown in FIG.

[0083] For example, the integrating circuit 64 according to the fourth example includes a first operational amplifier 78, a plurality of input resistors 80, a non-inverting input resistor 82, a feedback resistor 84, and a delay circuit 92. The integrating circuit 64 according to the fourth example has a configuration that further includes the delay circuit 92 in addition to the configuration of the adding circuit 66 shown in FIG.

[0084] The delay circuit 92 is connected between the output terminal and the inverting input terminal of the first operational amplifier 78. The delay circuit 92 delays the signal output from the output terminal of the first operational amplifier 78 by a small amount of time and feeds the delayed signal back to the inverting input terminal.

[0085] The integrator circuit 64 configured in this way also functions as a circuit that performs summing and integration operations using an operational amplifier, and therefore can also generate an integrated signal by adding multiple multiplied signals and integrating them over time.

[0086] (Second embodiment) Next, an anomaly detection device 10 according to a second embodiment will be described. The anomaly detection device 10 according to the second embodiment has substantially the same functions and configuration as the anomaly detection device 10 according to the first embodiment described with reference to FIGS. 1 to 10. Therefore, in the description of the anomaly detection device 10 according to the second embodiment, components that are substantially the same as those in the anomaly detection device 10 according to the first embodiment will be assigned the same reference numerals, and detailed description will be omitted except for the differences. The same applies to the third and subsequent embodiments.

[0087] 11 is a diagram showing the configuration of an abnormality detection device 10 according to the second embodiment. The abnormality detection device 10 according to the second embodiment includes N reservoir devices 96 (N is an integer of 2 or more), a determination unit 28, and a setting unit 30.

[0088] The N reservoir devices 96 are connected in series. Each of the N reservoir devices 96 connected in series has an input portion 22, a reservoir portion 24, and an output portion 26.

[0089] The first reservoir device 96-1 of the N reservoir devices 96 acquires, as an input signal, a time-series signal detected by observing the observed device 100.

[0090] The nth (n is an integer between 2 and N) reservoir device 96-n of the N reservoir devices 96 receives, as an input signal, an integrated signal generated by the (n-1)th reservoir device 96-(n-1) of the N reservoir devices 96. That is, all reservoir devices 96 other than the first reservoir device 96-1 of the N reservoir devices 96 receive, as an input signal, an integrated signal generated by the reservoir device 96 in the preceding stage.

[0091] The determination unit 28 acquires an integral signal generated by the Nth reservoir device 96-N of the N reservoir devices 96. Then, the determination unit 28 determines whether the observed device 100 is normal or abnormal based on the acquired integral signal, and outputs a determination signal indicating the determination result.

[0092] The setting section 30 sets a plurality of input weights, a plurality of synaptic weights, a plurality of output weights, and internal connections of the reservoir section 24 for each of the N reservoir devices 96 independently.

[0093] The anomaly detection device 10 according to the third embodiment having such a configuration can achieve more random processing by using N reservoir units 24. This allows the anomaly detection device 10 to detect an anomaly in the observed device 100 with higher accuracy.

[0094] Furthermore, in the abnormality detection device 10 according to the second embodiment, N reservoir devices 96 are connected in series, so that signals are transmitted while changing in stages, emphasizing differences. This allows the abnormality detection device 10 to easily detect abnormalities in the judgment unit 28. Furthermore, in the abnormality detection device 10 according to the second embodiment, each of the N reservoir devices 96 is realized using an analog circuit, so there is no rate-limiting point that would occur if digital processing were performed, and even complex processing can be performed at high speed.

[0095] (Third embodiment) Next, an abnormality detection device 10 according to a third embodiment will be described.

[0096] 12 is a diagram showing the configuration of an abnormality detection device 10 according to the third embodiment. The abnormality detection device 10 according to the third embodiment includes an input unit 22, N reservoir units 24, an output unit 26, a determination unit 28, and a setting unit 30.

[0097] Each of the N reservoir sections 24 receives a plurality of intermediate signals from the input section 22. Each of the N reservoir sections 24 outputs a plurality of output signals having waveforms that are reproducible to the waveform of the input signal.

[0098] However, each of the N reservoir sections 24 has a plurality of set synaptic weights that are different from those of the other reservoir sections 24. That is, each of the N reservoir sections 24 has internal coupling strengths and connection relationships that are different from those of the other reservoir sections 24. Therefore, each of the N reservoir sections 24 outputs a plurality of output signals with waveforms that are different from those of the other reservoir sections 24.

[0099] The output unit 26 acquires a plurality of output signals output from each of the N reservoir units 24. The output unit 26 generates a plurality of multiplied signals by multiplying each of the acquired plurality of output signals by a preset output weight. Furthermore, the output unit 26 adds the generated plurality of multiplied signals and performs time integration to generate an integrated signal.

[0100] The anomaly detection device 10 according to the third embodiment having such a configuration can achieve more random processing by using N reservoir units 24. This allows the anomaly detection device 10 to detect an anomaly in the observed device 100 with higher accuracy.

[0101] (Hardware configuration of information processing device) FIG. 13 is a diagram illustrating an example of a hardware configuration of an information processing device.

[0102] Instead of an analog circuit, the abnormality detection device 10 may be realized by a computer (information processing device) having a hardware configuration such as that shown in Fig. 13. In this case, the abnormality detection device 10 includes a CPU (Central Processing Unit) 301, a RAM (Random Access Memory) 302, a ROM (Read Only Memory) 303, an operation input device 304, a display device 305, a storage device 306, and a communication device 307. These components are connected by a bus.

[0103] The CPU 301 is a processor that executes arithmetic processing, control processing, etc. in accordance with a program. The CPU 301 uses a predetermined area of ​​the RAM 302 as a work area and executes various processes in cooperation with programs stored in the ROM 303, the storage device 306, etc.

[0104] The RAM 302 is a memory such as an SDRAM (Synchronous Dynamic Random Access Memory), and functions as a work area for the CPU 301. The ROM 303 is a memory that stores programs and various types of information in a non-rewritable manner.

[0105] The operation input device 304 is an input device such as a mouse, a keyboard, etc. The operation input device 304 receives information input by a user as an instruction signal, and outputs the instruction signal to the CPU 301.

[0106] The display device 305 is a display device such as an LCD (Liquid Crystal Display), etc. The display device 305 displays various information based on a display signal from the CPU 301.

[0107] The storage device 306 is a device that writes and reads data to a semiconductor storage medium such as a flash memory, or a magnetically or optically recordable storage medium, etc. The storage device 306 writes and reads data to the storage medium in response to control from the CPU 301. The communication device 307 communicates with external devices via a network in response to control from the CPU 301.

[0108] The program executed by the computer has a modular configuration including an input module, a reservoir module, an output module, a determination module, and a setting module.

[0109] This program is deployed on RAM 302 and executed by CPU 301 (processor), causing the computer to function as input unit 22, reservoir unit 24, output unit 26, determination unit 28, and setting unit 30. Note that some or all of input unit 22, reservoir unit 24, output unit 26, determination unit 28, and setting unit 30 may be realized by hardware circuits.

[0110] In addition, the program to be executed by a computer is provided as a file in a format that can be installed on a computer or in a format that can be executed by a computer, and is recorded on a computer-readable recording medium such as a CD-ROM, a flexible disk, a CD-R, or a DVD (Digital Versatile Disk).

[0111] This program may also be configured to be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network. This program may also be configured to be provided or distributed via a network such as the Internet. The program executed by the anomaly detection device 10 may also be configured to be provided by being pre-installed in the ROM 303 or the like.

[0112] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0113] (Addendum) The above-described embodiments can be summarized as the following technical proposals.

[0114] [Technical proposal 1] an input unit that acquires a time-series input signal detected by observing the observation target device and outputs a plurality of intermediate signals corresponding to the input signal; a reservoir unit that receives the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to the waveform of the input signal; an output unit that acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; a determination unit that determines whether the observed device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; Equipped with The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection device.

[0115] [Technical proposal 2] The input signal is a signal that becomes a predetermined value when averaged in the time direction. An abnormality detection device as described in Technical Proposal 1.

[0116] [Technical proposal 3] The determination unit determines that the observation target device is abnormal if the absolute value of the integrated signal is greater than the threshold value. An abnormality detection device as described in Technical Proposal 2.

[0117] [Technical proposal 4] The determination unit an absolute value circuit for generating an absolute value signal representing the absolute value of the integral signal; a comparison circuit that compares the absolute value signal with the threshold value and outputs the determination signal; The abnormality detection device according to Technical Solution 3, including:

[0118] [Technical proposal 5] The output unit a plurality of multiplication circuits, each of which acquires one of the plurality of output signals and multiplies the acquired output signal by the corresponding output weight to generate one of the plurality of multiplication signals; an integration circuit that generates the integrated signal by adding the multiple multiplied signals and integrating them over time; Contains An abnormality detection device according to any one of technical proposals 1 to 4.

[0119] [Technical proposal 6] each of the plurality of multiplication circuits includes a polarity inversion circuit that acquires a corresponding output signal from the plurality of output signals and has the output weight preset; The polarity inversion circuit is When the set output weight is the positive predetermined value, a multiplied signal obtained by multiplying the output signal by a predetermined factor without inverting the polarity of the output signal is output; When the set output weight is the negative predetermined value, the polarity of the output signal is inverted and a multiplied signal multiplied by a predetermined factor is output. An abnormality detection device as described in Technical Proposal 5.

[0120] [Technical proposal 7] each of the plurality of multiplied signals is a voltage signal; The integrating circuit an adder circuit that generates an added signal by adding the voltages of the multiple multiplied signals; a storage circuit that stores a charge corresponding to the voltage of the addition signal; Contains An abnormality detection device according to Technical Proposal 5 or 6.

[0121] [Technical proposal 8] each of the plurality of multiplied signals is a voltage signal; The integrating circuit an operational amplifier circuit; a capacitor connected between the output terminal and the inverting input terminal of the operational amplifier circuit; a plurality of input resistors each having a one-to-one correspondence with the plurality of multiplication signals, each having one terminal connected to the inverting input terminal and the other terminal to which the corresponding multiplication signal is applied; Including, The output terminal of the operational amplifier circuit outputs the integrated signal. An abnormality detection device according to Technical Proposal 5 or 6.

[0122] [Technical proposal 9] each of the plurality of multiplied signals is a voltage signal; The integrating circuit an operational amplifier circuit; a delay circuit connected between the output terminal and the inverting input terminal of the operational amplifier circuit; a plurality of input resistors each having a one-to-one correspondence with the plurality of multiplication signals, each having one terminal connected to the inverting input terminal and the other terminal to which the corresponding multiplication signal is applied; Including, The output terminal of the operational amplifier circuit outputs the integrated signal. An abnormality detection device according to Technical Proposal 5 or 6.

[0123] [Technical proposal 10] a setting unit that sets the threshold value in accordance with information received from an external device; The abnormality detection device according to any one of technical solutions 1 to 9, further comprising:

[0124] [Technical proposal 11] a setting unit that sets the output weights by which each of the plurality of output signals is multiplied in accordance with a random number generated by a random number generator; The abnormality detection device according to any one of technical solutions 1 to 10, further comprising:

[0125] [Technical proposal 12] N reservoir devices (N is an integer of 2 or more); A determination unit; Equipped with Each of the N reservoir devices (N is an integer of 2 or more) an input unit that outputs a plurality of intermediate signals according to an input signal; a reservoir unit that receives the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to the waveform of the input signal; an output unit that acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; and a first reservoir device among the N reservoir devices acquires, as the input signal, a time-series signal detected by observing an observation target device; an n-th reservoir device (n is an integer of 2 or more and N or less) among the N reservoir devices acquires, as the input signal, the integrated signal generated by the (n-1)-th reservoir device among the N reservoir devices; the determination unit determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal generated by an Nth reservoir device among the N reservoir devices and a preset threshold value, and outputs a determination signal representing the determination result; The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection device.

[0126] [Technical proposal 13] an input unit that acquires a time-series input signal detected by observing the observation target device and outputs a plurality of intermediate signals corresponding to the input signal; N reservoir portions (N is an integer of 2 or more); an output unit; A determination unit; Equipped with each of the N reservoir units acquires the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to a waveform of the input signal; the output unit acquires the plurality of output signals from the N reservoir units, generates a plurality of multiplied signals by multiplying each of the acquired plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; the determination unit determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection device.

[0127] [Technical proposal 14] An anomaly detection method for detecting whether an observation target device is normal or abnormal by an information processing device, comprising: the information processing device acquires a time-series input signal detected by observing the observation target device, and outputs a plurality of intermediate signals corresponding to the input signal; the information processing device acquires the plurality of intermediate signals and outputs a plurality of output signals, each having a waveform that is reproducible to a waveform of the input signal; the information processing device acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding and integrating the plurality of multiplied signals over time; the information processing device determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection methods.

[0128] [Technical proposal 15] A program for causing an information processing device to function as an abnormality detection device, The information processing device an input unit that acquires a time-series input signal detected by observing the observation target device and outputs a plurality of intermediate signals corresponding to the input signal; a reservoir unit that receives the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to the waveform of the input signal; an output unit that acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; a determination unit that determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; and make it work, The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. program. [Explanation of symbols]

[0129] 100 Observation target device 10. Anomaly detection device 22 Input section 24 Reservoir section 26 Output section 28 Judgment section 30 Setting section 42 Absolute value circuit 44 Comparison circuit 62 Multiplication Circuit 64 Integrator circuit 66 Addition Circuit 68 Storage Circuit 70 Polarity inversion circuit 72 Non-inverting amplifier circuit 74 Inverting amplifier circuit 76 Switching circuit 90 Feedback capacitor 92 Delay Circuit 96 Reservoir Device

Claims

1. an input unit that acquires a time-series input signal detected by observing the observation target device and outputs a plurality of intermediate signals corresponding to the input signal; a reservoir unit that receives the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to the waveform of the input signal; an output unit that acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; a determination unit that determines whether the observed device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; Equipped with The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection device.

2. The input signal is a signal that becomes a predetermined value when averaged in the time direction. The abnormality detection device according to claim 1 .

3. The determination unit determines that the observation target device is abnormal if the absolute value of the integrated signal is greater than the threshold value. The abnormality detection device according to claim 2 .

4. The determination unit an absolute value circuit for generating an absolute value signal representing the absolute value of the integral signal; a comparison circuit that compares the absolute value signal with the threshold value and outputs the determination signal; The anomaly detection device according to claim 3 , comprising:

5. The output unit a plurality of multiplication circuits, each of which acquires one of the plurality of output signals and multiplies the acquired output signal by the corresponding output weight to generate one of the plurality of multiplication signals; an integration circuit that generates the integrated signal by adding the multiple multiplied signals and integrating them over time; Contains The abnormality detection device according to claim 1 .

6. each of the plurality of multiplication circuits includes a polarity inversion circuit that acquires a corresponding output signal from the plurality of output signals and has the output weight set in advance; The polarity inversion circuit is When the set output weight is the positive predetermined value, a multiplied signal obtained by multiplying the output signal by a predetermined factor without inverting the polarity of the output signal is output; When the set output weight is the negative predetermined value, the polarity of the output signal is inverted and a multiplied signal multiplied by a predetermined factor is output. The abnormality detection device according to claim 5 .

7. each of the plurality of multiplied signals is a voltage signal; The integrating circuit an adder circuit that generates an added signal by adding the voltages of the multiple multiplied signals; a storage circuit that stores a charge corresponding to the voltage of the addition signal; Contains The abnormality detection device according to claim 5 .

8. each of the plurality of multiplied signals is a voltage signal; The integrating circuit an operational amplifier circuit; a capacitor connected between the output terminal and the inverting input terminal of the operational amplifier circuit; a plurality of input resistors each having a one-to-one correspondence with the plurality of multiplication signals, one terminal of which is connected to the inverting input terminal and the other terminal of which is applied with the corresponding multiplication signal; Including, The output terminal of the operational amplifier circuit outputs the integrated signal. The abnormality detection device according to claim 5 .

9. a setting unit that sets the threshold value in accordance with information received from an external device; The abnormality detection device according to claim 1 , further comprising:

10. a setting unit that sets the output weights by which each of the plurality of output signals is multiplied in accordance with a random number generated by a random number generator; The abnormality detection device according to claim 1 , further comprising:

11. N reservoir devices (N is an integer of 2 or more); A determination unit; Equipped with Each of the N reservoir devices (N is an integer of 2 or more) an input unit that outputs a plurality of intermediate signals according to an input signal; a reservoir unit that receives the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to the waveform of the input signal; an output unit that acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; and a first reservoir device among the N reservoir devices acquires, as the input signal, a time-series signal detected by observing an observation target device; An n-th reservoir device (n is an integer of 2 or more and N or less) among the N reservoir devices acquires, as the input signal, the integrated signal generated by the (n-1)-th reservoir device among the N reservoir devices; the determination unit determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal generated by an Nth reservoir device among the N reservoir devices and a preset threshold value, and outputs a determination signal representing the determination result; The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection device.

12. an input unit that acquires a time-series input signal detected by observing the observation target device and outputs a plurality of intermediate signals corresponding to the input signal; N reservoir portions (N is an integer of 2 or more); an output unit; A determination unit; Equipped with each of the N reservoir units acquires the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to a waveform of the input signal; the output unit acquires the plurality of output signals from the N reservoir units, generates a plurality of multiplied signals by multiplying each of the acquired plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; the determination unit determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection device.

13. An anomaly detection method for detecting whether an observation target device is normal or abnormal by an information processing device, comprising: the information processing device acquires a time-series input signal detected by observing the observation target device, and outputs a plurality of intermediate signals corresponding to the input signal; the information processing device acquires the plurality of intermediate signals and outputs a plurality of output signals, each having a waveform that is reproducible to a waveform of the input signal; the information processing device acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding and integrating the plurality of multiplied signals over time; the information processing device determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. Anomaly detection methods.

14. A program for causing an information processing device to function as an abnormality detection device, The information processing device an input unit that acquires a time-series input signal detected by observing the observation target device and outputs a plurality of intermediate signals corresponding to the input signal; a reservoir unit that receives the plurality of intermediate signals and outputs a plurality of output signals, each of which has a waveform that is reproducible to the waveform of the input signal; an output unit that acquires the plurality of output signals, generates a plurality of multiplied signals by multiplying each of the plurality of output signals by a preset output weight, and generates an integrated signal by adding the plurality of multiplied signals and integrating them over time; a determination unit that determines whether the observation target device is normal or abnormal based on a comparison result between the integrated signal and a preset threshold value, and outputs a determination signal representing the determination result; and make it work, The output weight by which each of the plurality of output signals is multiplied represents a positive predetermined value or a negative predetermined value, and is set for each of the plurality of output signals. program.

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