Semiconductor Devices

Abstract

To provide a semiconductor device having a wide safe operation region.SOLUTION: A semiconductor device comprises a base member, a semiconductor chip, and a first conductive member. The base member has a first surface and a second surface opposite to the first surface, and includes a convex part provided on the second surface side. The semiconductor chip is mounted on the second surface via a first connection member. The semiconductor chip has a first electrode, a second electrode, a control pad, and a semiconductor part. The semiconductor part is located between the first electrode and the second electrode and between the first electrode and the control pad. The first connection member is connected with the first electrode. The control pad is provided so as to be separated from the second electrode. The first conductive member is bonded on the second electrode. The semiconductor chip is mounted so that a space between the second electrode and the control pad and the convex part of the base member overlap each other in a first direction perpendicular to the second surface.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The embodiments relate to a semiconductor device. [Background technology]

[0002] Semiconductor devices are required to have a wide safe operating area (SOA). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-197634 Summary of the Invention [Problem to be solved by the invention]

[0004] Embodiments provide a semiconductor device with a wide safe operating area. [Means for solving the problem]

[0005] A semiconductor device according to an embodiment includes a base member, a semiconductor chip, and a first conductive member. The base member has a first surface and a second surface opposite the first surface, and includes a convex portion provided on the second surface side and protruding in a first direction perpendicular to the second surface. The semiconductor chip is mounted on the second surface of the base member via a first connection member. The semiconductor chip has a first electrode, a second electrode, a control pad, and a semiconductor portion, the semiconductor portion being located between the first electrode and the second electrode and between the first electrode and the control pad. The first connection member is connected to the first electrode, and the control pad is provided on the front surface of the semiconductor portion opposite the back surface on which the first electrode is provided, spaced apart from the second electrode. The first conductive member is bonded to the second electrode of the semiconductor chip via a second connection member. The semiconductor chip is mounted such that the space between the second electrode and the control pad overlaps with the convex portion of the base member in the first direction. The space between the second electrode and the control pad includes a first portion extending in a second direction along the second surface of the base member and a second portion extending in a third direction intersecting the second direction within the second surface. The length of the convex portion of the base member in the second direction is the same as or longer than the length of the first portion of the space between the second electrode and the control pad in the second direction, and the length of the convex portion in the third direction is the same as or longer than the length of the second portion of the space in the third direction. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a schematic diagram illustrating a semiconductor device according to an embodiment; [Figure 2] 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment; [Figure 3] FIG. 1 is a schematic plan view showing a semiconductor chip according to an embodiment. [Figure 4] FIG. 2 is a schematic plan view showing a base member according to the embodiment. [Figure 5] FIG. 10 is a schematic diagram showing a semiconductor device according to a modified example of the embodiment. [Figure 6] FIG. 10 is a schematic diagram showing a semiconductor device according to another modified example of the embodiment. [Figure 7] FIG. 10 is a schematic plan view showing a base member according to a modified example of the embodiment. [Figure 8] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments will be described with reference to the drawings. Identical parts in the drawings are assigned the same numbers, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc., are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be different depending on the drawing.

[0008] Furthermore, the arrangement and configuration of each part will be explained using the X-axis, Y-axis, and Z-axis shown in each figure. The X-axis, Y-axis, and Z-axis are mutually perpendicular and represent the X-direction, Y-direction, and Z-direction, respectively. In addition, the Z-direction may be explained as upward and the opposite direction as downward.

[0009] 1(a) and 1(b) are schematic diagrams showing a semiconductor device 1 according to an embodiment. Fig. 1(a) is a plan view showing the upper surface of the semiconductor device 1. Fig. 1(b) is a cross-sectional view taken along line AA shown in Fig. 1(a).

[0010] The semiconductor device 1 is, for example, a power control MOS transistor and includes, for example, a semiconductor chip 10, a base member 20, a first terminal 30, a second terminal 40, a first conductive member 50, and a second conductive member 60.

[0011] 1(a), the semiconductor chip 10 is mounted on a base member 20. The first terminal 30 and the second terminal 40 are arranged at a distance from the base member 20, for example, in the XY plane. The first terminal 30 and the second terminal 40 are arranged at a distance from each other.

[0012] The first terminal 30 is electrically connected to the semiconductor chip 10 via a first conductive member 50. The first conductive member 50 is, for example, a plate-shaped metal connector. The second terminal 40 is electrically connected to the semiconductor chip 10 via a second conductive member 60. The second conductive member 60 is, for example, a plate-shaped metal connector. The second conductive member 60 may be, for example, a metal wire.

[0013] As shown in FIG. 1(b), the semiconductor chip 10 includes a semiconductor portion 11, a first electrode 13, a second electrode 15, and a control pad 17. The semiconductor portion 11 is made of, for example, silicon carbide (SiC). The semiconductor portion 11 is located between the first electrode 13 and the second electrode 15, and between the first electrode 13 and the control pad 17. The first electrode 13 is provided on a back surface 11B of the semiconductor portion 11. The second electrode 15 and the control pad 17 are provided on a front surface 11F of the semiconductor portion 11 and are spaced apart from each other. The control pad 17 is provided on the semiconductor portion 11 via an insulating film (not shown) and is electrically insulated from the semiconductor portion 11.

[0014] The first electrode 13 is, for example, a drain electrode of a MOS transistor. The second electrode 15 is, for example, a source electrode of the MOS transistor. The control pad 17 is electrically connected to, for example, a gate electrode (not shown) of the MOS transistor. The gate electrode is provided, for example, between the semiconductor portion 11 and the second electrode 15.

[0015] The base member 20 has a back surface 20B (first surface) and a front surface 20F (second surface) opposite the back surface 20B. The semiconductor chip 10 is mounted on the front surface 20F of the base member 20 via a first connection member 25. The first connection member 25 is, for example, a solder material. The first electrode 13 of the semiconductor chip 10 is connected to the first connection member 25. The semiconductor chip 10 is electrically connected to the base member 20 via the first connection member 25.

[0016] The first conductive member 50 is connected to the second electrode 15 via a second connection member 55. The second connection member 55 is, for example, a solder material. The first conductive member 50 is electrically connected to the second electrode 15 via the second connection member 55.

[0017] The second conductive member 60 is connected to the control pad 17 via a third connection member 65. The third connection member 65 is, for example, a solder material. The second conductive member 60 is electrically connected to the control pad 17 via the third connection member 65. Furthermore, when a metal wire is used for the second conductive member 60, the second conductive member 60 is directly bonded onto the control pad 17.

[0018] 1(b), the base member 20 has a protrusion 20p partially provided on the surface 20F side of the base member 20. The semiconductor chip 10 is mounted so that the space between the second electrode 15 and the control pad 17 overlaps with the protrusion 20p in a direction perpendicular to the surface 20F of the base member 20, for example, in the Z direction. Furthermore, it is preferable that the space between the second connection member 55 and the third connection member 65 overlaps with the protrusion 20p of the base member 20 in the Z direction.

[0019] In the semiconductor device 1, the thickness T1 in the Z direction of the first connecting member 25 between the semiconductor chip 10 and the protruding portion 20p of the base member 20 is thinner than the thickness T2 in the Z direction of the first connecting member 25 between the base member 20 and the second connecting member 55. As a result, even if voids are generated in the first connecting member 25 during the process of mounting the semiconductor chip 10 on the base member 20, they are unlikely to be generated between the semiconductor chip 10 and the protruding portion 20p. For example, during the reflow process of mounting the semiconductor chip 10 on the base member 20, small voids gather to form large voids, but such voids will not be generated between the semiconductor chip 10 and the protruding portion 20p, and will not move between the semiconductor chip 10 and the protruding portion 20p.

[0020] 8(a) and 8(b), the semiconductor device 4 according to the comparative example does not have a protrusion 20p on the front surface 20F of the base member 20. The semiconductor chip 10 is mounted on the flat front surface 20F via a first connecting member 25.

[0021] For example, when the size of the semiconductor chip 10 in the X and Y directions increases, voids Vd may occur in the first connection member 25. Such voids Vd may block part of the heat conduction from the semiconductor chip 10 to the base member 20.

[0022] 8(a), when a void Vd occurs between the base member 20 and the first conductive member 50, part of the heat conduction from the semiconductor chip 10 to the base member 20 is inhibited, but the heat conduction path from the semiconductor chip 10 to the first conductive member 50 via the second connection member 55 is maintained. Therefore, the temperature rise inside the semiconductor chip 10 is suppressed.

[0023] However, as shown in FIG. 8(b), if the void Vd is located below the space between the first conductive member 50 and the second conductive member 60, heat conduction from the semiconductor chip 10 to the base member 20 is hindered and an upward heat conduction path is lost. In other words, a region in the semiconductor chip 10 where heat dissipation is limited is created, resulting in an uneven temperature distribution within the semiconductor chip 10. In other words, if the void Vd is located below the space between the first conductive member 50 and the second conductive member 60, a region in the semiconductor chip 10 where electrical resistance locally decreases as the temperature rises is created. This makes it easier for current to concentrate near the void Vd, further increasing the temperature. As a result, the current concentration accelerates, potentially leading to element breakdown. In other words, the safe operating area (SOA) of the semiconductor device 4 may be narrowed.

[0024] In contrast, in the semiconductor device 1 according to the embodiment, the convex portion 20p of the base member 20 is provided below the space between the first conductive member 50 and the second conductive member 60. This prevents the void Vd from occurring below the space between the first conductive member 50 and the second conductive member 60. Therefore, the semiconductor device 1 can have a wide SOA.

[0025] Fig. 2 is a schematic cross-sectional view showing the semiconductor device 1 according to the embodiment, Fig. 2 is a schematic view showing a cross section taken along line BB shown in Fig. 1(a).

[0026] 2, the first conductive member 50 is, for example, a bent plate-shaped connector. The first conductive member 50 allows a large current to flow between the second electrode 15 of the semiconductor chip 10 and the first terminal 30, and also has the function of dissipating heat from the semiconductor chip 10 via the first connecting member 55.

[0027] The first conductive member 50 is connected to the second electrode 15 of the semiconductor chip 10 via a second connecting member 55. The first conductive member 50 is also connected to the first terminal 30 via a fourth connecting member 33. The fourth connecting member 33 is, for example, a solder material. The first conductive member 50 is preferably connected to the entire surface of the second electrode 15 of the semiconductor chip 10 except for the outer edge (see FIG. 1(a)). This allows the semiconductor chip 10 to operate with a large current and efficiently dissipates heat generated in the semiconductor portion 11.

[0028] Fig. 3 is a schematic plan view showing the semiconductor chip 10 according to the embodiment. Fig. 3 is a plan view showing the front surface 11F side of the semiconductor portion 11. Fig. 3 shows the layout of the second electrodes 15, control pads 17, second connection members 55, and third connection members 65.

[0029] 3, the second electrode 15 and the control pad 17 are provided on the surface 11F of the semiconductor portion 11. The surface 11F of the semiconductor portion 11 is, for example, rectangular, and the control pad is provided at one corner of the rectangle. The second electrode 15 is provided so as to cover most of the surface 11F side of the semiconductor portion 11, except for the corners where the control pad 17 is provided and the outer edge of the semiconductor portion 11. The second connection member 55 is preferably provided so as to cover the entire surface of the second electrode 15, except for the outer edge of the second electrode 15.

[0030] The control pad 17 is spaced apart from the second electrode 15. The space between the second electrode 15 and the control pad 17 has, for example, a first portion 17fs extending in the X direction and a second portion 17ss extending in the Y direction. The first portion 17fs has a length Lsx in the X direction and a width Wsy in the Y direction. The second portion 17ss has a length Lsy in the Y direction and a width Wsx in the X direction.

[0031] As shown by dashed lines in FIG. 3 , the protrusion 20p of the base member 20 has, for example, a rectangular shape in a plan view parallel to the surface 11F of the semiconductor portion 11. The protrusion 20p of the base member 20 has, for example, a length Lpx in the X direction and a length Lpy in the Y direction. The protrusion 20p is preferably provided so that the length Lpx in the X direction is equal to or longer than the length Lsx in the X direction of the space between the second electrode 15 and the control pad 17. Furthermore, the protrusion 20p is preferably provided so that the length Lpy in the Y direction is equal to or longer than the length Lsy in the Y direction of the space between the second electrode 15 and the control pad 17. In this example, the protrusion 20p is provided so as to extend below the second connection member 65.

[0032] 4(a) to 4(c) are schematic plan views illustrating the base member 20 according to the embodiment. The dashed lines shown in the drawings indicate the outer edges of the semiconductor chip 10 and the outer edges of the control pads 17.

[0033] 4(a), the convex portion 20p of the base member 20 is preferably provided so as to overlap the control pad 17 in a plan view and to extend toward the center of the semiconductor chip 10. This allows the convex portion 20p to be provided so as to overlap the space between the control pad 17 and the first connection member 55 (see FIG. 3).

[0034] The base member 20 may further have another protrusion 20s. The protrusion 20s has a size smaller than the size of the protrusion 20p in the X and Y directions. For example, the protrusions 20s are disposed below three of the four corners of the semiconductor chip 10, excluding the corner located above the protrusion 20p. This allows the semiconductor chip 10 to be mounted without tilting relative to the surface 20F of the base member 20 (see FIG. 1(b)).

[0035] If the semiconductor chip 10 is mounted at an angle relative to the surface 20F of the base member 20, it becomes difficult to connect the first conductive member 50 to the semiconductor chip 10. In addition, the escape route for air remaining between the semiconductor chip 10 and the first connecting member 25 is restricted, making it easier for voids Vd to occur in the first connecting member 25. By providing the protrusions 20s, such problems can be avoided.

[0036] 4(b), in addition to the protrusions 20s located below the three corners of the semiconductor chip 10, protrusions 20s may be provided below the center of the semiconductor chip 10 and at positions aligned with the protrusions 20p in the X direction. This allows the semiconductor chip 10s (see FIG. 4(c)) that is smaller than the semiconductor chip 10 to be held by the protrusions 20p and 20s without tilting.

[0037] 4(c), two protrusions 20s aligned in the Y direction may be provided in the center of the base member 20. This allows the semiconductor chip 10s, which is smaller than the semiconductor chip 10, to be held by the protrusions 20p and 20s without tilting. In this way, by providing the convex portion 20s, the tilt of the semiconductor chip 10 is suppressed, and the air remaining between the semiconductor chip 10 and the first connecting member 25 is more likely to escape to the outside of the semiconductor chip 10, thereby suppressing the occurrence of voids Vd.

[0038] 5(a) and 5(b) are schematic diagrams showing a semiconductor device 2 according to a modified example of the embodiment. Fig. 5(a) is a cross-sectional view taken along line AA in Fig. 1. Fig. 5(b) is a plan view showing the front surface 20F side of the base member 20.

[0039] 5(a), the protrusion 20p has a side surface that is inclined with respect to the surface 20F of the base member 20. The inclination angle θ1 of the side surface of the protrusion 20p is, for example, 45°.

[0040] 5(b), the protrusion 20p is provided so that, for example, two side surfaces in the X direction and two side surfaces in the Y direction are inclined. In addition, the upper surface 20pt of the protrusion 20p has an area smaller than the area surrounded by the boundary between the protrusion 20p and the surface 20F of the base member 20.

[0041] By providing such a protrusion 20p, the first connection member 25 can be moved in a direction away from the protrusion 20p during the mounting process of the semiconductor chip 10. This allows the void Vd (see FIG. 8) to be moved away from the space between the second connection member 55 and the third connection member 65.

[0042] 6(a) and 6(b) are schematic diagrams showing a semiconductor device 3 according to another modified example of the embodiment. Fig. 6(a) is a cross-sectional view taken along line AA shown in Fig. 1. Fig. 6(b) is a plan view showing the front surface 20F side of the base member 20.

[0043] 6(a), the protrusion 20p has a side surface that is inclined with respect to the surface 20F of the base member 20. The inclination angle θ2 of the side surface of the protrusion 20p is, for example, 30°.

[0044] 6(b), the protrusion 20p is provided in, for example, a quadrangular pyramid shape. The apex 20pp of the protrusion 20p contacts, for example, the first electrode 13 of the semiconductor chip 10. Even with such a protrusion 20p, the first connection member 25 can be moved in a direction away from the protrusion 20p during the mounting process of the semiconductor chip 10. This allows the void Vd (see FIG. 8) to be moved away from the space between the second connection member 55 and the third connection member 65.

[0045] Fig. 7 is a schematic plan view showing a base member according to a modified example of the embodiment, Fig. 7 is a schematic plan view showing the front surface 20F side of the base member 20.

[0046] As shown in FIG. 7, the protrusion 20p of the base member 20 may have, for example, an L-shaped planar shape in a plan view parallel to the surface 20F. The protrusion 20p has a first portion 20fp extending in the X direction and a second portion 20sp extending in the Y direction. The first portion 20fp of the protrusion 20p has an X-direction length Lpx that is equal to or longer than the X-direction length Lsx (see FIG. 3) of the first portion 17fs of the space between the second electrode 15 and the control pad 17. The second portion 20sp of the protrusion 20p has a Y-direction length Lpy that is equal to or longer than the Y-direction length Lsy (see FIG. 3) of the second portion 17ss of the space between the second electrode 15 and the control pad 17.

[0047] Furthermore, the width Wpx in the X direction of the second portion 20sp of the protrusion 20p is wider than the width Wsx in the X direction of the second portion 17ss of the space between the second electrode 15 and the control pad 17. Furthermore, the width Wpy in the Y direction of the first portion 20fs of the protrusion 20p is wider than the width Wsy in the Y direction of the first portion 17ss of the space between the second electrode 15 and the control pad 17.

[0048] Such a protrusion 20p has a shape that fits into the space (see FIG. 3) between the second connection member 55 and the third connection member 65. The semiconductor chip 10 is mounted so that the protrusion 20p overlaps the space between the second connection member 55 and the third connection member 65 in the Z direction. In other words, the protrusion 20p is provided below the space on the semiconductor chip 10 where the second connection member 55 and the third connection member 65 are not provided.

[0049] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0050] (Appendix 1) a base member having a first surface and a second surface opposite to the first surface, the base member including a protrusion provided on the second surface; a semiconductor chip mounted on the second surface of the base member via a first connection member, the semiconductor chip having a first electrode, a second electrode, a control pad, and a semiconductor portion, the semiconductor portion being located between the first electrode and the second electrode and between the first electrode and the control pad, the first connection member being connected to the first electrode, and the control pad being provided spaced apart from the second electrode on a surface of the semiconductor portion opposite to a back surface on which the first electrode is provided; a first conductive member bonded onto the second electrode of the semiconductor chip via a second connecting member; Equipped with the semiconductor chip is mounted such that a space between the second electrode and the control pad overlaps with the convex portion of the base member in a first direction perpendicular to the second surface of the base member; the space between the second electrode and the control pad includes a first portion extending in a second direction along the second surface of the base member and a second portion extending in a third direction within the second surface that intersects with the second direction; A semiconductor device, wherein the length in the second direction of the convex portion of the base member is the same as or longer than the length in the second direction of the first portion of the space between the second electrode and the control pad, and the length in the third direction of the convex portion is the same as or longer than the length in the third direction of the second portion of the space. (Appendix 2) 2. The semiconductor device of claim 1, wherein the first portion of the space between the second electrode of the semiconductor chip and the control pad has a width in the third direction that is smaller than the length in the third direction of the second portion of the space, and the second portion of the space has a width in the second direction that is smaller than the length in the second direction of the first portion of the space. (Appendix 3) 3. The semiconductor device described in Appendix 1 or 2, wherein the first connection member has a first thickness in the first direction between the portion of the base member where the convex portion is not provided and the first electrode, and a second thickness in the first direction between the convex portion of the base member and the first electrode, and the first thickness is greater than the second thickness. (Appendix 4) 4. The semiconductor device according to claim 1, wherein the protrusion of the base member has a side surface that is inclined with respect to the second surface. (Appendix 5) 5. The semiconductor device according to claim 4, wherein the protrusion of the base member is formed in a quadrangular pyramid shape having an apex in contact with the first electrode. (Appendix 6) a second conductive member bonded to the control pad of the semiconductor chip via a third connecting member; 6. The semiconductor device according to claim 1, wherein the protrusion of the base member overlaps a space between the second connection member and the third connection member in the first direction. (Appendix 7) 7. The semiconductor device according to claim 6, wherein the convex portion of the base member has, in a plan view parallel to the second surface, a planar shape that is substantially the same as the space between the second connection member and the third connection member. [Explanation of symbols]

[0051] 1, 2, 3, 4...Semiconductor device, 10, 10s...Semiconductor chip, 11...Semiconductor portion, 11B, 20B...Back surface, 11F, 20F...Front surface, 13...First electrode, 15...Second electrode, 17...Control pad, 20...Base member, 20p, 20s...Protruding portion, 20pp...Top portion, 20pt...Top surface, 20fp...First portion, 20sp...Second portion, 25...First connecting member, 30...First terminal, 33...Fourth connecting member, 40...Second terminal, 50...First conductive member, 55...Second connecting member, 60...Second conductive member, 65...Third connecting member, θ1, θ2...Tilt angle, Vd...Void

Claims

1. a base member having a first surface and a second surface opposite to the first surface, the base member including a protrusion provided on the second surface side away from an outer periphery of the second surface and protruding in a first direction perpendicular to the second surface; a semiconductor chip mounted on the second surface of the base member via a first connection member, the semiconductor chip having a first electrode, a second electrode, a control pad, and a semiconductor portion, the semiconductor portion being located between the first electrode and the second electrode and between the first electrode and the control pad, the first connection member being connected to the first electrode, and the control pad being provided spaced apart from the second electrode on a surface of the semiconductor portion opposite to a back surface on which the first electrode is provided; a first conductive member bonded onto the second electrode of the semiconductor chip via a second connecting member; Equipped with the semiconductor chip is mounted such that a space between the second electrode and the control pad overlaps with the convex portion of the base member in the first direction; the space between the second electrode and the control pad includes a first portion extending in a second direction along the second surface of the base member and a second portion extending in a third direction within the second surface that intersects with the second direction; a length in the second direction of the protrusion of the base member is equal to or longer than a length in the second direction of the first portion of the space between the second electrode and the control pad, and a length in the third direction of the protrusion of the base member is equal to or longer than a length in the third direction of the second portion of the space; The semiconductor device, wherein the protrusion of the base member is provided inside an outer periphery of the first electrode in the second direction and the third direction.

2. 2. The semiconductor device of claim 1, wherein the first portion of the space between the second electrode of the semiconductor chip and the control pad has a width in the third direction that is smaller than the length in the third direction of the second portion of the space, and the second portion of the space has a width in the second direction that is smaller than the length in the second direction of the first portion of the space.

3. 2. The semiconductor device of claim 1, wherein the first connection member has a first thickness in the first direction between the portion of the base member where the protrusion is not provided and the first electrode, and a second thickness in the first direction between the protrusion of the base member and the first electrode, the first thickness being greater than the second thickness.

4. The semiconductor device according to claim 1 , wherein the protrusion of the base member has a side surface that is inclined with respect to the second surface.

5. 5. The semiconductor device according to claim 4, wherein the protrusion of the base member is formed in the shape of a quadrangular pyramid having an apex in contact with the first electrode.

6. a second conductive member bonded to the control pad of the semiconductor chip via a third connecting member; 2. The semiconductor device according to claim 1, wherein said protrusion of said base member overlaps a space between said second connection member and said third connection member in said first direction.

7. The semiconductor device according to claim 6 , wherein the protrusion of the base member has a planar shape that is substantially the same as a space between the second connection member and the third connection member when viewed in a plane parallel to the second surface.

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