Plating apparatus and plating method

Abstract

The present invention discloses a plating apparatus. The plating apparatus has a plurality of electrodes, including a main electrode and at least two secondary electrodes. The main electrode and the at least two secondary electrodes each generate an electric field in a corresponding region on the surface of the wafer. The main electrode and the at least two secondary electrodes each have a control interface. Plating on wafers having different sizes or different notch shapes is performed by selecting a combination of control relationships between each secondary electrode and the main electrode, and the control relationships can be independent control or joint control. The plating apparatus of the present invention can plate on wafers having different sizes or different notch shapes without replacing the entire plating chamber.

Description

[Technical Field]

[0001] The present invention relates to the manufacture of semiconductor devices, and more particularly to a plating apparatus and a plating method. [Background technology]

[0002] In the field of semiconductor device manufacturing, electroplating processes typically use wafers as substrates to be plated, and metal layers or metal wires are formed by electroplating in designated areas of the substrate to achieve specific circuit functions. Furthermore, in advanced packaging processes, electroplating is also employed to form copper pillars and solder bumps to achieve interconnections between chips and substrates.

[0003] In a cup plating apparatus, the wafer is placed horizontally on a chuck as the cathode, and a soluble or insoluble anode is placed below the wafer. During electroplating, the wafer is immersed in an electrolyte solution, and metal ions in the electrolyte are deposited on the wafer's surface under the influence of an electric field.

[0004] When a wafer including a non-plated area (called a notch area) is entirely plated, the absence of openings in the photoresist over the non-plated area results in no metal deposition in the non-plated area, and current is more concentrated in the plating area surrounding the non-plated area. As a result, the plating height of the plating area surrounding the non-plated area is higher than that of other areas, resulting in a decrease in product yield. Therefore, a previous patent application (CN110512248A) described a plating apparatus having multiple electrodes, each of which generates an independent electric field. When the notch of the wafer rotates to a designated area, the independent electric field corresponding to the designated area may change, thereby reducing the total amount of power received by the non-plated area within the designated area and reducing the plating height of the non-plated area of ​​the wafer.

[0005] Furthermore, the "terminal effect" causes non-uniform current density across the wafer, resulting in a higher plating rate at the edge of the wafer and a lower plating rate at the center, resulting in a non-uniform plating film. A diffuser plate with numerous through-holes is placed between the anode and cathode, with the diameters of the through-holes gradually decreasing from the center to the edge of the wafer. This diffuser plate design strengthens the electrolyte flow and electric field at the center of the wafer, resulting in a more uniform plating metal height across the wafer.

[0006] If the wafer size or notch shape differs, the electrode position must also be changed, which requires a change in the design of the entire plating chamber, resulting in a significant increase in costs. Summary of the Invention

[0007] An object of the present invention is to facilitate plating on wafers of different sizes or with different notch shapes without replacing the entire plating chamber.

[0008] To achieve the above object, the present invention discloses a plating apparatus having multiple electrodes. The multiple electrodes include a main electrode and at least two secondary electrodes. The main electrode and the at least two secondary electrodes each generate an electric field in a corresponding region on the wafer surface. The main electrode and the at least two secondary electrodes each have a control interface. By selecting a combination of control relationships between each secondary electrode and the main electrode, plating can be performed on wafers with different sizes or notch shapes. This control relationship can be independent or joint.

[0009] According to one embodiment, when the second electrode and the main electrode are controlled independently, the electric field strength generated by the second electrode in the corresponding region is different from the electric field strength generated by the main electrode in the corresponding region, and when the second electrode and the main electrode are controlled jointly, the electric field strength generated by the second electrode in the corresponding region is the same as the electric field strength generated by the main electrode in the corresponding region.

[0010] According to one embodiment, the control interface is a power supply interface: the primary electrode is connected to a primary power supply, and each secondary electrode is selectively connected to either a secondary power supply or the primary power supply.

[0011] According to one embodiment, the main electrode corresponds to a central region of the wafer, and the electric fields generated by each secondary electrode do not overlap each other.

[0012] According to one embodiment, the number of second electrodes is two, and the angle between the axis of one second electrode and the axis of the other second electrode is 180°.

[0013] According to one embodiment, each secondary electrode corresponds to a notch area of ​​the wafer, with a longer distance between the center of the primary electrode and the secondary electrode corresponding to the notch area of ​​the larger-sized wafer, and a shorter distance between the center of the primary electrode and the secondary electrode corresponding to the notch area of ​​the smaller-sized wafer, the longer distance being greater than the shorter distance.

[0014] According to one embodiment, each secondary electrode is located within a first boundary wall, which separates the electric field generated by the secondary electrode from the electric field generated by the primary electrode.

[0015] According to one embodiment, the plating apparatus further includes an ionic membrane mounted on the ionic membrane frame, the ionic membrane being used to separate the cathode region and the anode region in the plating chamber, and an end of the first boundary wall being connected to the ionic membrane.

[0016] According to one embodiment, to better control the height of the plated metal on the wafer, a diffuser plate having a perforated area corresponding to the size of the wafer being plated is installed between the ionic membrane and the wafer. The perforated area has a plurality of holes. A second boundary wall is installed between the ionic membrane and the diffuser plate, and two ends of the second boundary wall are connected to the ionic membrane frame and the diffuser plate, respectively. The shape and position of the second boundary wall are compatible with the shape and position of the first boundary wall.

[0017] According to one embodiment, to better control the height of the plated metal near the notch region of the wafer, a primary diffuser plate having a primary perforation region is installed between the ionic membrane and the wafer. At least one notch region is provided in the primary perforation region. The shape and position of the at least one notch region matches the shape and position of the at least one second electrode. A second boundary wall is installed on the ionic membrane frame. The shape and position of the second boundary wall matches the shape and position of the first boundary wall. A second diffuser plate having a secondary perforation region is installed at an end of the second boundary wall. The primary perforation region and the secondary perforation region each have a plurality of holes. After the primary diffuser plate is installed, the secondary diffuser plate is attached to the corresponding notch region of the primary diffuser plate, and the primary perforation region of the primary diffuser plate and the secondary perforation region of the second diffuser plate join together to form a complete circle.

[0018] According to one embodiment, the main diffuser plate and the second diffuser plate are detachably attached.

[0019] According to one embodiment, a baffle plate is removably mounted between the diffuser plate and the wafer, and is configured to cover an annular area around the periphery of the perforation area to accommodate plating of wafers of different sizes.

[0020] According to one embodiment, the density of holes in the secondary perforated region is less than the density of holes in the main perforated region and / or the diameter of the holes in the secondary perforated region is less than the diameter of the holes in the main perforated region.

[0021] The present invention discloses a plating method, which includes plating a surface of a wafer using a plating apparatus having multiple electrodes, the multiple electrodes including a main electrode and at least two secondary electrodes, and controlling the main electrode and the at least two secondary electrodes to generate electric fields in corresponding regions of the surface of the wafer, and by selecting a combination of control relationships between each of the secondary electrodes and the main electrode, the secondary electrodes and the main electrode can be controlled independently or jointly to plate wafers having different sizes or different notch shapes.

[0022] According to one embodiment, the method further includes connecting the main electrodes to a main power supply and selectively connecting each second electrode to either the second power supply or the main power supply such that each second electrode and the main electrode are independently controlled or jointly controlled.

[0023] According to one embodiment, the method further includes connecting the main electrodes to a main rectifier and selectively connecting the second electrodes to the main rectifier or the second rectifier so that each second electrode and the main electrode are independently controlled or jointly controlled.

[0024] The present invention allows plating on wafers of different sizes or with different notch shapes without replacing the entire plating chamber, thereby reducing the cost of the plating equipment and effectively controlling the height of the plated metal on the wafer. [Brief explanation of the drawings]

[0025] [Figure 1] 1 is a top view of a plating apparatus according to a first embodiment of the present invention. [Figure 2] FIG. 4 is a cross-sectional view of a plating apparatus according to a second embodiment of the present invention. [Figure 3] FIG. 10 is a cross-sectional view of a plating apparatus according to a third embodiment of the present invention. [Figure 4] FIG. 10 is a cross-sectional view of a plating apparatus according to a fourth embodiment of the present invention, which does not have a baffle plate. [Figure 5] FIG. 10 is a cross-sectional view of a plating apparatus having a baffle plate according to a fourth embodiment of the present invention. [Figure 6] FIG. 10 is a cross-sectional view of a plating apparatus according to a fifth embodiment of the present invention. [Figure 7] FIG. 10 is a cross-sectional view of a plating apparatus having a plurality of second diffusion plates according to a sixth embodiment of the present invention. [Figure 8] FIG. 13 is a diagram showing the shape of a second diffusion plate according to a sixth embodiment of the present invention. [Figure 9A] FIG. 10 is a diagram showing the shape of a certain type of main diffusion plate in a plating apparatus according to a sixth embodiment of the present invention. [Figure 9B]13A and 13B are diagrams showing the shape of another type of main diffusion plate in the plating apparatus according to the sixth embodiment of the present invention. [Figure 10] FIG. 10 is a cross-sectional view of a plating apparatus having a baffle plate according to a sixth embodiment of the present invention. [Figure 11A] 1 is a circuit diagram of a plating apparatus when plating a wafer using the plating apparatus according to a first embodiment of the present invention. FIG. [Figure 11B] FIG. 4 is a circuit diagram of the plating apparatus when another wafer is plated using the plating apparatus according to the first embodiment of the present invention. [Figure 12] FIG. 10 is a circuit diagram of a plating apparatus according to a seventh embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0026] The subject matter described in the present application will be described below with reference to several embodiments. It should be understood that the description of these embodiments is intended to enable those skilled in the art to better understand and thereby practice the subject matter described in the present application, and does not imply any limitation on the scope of the subject matter described in the present application.

[0027] The plating apparatus disclosed in the present invention includes a main electrode and at least two secondary electrodes, each of which generates an electric field in a corresponding region on the wafer surface. Each electrode has a control interface. By selecting a combination mode of the control relationship between each secondary electrode and the main electrode, electroplating on wafers with different sizes or notch shapes can be achieved. The control relationship can be independent control or joint control. The control interface can be a power supply interface used to connect to a power source. The control interface can be a switch interface used to connect to a multi-way switch circuit.

[0028] The following is an embodiment of the plating apparatus of the present invention.

[0029] (First embodiment) Please refer to FIG. 1, which shows a top view of the plating apparatus. The plating apparatus has a plating chamber 4. The anode region is located at the bottom of the plating chamber 4. There are three electrodes in the anode region. Specifically, the three electrodes are arranged in a main anode region 1, a second anode region 2 for 12-inch wafers, and a second anode region 3 for 8-inch wafers, respectively.

[0030] The main anode region 1 has one through-hole 5, which is used to connect the main electrode of the main anode region 1 to the positive pole of the main power supply. One of the two through-holes 5 is located in one of the second anode regions, and the other is located in the other second anode region. These two through-holes 5 are used to connect the second electrode of the second anode region 2 for 12-inch wafers and the second electrode of the second anode region 3 for 8-inch wafers to the positive pole of the main power supply and the positive pole of the second power supply, respectively. The connection method is selected based on the wafer size used for plating. Multiple through-holes 5 can be used as power supply interfaces to connect each electrode to various power supplies, such as PWM switching power supplies and linear power supplies.

[0031] The shape and position of the second anode region 3 for 8-inch wafers correspond to the shape and position of the notch of the 8-inch wafer, and the shape and position of the second anode region 2 for 12-inch wafers correspond to the shape and position of the notch of the 12-inch wafer. The closest distance between the second anode region 2 for 12-inch wafers and the center of the plating chamber 4 is longer than the farthest distance between the second anode region 3 for 8-inch wafers and the center of the plating chamber 4. In other words, the area covered by the 8-inch wafer does not overlap the area covered by the notch of the 12-inch wafer. The main anode region 1 is circular and includes two notches, one for the 12-inch wafer and the other for the 8-inch wafer. The center of the main anode region 1 faces the center of the wafer to be plated, and the distance between the center of the second anode region 3 for 8-inch wafers and the main anode region 1 is shorter than the distance between the center of the second anode region 2 for 12-inch wafers and the main anode region 1.

[0032] As shown in FIG. 11A, for plating an 8-inch wafer, the positive terminal of the second power supply 11 is connected to the second electrode of the second anode region 3 for the 8-inch wafer. Meanwhile, the second electrode of the second anode region 2 for the 12-inch wafer is not connected to any power supply. The positive terminal of the main power supply 10 is connected to the main electrode of the main anode region 1. As shown in FIG. 11B, for plating a 12-inch wafer, the second electrode of the second anode region 3 for the 8-inch wafer is connected in parallel with the main electrode of the main anode region 1 and connected to the positive terminal of the main power supply 10. The second electrode of the second anode region 2 for the 12-inch wafer is connected to the positive terminal of the second power supply 11. As shown in FIGS. 11A, 11B, and 12, both the negative terminals of the main power supply 10 and the second power supply 11 are connected to the wafer 14 via a wafer chuck 13 that holds and positions the wafer 14 while the wafer 14 is being plated.

[0033] Specifically, during plating of an 8-inch wafer, the second anode region 2 for a 12-inch wafer does not overlap with the 8-inch wafer. Therefore, the second electrode of the second anode region 2 for the 12-inch wafer does not operate and does not generate an electric field. The second electrode of the second anode region 3 for the 8-inch wafer and the main electrode of the main anode region 1 are each connected to independent power supplies, so the electric field strengths generated by them can be controlled separately. Therefore, when the notch of the 8-inch wafer is located within the designated area, the total amount of power received by the notch within the designated area can be controlled so that the height of the plated metal near the notch of the 8-inch wafer conforms to that of other areas.

[0034] In the plating process for a 12-inch wafer, the notch of the 12-inch wafer does not overlap with the 8-inch wafer, and the second anode region 3 for the 8-inch wafer is located in the area covered by the 12-inch wafer. Therefore, the second electrode of the second anode region 3 for the 8-inch wafer and the main electrode of the main anode region 1 must be controlled together and are both connected to the positive pole of the main power supply 10 so that the electric fields they generate have the same strength. The second electrode of the second anode region 2 for the 12-inch wafer is connected to the positive pole of the second power supply 11, thereby generating an electric field of a different strength from the electric fields generated by the main anode region 1 and the second anode region 3 for the 8-inch wafer.

[0035] To reduce the interaction between the second anode region 2 for the 12-inch wafer and the second anode region 3 for the 8-inch wafer, it is preferable to separate them as far as possible, and the angle between their symmetry axes is preferably 180°.

[0036] (Second embodiment) As shown in FIG. 2, the second embodiment differs from the first embodiment in that a plurality of through-holes 5 are provided in the main anode region 1. During plating, each through-hole 5 is connected to the positive pole of the main power supply to enhance the uniformity of the electric field. Each secondary electrode is located within a first boundary wall 6, which is used to separate the electric field generated by the secondary electrode from the electric field generated by the main electrode, thereby effectively controlling the height of the plated metal near the notch of the wafer.

[0037] The other parts of the second embodiment are the same as those of the first embodiment.

[0038] (Third embodiment) As shown in FIG. 3, the plating apparatus of the third embodiment includes all of the components of the plating apparatus of the second embodiment, but description thereof will not be repeated here.

[0039] An ionic membrane 7 is located above the anode region and is attached to an ionic membrane frame. The ionic membrane 7 separates the cathode region from the anode region within the plating chamber 4. The cathode region is located above the ionic membrane 7, and the anode region is located below the ionic membrane 7. The ionic membrane 7 functions to allow the desired metal ions in the anode region to pass through to supplement the concentration of the desired metal ions in the cathode region and to prevent additive molecules from reaching the anode region. The ends of the first boundary wall 6 are connected to the ionic membrane 7. The cathode region has two second boundary walls 12, which are fitted to the two first boundary walls 6 in the anode region, respectively, to separate the flow field from the electric field. The ends of the second boundary walls 12 are connected to the ionic membrane frame.

[0040] (Fourth embodiment) As shown in FIG. 4, the plating apparatus of the fourth embodiment includes all of the components of the plating apparatus of the third embodiment, but description thereof will not be repeated here.

[0041] A diffusion plate 8 is also installed in the cathode region of the plating chamber 4, and the diffusion plate 8 is connected to the end of the second boundary wall 12. The diffusion plate 8 has multiple holes of the same or different sizes to control the flow field and electric field during the plating process. The desired metal ions pass through the ion membrane 7 and the diffusion plate 8 to reach the wafer and deposit thereon.

[0042] As shown in FIG. 4, the diffuser plate 8 is fixed to the plating chamber 4, and the electric field generated by the region having multiple holes can cover the entire wafer to be plated of the largest size, for example, a 12-inch wafer.

[0043] 5, when it is necessary to plate a wafer of a smaller size, such as 8 inches, a baffle plate 9 is provided to cover the annular peripheral region of the diffuser plate 8. As a result, only the central region of the diffuser plate 8 is exposed to accommodate plating of a wafer of a smaller size, such as 8 inches, and the catholyte in the annular peripheral region of the diffuser plate 8 is blocked by the baffle plate 9. The baffle plate 9 is detachably attached to the plating chamber 4 or the diffuser plate 8.

[0044] (Fifth embodiment) As shown in FIG. 6, the plating apparatus of the fifth embodiment includes all of the components of the plating apparatus of the third embodiment, but description thereof will not be repeated here.

[0045] A diffusion plate 8 is also installed in the cathode region of the plating chamber 4, and the diffusion plate 8 has multiple holes of the same or different sizes to control the flow field and electric field during the plating process. The desired metal ions pass through the ion membrane 7 and the diffusion plate 8 to reach the wafer and deposit thereon.

[0046] In this embodiment, the diffusion plate 8 is detachably provided in the plating chamber 4, and the plating apparatus can be configured with different types of diffusion plates 8 that are suitable for wafers of different sizes or notch shapes. Before plating, a corresponding diffusion plate 8 is installed according to the actual situation.

[0047] In this embodiment, a diffuser plate 8 corresponding to an 8-inch wafer (a "smaller size wafer") is shown. As can be seen from Figure 6, the area of ​​the diffuser plate 8 having a plurality of holes corresponds to the second anode area 3 for an 8-inch wafer, and the area of ​​the diffuser plate 8 corresponding to the second anode area 2 for a 12-inch wafer is hole-free.

[0048] If a 12-inch wafer or a wafer with a notch of another shape needs to be plated, the diffuser plate 8 corresponding to the 8-inch wafer is removed and another suitable diffuser plate 8 is installed in the plating chamber 4.

[0049] Of course, as in the fourth embodiment, the baffle plate 9 can be detachably assembled to this plating apparatus. After the diffusion plate 8 corresponding to the 12-inch wafer is attached, the baffle plate 9 is provided so as to cover the annular area around the periphery of the diffusion plate 8, and only the central area of ​​the diffusion plate 8 is exposed so as to be suitable for plating of an 8-inch wafer.

[0050] (Sixth embodiment) As shown in FIG. 7, the plating apparatus of the sixth embodiment includes all of the components of the plating apparatus of the third embodiment, but description thereof will not be repeated here.

[0051] Two second diffusion plates 802 are respectively attached to the upper portions of the two second boundary walls 12, and each second diffusion plate 802 has a second perforated area. The shapes of the two second diffusion plates 802 are shown in FIG. 8.

[0052] A main diffusion plate 801 is detachably attached to the cathode region. The position of the main diffusion plate 801 corresponds to the main anode region, and the main diffusion plate 801 has a main perforated region.

[0053] Each plating apparatus is configured to include two types of main diffuser plates 801, one for plating 12-inch wafers and one for plating 8-inch wafers.

[0054] 9A, the first type of primary diffuser plate 801 has two notch areas, each corresponding to one secondary diffuser plate 802. After the primary diffuser plate 801 is installed, two secondary diffuser plates 802 are respectively assembled to the two notch areas of the primary diffuser plate 801. The primary perforated area of ​​the primary diffuser plate 801 and the two secondary perforated areas of the two secondary diffuser plates 802 combine to form a complete circle, which is used for plating 12-inch wafers.

[0055] 9B, the second type of primary diffuser plate 801 has one notch area, which corresponds to one secondary diffuser plate 802. After the primary diffuser plate 801 is installed, the secondary diffuser plate 802 is assembled to the notch area of ​​the primary diffuser plate 801. The primary perforated area of ​​the primary diffuser plate 801 and the second perforated area of ​​the second diffuser plate 802 combine to form a complete circle, which is used for plating 8-inch wafers.

[0056] Of course, as in the fourth embodiment, the first type of main diffuser plate 801 can be fixed to the cathode region. As shown in Figure 10, when plating an 8-inch wafer, a baffle plate 9 is provided to cover the annular region on the periphery of a circle formed by the main perforated region of the main diffuser plate 801 and the two second perforated regions of the two second diffuser plates 802, and the uncovered region is suitable for plating the 8-inch wafer. The baffle plate 9 is detachably attached to the plating chamber 4 or the main diffuser plate 801.

[0057] The design and replacement of the second diffuser plate 802 can be based on the processing needs, for example, the hole density and hole diameter in the second perforated region of the second diffuser plate 802 can be designed based on the processing needs.

[0058] To reduce the total amount of power received by the wafer notch area in the second anode area, the hole density in the second perforated area of ​​the second diffuser plate 802 is smaller than the hole density in the main diffuser plate 801, and / or the hole diameter in the second perforated area of ​​the second diffuser plate 802 is smaller than the hole diameter in the main diffuser plate 801. This further controls the height of the plated metal near the wafer notch area. Also, because the non-plated areas in the notches of different wafers are different, the hole density and hole diameter in the second perforated area can be adjusted separately to suit different products.

[0059] (Seventh embodiment) The seventh embodiment differs from the first embodiment in the following respects. As shown in FIG. 12 , in the plating apparatus of the seventh embodiment, the second anode region 3 for 8-inch wafers and the second anode region 2 for 12-inch wafers are connected to independent second power supplies 11, respectively, and the main anode region 1 is connected to a main power supply 10. The negative terminal of the main power supply 10 and the negative terminals of the two second power supplies 11 are connected to a wafer 14 via a wafer chuck 13. In plating a 12-inch wafer, the main anode region 1, the second anode region 3 for 8-inch wafers, and the second anode region 2 for 12-inch wafers are controlled separately. The second anode region 3 for 8-inch wafers is close to the central region of the 12-inch wafer, and the second anode region 2 for 12-inch wafers corresponds to the peripheral region of the 12-inch wafer. This allows for more flexible control of the central and peripheral regions of the 12-inch wafer.

[0060] The other parts are the same as those in the first embodiment.

[0061] (Eighth embodiment) The present embodiment differs from the first embodiment in the following respects: In the plating apparatus of this embodiment, the through holes 5 function as switch interfaces for connecting each electrode to a multi-way switch circuit, and the multi-way switch circuit is connected to different power sources or other control units.

[0062] The other parts are the same as those in the first embodiment.

[0063] In the first to eighth embodiments, the main anode region 1, the second anode region 3 for 8-inch wafers, and the second anode region 2 for 12-inch wafers each have independent anolyte supply branches, each equipped with a needle valve. The flow rate in each region can be controlled by adjusting the needle valve opening. Increasing or decreasing the flow rate, coupled with the electric field strength to control the height of the plating metal in each region, can replenish or decrease the flow field corresponding to that region.

[0064] The wafer sizes compatible with the plating apparatuses of the first to eighth embodiments are not limited to 8-inch and 12-inch, but are also compatible with wafers of other sizes. The shape of the second anode region can be a sector, arc, arch, or other shape corresponding to the shape of the notch in the wafer.

[0065] (Ninth embodiment) In a ninth embodiment, a plating method is disclosed. The method includes plating a surface of a wafer using a plating apparatus having multiple electrodes, the multiple electrodes including a main electrode and at least two secondary electrodes. The method includes controlling each electrode to generate an electric field in a corresponding region of the surface of the wafer, and selecting a combination of control relationships between each of the secondary electrodes and the main electrode, where the secondary electrodes and the main electrode are controlled independently or jointly to plate wafers having different sizes or different notch shapes.

[0066] By connecting the main electrode to the main power supply 10 and selectively connecting the second electrode to either the main power supply 10 or the second power supply 11 in any manner, the control relationship between each second electrode and the main electrode can be independent control or joint control. When the second electrode and the main electrode are controlled independently, the electric field strength generated in the corresponding region by the second electrode is different from the electric field strength generated in the corresponding region by the main electrode. When the second electrode and the main electrode are controlled jointly, the electric field strength generated in the corresponding region by the second electrode is the same as the electric field strength generated in the corresponding region by the main electrode.

[0067] Alternatively, the control relationship between each secondary electrode and the main electrode can be independent or jointly controlled by connecting the main electrode to a main rectifier and selectively connecting the secondary electrode to either the main rectifier or the secondary rectifier. When the secondary electrode and the main electrode are independently controlled, the electric field strength generated in the corresponding region by the secondary electrode is different from the electric field strength generated in the corresponding region by the main electrode. When the secondary electrode and the main electrode are jointly controlled, the electric field strength generated in the corresponding region by the secondary electrode is the same as the electric field strength generated in the corresponding region by the main electrode. The electric field strength can be changed by adjusting the current, voltage, or duty cycle.

[0068] As noted above, the foregoing description of the present invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teachings. All such modifications and variations apparent to those skilled in the art are intended to be included within the scope of the present invention as defined by the appended claims.

Claims

1. A plating apparatus having a plurality of electrodes, the plurality of electrodes including a main electrode and at least two second electrodes, the main electrode and the at least two second electrodes respectively generating electric fields in corresponding regions of a surface of a wafer, the main electrode and the at least two second electrodes each having a control interface, and plating on wafers having different sizes or different notch shapes is performed by selecting a combination of control relationships between each second electrode and the main electrode, the control relationships being independent control or joint control; the at least two second electrodes are each configured to correspond to a notch region of the wafer having the different sizes or notch shapes, and are arranged such that a distance between the center of the main electrode and the second electrode corresponding to the notch of a larger-sized wafer among the wafers having the different sizes or notch shapes is longer than a distance between the center of the main electrode and the second electrode corresponding to the notch of a smaller-sized wafer among the wafers having the different sizes or notch shapes.

2. 2. The plating apparatus of claim 1, wherein the control interface is a power supply interface, the main electrode is connected to a main power supply, and each of the second electrodes is selectively connected to either a second power supply or the main power supply.

3. 2. The plating apparatus according to claim 1, wherein, when the second electrode and the main electrode are controlled independently, the electric field strength generated in the corresponding region by the second electrode is different from the electric field strength generated in the corresponding region by the main electrode, and when the second electrode and the main electrode are controlled jointly, the electric field strength generated in the corresponding region by the second electrode is the same as the electric field strength generated in the corresponding region by the main electrode.

4. 2. The plating apparatus of claim 1, wherein the main electrode corresponds to a central region of the wafer, and the electric fields generated by the second electrodes do not overlap each other.

5. 2. The plating apparatus according to claim 1, wherein the number of said second electrodes is two, and an angle formed between an axis of one of said second electrodes and an axis of the other of said second electrodes is 180 degrees.

6. 2. The plating apparatus of claim 1, wherein each of the second electrodes is disposed within a first boundary wall, the first boundary wall separating an electric field generated by the second electrode from an electric field generated by the main electrode.

7. 7. The plating apparatus according to claim 6, further comprising an ionic membrane installed on an ionic membrane frame, the ionic membrane being used to separate a cathode region and an anode region in the plating chamber, and an end of the first boundary wall being connected to the ionic membrane.

8. 8. The plating apparatus of claim 7, further comprising a diffusion plate installed between the ionic membrane and the wafer and having a perforated area that matches the size of the wafer to be plated, the perforated area having a plurality of holes, a second boundary wall installed between the ionic membrane and the diffusion plate, two ends of the second boundary wall connected to the ionic membrane frame and the diffusion plate, respectively, and a shape and position of the second boundary wall that matches a shape and position of the first boundary wall.

9. The plating apparatus according to claim 8 , wherein the diffusion plate is detachably attached.

10. 8. The plating apparatus of claim 7, further comprising: a main diffuser plate disposed between the ionic membrane and the wafer and having a main perforation area, the main perforation area having at least one notch area, the shape and position of the at least one notch area matching with the at least one second electrode; a second boundary wall disposed on the ionic membrane frame, the shape and position of the second boundary wall matching with the shape and position of the first boundary wall; a second diffuser plate having a second perforation area disposed at an end of the second boundary wall, the main perforation area and the second perforation area each having a plurality of holes; after the main diffuser plate is attached, the second diffuser plate is attached to the corresponding notch area of ​​the main diffuser plate; and the main perforation area of ​​the main diffuser plate and the second perforation area of ​​the second diffuser plate together form a complete circle.

11. The plating apparatus according to claim 10 , wherein the main diffusion plate and the second diffusion plate are detachably attached.

12. 12. The plating apparatus according to claim 8, further comprising a baffle plate removably attached between the diffusion plate and the wafer, the baffle plate being arranged to cover an annular area around the periphery of the perforation area to accommodate plating of wafers of different sizes.

13. 11. The plating apparatus of claim 10, wherein the density of holes in the second drilling region is smaller than the density of holes in the main drilling region, and / or the diameter of holes in the second drilling region is smaller than the diameter of holes in the main drilling region.

14. A plating method comprising: plating the surface of the wafer with a plating apparatus having a plurality of electrodes, the plurality of electrodes including a main electrode and at least two second electrodes; controlling the master electrode and the at least two second electrodes to generate electric fields in corresponding regions of the surface of the wafer, wherein each second electrode and the master electrode are independently or jointly controlled by selecting a combination of control relationships between each second electrode and the master electrode to plate wafers having different sizes or different notch shapes; the at least two second electrodes are each configured to correspond to a notch region of the wafer having the different sizes or notch shapes, and are arranged such that the distance between the center of the main electrode and the second electrode corresponding to the notch of a larger-sized wafer among the wafers having the different sizes or notch shapes is longer than the distance between the center of the main electrode and the second electrode corresponding to the notch of a smaller-sized wafer among the wafers having the different sizes or notch shapes.

15. 15. The plating method of claim 14, further comprising connecting the main electrodes to a main power supply and selectively connecting each of the second electrodes to either the second power supply or the main power supply so that each of the second electrodes and the main electrode are independently controlled or jointly controlled.

16. 15. The plating method according to claim 14, wherein, when the second electrode and the main electrode are controlled independently, the electric field strength generated in the corresponding region by the second electrode is different from the electric field strength generated in the corresponding region by the main electrode, and when the second electrode and the main electrode are controlled jointly, the electric field strength generated in the corresponding region by the second electrode is the same as the electric field strength generated in the corresponding region by the main electrode.

17. 15. The plating method of claim 14, further comprising connecting the main electrodes to a main rectifier and selectively connecting the second electrodes to the main rectifier or the second rectifier so that each of the second electrodes and the main electrode are independently controlled or jointly controlled.

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