Multilayer capacitors

Abstract

To provide a lamination capacitor capable of suppressing a short circuit.SOLUTION: A feedthrough capacitor 1 (lamination capacitor) comprises: an element assembly 2 having a pair of end faces 2a, a pair of side faces 2b, and a pair of main faces 2c; a pair of first external electrodes 3 disposed on the pair of end faces 2a; second electrodes 5 disposed on the pair of side faces 2b; a plurality of first internal electrodes 7; and a plurality of second internal electrodes 9. A relational expression Lg>b-(2×b×Tg1 / T) is satisfied, where b is a wraparound size of a wraparound part 31c, wrapped from one end face 2a to one main face 2c, of a first sintered electrode layer 31, Lg is a distance between the one end face 2a and ends 9d of the plurality of second internal electrodes 9 on the one end face 2a side, T is a distance between the pair of main faces 2c, 2c in a lamination direction D1, and Tg1 is a distance between the one main face 2c and a second internal electrode 9 nearest to the one main face 2c.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to a multilayer capacitor. [Background technology]

[0002] A conventional multilayer ceramic capacitor is known, as described in Patent Document 1. This multilayer ceramic capacitor includes a laminate having a plurality of laminated dielectric layers and a plurality of internal electrodes, a first end surface external electrode disposed on a first side surface of the laminate, and a second end surface external electrode disposed on a second side surface of the laminate. In other words, this multilayer ceramic capacitor is a so-called three-terminal multilayer ceramic capacitor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-67562 Summary of the Invention [Problem to be solved by the invention]

[0004] When the above-described three-terminal multilayer ceramic capacitor is mounted in an electronic device, for example, the first end face external electrode and the second end face external electrode are soldered to the electronic device. As a result, the structure surrounding each external electrode may warp due to thermal expansion or the like, which may cause cracks in the element body constituting the laminate. Such cracks may cause short circuits between the internal electrodes.

[0005] The present invention has been made to solve the above problems, and an object of the present invention is to provide a multilayer capacitor that can suppress short circuits. [Means for solving the problem]

[0006] The multilayer capacitor according to the present invention comprises an element body having a pair of end faces opposing each other, a pair of side faces and a pair of main faces located between the pair of end faces and extending in the opposing direction of the pair of end faces, a pair of first external electrodes arranged on the pair of end faces, a second external electrode spaced from the pair of first external electrodes and arranged on at least one of the pair of side faces, a plurality of first internal electrodes arranged within the element body and exposed from at least one of the end faces, and a plurality of second internal electrodes arranged within the element body and spaced from one of the end faces, wherein the pair of first external electrodes cover the pair of end faces and are sintered to be connected to the plurality of first internal electrodes. The sintered electrode layer includes a sintered electrode layer, and the plurality of first internal electrodes and the plurality of second internal electrodes are stacked on top of each other with the direction in which a pair of main surfaces faces each other as the stacking direction. When the wraparound dimension in the facing direction of the wraparound portion of the sintered electrode layer covering one end surface, which wraps around from one end surface to one main surface, is taken as dimension b, the distance in the facing direction between the one end surface and ends of the plurality of second internal electrodes on the one end surface side is taken as dimension Lg, the distance between the pair of main surfaces in the stacking direction is taken as dimension T, and the distance between the one main surface and the second internal electrode closest to the one main surface is taken as dimension Tg1, the relationship Lg>b-(2×b×Tg1 / T) is satisfied.

[0007] A multilayer capacitor according to the present invention has a first external electrode disposed on a pair of opposing end faces and a second external electrode disposed on at least one of a pair of side faces extending in the opposing direction of the pair of end faces. This multilayer capacitor can be mounted in an electronic device by joining each external electrode to the electronic device. Therefore, this multilayer capacitor is mounted in the electronic device with one of its main surfaces serving as a mounting surface. Through extensive research, the inventors have found that there is a high correlation between the location of cracks occurring within the element body due to thermal expansion or the like and the dimensions of each component of the multilayer capacitor. More specifically, when viewed from the direction in which the pair of side faces face each other, a virtual line segment is set connecting the end of a wraparound portion of a sintered electrode layer covering one end face, extending from one end face to one main face, in the opposing direction, to the midpoint of one end face in the stacking direction. The inventors have found that cracks are likely to occur in the region between the virtual line segment and the corner of the sintered electrode layer (referred to as a crack occurrence region). In contrast, the multilayer capacitor according to the present invention satisfies the relational expression Lg>b-(2×b×Tg1 / T). In this case, on one end face side, the end of the second internal electrode having the opposite polarity to the first external electrode is located outside the crack occurrence region, even if it is closest to the mounting surface. Therefore, it is possible to prevent cracks from reaching any second internal electrode having the opposite polarity to the first external electrode. As a result, even if a crack occurs in the element body, it is possible to prevent cracks from occurring in the region where multiple first internal electrodes and multiple second internal electrodes are laminated. As a result, short circuits can be prevented.

[0008] If the distance between one of the main surfaces and the first internal electrode closest to the one of the main surfaces is defined as Tg2, the following relationship may be satisfied: Tg1>Tg2 and Lg>b-(2×b×Tg2 / T). In this case, the first internal electrodes are closer to the one of the main surfaces than the second internal electrodes. In this case, the portions of the multiple first internal electrodes that correspond to the ends of the multiple second internal electrodes on the one end face side are located outside the crack occurrence region. This makes it possible to more reliably prevent cracks from occurring in the region where the multiple first internal electrodes and multiple second internal electrodes are stacked, even if a crack occurs in the element body. As a result, short circuits can be suppressed.

[0009] The dimension Lg may be smaller than the dimension b. In this case, the area of ​​the region where the plurality of first internal electrodes and the plurality of second internal electrodes are stacked can be secured, and therefore the capacitance can be secured.

[0010] When the length of the element body in the opposing direction is defined as dimension L, the relational expression Lg<0.14×L may be satisfied. In this case, the area of ​​the region where the plurality of first internal electrodes and the plurality of second internal electrodes are stacked can be secured, and therefore the capacitance can be secured.

[0011] The dimension Tg1 may be 90 μm to 150 μm. In this case, the stacking height of the plurality of first internal electrodes and the plurality of second internal electrodes can be ensured, and therefore the electrostatic capacitance can be ensured.

[0012] The dimension b may be 180 μm to 240 μm. In this case, the area in the element where cracks occur can be kept small, thereby suppressing short circuits.

[0013] The length in the longitudinal direction may be 1.6 mm or more, and the length in the lateral direction may be 0.8 mm or more. In this case, the size of the multilayer capacitor in the longitudinal direction and the lateral direction can be secured. Therefore, the capacitance can be secured. Furthermore, in a multilayer capacitor with such a large chip size, the effect of suppressing short circuits can be more significantly obtained. [Effects of the Invention]

[0014] According to the present invention, it is possible to provide a multilayer capacitor capable of suppressing short circuits. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is a schematic perspective view showing a feedthrough capacitor according to an embodiment of the present invention; [Figure 2]1 is a schematic cross-sectional view showing a feedthrough capacitor according to an embodiment of the present invention. [Figure 3] 1 is a schematic cross-sectional view showing a feedthrough capacitor according to an embodiment of the present invention. [Figure 4] 1 is a schematic cross-sectional view showing a feedthrough capacitor according to an embodiment of the present invention. [Figure 5] 1 is a schematic cross-sectional view showing a feedthrough capacitor according to an embodiment of the present invention. [Figure 6] 4 is an enlarged cross-sectional view of a main part showing an example of the configuration of a first external electrode. FIG. [Figure 7] FIG. 2 is a schematic cross-sectional view showing a mounted state of the feedthrough capacitor. [Figure 8] FIG. 2 is a schematic cross-sectional view showing the dimensional relationship between components in a feedthrough capacitor. [Figure 9] FIG. 10 is a diagram showing the results of an evaluation test of a feedthrough capacitor. [Figure 10] FIG. 10 is a diagram showing the results of an evaluation test of a feedthrough capacitor. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, preferred embodiments of a multilayer capacitor according to one aspect of the present disclosure will be described in detail with reference to the drawings.

[0017] A multilayer capacitor according to the present disclosure will be described with reference to Fig. 1. Fig. 1 is a schematic perspective view showing a feedthrough capacitor 1 according to an embodiment of the present invention. In this embodiment, the feedthrough capacitor 1 will be described as an example of a multilayer capacitor.

[0018] The feedthrough capacitor 1 is a so-called three-terminal multilayer capacitor. As an example, the feedthrough capacitor 1 can be mounted on an electronic device such as a circuit board. In this embodiment, the feedthrough capacitor 1 is, for example, 1608 size (1.6 mm × 0.8 mm × 0.8 mm). The chip size of the feedthrough capacitor 1 is not particularly limited, but may be 1608 size or larger, i.e., the longitudinal length is 1.6 mm or larger, the lateral length is 0.8 mm or larger, and the thickness is 0.8 mm or larger. As shown in FIG. 1 , the feedthrough capacitor 1 includes an element body 2, a pair of first external electrodes 3, 3, and a pair of second external electrodes 5.

[0019] The element body 2 is formed by laminating dielectric layers in the height direction of the feedthrough capacitor 1. Each dielectric layer is made of a sintered ceramic green sheet containing, for example, a dielectric material (dielectric ceramic such as BaTiO3-based, Ba(Ti,Zr)O3-based, or (Ba,Ca)TiO3-based). In the actual element body 2, the dielectric layers are integrated to the extent that the boundaries between the dielectric layers are not visible. As shown in FIG. 1, the shape of the element body 2 is approximately rectangular parallelepiped. The rectangular parallelepiped shape includes a rectangular parallelepiped shape with chamfered corners and ridges. The rectangular parallelepiped shape also includes a rectangular parallelepiped shape with rounded corners and ridges.

[0020] The element body 2 has a pair of end faces 2a, 2a facing each other. Hereinafter, the direction in which the pair of end faces 2a, 2a face each other will be referred to as the facing direction D2. The element body 2 is located between the pair of end faces 2a, 2a and has a pair of side faces 2b, 2b and a pair of main faces 2c, 2c that extend in the facing direction D2 of the pair of end faces 2a, 2a. Hereinafter, the direction in which the pair of main faces 2c, 2c face each other will be referred to as the stacking direction D1, and the direction in which the pair of side faces 2b, 2b face each other will be referred to as the width direction D3. In this embodiment, the stacking direction D1 coincides with the height direction of the feedthrough capacitor 1. The lengths of the element body 2 in the facing direction D2 and the width direction D3 are greater than the length in the stacking direction D1. Furthermore, the length of the element body 2 in the facing direction D2 is greater than the length in the width direction D3. The length of the element body 2 in the facing direction D2 may be 900 μm to 3400 μm. The length of the element body 2 in the width direction D3 may be 460 μm to 1860 μm. The length of the element body 2 in the stacking direction D1 (dimension T described below) may be 280 μm to 1250 μm, and preferably 550 μm to 900 μm.

[0021] The pair of first external electrodes 3, 3 are respectively arranged on the pair of end faces 2a. The pair of first external electrodes 3, 3 are spaced apart from each other and face each other in the facing direction D2. The first external electrode 3 has a main body portion 3a arranged on the end face 2a, a pair of wraparound portions 3b arranged on the side face 2b, and a pair of wraparound portions 3c arranged on the main face 2c. The wraparound portions 3b extend in the facing direction D2 from both ends of the main body portion 3a in the width direction D3. The wraparound portions 3c extend in the facing direction D2 from both ends of the main body portion 3a in the stacking direction D1. The main body portion 3a and the wraparound portions 3b, 3c are connected to each other.

[0022] The main body 3a of the first external electrode 3 entirely covers the corresponding end face 2a. In this embodiment, the wraparound portions 3b and 3c cover an area of ​​0.19 mm in length in the facing direction D2 from each end face 2a.

[0023] Each of the pair of second external electrodes 5, 5 is spaced apart from the pair of first external electrodes 3, 3 and is arranged on a pair of side surfaces 2b. In this embodiment, the second external electrode 5 is arranged in the center of the element body 2 in the opposing direction D2. The pair of second external electrodes 5 are spaced apart from each other and face each other in the width direction D3. The second external electrode 5 has a main body portion 5b arranged on the side surface 2b and a pair of wraparound portions 5c arranged on the main surface 2c. The wraparound portions 5c extend in the width direction D3 from both ends of the main body portion 5b in the stacking direction D1. The main body portion 5b and the wraparound portions 5c are connected to each other.

[0024] The main body portion 5b of the second external electrode 5 has a predetermined width in the facing direction D2 at the center of the side surface 2b in the facing direction D2. The main body portion 5b covers the entire side surface 2b in the stacking direction D1. The surface area of ​​the main body portion 5b of the second external electrode 5 is smaller than the surface area of ​​the main body portion 3a of the first external electrode 3. In this embodiment, the length of the main body portion 5b in the facing direction D2 is 0.48 mm. The length of the wraparound portion 5c in the width direction D3 is 0.25 mm.

[0025] Next, the internal configuration of element body 2 in feedthrough capacitor 1 will be described with reference to FIGS.

[0026] 2 to 5 are schematic cross-sectional views showing the feedthrough capacitor 1 according to the embodiment of the present invention. Fig. 2 shows a cross section of the feedthrough capacitor 1 in a plane parallel to a pair of side faces 2b, 2b. Fig. 3 shows a cross section of the feedthrough capacitor 1 in a plane parallel to a pair of end faces 2a, 2a.

[0027] As shown in FIGS. 2 and 3, a plurality of first internal electrodes 7 and a plurality of second internal electrodes 9 are arranged within the element body 2. The first internal electrodes 7 and the second internal electrodes 9 are made of a conductive material (such as Ni or Cu) that is typically used as an internal electrode for a multilayer electric element. The first internal electrodes 7 and the second internal electrodes 9 are configured as a sintered body of a conductive paste containing the conductive material. The plurality of first internal electrodes 7 and the plurality of second internal electrodes 9 are spaced apart from each other in the stacking direction D1 and are alternately stacked with the dielectric layers of the element body 2 interposed therebetween.

[0028] FIG. 4 shows a cross section of the feedthrough capacitor 1 taken along a plane parallel to the pair of principal surfaces 2c, 2c. FIG. 4 shows a cross section in which one of the multiple first internal electrodes 7 is exposed. The first internal electrode 7 has a substantially rectangular main electrode portion 7a and a connection portion 7b. The main electrode portion 7a has long sides along the facing direction D2 and short sides along the width direction D3. For example, the long side length of the main electrode portion 7a is 1.29 mm, and the short side length is 0.7 mm. The connection portion 7b extends from the short side of the main electrode portion 7a toward the facing direction D2. The main electrode portion 7a and the connection portion 7b are integrally formed. The length of the connection portion 7b in the width direction D3 is smaller than the length of the main electrode portion 7a in the width direction D3. In this embodiment, the length of the connection portion 7b in the width direction D3 is 0.35 mm.

[0029] Each of the first internal electrodes 7 is exposed from a pair of end faces 2a, 2a, but is not exposed from a pair of side faces 2b, 2b and a pair of main faces 2c, 2c (see FIG. 2). Each of the first internal electrodes 7 is connected to the first external electrode 3 at the end face 2a. More specifically, the connection portion 7b formed on the short side of the main electrode portion 7a is exposed from the pair of end faces 2a, 2a. In addition, the end portion 7d constituting the long side of the main electrode portion 7a is spaced apart from the second external electrode 5.

[0030] FIG. 5 shows a cross section of the feedthrough capacitor 1 in a plane parallel to the pair of principal surfaces 2c, 2c. FIG. 5 shows a cross section in which one of the multiple second internal electrodes 9 is exposed. The second internal electrode 9 has a substantially rectangular main electrode portion 9a and a connection portion 9b. The main electrode portion 9a has long sides along the facing direction D2 and short sides along the width direction D3. For example, the long side length of the main electrode portion 9a is 1.29 mm, and the short side length is 0.7 mm. The connection portion 9b extends from the long side of the main electrode portion 9a toward the width direction D3. The main electrode portion 9a and the connection portion 9b are integrally formed. The length of the connection portion 9b in the facing direction D2 is shorter than the length of the main electrode portion 9a in the facing direction D2. In this embodiment, the length of the connection portion 9b in the facing direction D2 is 0.08 mm.

[0031] Each of the second internal electrodes 9 is exposed from a pair of side surfaces 2b, 2b, and is not exposed from a pair of end surfaces 2a, 2a and a pair of main surfaces 2c, 2c (see FIG. 3). Each of the second internal electrodes 9 is connected to the second external electrode 5 at the side surface 2b. More specifically, the connection portion 9b formed on the long side of the main electrode portion 9a is exposed from the pair of side surfaces 2b, 2b. In addition, the end portion 9d constituting the short side of the main electrode portion 9a is spaced apart from the first external electrode 3.

[0032] Next, the configuration of the first external electrode 3 will be described with reference to FIG.

[0033] Fig. 6 is an enlarged cross-sectional view of a main part showing an example of the configuration of the first external electrode 3. As shown in Fig. 6, the first external electrode 3 is composed of a first sintered electrode layer 31, a second sintered electrode layer 32, a first plating layer 33, and a second plating layer 34.

[0034] The first sintered electrode layer 31 covers the end face 2a and is connected to the plurality of first internal electrodes 7. The first sintered electrode layer 31 has a main body portion 31a disposed on the end face 2a and a pair of wraparound portions 31c, 31c disposed on the pair of main faces 2c, 2c. In this embodiment, the main body portion 31a covers the entire end face 2a and is connected to the connection portion 7b (see FIG. 4) exposed from the end face 2a. The wraparound portions 31c extend from both ends of the main body portion 31a in the stacking direction D1 toward the facing direction D2. As a result, corners 31r are formed by the main body portion 31a and the wraparound portions 31c. In this embodiment, the ridges at the ends 31d of the wraparound portions 31c in the facing direction D2 are rounded. The second sintered electrode layer 32 is disposed on the first sintered electrode layer 31 and covers the entire end face 2a via the first sintered electrode layer 31. That is, the second sintered electrode layer 32 covers the main body portion 31 a of the first sintered electrode layer 31 .

[0035] The first plating layer 33 is formed on the first sintered electrode layer 31 and the second sintered electrode layer 32 (hereinafter sometimes simply referred to as "sintered electrode layers") by a plating process. That is, the entire outer surfaces of the sintered electrode layers are covered with the first plating layer 33. Here, electroplating may be used as the plating process, for example. The second plating layer 34 is formed on the first plating layer 33 by a plating process. That is, the entire outer surface of the first plating layer 33 is covered with the second plating layer 34. The main body 3a includes the sintered electrode layer, the first plating layer 33, and the second plating layer 34. The wraparound portion 3c includes the first sintered electrode layer 31, the first plating layer 33, and the second plating layer 34. Although not shown in FIG. 6, the configuration of the wraparound portion 3b is similar to that of the wraparound portion 3c.

[0036] The sintered electrode layer is formed by applying a conductive paste to the surface of the element body 2 and then baking the paste. The sintered electrode layer is formed by sintering a metal component (metal powder) contained in the conductive paste. In this embodiment, the sintered electrode layer is a sintered metal layer made of Cu. Alternatively, the sintered electrode layer may be a sintered metal layer made of Ni. The conductive paste is made by mixing powder made of a metal (for example, Cu or Ni) with a glass component, an organic binder, and an organic solvent.

[0037] In this embodiment, the first plating layer 33 is a Ni plating layer formed by Ni plating. Alternatively, the first plating layer 33 may be a Sn plating layer, a Cu plating layer, or an Au plating layer. In this embodiment, the second plating layer 34 is a Sn plating layer formed by Sn plating. Alternatively, the second plating layer 34 may be a Cu plating layer or an Au plating layer.

[0038] Next, the mounting state of the feedthrough capacitor 1 will be described with reference to FIG.

[0039] As described above, the feedthrough capacitor 1 is mounted, for example, on an electronic device. The electronic device is, for example, a circuit board or another electronic component. FIG. 7 is a schematic cross-sectional view showing the mounted state of the feedthrough capacitor. As shown in FIG. 7, the feedthrough capacitor 1 is mounted on the electronic device 20 with one of the pair of principal surfaces 2c, 2c serving as the mounting surface 21. More specifically, the feedthrough capacitor 1 is mounted on the electronic device 20 so that one of the pair of principal surfaces 2c, 2c faces the electronic device 20. In this embodiment, the one principal surface 2c serves as the mounting surface 21 for the electronic device 20.

[0040] The pair of first external electrodes 3, 3 are soldered to pad electrodes (not shown) of the electronic device 20, as an example. That is, a solder fillet 22 is formed between the first external electrode 3 and the pad electrode, and between the second external electrode 5 and the pad electrode. In this embodiment, the solder fillet 22 is formed between one of the pair of wraparound portions 3c, 3c that contacts the mounting surface 21 and the electronic device 20. The solder fillet 22 also contacts the main body portion 3a. The solder fillet 22 is also formed between one of the pair of wraparound portions 5c, 5c that contacts the mounting surface 21 and the electronic device 20.

[0041] Next, the dimensional relationships between the components in the feedthrough capacitor 1 described above will be described with reference to FIG.

[0042] Fig. 8 is a schematic cross-sectional view showing the dimensional relationship between the components of the feedthrough capacitor 1. Of the components of the first external electrode 3, Fig. 8 shows only the first sintered electrode layer 31, and omits other components. As shown in Fig. 8, the following definitions are made.

[0043] The dimension b is the wraparound dimension in the facing direction D2 of the wraparound portion 31c of the first sintered electrode layer 31 covering one end face 2a, which wraps around from one end face 2a to the mounting surface 21 (one of the main surfaces 2c). The dimension Lg is the distance in the facing direction D2 between one end face 2a and the ends 9d of the multiple second internal electrodes 9 on the side of the one end face 2a. When current is applied, the first internal electrode 7 becomes an internal electrode of the same polarity as the first external electrode 3, and the second internal electrode 9 becomes an internal conductor of the opposite polarity to the first external electrode 3. Therefore, the dimension Lg is the separation distance in the facing direction D2 between the internal electrodes of the opposite polarity to the first external electrode 3. The dimension T is the distance between the pair of main surfaces 2c, 2c in the stacking direction D1. The dimension Tg1 is the distance between the mounting surface 21 and the second internal electrode 9 closest to the mounting surface 21. That is, the dimension Tg1 is the distance between the mounting surface 21 of the outermost internal electrode of the opposite polarity to the first external electrode 3. The dimension Tg2 is the distance between the mounting surface 21 and the first internal electrode 7 that is closest to the mounting surface 21. That is, the dimension Tg2 is the distance between the mounting surface 21 of the outermost internal electrode of the same polarity as the first external electrode 3. The dimension L is the length of the element body 2 in the facing direction D2 (see FIG. 2).

[0044] The imaginary line segment C is a line segment connecting the end 31d in the facing direction D2 of the wraparound portion 31c of the first sintered electrode layer 31 and the midpoint Tc in the stacking direction D1 of one end face 2a. The intersection point P1 is an intersection point between the imaginary line segment C and an imaginary line extending in the facing direction D2 through the second internal electrode 9 closest to the mounting surface 21. The intersection point L1 is an intersection point between the mounting surface 21 and an imaginary perpendicular line extending from the intersection point P1 toward the mounting surface 21. The length of the perpendicular line extending from the intersection point P1 to the intersection point L1 is equal to the dimension Tg1. The intersection point P2 is an intersection point between the imaginary line extending in the facing direction D2 through the first internal electrode 7 closest to the mounting surface 21 and the imaginary line segment C. The intersection point L2 is an intersection point between the mounting surface 21 and an imaginary perpendicular line extending from the intersection point P2 toward the mounting surface 21. The length of the perpendicular line extending from the intersection point P2 to the intersection point L2 is equal to the dimension Tg2.

[0045] In this embodiment, the dimension Lg is smaller than the dimension b. That is, the end 9d of the second internal electrode 9 is positioned outward in the opposing direction D2 from the end 31d of the wraparound portion 31c. The dimension Lg also satisfies the relational expression Lg<0.14×L. The dimension Lg may be 90 μm to 440 μm, preferably 90 μm to 250 μm, and more preferably 90 μm to 190 μm. The dimension Tg1 may be 60 μm to 160 μm, and preferably 90 μm to 150 μm. The dimension b may be 160 μm to 320 μm, and preferably 180 μm to 240 μm.

[0046] As shown in Fig. 8, the triangle with vertices at end 31d, midpoint Tc, and corner 31r is similar to the triangle with vertices at end 31d, intersection P1, and intersection L1. Therefore, if the distance between one end face 2a and intersection P1 is X, the ratio of the lengths of the sides satisfies the following relational expression (1). As a result, the relational expression (2) is satisfied. In the feedthrough capacitor 1 according to the present invention, dimension Lg is greater than X. In other words, the relational expression (3) is satisfied. T / 2:Tg1=b:(bX) …(1) X = b - (2 × b × Tg1 / T) … (2) Lg>b-(2×b×Tg1 / T) …(3)

[0047] In the example shown in FIG. 8, the first internal electrode 7 closest to the mounting surface 21 is closer to the mounting surface 21 than the second internal electrode 9 closest to the mounting surface 21. In this state, the following relational expression (4) is satisfied. A triangle having vertices at the end 31d, midpoint Tc, and corner 31r is similar to a triangle having vertices at the end 31d, intersection P2, and intersection L2. Therefore, if the distance between one end face 2a and intersection P2 is Y, the relational expression (5) is satisfied based on the ratio of the lengths of the sides. As a result, the relational expression (6) is satisfied. In the feedthrough capacitor 1 according to the present invention, the dimension Lg is greater than Y. That is, the relational expression (7) is satisfied. Tg1>Tg2 …(4) T / 2:Tg2=b:(b - Y) …(5) Y = b-(2×b×Tg2 / T) …(6) Lg>b-(2×b×Tg2 / T) …(7)

[0048] In the example of FIG. 8, an embodiment in which one main surface 2c is used as the mounting surface 21 has been described. Also, in the example of FIG. 8, the dimensional relationship on one end face 2a side and one main surface 2c side has been described. In the present embodiment, the relational expressions described above are also satisfied for the other end face 2a side facing one end face 2a and one main surface 2c side. Further, when the other main surface 2c facing one main surface 2c is used as the mounting surface 21, the through capacitor 1 also satisfies the relational expression of formula (3) for one end face 2a side and the other main surface 2c side. Also, the through capacitor 1 satisfies the relational expression of formula (3) for the other end face 2a side and the other main surface 2c side. Also, on the other main surface 2c side, Tg1<Tg2, but in this case, if the relational expression of formula (3) holds, the relational expression of formula (7) naturally holds.

[0049] When the three-terminal through capacitor 1 as described above is mounted on the electronic device 20, as an example, the first external electrode 3 and the second external electrode 5 are soldered to the electronic device 20. At this time, in a conventional through capacitor, due to thermal expansion or the like, the peripheral structure of each external electrode deflects, and cracks may occur in the element body. There has been a problem that such cracks can cause the internal electrodes to short-circuit.

[0050] Here, as a result of extensive research, the inventors have found that there is a high correlation between the location of cracks that occur in the element body 2 due to thermal expansion and the like and the dimensions of each component of the feedthrough capacitor 1. More specifically, when viewed from the direction in which the pair of side surfaces 2b, 2b face each other (width direction D3), an imaginary line segment C is set that connects an end 31d in the facing direction D2 of a wraparound portion 31c that wraps around from the one end surface 2a to one main surface 2c of the first sintered electrode layer 31 covering one end surface 2a, and a midpoint Tc of the one end surface 2a in the stacking direction D1. The inventors have found that cracks are likely to occur in a region between the imaginary line segment C and a corner portion 31r of the first sintered electrode layer 31 (referred to as a crack occurrence region CR).

[0051] In contrast, the feedthrough capacitor 1 according to the present invention satisfies the relational expression (3). In this case, on the side of one end face 2a, the end 9d of the second internal electrode 9 having the opposite polarity to the first external electrode 3 is located outside the crack occurrence region CR, even if it is the one closest to the mounting surface 21. Therefore, it is possible to prevent cracks from reaching any of the second internal electrodes 9 having the opposite polarity to the first external electrode 3. As a result, even if a crack occurs in the element body 2, it is possible to prevent cracks from occurring in the region where the multiple first internal electrodes 7 and the multiple second internal electrodes 9 are stacked. As a result, it is possible to prevent short circuits.

[0052] Furthermore, in this embodiment, the relational expression (4) is satisfied on the one principal surface 2c (mounting surface 21) side. In this case, even if the relational expression (3) is satisfied, the portion of the first internal electrode 7 corresponding to the second internal electrode 9 (capacitive portion) may enter the crack occurrence region CR. The first internal electrodes 7 have the same polarity. However, even if the internal electrodes have the same polarity, cracks may occur in the capacitive portion, causing problems in the feedthrough capacitor 1. Therefore, when the relational expression (4) is satisfied on the mounting surface 21 side, it is preferable that the relational expression (7) be satisfied.

[0053] When the distance between one principal surface 2c and the first internal electrode 7 closest to the one principal surface 2c is defined as dimension Tg2, the relational expressions of formulas (4) and (7) are satisfied. In this case, the first internal electrode 7 is closer to the one principal surface 2c than the second internal electrode 9. At this time, the portions of the plurality of first internal electrodes 7 that correspond to the ends 9d of the plurality of second internal electrodes 9 on the one end face 2a side are located outside the crack occurrence region CR. This makes it possible to more reliably prevent cracks from occurring in the region where the plurality of first internal electrodes 7 and the plurality of second internal electrodes 9 are stacked, even if a crack occurs in the element body 2. As a result, short circuits can be suppressed.

[0054] The dimension Lg is smaller than the dimension b. Furthermore, when the length of the element body 2 in the opposing direction D2 is taken as the dimension L, the relational expression Lg<0.14×L is satisfied. In this case, it is possible to ensure the area of ​​the region where the plurality of first internal electrodes 7 and the plurality of second internal electrodes 9 are laminated. Therefore, it is possible to ensure the electrostatic capacitance.

[0055] The dimension Tg1 may be 90 μm to 150 μm. The length of the feedthrough capacitor 1 in the longitudinal direction (opposing direction D2) may be 1.6 mm or more, and the length in the lateral direction (width direction D3) may be 0.8 mm or more. In this case, the stacking height of the plurality of first internal electrodes 7 and the plurality of second internal electrodes 9 can be ensured. The size of the feedthrough capacitor 1 in the longitudinal direction and lateral direction can also be ensured. Therefore, the capacitance can be ensured. Furthermore, in a feedthrough capacitor 1 with such a large chip size, the effect of suppressing short circuits can be more significantly achieved.

[0056] The dimension b may be 180 μm to 240 μm. In this case, the area where cracks occur in the element body 2 can be kept small, thereby suppressing short circuits.

[0057] Next, the results of the evaluation test of the feedthrough capacitor will be described with reference to FIGS.

[0058] 9 and 10 show the results of an evaluation test of feedthrough capacitors. For the evaluation test shown in FIG. 9, multiple feedthrough capacitors were prepared with different chip sizes, dimensions T [μm], b [μm], Tg1 [μm], and Lg [μm]. Furthermore, in this evaluation test, each feedthrough capacitor was mounted in an electronic device, and it was confirmed whether or not a short circuit occurred between the internal electrodes due to cracks that occurred inside the element due to thermal expansion or the like. In FIG. 9, the chip sizes are listed in JIS notation.

[0059] As shown in Figure 9, in feedthrough capacitors that do not satisfy the relational expression (3), cracks that occurred within the element caused short circuits between the internal electrodes (see the top diagram in Figure 9). On the other hand, in feedthrough capacitors that satisfy the relational expression (3), cracks that occurred within the element did not cause short circuits between the internal electrodes (see the bottom diagram in Figure 9). Therefore, it was confirmed that by configuring a feedthrough capacitor to satisfy the relational expression (3), short circuits between the internal electrodes can be suppressed.

[0060] 9, in the feedthrough capacitors in which the dimension Lg is smaller than the dimension b, the feedthrough capacitors in which the dimension Tg1 is 90 μm to 150 μm, the feedthrough capacitors in which the dimension b is 180 μm to 240 μm, and the feedthrough capacitors in which the longitudinal length is 1.6 mm or more and the lateral length is 0.8 mm or more (i.e., the chip size is C1608), no short circuits between the internal electrodes occurred due to cracks that occurred in the element body. The results of this evaluation test confirmed that feedthrough capacitors that satisfy these relational expressions can more effectively suppress short circuits between the internal electrodes.

[0061] In the evaluation test shown in FIG. 10 , multiple feedthrough capacitors with different dimensions L [μm] and Lg [μm] were prepared. Furthermore, in this evaluation test, each feedthrough capacitor was mounted in an electronic device, and the capacitance of the feedthrough capacitor was measured. The left table in FIG. 10 lists the values ​​for the feedthrough capacitors that did not short circuit in FIG. 9 (the feedthrough capacitors shown in the lower diagram in FIG. 9 ). That is, the left table in FIG. 10 lists the dimensions L, Lg, and capacitance ratios for each feedthrough capacitor. The capacitance ratio for each feedthrough capacitor was set to 100. The right table in FIG. 10 lists the values ​​for feedthrough capacitors configured so that the dimension Lg of the feedthrough capacitor shown in the left table is 0.14 × L [μm]. That is, the right table in FIG. 10 lists the dimensions Lg and capacitance ratios for each feedthrough capacitor. The capacitance ratio for each feedthrough capacitor indicates the capacitance ratio when the capacitance of the feedthrough capacitor shown in the left table is set to 100.

[0062] As described above, the dimension Lg is the distance in the opposing direction D2 between one end face 2a and the ends 9d of the multiple second internal electrodes 9 on the side of the one end face 2a. The larger the dimension Lg, the farther the ends 9d of the second internal electrodes 9 are from the crack occurrence region CR, making it less likely that a short circuit will occur. On the other hand, the larger the dimension Lg, the smaller the area of ​​the region where the multiple first internal electrodes 7 and the multiple second internal electrodes 9 are stacked on top of each other. Therefore, the larger the dimension Lg, the more reliably the occurrence of a short circuit can be suppressed, but the capacitance of the feedthrough capacitor 1 will be smaller.

[0063] The feedthrough capacitor dimension Lg shown in the left table of Figure 10 was set as the optimal dimension for each chip size to adequately suppress short circuits while also providing sufficient capacitance. If the dimension Lg is increased beyond this dimension, the capacitance ratio falls below 100%, but if it can be kept at 80% or more, sufficient capacitance can be ensured. As shown in Figure 10, even when the dimension Lg is set to 0.14 × L [μm], the capacitance of the feedthrough capacitor was 81% or more of the capacitance of the feedthrough capacitor shown in the left table for all chip sizes. Therefore, it was confirmed that a feedthrough capacitor that satisfies the relationship Lg < 0.14 × L can ensure sufficient capacitance.

[0064] The present invention is not limited to the above-described embodiments.

[0065] In the above embodiment, the feedthrough capacitor 1 in which one principal surface 2c is the mounting surface 21 has been exemplified, but the other principal surface 2c may also be the mounting surface 21.

[0066] In the above-described embodiment, the relational expression (3) is satisfied on both sides of the pair of end faces 2a, 2a on one main surface 2c side. The relational expression (3) is also satisfied on both sides of the pair of end faces 2a, 2a on the other main surface 2c side. However, the relational expression (3) may be satisfied only on one of the end faces 2a on the main surface 2c side, which is the mounting surface 21, of the pair of main surfaces 2c, 2c.

[0067] Furthermore, the relationship between the dimensions is not limited to that described above, and each of the dimensions (dimension b, dimension Lg, dimension L, dimension T, dimension Tg1, and dimension Tg2) can be changed as appropriate as long as the effects of the present invention are achieved.

[0068] Furthermore, the connection mode of the first internal electrode 7 and the second internal electrode 9 is not limited to the above. It is sufficient that the first internal electrode 7 is exposed at least on one end face 2a, and the second internal electrode 9 is spaced apart from at least on one end face 2a.

[0069] Furthermore, the configuration of the first external electrode 3 is not limited to the above. For example, the first external electrode 3 does not have to have the second sintered electrode layer 32. [Explanation of symbols]

[0070] 1...feed-through capacitor (multilayer capacitor), 2...element body, 2a...end face, 2b...side face, 2c...main surface, 3...first external electrode, 5...second external electrode, 7...first internal electrode, 9...second internal electrode, 9d...end, 31...first sintered electrode layer (sintered electrode layer), 31c...wrapping portion, b, L, Lg, T, Tg1, Tg2...dimensions, D1...stacking direction, D2...opposing direction (longitudinal direction), D3...width direction (transverse direction).

Claims

1. an element body having a pair of end faces opposing each other, and a pair of side faces and a pair of main faces located between the pair of end faces and extending in the opposing direction of the pair of end faces; a pair of first external electrodes disposed on the pair of end surfaces; a second external electrode spaced apart from the pair of first external electrodes and disposed on at least one of the pair of side surfaces; a plurality of first internal electrodes disposed within the element body and exposed from at least one of the end faces; a plurality of second internal electrodes disposed within the element body and spaced apart from the one end face, the pair of first external electrodes includes sintered electrode layers covering the pair of end faces and connected to the plurality of first internal electrodes, the second internal electrode is not connected to the first external electrode but is connected to the second external electrode; the plurality of first internal electrodes and the plurality of second internal electrodes are stacked on one another with a direction in which the pair of main surfaces face each other as a stacking direction, a wraparound dimension in the opposing direction of a wraparound portion of the sintered electrode layer covering the one end surface, the wraparound portion extending from the one end surface to one of the main surfaces, is defined as a dimension b; a distance in the opposing direction between the one end face and ends of the plurality of second internal electrodes on the one end face side is defined as a dimension Lg; The distance between the pair of main surfaces in the stacking direction is defined as dimension T, When the distance between the one main surface and the second internal electrode closest to the one main surface is defined as a dimension Tg1, The relationship Lg>b-(2×b×Tg1 / T) is satisfied, The chip size is 0402 to 3216, When the length of the element body in the opposing direction is dimension L, The relational expression Lg<0.14×L is satisfied, the plurality of first internal electrodes and the plurality of second internal electrodes include a first adjacent internal electrode adjacent to one of the pair of main surfaces and a second adjacent internal electrode adjacent to the other of the pair of main surfaces, the plurality of first internal electrodes and the plurality of second internal electrodes are alternately arranged from the first adjacent internal electrode to the second adjacent internal electrode, each of the first internal electrodes being adjacent to a corresponding one of the second internal electrodes, and each of the second internal electrodes being adjacent to a corresponding one of the first internal electrodes.

2. When the distance between the one principal surface and the first internal electrode closest to the one principal surface is defined as a dimension Tg2, 2. The multilayer capacitor according to claim 1, wherein the relational expressions Tg1>Tg2 and Lg>b-(2×b×Tg2 / T) are satisfied.

3. 3. The multilayer capacitor according to claim 1, wherein said dimension Lg is smaller than said dimension b.

4. 4. The multilayer capacitor according to claim 1, wherein said dimension Tg1 is 90 μm to 150 μm.

5. 5. The multilayer capacitor according to claim 1, wherein the dimension b is 180 μm to 240 μm.

6. 6. The multilayer capacitor according to claim 1, wherein the dimension Lg is 90 to 190 μm.

7. 2. The multilayer capacitor according to claim 1, wherein the chip size is 1005 to 3216.

8. 5. The multilayer capacitor according to claim 4, wherein the chip size is 1608 to 2012.

9. 6. The multilayer capacitor according to claim 5, wherein the chip size is 1608.

10. 7. The multilayer capacitor according to claim 6, wherein the chip size is 0603 to 1608.

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