Photonic integrated circuit with optical deinterleaver

Abstract

Making the most of these improvements through optimized device design. The photonic integrated circuit includes an optical deinterleaver including an input region, a dispersion region, and at least two output regions. The input region is adapted to receive an input optical signal including a plurality of channels. The dispersion region is optically coupled to the input region to receive the input optical signal. The dispersion region includes a heterogeneous arrangement of a first material and a second material to structure the dispersion region to separate the input optical signal into a plurality of multi-channel optical signals, including a first multi-channel optical signal and a second multi-channel optical signal. The at least two output regions include a first output region and a second output region optically coupled to the dispersion region. The first output region is positioned to receive the first multi-channel optical signal, and the second output region is positioned to receive the second multi-channel optical signal.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Patent Application No. 17 / 489,640, filed September 29, 2021, which is incorporated by reference herein in its entirety.

[0002] FIELD OF THE DISCLOSURE The present disclosure relates generally to photonic devices and particularly, but not exclusively, to photonic integrated circuits. [Background technology]

[0003] Optical fiber communications are typically used to transmit information from one location to another via light modulated to carry the information. For example, many telecommunications companies use optical fiber to transmit telephone signals, internet communications, and cable television signals. However, the cost of deploying optical fiber for optical fiber communications can be prohibitive. Therefore, techniques have been developed to more efficiently use the available bandwidth within a single optical fiber. Wavelength division multiplexing is one such technique that bundles multiple optical carrier signals onto a single optical fiber using different wavelengths.

[0004] Wavelength division multiplexing and its variants (e.g., dense wavelength division multiplexing, coarse wavelength division multiplexing, etc.) utilize the bandwidth of an optical fiber by bundling multiple optical carrier signals onto a single optical fiber. Once multiple carrier signals are bundled together, they can be transmitted from one location to another over a single optical fiber, where they can be demultiplexed so that the bundled optical carrier signals can be read out individually. [Brief explanation of the drawings]

[0005] Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, in which like reference numerals refer to like parts throughout the various views unless otherwise specified. Not every instance of an element is necessarily labeled, so as to avoid cluttering the figures where appropriate. The figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles described. [Figure 1A] FIG. 1 is a functional block diagram illustrating a system for optical communication between two optical communication devices via optical signals, according to one embodiment of the present disclosure. [Figure 1B] 1B illustrates the optical signal illustrated in FIG. 1A, where the individual channels are included in multiple channels of the optical signal arranged by wavelength, according to one embodiment of the present disclosure. [Figure 1C] 1C illustrates exemplary channels included in the optical signal illustrated in FIG. 1B that are characterized by distinct wavelengths, according to one embodiment of the present disclosure. [Figure 2A] 1 illustrates an exemplary photonic integrated circuit including an optical deinterleaver, according to one embodiment of the present disclosure. [Figure 2B] 1 illustrates an exemplary optical deinterleaver having two output regions, according to one embodiment of the present disclosure. [Figure 2C] 1 illustrates an exemplary optical deinterleaver having three output regions, according to one embodiment of the present disclosure. [Figure 2D] 1 illustrates an exemplary photonic integrated circuit including an intermediate deinterleaver, according to one embodiment of the present disclosure. [Figure 2E] 1 illustrates an exemplary photonic integrated circuit including an optical deinterleaver, a demultiplexer, and a filter, according to one embodiment of the present disclosure. [Figure 3A] 1 illustrates an exemplary diagram of a dispersion region included in an optical deinterleaver, according to one embodiment of the present disclosure. [Figure 3B] 1 illustrates an exemplary diagram of a dispersion region included in an optical deinterleaver, according to one embodiment of the present disclosure. [Figure 3C]1 illustrates an exemplary diagram of a dispersion region included in an optical deinterleaver, according to one embodiment of the present disclosure. [Figure 3D] 1 illustrates an exemplary diagram of a dispersion region included in an optical deinterleaver, according to one embodiment of the present disclosure. [Figure 4A] 1 illustrates a schematic example of a photonic integrated circuit including an optical deinterleaver, according to one embodiment of the present disclosure. [Figure 4B] 4B illustrates a more detailed view of a dispersion region included in the optical deinterleaver illustrated in FIG. 4A, according to one embodiment of the present disclosure. [Figure 4C] 4B illustrates a more detailed view of a dispersion region included in the optical deinterleaver illustrated in FIG. 4A, according to one embodiment of the present disclosure. [Figure 5] FIG. 1 is a functional block diagram illustrating a system for generating a design of a photonic integrated circuit, according to an embodiment of the present disclosure. [Figure 6] 1 illustrates an exemplary method for generating a design of a photonic integrated circuit, according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0006] Embodiments of photonic integrated circuits including optical deinterleavers, as well as methods for generating designs of photonic integrated circuits, are described herein. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. However, those skilled in the art will recognize that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other cases, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.

[0007] Throughout this specification, the references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0008] As photonic device functionality improves and manufacturing tolerances improve to allow for smaller device feature sizes, it becomes increasingly important to maximize these improvements through optimized device design to increase device functionality, performance, and robustness while also reducing size and cost. Conventional photonic devices, such as those used in optical communications, are traditionally designed using simple guess-and-check methods or manually guided grid searches, in which a small number of design parameters from a given design or building block are tuned or arranged to fit a particular application. In practice, however, these devices can have design parameters ranging from hundreds to billions or more, depending on the size and functionality of the device.

[0009] Described herein are embodiments of photonic integrated circuits (e.g., one or more optical deinterleavers, demultiplexers, filters, or a combination thereof) that may have designs obtained through an inverse design process that utilizes first-principles simulation to enable consideration of increased design parameters relative to conventional photonic designs. More specifically, the techniques described herein may utilize gradient-based optimization in combination with first-principles simulation to generate designs based on the underlying physics expected to govern the operation of the photonic integrated circuit. However, it is understood that in other embodiments, design optimization of photonic integrated circuits that does not employ gradient-based techniques may also be used. Advantageously, the embodiments and techniques described herein are not limited to conventional techniques for designing photonic circuits. Rather, the first-principles-based methodologies described herein may result in designs that surpass current state-of-the-art designs in performance, size, robustness, or a combination thereof. Furthermore, rather than being limited to a small number of design parameters due to conventional techniques, the embodiments and techniques described herein may provide scalable optimization of a nearly unlimited number of design parameters.

[0010] To facilitate further design optimization and improve the performance of reverse-engineered photonic integrated circuits, embodiments of the present disclosure describe photonic integrated circuits incorporating one or more optical deinterleavers. An optical deinterleaver, as defined herein, corresponds to a photonic device (e.g., as a separate device or as a component of a monolithic photonic integrated circuit) that outputs a plurality of multi-channel optical signals that are spatially separated from one another in response to receiving an input signal including a plurality of channels (e.g., a wideband optical signal having a total number of channels of at least four). Each of the plurality of multi-channel optical signals includes at least two channels that are separated from the input signal within a dispersive region of the optical deinterleaver. In some embodiments, the dispersive region of the optical deinterleaver may be a resonator or optical cavity structured to spatially direct or otherwise map individual channels included in the input signal to specific output regions that are spatially separated from one another to form a plurality of multi-channel optical signals.

[0011] It is understood that the optical deinterleaver described in the embodiments herein is different from a demultiplexer. Those skilled in the art will recognize that a demultiplexer outputs individually separated channels from an input optical signal, while an optical deinterleaver outputs a multi-channel optical signal. In some embodiments, a monolithic photonic integrated circuit is described in which an optical deinterleaver is coupled to one or more demultiplexers. Advantageously, a multi-stage demultiplexing process may be enabled by first separating an input optical signal into multiple multi-channel optical signals with an optical deinterleaver and then using one or more demultiplexers to separate the multi-channel optical signals into individual channels. The multi-stage demultiplexing process may facilitate improved performance characteristics and simplified dispersion region design for a given photonic integrated circuit due to increased wavelength separation between individual channels included in the optical signal as the individual channels propagate through the photonic integrated circuit.

[0012] 1A is a functional block diagram illustrating a system 100 for optical communication (e.g., via wavelength division multiplexing or other techniques) between two optical communication devices 101-A and 101-B via optical signals 110, in accordance with one embodiment of the present disclosure. Optical communication device 101-A includes a controller 105, one or more light sources 111 (e.g., light emitting diodes, lasers, etc.), one or more sensors 113 (e.g., photodiodes, phototransistors, photoresistors, etc.), one or more interface devices 115 (e.g., fiber optic couplers, light guides, waveguides, other optical components, etc.), one or more optical deinterleavers 117, one or more optical demultiplexers 119, and one or more optical multiplexers 121 coupled to one another. The controller 105 includes one or more processors 107 (e.g., one or more central processing units, application specific integrated circuits, field programmable gate arrays, tensor processing units, graphics processing units, or combinations thereof) and memory 109 (e.g., volatile memory such as dynamic RAM or static RAM, non-volatile memory such as flash memory, other types of memory, or combinations thereof). In some embodiments, the optical communication device 101-A may also include one or more photonic integrated circuits (e.g., see FIGS. 2A-2E, 3A-3D, or 4A-4C), which may be formed from one or more interface devices 115, one or more optical deinterleavers 117, one or more optical demultiplexers 119, or combinations thereof.

[0013] Controller 105 is configured to orchestrate the operation of optical communication device 101-A. More specifically, controller 105 includes instructions that, when executed by controller 105, cause controller 105, optical communication device 101-A, and / or system 100 to perform operations (e.g., software instructions stored in memory 109 coupled to one or more processors 107, firmware instructions stored in memory included in one or more processors 107, and / or instructions corresponding to hardware application-specific integrated circuits, field programmable gate arrays, etc.). In some embodiments, the operations include modulating light via one or more light sources 111 to encode information in individual channels corresponding to distinct wavelengths or modes of the modulated light, multiplexing the individual channels via one or more multiplexers 121 to form optical signal 110, and transmitting optical signal 110 via one or more interface devices 115. In the same or other embodiments, the operations include receiving optical signal 110 via one or more interface devices 115, demultiplexing optical signal 110 with one or more photonic integrated circuits including one or more optical deinterleavers 117, one or more demultiplexers 119, other optical components, or a combination thereof, and decoding optical signal 110 to extract information by detecting the demultiplexed individual channels from optical signal 110 via one or more sensors 113.

[0014] In some embodiments, optical communication devices 101-A and 101-B may be separate, separate devices (e.g., an optical transceiver or transmitter is communicatively coupled to a separate optical transceiver or receiver via one or more optical fibers). However, in other embodiments, optical communication devices 101-A and 101-B may be part of a single component or device (e.g., a smartphone, a tablet, a computer, a server, an optical communication device, etc.). For example, optical communication devices 101-A and 101-B may both be components on a monolithic integrated circuit embedded within the monolithic integrated circuit and coupled to each other via a waveguide (e.g., a silicon waveguide) adapted to carry optical signals 110 between optical communication devices 101-A and 101-B.

[0015] It is understood that the optical communication device 101-B may include the same or similar components as the optical communication device 101-A, which have been omitted for clarity. Additionally, it is understood that any functionality described with reference to the optical communication device 101-A is equally applicable to the optical communication device 101-B. It is further understood that the optical communication device 101-A may be configured as an optical receiver, transmitter, or transceiver, and that in some embodiments, certain components illustrated in FIG. 1A may be omitted from the optical communication device 101-A (e.g., depending on the targeted functionality). For example, in one embodiment, the optical communication device 101-A may be configured as an optical receiver and may omit one or more light sources 111 and multiplexer 121. Additionally, it should be noted that in some embodiments, certain elements of the optical communication device 101-A may be omitted to avoid obscuring certain aspects of the present disclosure. For example, optical communication device 101-A may include amplification circuits, lenses, or other components to facilitate transmitting, receiving, encoding, or combining optical signal 110.

[0016] 1B illustrates the optical signal 110 illustrated in FIG. 1A with individual channels (e.g., a first channel 108-1, a second channel 108-2, a third channel 108-3, and a fourth channel 108-4) included in the plurality of channels 108 of the optical signal 110 arranged by wavelength, in accordance with one embodiment of the present disclosure. More specifically, FIG. 1B illustrates the plurality of channels 108 arranged in ascending order by wavelength (λ) with respect to the transmission (T) of the optical signal 110. For example, in the illustrated embodiment, the second channel 108-2 has a wavelength greater than the wavelength of the first channel 108-1, and the third channel 108-3 has a wavelength greater than the wavelength of the second channel 108-2. In most embodiments, each channel included in the plurality of channels 108 is characterized by a distinct wavelength (e.g., the center wavelength of each channel) that is different from one another. In other words, the first channel 108-1 is characterized by a first center wavelength, the second channel 108-2 is characterized by a second center wavelength, the third channel 108-3 is characterized by a third center wavelength, etc. In some embodiments, the distinct wavelengths characterizing the multiple channels 108 are periodically spaced apart by predetermined increments 112 (e.g., 5 nm, 10 nm, 20 nm, 50 nm, or any other suitable increment). In one embodiment, the distinct wavelengths characterizing the multiple channels 108 include 1270 nm, 1280 nm, 1290 nm, and 1300 nm. In the same or other embodiments, the distinct wavelengths characterizing the multiple channels 108 include 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1511 nm, 1531 nm, 1551 nm, 1571 nm, etc. Although only four channels are illustrated in the plurality of channels 108 of the optical signal 110, it will be understood that in other embodiments, more or less than four channels may be included in the plurality of channels 108.

[0017] 1C illustrates exemplary channels (e.g., first channel 108-1, second channel 108-2, third channel 108-3, fourth channel 108-4, etc.) included in optical signal 110 of FIG. 1B that are characterized by distinct wavelengths, according to one embodiment of the present disclosure. As illustrated, the exemplary channels are spaced apart by the exemplary channel center wavelength (λ N ) in the passband region 118. In some embodiments, the center wavelength may be defined as the midpoint of the passband region (i.e., defined as the region between PB1 and PB2), and the channel bandwidth 116 may be defined as the width of the passband region 118. The passband region 118 may represent the approximate power or transmission of one or more components included in the photonic integrated circuit (e.g., an optical deinterleaver, a demultiplexer, etc.), or the collective transmission of the photonic integrated circuit. It is understood that in some embodiments, the passband region 118 may include ripple 114, as illustrated in FIG. 1C , corresponding to fluctuations within the passband region 118. In one or more embodiments, the ripple 114 within the passband region 118 may be ±2 dB or less, ±1 dB or less, ±0.5 dB or less, etc. In some embodiments, the channel bandwidth 116 may be defined by the passband region 118. In other embodiments, the channel bandwidth 116 may be defined by a threshold (e.g., dB th ) can be defined as the wavelength range having a measured power greater than

[0018] 2A illustrates an exemplary photonic integrated circuit 250 including an optical deinterleaver 217-A according to one embodiment of the present disclosure. The photonic integrated circuit 250 performs a multi-stage demultiplexing process and includes an optical deinterleaver 217-A, a first demultiplexer 219-A, and a second demultiplexer 219-B. More specifically, the photonic integrated circuit 250 may be one possible implementation of the photonic integrated circuit included in the optical communication device 101-A illustrated in FIG. 1A. Referring again to FIG. 2A, the optical deinterleaver 217-A includes an input region 202 (e.g., a waveguide), a dispersion region 230-A, and at least two output regions 204-A and 204-B (e.g., spatially separated waveguides). Similarly, the first demultiplexer 219-A and the second demultiplexer 219-B include input regions (i.e., 252-A and 252-B), dispersion regions (i.e., 280-A and 280-B), and output regions (i.e., 254-A1, 254-A2, 254-B1, and 254-B2).

[0019] As illustrated, input region 202 of optical deinterleaver 217-A is adapted to receive optical signal 110 including multiple channels 108 characterized by distinct wavelengths. Dispersion region 230-A is optically coupled to input region 202 to receive optical signal 110. Dispersion region 230-A includes a heterogeneous arrangement of a first material and a second material (e.g., see FIGS. 4A-4C, where the first material is different from the second material) to structure dispersion region 230-A to separate optical signal 110 into multiple multi-channel optical signals (e.g., first multi-channel optical signal 260-A and second multi-channel optical signal 260-B). At least two output regions (e.g., first output region 204-A and second output region 204-B) are optically coupled to dispersion region 230-A and physically separated from input region 202. First output region 204-A is positioned to receive first multi-channel optical signal 260-A, and second output region 204-B is positioned to receive second multi-channel optical signal 260-B. Additionally, it is further noted that the non-homogeneous arrangement of the first and second materials in dispersion region 230-A is substantially proportional to a design obtained by an inverse design process (see, e.g., FIG. 6 ).

[0020] In the illustrated embodiment, the first demultiplexer 219-A is optically coupled to the first output region 204-A for demultiplexing the first multi-channel optical signal 260-A into individual channels (e.g., the first channel 108-1 included in the first multi-channel optical signal 260-A is demultiplexed and directed toward output port 254-A2, and the third channel 108-3 included in the first multi-channel optical signal 260-A is demultiplexed and directed toward output port 254-A1). The second demultiplexer 219-B is optically coupled to the second output region 204-B of the optical deinterleaver 217-A for demultiplexing the second multi-channel optical signal 260-B into individual channels (e.g., the second channel 108-2 included in the second multi-channel optical signal 260-B is demultiplexed and directed toward output port 254-B2, and the fourth channel 108-4 included in the second multi-channel optical signal 260-B is demultiplexed and directed toward output port 254-B1). Similar to optical deinterleaver 217-A, first demultiplexer 219-A and second demultiplexer 219-B each include a respective dispersion region (e.g., 280-A and 280-B) that includes a corresponding non-homogeneous arrangement of a first material and a second material (see, e.g., FIG. 4A ) to structure respective dispersion region 280-A and 280-B to separate first multi-channel optical signal 260-A or second multi-channel optical signal 260-B into individual channels included in plurality of channels 108 of optical signal 110. Additionally, it is further noted that the corresponding non-homogeneous arrangement of the first material and the second material of dispersion region 280-A and 280-B is substantially proportional to a design obtained by an inverse design process (see, e.g., FIG. 6 ).

[0021] As illustrated, the dispersive region 230-A is structured as an optical cavity or resonator that couples individual channels having a particular optical mode received at the input region 202 to a corresponding one of the at least two output regions 204. The dispersive region 230-A directs a majority of the light associated with the first and third channels from the input region 202 to the first output region 204-A. At the same time, the dispersive region 230-A also directs a majority of the light associated with the second and fourth channels from the input region 202 to the second output region 204-B. In such an embodiment, the directed light received at the corresponding one of the at least two output regions 204 exceeds a threshold transmission (T th ) is exceeded. However, the threshold transmission (T th It is understood that there may be residual light (e.g., noise) that propagates to unintended output regions with a corresponding transmission lower than 100% (e.g., a portion of the light associated with the second and fourth channels propagates unintendedly to the first output region 204-A). In some embodiments, the threshold transmission may be 50%, 40%, 30%, 20%, 10%, 5%, or 1%.

[0022] Similarly, demultiplexers 219-A and 219-B each include dispersive regions 280-A and 280-B, respectively, that are structured to function as optical cavities or resonators that couple individual channels having a particular mode received at input regions 252-A and 252-B to corresponding ones of output regions (i.e., 254-A1, 254-A2, 254-B1, and 254-B2). As illustrated, dispersive region 280-A directs most of the light associated with the distinct wavelengths of the third channel from input region 252-A to output region 254-A1. At the same time, dispersive region 280-A also directs most of the light associated with the distinct wavelengths of the first channel from input region 252-A to output region 254-A2. Dispersion region 280-B directs a majority of the light associated with the distinct wavelengths of the fourth channel from input region 252-B to output region 254-B1. At the same time, dispersion region 280-B also directs a majority of the light associated with the distinct wavelengths of the second channel from input region 252-B to output region 254-B2. As described above, the directed light received at a corresponding one of the output regions 254 is transmitted over a threshold transmission (T th However, the threshold transmission (T th It is understood that there may be residual light (e.g., noise) that propagates to unintended output regions with a corresponding transmission lower than 254-A1 (e.g., a portion of the light associated with the first, second, and fourth channels propagates unintendedly to output region 254-A1).

[0023] Thus, the term “separate” in the context of optical deinterleavers (e.g., optical deinterleaver 217-A or any other optical deinterleaver discussed herein) and demultiplexers (e.g., 280-A, 280-B, or any other demultiplexer discussed herein) is understood to indicate that a majority (e.g., at least 50%) of the light associated with the distinct wavelengths of a given channel included in optical signal 110 is directed to a corresponding output region (e.g., output regions 204 and 254). It is further understood that transmission is a relative term of certain components (e.g., transmission at output region 204 is based on the optical power of a given channel at the expected output region relative to the optical power at the corresponding input region). For example, transmission of second channel 108-2 at second output region 204-B is based on the optical power of second channel 108-2 at output region 204-B relative to the optical power of second channel 108-2 at input region 202.

[0024] 2A , the multi-stage demultiplexing process includes providing optical signal 110 to optical deinterleaver 217-A via input region 202 optically coupled to dispersion region 230-A. The multi-stage demultiplexing process further includes separating pairs of adjacent channels included in optical signal 110 via dispersion region 230-A (e.g., based on wavelengths at which multiple channels 108 are arranged by increasing or decreasing the center wavelength or distinct wavelengths) and directing the separated channels to physically separate output regions (e.g., 204-A and 204-B) of optical deinterleaver 217-A to form first multi-channel optical signal 260-A and second multi-channel optical signal 260-B. The multi-stage demultiplexing process additionally includes providing a first multi-channel optical signal 260-A to a first demultiplexer 219-A (e.g., via a waveguide coupling a first output region 204-A of the optical deinterleaver 217-A to an input region 252-A of the first demultiplexer 219-A), and providing a second multi-channel optical signal 260-B to a second demultiplexer 219-B (e.g., via a waveguide coupling a second output region 204-B of the optical deinterleaver 217-A to an input region of the second demultiplexer 219-B). The multi-stage demultiplexing process involves demultiplexing the first multi-channel optical signal 260-A and the second multi-channel optical signal 260-B into individual channels, respectively, via dispersion regions 280-A of the first demultiplexer 252-A and dispersion regions 280-B of the second demultiplexer 252-A, so that the individual channels (e.g., λ1, λ2, λ3, or λ4) can be individually read out (e.g., via one or more optical sensors coupled to output regions 254 of the multiple demultiplexers 219).

[0025] It will be understood that in some embodiments, photonic integrated circuit 250 may include additional or fewer components (e.g., an intermediate deinterleaver as illustrated in FIG. 2D , additional demultiplexers, etc.) depending on the optical signal 110 and the functionality of optical deinterleaver 217-A (e.g., the number of output regions 204 of optical deinterleaver 217-A). Furthermore, it will be understood that the multi-stage demultiplexing process is not limited to one deinterleaving stage (e.g., as illustrated in FIG. 2A ) or two deinterleaving stages (e.g., as illustrated in FIG. 2D ). Rather, additional deinterleaving stages (e.g., a second intermediate deinterleaver, a third intermediate deinterleaver, etc.) may be included depending on the target functionality of photonic integrated circuit 250.

[0026] 2B illustrates an exemplary optical deinterleaver 217-B having two output regions (i.e., 204-A and 204-B) in accordance with one embodiment of the present disclosure. The optical deinterleaver 217-B is an alternative embodiment of the optical deinterleaver 217-A illustrated in FIG. 2A and may also be included in the optical communication device 101-A illustrated in FIG. 1A. Referring again to FIG. 2B, the optical deinterleaver 217-B represents a generalized embodiment in which the optical signal 110 includes “n” channels (i.e., any natural number equal to or greater than 3). The “n” channels include odd and even channels when sequentially arranged by distinct wavelengths or center wavelengths (e.g., the first channel 108-1 is an odd channel and the second channel 108-2 is an even channel). Dispersion region 230-B is then structured to direct the odd and even channels to respective ones of at least two output regions 204. For example, in the illustrated embodiment, the odd channels are directed to first output region 204-A and the even channels are directed to second output region 204-B to form first multi-channel optical signal 260-A and second multi-channel optical signal 260-B, respectively. Thus, the wavelength spacing between the distinct wavelengths or center wavelengths of adjacent channels included in optical signal 110 is half the wavelength spacing between the distinct wavelengths or center wavelengths of adjacent channels included in multi-channel optical signal 260. It will be appreciated that increasing the wavelength spacing between adjacent channels may make the design of subsequent components within the photonic integrated circuit easier (e.g., the design of demultiplexers 252-A and 252-B may be easier due to the increased wavelength spacing of multi-channel optical signals 260-A and 260-B relative to the wavelength spacing of optical signal 110).

[0027] 2C illustrates an exemplary optical deinterleaver 217-C having three output regions (i.e., 204-A, 204-B, and 204-C) in accordance with one embodiment of the present disclosure. The optical deinterleaver 217-C is an alternative embodiment of the optical deinterleaver 217-A illustrated in FIG. 2A and may be further coupled to an additional demultiplexer and may be included in the photonic integrated circuit of the optical communication device 101-A illustrated in FIG. 1A. Referring again to FIG. 2C, the optical deinterleaver 217-C represents a generalized embodiment in which the optical signal 110 includes “n” channels (i.e., any natural number equal to or greater than six). The dispersion region 230-C is then configured to deinterleave the multiple channels included in the optical signal 110 into one of the output regions (i.e., 204-A, 204-B, or 204-C). More specifically, individual channels within each group of three adjacent channels (e.g., a first group including the first, second, and third channels, a second group including the fourth, fifth, and sixth channels, etc.) are directed to a corresponding one of output regions 204-A, 204-C, or 204-D to form multi-channel optical signals 260-C, 260-D, and 260-E. In the same or other embodiments, multi-channel optical signal 260-C includes each channel associated with 3m-2, multi-channel optical signal 260-D includes each channel associated with 3m-1, and multi-channel optical signal 260-E includes each channel associated with 3m, where "m" includes any natural number less than or equal to n / 3, where "n" is a natural number divisible by 3 without a remainder. In the same or other embodiments, the separation distance 232 between adjacent output areas included in at least two output areas (e.g., the distance between output areas 204-A and 204-B and the distance between 204-B and 204-C) is equal.

[0028] It is understood that in the embodiments described herein, the multi-channel optical signals formed by a given optical deinterleaver (e.g., optical deinterleaver 217-A of FIG. 2A, optical deinterleaver 217-B of FIG. 2B, optical deinterleaver 217-C of FIG. 2C) include the same number of channels. For example, the number of channels included in multi-channel optical signal 260-A is equal to the number of channels included in multi-channel optical signal 260-B for optical deinterleaver 217-A illustrated in FIG. 1A. However, in other embodiments, the number of channels associated with each output port of a given optical deinterleaver is not necessarily equal. For example, in some embodiments, more channels may be included in multi-channel optical signal 260-A than in multi-channel optical signal 260-B (e.g., so that the total number of channels included in optical signal 110 is not an even number). Additionally, it is understood that the at least two output regions (e.g., 204-A, 204-B, and / or 204-C illustrated in FIGS. 2A-2C) can include more than two output regions and is not limited to only two output regions. Rather, the dispersion region (e.g., 230-A, 230-B, or 230-C) can be designed by an inverse design process (see, e.g., FIG. 6) based on a target number of output regions to be mapped to a target number of channels of the optical signal 110.

[0029] 2D illustrates an exemplary photonic integrated circuit 290 including intermediate deinterleavers 217-D and 217-E in accordance with one embodiment of the present disclosure. The photonic integrated circuit 290 may be included in the optical communication device 101-A illustrated in FIG. 1A. Referring again to FIG. 2D, the photonic integrated circuit 290 implements a multi-stage demultiplexing process and includes an optical deinterleaver 217-B, a first intermediate deinterleaver 217-D, a second intermediate deinterleaver 217-E, and demultiplexers 219 (e.g., 219-C, 219-D, 219-E, 219-F). The first intermediate deinterleaver 217-D is optically coupled between the dispersion region 230-B of the optical deinterleaver 217-B and the first demultiplexer (e.g., 219-C). Intermediate deinterleaver 217-D is configured to separate first multi-channel optical signal 260-A received from dispersion region 230-B of optical deinterleaver 217-B into two or more reduced multi-channel optical signals 272 (e.g., first reduced multi-channel optical signal 272-A includes the first channel and the fifth channel, and second reduced multi-channel optical signal 272-B includes the third channel and the seventh channel). It will be understood that the number of channels included in each one of reduced multi-channel optical signals 272 is less than the number of channels included in first multi-channel optical signal 260-A and second multi-channel optical signal 260-B. Second intermediate deinterleaver 217-E is optically coupled between dispersion region 230-B of optical deinterleaver 217-B and a second demultiplexer (e.g., 219-E). The first intermediate deinterleaver 217-D is further optically coupled between the dispersion region 230-B of the optical deinterleaver 217-B and a third demultiplexer (e.g., 219-D). The second intermediate deinterleaver 217-E is further optically coupled between the dispersion region 230-B of the optical deinterleaver 217-B and a fourth demultiplexer (e.g., 219-F).In some embodiments, optical deinterleaver 217-B, first intermediate deinterleaver 217-D, second intermediate deinterleaver 217-E, first demultiplexer 219-C, second demultiplexer 219-E, third demultiplexer 219-D, and fourth demultiplexer 219-F form a monolithic structure contained in or on a substrate material (e.g., silicon-on-insulator).

[0030] As illustrated, the multi-stage demultiplexing process includes providing optical signal 110 to optical deinterleaver 217-B via an input region optically coupled to dispersion region 230-B. The multi-stage demultiplexing process further includes separating odd and even channels included in optical signal 110 via dispersion region 230-B and directing the odd and even channels to physically separate output regions of optical deinterleaver 217-B to form first and second multi-channel optical signals 260-A and 260-B. The multi-stage demultiplexing process additionally includes providing a first multi-channel optical signal 260-A to a first intermediate deinterleaver 217-D (e.g., via a waveguide that couples one of the output regions of the optical deinterleaver 217-B to an input region of the first intermediate deinterleaver 217-D), and providing a second multi-channel optical signal 260-B to a second intermediate deinterleaver 217-E (e.g., via a waveguide that couples one of the output regions of the optical deinterleaver 217-B to an input region of the second intermediate deinterleaver 217-E). The multi-stage demultiplexing process includes separating first multi-channel optical signal 260-A into two or more reduced multi-channel optical signals (e.g., 272-A and 272-B) through a dispersion region of a first intermediate optical deinterleaver 217-D such that the wavelength separation between adjacent channels included in any one of the two or more reduced multi-channel optical signals is greater than the wavelength separation between adjacent channels included in first multi-channel optical signal 217-D. The multi-stage demultiplexing process further includes separating second multi-channel optical signal 260-B into two or more reduced multi-channel optical signals (e.g., 272-C and 272-D) through a dispersion region of a second intermediate optical deinterleaver 217-E such that the wavelength separation between adjacent channels included in any one of the two or more reduced multi-channel optical signals is greater than the wavelength separation between adjacent channels included in first multi-channel optical signal 217-D.The multi-stage demultiplexing process additionally includes providing two or more reduced multi-channel optical signals 272 (e.g., 272-A, 272-B, 272-C, and 272-D) to a respective one of the plurality of demultiplexers 219 (e.g., 219-C, 219-D, 219-E, or 219-F). The multi-stage demultiplexing process includes demultiplexing the two or more reduced multi-channel optical signals 272 into individual channels (e.g., λ1, λ2, λ3, λ4, λ5, λ6, λ7, or λ8) through a dispersive region of a corresponding one of the plurality of demultiplexers 219 so that the individual channels can be read out (e.g., via optical sensors coupled to output regions of the plurality of demultiplexers 219).

[0031] It will be understood that in some embodiments, photonic integrated circuit 290 may include additional or fewer components (e.g., additional intermediate deinterleavers, additional demultiplexers, etc.) depending on optical signal 110 and the functionality of the individual deinterleavers (e.g., the number of output regions of each optical or intermediate deinterleaver). Furthermore, it will be understood that the multi-stage demultiplexing process is not limited to one deinterleaving stage (e.g., as illustrated in FIG. 2A) or two deinterleaving stages (e.g., as illustrated in FIG. 2D). Rather, additional deinterleaving stages (e.g., a second intermediate deinterleaver, a third intermediate deinterleaver, etc.) may be included depending on the target functionality of photonic integrated circuit 290.

[0032] 2E illustrates an exemplary photonic integrated circuit 295 including optical deinterleaver 217-B, demultiplexers 219-G and 219-H, and a plurality of filters 297, in accordance with one embodiment of the present disclosure. Photonic integrated circuit 295 may be included in optical communication device 101-A illustrated in FIG. 1A and is similar in many respects to photonic integrated circuit 250 illustrated in FIG. 2A. Referring again to FIG. 2E, one way in which photonic integrated circuit 295 differs is that each of demultiplexers 219-G and 219-H is a four-channel demultiplexer (e.g., such that if optical signal 110 includes eight individual channels, the intermediate deinterleaver may be omitted but still demultiplex optical signal 110). Another difference is that photonic integrated circuit 295 includes a plurality of filters 297 (e.g., a first group of filters 297-A individually coupled to a respective one of the output regions of demultiplexer 219-G and a second group of filters 297-B individually coupled to a respective one of the output regions of demultiplexer 219-H). In one embodiment, one of the plurality of filters 297 is coupled to demultiplexer 219-G to receive a first channel (λ1) demultiplexed from first multichannel optical signal 260-A and to substantially attenuate (e.g., reduce the optical power or optical intensity by at least 50%, 60%, 70%, 80%, 90%, or more) light outside of the first channel. As illustrated, demultiplexer 219-G is optically coupled between first group of filters 297-A and dispersion region 230-B of optical deinterleaver 217-B.

[0033] In some embodiments, each of the plurality of filters 297 provides additional isolation for selected channels included in the plurality of channels of optical signal 110. In the same or other embodiments, the plurality of filters 297 is an add / drop filter that attenuates light outside of a particular wavelength range corresponding to a particular channel. In some embodiments, each of the plurality of filters 297 has a corresponding dispersion region structured to provide the intended function of an add / drop filter. In other embodiments, the plurality of filters 297 may correspond to one or more optical ring resonators structured to resonate with particular channels included in optical signal 110. In such embodiments, the optical ring resonator directs light associated with a given channel to a particular output region, while directing light outside of the given channel to a different output region spatially separated from the particular output region. In some embodiments, the plurality of filters 297 may be included in any other photonic integrated circuit described herein (e.g., the output region of demultiplexer 219 of FIG. 2A or 2D may be optically coupled to the plurality of filters 297).

[0034] 3A-3D illustrate exemplary diagrams of a dispersion region 330 included in an optical deinterleaver 317, according to one embodiment of the present disclosure. The optical deinterleaver 317 is one possible implementation of the optical deinterleaver 117 illustrated in FIG. 1A or the optical deinterleaver 217 illustrated in FIGS. 2A-2E (e.g., any of 217-A, 217-B, 217-C, 217-D, or 217-E). While the discussion from here on will be directed to an optical deinterleaver, it will be further understood that similar structures may be utilized for demultiplexers, filters, etc., according to embodiments of the present disclosure. In other words, the cross sections illustrated in FIGS. 3A-3D may be equally applicable to the demultiplexer and filter embodiments discussed throughout the present disclosure.

[0035] 3A illustrates a cross-sectional view of optical deinterleaver 317 along a lateral plane within an active layer defined by width 321 and length 323 of optical deinterleaver 317. As illustrated, optical deinterleaver 317 includes an input region 302 (e.g., corresponding to input region 202 illustrated in FIG. 2A), a plurality of output regions 304 (e.g., corresponding to at least two output regions 204 illustrated in FIG. 2A), and a dispersion region 330 optically disposed between input region 302 and the plurality of output regions 304. Each of input region 302 and the plurality of output regions 304 (e.g., 304-A and 304-B) is optically coupled to dispersion region 330 and may correspond to a waveguide (e.g., a slab waveguide, a strip waveguide, a slot waveguide, etc.) capable of propagating light along a waveguide path. The dispersive region 330 includes a heterogeneous arrangement of a first material 332 (e.g., silicon) and a second material 334 (e.g., silicon dioxide) to form a plurality of interfaces, each of which corresponds to a change in the refractive index of the dispersive region 330, collectively structuring the dispersive region 330 to separate an input signal (e.g., the optical signal 110 illustrated in Figures 1A-2E) into a plurality of multi-channel optical signals (e.g., the first multi-channel optical signal 260-A and the second multi-channel optical signal 260-B illustrated in Figures 2A-2E), and each of which guides each of the multi-channel optical signals to a corresponding one of the plurality of output regions 304 when the input region 302 receives the input signal.

[0036] 3A , the dispersion region 330 of the optical deinterleaver 317 has a fixed area (e.g., defined by a width 325 and a length 327) laterally surrounded by a peripheral region 322 formed by a second material 334. In some embodiments, the second material 334 included in the peripheral region 322 of the optical deinterleaver 317 adjacent to the dispersion region 330 is understood to extend continuously around the dispersion region 330, except for the input region 302 and the plurality of output regions 304 (e.g., at least two output regions 304-A and 304-B). In some embodiments, the peripheral region 322 has a homogenous composition of the second material. In the illustrated embodiment, the dispersion region 330 includes a first side 331 and a second side 333, each bounded by an inner boundary (i.e., the unlabeled dashed line of the peripheral region 322 disposed between the dispersion region 330 and the dash-dotted line corresponding to the outer boundary of the peripheral region 322). The first side 331 and the second side 333 correspond to opposite sides of the dispersion region 330. The input region 302 is disposed on the first side 331 (e.g., one side of the input region 302 abuts the first side 331 of the dispersion region 330), while each of the plurality of output regions 304 is disposed proximate the second side 333 (e.g., one side of each of the plurality of output regions 304 abuts the second side 333 of the dispersion region 330).

[0037] In the illustrated embodiment, each of the multiple output regions 304 is parallel to one of the multiple output regions 304. However, in other embodiments, the multiple output regions 304 may not be parallel to one another or may not be located on the same side (e.g., one or more of the multiple output regions 304 and / or input region 302 may be disposed proximate a side of the dispersion region 330 adjacent the first side 331 and / or the second side 333). In one embodiment, the first output region 304-A is separated from the second output region 304-B ​​by a separation distance 306 corresponding to less than 50 μm, less than 30 μm, less than 10 μm, less than 5 μm, less than 2 μm, less than about 1.1 μm, etc.

[0038] It should be noted that the first and second materials of the dispersion region 330 are positioned and shaped within the dispersion region 330 such that the material interface pattern is substantially proportional to a design obtained by an inverse design process (e.g., see FIG. 6 ), which is discussed in more detail later in this disclosure. More specifically, in some embodiments, the inverse design process can include iterative optimization of the design (e.g., gradient-based or otherwise) based at least in part on a loss function that incorporates performance losses (e.g., to perform function) and manufacturing losses (e.g., to perform manufacturability and binarization of the first and second materials), which are collectively reduced or iteratively adjusted until a design within target specifications that is also manufacturable is obtained. In the same or other embodiments, other optimization techniques can be used in place of or in conjunction with gradient-based optimization. Advantageously, this enables optimization of a nearly unlimited number of design parameters to achieve function and performance within a given area that may not have been possible with traditional design techniques.

[0039] In one embodiment, dispersion region 330 is an optical cavity having a fixed area of ​​less than 100 μm×100 μm, less than 35 μm×35 μm, etc. In the same or other embodiments, dispersion region 330 has a fixed area greater than 3 μm×3 μm. In some embodiments, dispersion region 330 has a width 325 of less than 100 μm, less than 50 μm, less than 35 μm, less than 20 μm, less than 10 μm, less than 5 μm, about 3.2 μm, etc. In the same or other embodiments, dispersion region 330 has a length 327 of less than 100 μm, less than 50 μm, less than 35 μm, less than 10 μm, about 6.4 μm, etc. As illustrated, dispersion region 330 has a square area with width 325 substantially equal to length 327 (e.g., with at least 1%, 5%, or 10%). However, in other embodiments, dispersion region 330 may have different lengths and widths (e.g., rectangular, octagonal, circular, oval, etc.). For example, in one embodiment, width 325 and length 327 of dispersion region 330 may be 3.2 μm and 6.4 μm, respectively. In some embodiments, input region 302 and each of multiple output regions 304 may have a common width (e.g., parallel to the direction of width 325) that may correspond to less than 1 μm, less than 0.5 μm, about 0.4 μm, etc.

[0040] 3B illustrates a vertical schematic view of various layers included in the illustrated embodiment of optical deinterleaver 317 illustrated in FIG. 3A, or a stack thereof. However, it is understood that the illustrated embodiments are not exhaustive and that certain features or elements may be omitted to avoid obscuring certain aspects of the invention. In the illustrated embodiment, optical deinterleaver 317 includes substrate 302, dielectric layer 304, active layer 306 (e.g., as shown in the cross-sectional illustration of FIG. 3A), and cladding layer 308. In some embodiments, optical deinterleaver 317 may be a photonic integrated circuit or a silicon photonic device that is partially or otherwise compatible with conventional fabrication techniques (e.g., photolithography, electron beam lithography, sputtering, thermal evaporation, physical vapor deposition, chemical vapor deposition, etc.).

[0041] In one embodiment, a silicon-on-insulator (SOI) wafer may be provided that includes sequentially stacked layers including a support substrate (e.g., a silicon substrate), a silicon dioxide layer, and a silicon layer (e.g., doped silicon, undoped silicon, etc.). The support substrate of the SOI wafer may correspond to substrate 302. The silicon dioxide layer of the SOI wafer may correspond to dielectric layer 304. The silicon layer of the SOI wafer may be selectively etched by lithographically creating a pattern on the SOI wafer (e.g., directly on the silicon layer), which is transferred to the SOI wafer via a dry etching process (e.g., via a photoresist mask or any other mask) to remove portions of the silicon layer. The etched portions of the silicon layer included in the SOI wafer may then be backfilled with silicon dioxide and planarized to form a patterned layer of silicon and silicon dioxide that may collectively correspond to active layer 306. An oxide layer (e.g., silicon dioxide, etc.) may be grown, deposited, or otherwise provided on the etched / backfilled silicon layer of the SOI wafer, which may correspond to the cladding layer 308. It is understood that during the etching process, silicon in the active layer 306 may be selectively etched down to the dielectric layer 304 to form voids, which may then be backfilled with silicon dioxide, planarized, and then further encapsulated with silicon dioxide to form the cladding layer 308. In one embodiment, forming the active layer 306 may include several etching depths, including a full etching depth of the silicon to obtain the target structure. In one embodiment, the silicon may be 220 nm thick, and therefore the full etching depth may be at least 220 nm. In some embodiments, forming the optical deinterleaver 317 may include a two-step encapsulation process in which two silicon dioxide depositions are performed with intermediate chemical-mechanical planarization used to result in a flat surface of the active layer 306.

[0042] 3C illustrates a more detailed view of the active layer 306 (relative to FIG. 3B) along a portion of the peripheral region 322, including the input region 302 of FIG. 3A. In the illustrated embodiment, the active region 306 includes a first material 332 having a refractive index of ε1 and a second material 334 having a refractive index of ε2, different from ε1. The homogeneous regions of the first material 332 and the second material 334 may form a waveguide or portions of a waveguide corresponding to the input region 302 and the multiple output regions 304, as illustrated in FIGS. 3A and 3C.

[0043] 3D illustrates a more detailed view of the active layer 306 (relative to FIG. 3B) along the dispersion region 330. As explained above, the dispersion region 306 includes a first material 332 (e.g., silicon) and a second material 334 (e.g., silicon dioxide) heterogeneously interspersed to form a plurality of interfaces 336 that collectively form a material interface pattern to provide the target function of the optical deinterleaver 317.

[0044] FIG. 4A illustrates an exemplary schematic diagram of a photonic integrated circuit 450 including an optical deinterleaver 417 and a demultiplexer 419, according to one embodiment of the present disclosure. The photonic integrated circuit 450 is one possible implementation of the photonic integrated circuit 250 illustrated in FIG. 2A and may also be included in the optical communication device 101-A illustrated in FIG. 1A. More specifically, the diagram illustrated by FIG. 4A corresponds to a cross-sectional view of an active layer (e.g., the active layer 306 illustrated in FIG. 3B) included in the photonic integrated circuit 450. As illustrated, the photonic integrated circuit 450 includes a first material (e.g., represented by the white area and may correspond to silicon) and a second material (e.g., represented by the black area and may correspond to silicon dioxide). The optical deinterleaver 417 includes a dispersion region 430, which represents one possible design of the dispersion region 230-A illustrated in FIG. 2A or the dispersion region 230-B illustrated in FIG. 2B. Similarly, demultiplexer 419 includes dispersion regions 480-A and 480-B, which represent possible designs of dispersion regions 280-A and 280-B illustrated in FIG. 2A. As illustrated, dispersion region 430 of optical deinterleaver 417 is optically coupled between input region 402 and at least two output regions 404-A and 404-B. Dispersion region 480 (e.g., 480-A or 480-B) is optically coupled between one of the at least two output regions (e.g., 404-A or 404-B) and a corresponding one of output regions 454 (e.g., 454-A1 and 454-A2 or 454-B1 and 454-B2) of demultiplexer 419. It will be appreciated that in some embodiments, a given input region of demultiplexer 419 corresponds to one of at least two output regions 404 (eg, 404-A or 404-B).

[0045] The structure within dispersion region 430 (dispersion regions 480-A and 480-B) is a design resulting from an inverse design process that may utilize iterative optimization (e.g., gradient-based optimization, Markov chain Monte Carlo optimization, or other optimization techniques) combined with first-principles simulation of the underlying physics governing photonic devices to generate a design substantially replicated by dispersion region 430 in a proportional or scalable manner so that photonic integrated circuit 450 provides a target function (e.g., a multistage demultiplexing process in a monolithic photonic integrated circuit). The inverse design process may include manufacturing costs that enforce minimum feature sizes, for example, to ensure the manufacturability of the design. In the embodiment of dispersion region 430 illustrated in FIGS. 4A-4C , the material interface pattern formed by a first material (e.g., white regions) and a second material (e.g., black regions) is configured to enforce minimum feature sizes with specific shapes. In one embodiment, the interfaces formed by the first and second materials may be shaped such that the curvature defining any given radius of curvature formed by the material interfaces within the dispersion region 430 has a magnitude less than a threshold size. For example, if the minimum feature size is 150 nm, the curvature of any of the interfaces may be less than the reciprocal of half the minimum feature size (i.e., 1 / 75 nm -1) has a dimension less than a threshold size corresponding to the minimum feature size. In other embodiments, the minimum feature size may include a minimum feature shape (e.g., square, circle, hexagon, octagon, or any other shape) having a width corresponding to the minimum feature size (e.g., 100 nm, 140 nm, 150 nm, 180 nm, etc.). Accordingly, any portion of the first material and the second material may be structured within the dispersion region 430 such that the dispersion region 430 may be formed (e.g., a design representing the structure may be drawn, painted, or otherwise constructed) using a minimum feature shape (e.g., an octagon) having a width of the minimum feature size. Enforcing such a minimum feature size and / or shape prevents the reverse design process from generating designs that are not manufacturable due to considerations of manufacturing constraints, limitations, and / or yield. In the same or other embodiments, a minimum width or spacing may be implemented as the minimum feature size utilizing different or additional checks on metrics related to manufacturability. It is further understood that similar constraints may be imposed on dispersion regions 480-A and 480-B of demultiplexer 419 according to embodiments of the present disclosure.

[0046] 4B and 4C illustrate more detailed views of the dispersion region 430 included in the optical deinterleaver 417 illustrated in FIG. 4A, in accordance with one embodiment of the present disclosure. More specifically, select features of the dispersion region 430 are explicitly indicated and discussed in FIGS. 4B and 4C. However, in accordance with embodiments of the present disclosure, the same or similar features discussed may also be applied to any optical deinterleaver (e.g., the deinterleaver 117 illustrated in FIG. 1A, the deinterleaver 217-A illustrated in FIG. 2A, the deinterleaver 217-B illustrated in FIGS. 2B, 2D, and 2E, the deinterleaver 217-C illustrated in FIG. 2C, the deinterleaver 317 illustrated in FIG. 3A), and any deinterleaver. It will be understood that the dispersion region of a multiplexer (e.g., demultiplexer 119 illustrated in FIG. 1A, demultiplexers 219-A and 219-B illustrated in FIG. 2A, demultiplexers 219-C, 219-D, 219-E, and 219-F illustrated in FIG. 2D, and demultiplexers 219-G and 219-H illustrated in FIG. 2E) or a filter (e.g., filter 297 illustrated in FIG. 2E) may also be included.

[0047] Referring again to FIG. 4B , dispersed region 430 includes a heterogeneous arrangement of a first material (e.g., white regions) and a second material (e.g., black regions). The term "heterogeneous" means that the arrangement of the first and second materials is not uniform. In other words, the shapes and arrangements of the first and second materials are non-periodic. However, it should be noted that while dispersed region 430 generally has a non-periodic structure, there may be one or more regions with local periodicity (e.g., islands of the first material or second material that are regularly spaced but not of equal size and / or shape). As illustrated in FIG. 4B , the heterogeneous arrangement of the first material and the second material in the dispersion region includes a plurality of first islands 451 (e.g., each island included in the plurality of first islands 451 is formed of a first material), a plurality of second islands 453 (e.g., each island included in the plurality of second islands 453 is formed of a second material), a first continuous path 459 formed of the first material that extends from the input region 402 through the dispersion region 430 to the first output region 404-A. , a second continuous path 461 formed of the first material extending from the input region 402 through the dispersion region 430 to the second output region 404-B, a plurality of protrusions 455 or 457 (e.g., each formed of the first material or the second material and extending from the perimeter region into the dispersion region 430), or at least one dendritic structure (e.g., see dendritic structure 471 illustrated in FIG. 4C , which has alternating widths along the direction indicated by the white arrows). In some embodiments, the first continuous path 459 and the second continuous path 461 overlap within the input region 402 and / or the dispersion region 430.

[0048] 4C illustrates the same view of dispersion region 430, with different features emphasized to avoid obscuring certain aspects of the disclosure. As illustrated, a first group of islands 465 included in the second plurality of islands are arranged along a common direction 463 within dispersion region 430. Similarly, a second group of islands 469 included in the second plurality of islands are arranged along a common direction 467 within dispersion region 430. As illustrated, common direction 463 extends toward first output region 404-A, and common direction 467 extends toward second output region 404-B. In the illustrated embodiment, common direction 463 extends from input region 402 to first output region 404-A, and common direction 467 extends from input region 402 to second output region 404-B. The dispersion region 430 further includes at least one dendritic structure 471 having an alternating width along a first direction (e.g., white arrow proximate at least one dendritic structure 471). In some embodiments, the first direction may extend toward the first output region 404-A or the second output region 404-B.

[0049] It is understood that in some embodiments, the heterogeneous arrangement of the first and second materials within dispersion region 430 lacks overall periodicity. However, in some embodiments, dispersion region 430 may have local periodicity (e.g., a group of islands within the first plurality of islands or the second plurality of islands are regularly spaced apart, but do not necessarily have a common shape, size, or orientation). In the same or other embodiments, each one of the one or more regions forming the local periodicity corresponds to less than 10% of the cross-sectional area of ​​dispersion region 430. For example, in one embodiment, first group of islands 465 may correspond to a region of local periodicity within dispersion region 430.

[0050] Referring again to FIG. 4A, it will be appreciated that in some embodiments, the design of photonic integrated circuit 450, individual components of photonic integrated circuit 450, such as optical deinterleaver 417, demultiplexer 419, any other photonic integrated circuit described herein, and / or their corresponding components may be stored on at least one non-transitory machine-accessible storage medium that provides instructions that, when executed by a machine (e.g., a computer), cause the machine to perform operations to generally reproduce the design for the photonic integrated circuit.

[0051] 5 is a functional block diagram illustrating a system 500 for generating a design of a photonic integrated circuit according to one embodiment of the present disclosure. System 500 can be utilized to perform an inverse design process. More specifically, system 500 is a design tool that can be utilized to optimize structural parameters (e.g., the shape and arrangement of first and second materials within the dispersion region of embodiments described herein) of a photonic integrated circuit (e.g., an optical deinterleaver, demultiplexer, filter, etc.) based on first-principles simulation (e.g., electromagnetic simulation to determine the field response of a photonic device to an excitation source) and iterative optimization. In other words, system 500 can provide a design obtained via the inverse design process that replicates (i.e., proportionally scales) the dispersion region described in various embodiments of the present disclosure.

[0052] As illustrated, system 500 includes a controller 505, a display 507, an input device 509, a communication device 511, a network 513, a remote resource 515, a bus 521, and a bus 523. Controller 505 includes a processor 531, a memory 533, local storage 535, and a photonic device simulator 539. Photonic device simulator 539 includes an operational simulation engine 541, manufacturing loss calculation logic 543, calculation logic 545, an adjoint simulation engine 547, and an optimization engine 549. It should be appreciated that in some embodiments, controller 505 may be a distributed system.

[0053] Controller 505 is coupled to a display 507 (e.g., a light emitting diode display, a liquid crystal display, etc.) coupled to bus 521 through bus 523 for displaying information to a user utilizing system 500 to optimize structural parameters of a photonic device (i.e., a demultiplexer). Input device 509 is coupled to bus 521 through bus 523 for communicating information and command selections to processor 531. Input device 509 may include a mouse, trackball, keyboard, stylus, or other computer peripheral to facilitate interaction between a user and controller 505. In response, controller 505 can provide verification of the interaction through display 507.

[0054] Another device that may optionally be coupled to the controller 505 is a communications device 511 for accessing remote resources 515 of the distributed system via a network 513. The communications device 511 may include any number of networking peripheral devices, such as those used to couple to an Ethernet, the Internet, a wide area network, or the like. The communications device 511 may further include mechanisms that provide connectivity between the controller 505 and the outside world. Note that any or all of the components and associated hardware of the system 500 illustrated in FIG. 5 may be used in various embodiments of the present disclosure. The remote resources 515 may be part of a distributed system and may include any number of processors, memory, and other resources for optimizing structural parameters of a photonic device.

[0055] The controller 505 orchestrates the operation of the system 500 to optimize structural parameters of a photonic device. The processor 531 (e.g., one or more central processing units, graphics processing units, and / or tensor processing units, etc.), the memory 533 (e.g., volatile memory such as DRAM and SRAM, non-volatile memory such as ROM, flash memory, etc.), the local storage 535 (e.g., magnetic memory such as a computer disk drive), and the photonic device simulator 539 are coupled to each other through a bus 523. The controller 505 includes software (e.g., instructions contained in the memory 533 coupled to the processor 531) and / or hardware logic (e.g., an application-specific integrated circuit, a field-programmable gate array, etc.) that, when executed by the controller 505, causes the controller 505 or the system 500 to perform operations. The operations may be based on instructions stored in any one or combination of the memory 533, the local storage 535, the physical device simulator 539, and the remote resources 515 accessed through the network 513.

[0056] In the illustrated embodiment, modules 541-549 of photonic device simulator 539 are utilized to optimize structural parameters of components of a photonic integrated circuit described in embodiments herein. In some embodiments, system 500 may optimize structural parameters of components included in the photonic integrated circuit (e.g., photonic devices corresponding to one or more optical deinterleavers, demultiplexers, filters, etc.) through simulations (e.g., behavioral simulations and adjoint simulations) that utilize, among other things, finite-difference time-domain (FDTD) methods to model field responses (e.g., electromagnetic fields within the photonic integrated circuit). Behavioral simulation engine 541 provides instructions for performing electromagnetic simulations of photonic devices operating in response to excitation sources within a simulation environment. In particular, the behavioral simulations determine field responses of the simulation environment (and thus the photonic devices described by the simulation environment) in response to excitation sources to determine performance metrics of the physical device (e.g., based on an initial photonic device description or input design describing the structural parameters of the photonic device within the simulation environment having multiple voxels). The structural parameters may correspond, for example, to a particular design, material composition, dimensions, etc. of a physical device. Fabrication loss calculation logic 543 provides instructions for determining fabrication losses utilized to enforce minimum feature sizes and / or shapes to ensure manufacturability. In some embodiments, the fabrication losses are also used to enforce binarization of the design (i.e., such that the photonic device includes a first material and a second material interspersed to form multiple interfaces). Calculation logic 545 computes a loss metric based on the performance metric and the fabrication losses, as determined via a loss function incorporating the performance losses.An adjoint simulation engine 547 is utilized in conjunction with the behavioral simulation engine 541 to perform adjoint simulations of the photonic device and back-propagate the loss metric through the simulation environment via a loss function to determine how changes in the structural parameters of the photonic device affect the loss metric. An optimization engine 549 is utilized to update the structural parameters of the photonic device to reduce the loss metric and generate a revised description of the photonic device (i.e., revise the design).

[0057] FIG. 6 illustrates an exemplary method 600 for generating a photonic integrated circuit design according to one embodiment of the present disclosure. Method 600 is one possible inverse design process for generating any one of the components of a photonic integrated circuit described herein (e.g., an optical deinterleaver, a demultiplexer, a filter, etc.). It is understood that method 600 is an inverse design process that may be achieved by performing operations in a system (e.g., system 500 of FIG. 5 ) to perform an iterative optimization of a loss metric determined from a loss function including performance loss and manufacturing loss. In the same or other embodiments, method 600 may be included as instructions provided by at least one machine-accessible storage medium (e.g., a non-transitory memory) that, when executed by a machine, cause the machine to perform operations to generate a photonic integrated circuit design. It is further understood that the order in which some or all of the process blocks appear in method 600 should not be considered limiting. Rather, one skilled in the art with the benefit of this disclosure will understand that some of the process blocks may be performed in various orders not illustrated, or even in parallel.

[0058] Block 610 illustrates configuring a simulation environment representing a received or otherwise obtained initial description of a photonic integrated circuit component (e.g., a photonic device). In some embodiments, the photonic integrated circuit component may be expected to have a particular function after optimization (e.g., perform as an optical deinterleaver). The initial description may describe structural parameters of the photonic integrated circuit within the simulation environment. The simulation environment may include a plurality of voxels that collectively describe the structural parameters of the photonic device. Each of the plurality of voxels is associated with a structural value describing the structural parameter, a field value describing a field response (e.g., electric and magnetic fields in one or more orthogonal directions) to a physical stimulus (e.g., one or more excitation sources), and a source value describing the physical stimulus. Once the initial description is received or otherwise obtained, the simulation environment is configured (e.g., the number of voxels, the shape / arrangement of the voxels, and specific values ​​of the voxel's structural, field, and / or source values ​​are set based on the initial description). In some embodiments, the initial description may be a first description of a physical device, and the values ​​of the structural parameters may be random or null values ​​outside the input and output domains so as to avoid bias toward the initial (e.g., first) design. It is understood that the initial description or input design may be relative terms. Thus, in some embodiments, the initial description may be a first description of a physical device described within the context of a simulation environment (e.g., a first input design for performing a first operational simulation).

[0059] However, in other embodiments, the term initial description may refer to an initial description of a particular cycle (e.g., performing operational simulation, running adjoint simulation, and updating structural parameters). In such embodiments, the initial description or design of that particular cycle may correspond to a revised description or refined design (e.g., generated from a previous cycle). In one embodiment, the simulated environment includes a design domain (e.g., representing a dispersion domain discussed throughout this disclosure) that includes a portion of a plurality of voxels having structural parameters that may be updated, revised, or otherwise altered to optimize the structural parameters of the photonic device. In the same or other embodiments, the structural parameters are related to the geometric boundaries and / or material composition of the physical device based on material properties (e.g., dielectric constant, refractive index, etc.) of the situational environment.

[0060] In one embodiment, the simulation environment includes a design domain optically coupled between a first communication domain and a plurality of second communication domains. In some embodiments, the first communication domain may correspond to an input domain or port (e.g., where an excitation source originates), while the second communication domain may correspond to a plurality of output domains or ports (e.g., when designing an optical deinterleaver that optically separates an input signal received at an input port into a plurality of multi-channel optical signals that are each directed to a corresponding one of the output domains).

[0061] Block 615 indicates mapping each of a plurality of channels characterized by distinct wavelengths to a respective output region of a plurality of second communication regions to form a plurality of multi-channel optical signals. The distinct wavelength channels may be mapped to the second communication regions according to an initial description of the photonic device. For example, a loss function may be selected that relates a performance metric of the photonic device to power transmission from the input port of the mapped channel to each output port. In one embodiment, the plurality of second communication regions includes two second communication regions, and the plurality of channels included in the optical signal includes at least four channels, with groups of two channels each mapped to a corresponding one of the two communication regions. In the same or other embodiments, the channels may be mapped in wavelength order such that optimization of the design region implements separation of odd and even channels into different output regions. In other embodiments, there may be a different number of second communication regions (e.g., three regions, four regions, etc.) and a different number of channels (e.g., eight channels, 12 channels, etc.) mapped to each communication region of the second communication regions.

[0062] Block 620 illustrates performing an operational simulation of a photonic integrated circuit within a simulation environment operating in response to one or more excitation sources to determine performance metrics. More specifically, an electromagnetic simulation is performed in which the field response of the photonic integrated circuit is incrementally updated over multiple time steps to determine how the field response of the photonic device changes due to the excitation sources. Field values ​​of multiple voxels are updated in response to the excitation sources based at least in part on structural parameters of the integrated photonic circuit. Additionally, each update operation at a particular time step may also be based at least in part on a previous (e.g., immediately preceding) time step.

[0063] As a result, the operational simulation simulates the interaction between the photonic device (i.e., the photonic integrated circuit) and the physical stimulus (i.e., one or more excitation sources) to determine a simulated output of the photonic device (e.g., at one or more of the output ports or regions) in response to the physical stimulus. The interaction may correspond to any one or combination of perturbations, retransmissions, attenuation, dispersion, refraction, reflection, diffraction, absorption, scattering, amplification, or other perturbations of the physical stimulus in the electromagnetic domain due at least in part to the structural parameters of the photonic device and the underlying physics governing the operation of the photonic device. Thus, the operational simulation simulates how the field response of the simulation environment changes due to the excitation source over multiple time steps (e.g., from an initial time step to a final time step having a predetermined step size).

[0064] In some embodiments, the simulated output may be utilized to determine one or more performance metrics of the photonic integrated circuit. For example, the excitation source may correspond to a selected one of a plurality of channels mapped to one of a plurality of second communication regions. The excitation source may begin at or be disposed proximate to the first communication region (i.e., input port) when performing the operational simulation. Then, during the operational simulation, the field response of the second communication region (e.g., output port) mapped to the selected one of the plurality of channels may be utilized to determine the simulated power transmission to the photonic integrated circuit of the selected channel. In other words, the operational simulation may be utilized to determine the performance metrics, including determining the simulated power transmission of the excitation source from the first communication region, through the design region, to each of the plurality of second communication regions mapped to the selected one of the plurality of channels. In some embodiments, the pump source may cover the entire spectrum of the multiple output ports (e.g., the pump source spans a target frequency range of at least the passband region of each of the multiple channels and at least a portion of the corresponding stopband region) to determine a performance metric (i.e., simulated power transfer) associated with each of the distinct wavelength channels of the photonic integrated circuit. In some embodiments, one or more frequencies spanning the passband of a given one of the multiple channels are selected randomly to optimize batch gradient descent while having the full width of each passband, including ripples within the passband, meet target specifications. In the same or other embodiments, each of the multiple channels has a common bandwidth with a different center wavelength.

[0065] Block 625 depicts determining a loss metric based on a performance loss associated with the performance metric and a manufacturing loss associated with the minimum feature size. In some embodiments, the loss metric is determined via a loss function that includes both the performance loss and the manufacturing loss as inputs. The performance loss may correspond to a difference between the performance metric and a target performance metric of the photonic integrated circuit. In some embodiments, a minimum feature size for a design region of the simulation environment may be provided to facilitate manufacturability of a design generated by the inverse design process. The manufacturing loss is based at least in part on the minimum feature size and structural parameters of the design region. More specifically, the manufacturing loss enforces the minimum feature size of the design such that the design region does not have structural elements with diameters less than the minimum feature size. This helps the system provide designs that meet specific manufacturability and / or yield requirements. In some embodiments, the manufacturing loss also helps enforce binarization of the design (i.e., rather than mixing first and second materials together to form a third material, the design includes regions of the first and second materials arranged in a heterogeneous manner). In the same or other embodiments, the minimum feature size may include a minimum feature shape.

[0066] In some embodiments, the design generated by the inverse design process optimizes at least one of a first material (e.g., first material 332 in FIG. 3C ) or a second material (e.g., second material 334 in FIG. 3A ) structured within a design domain (e.g., dispersion domain 330 in FIG. 3A ) to be generally reproducible by a feature having a predetermined width. For example, the shape and arrangement of the first material and / or second material within the design domain may be reproduced (e.g., drawn) using a brush having a size corresponding to the feature and a width corresponding to the predetermined width. In one embodiment, the feature includes at least one of a circle, a square, a hexagon, an octagon, or any other shape. In some embodiments, the feature is a single shape that can be rotated, mirrored, and / or overlapped with a portion of another feature. For example, if the feature is an octagon, two overlapping octagons each corresponding to the feature may partially overlap each other to generate a different shape. In other embodiments, the feature may be only a non-overlapping, tileable unit (i.e., an indivisible unit of the design). In the same or other embodiments, the predetermined width of the feature can be between 20 nm and 200 nm. For example, the predetermined width of the feature can be 100 nm, 140 nm, 180 nm, etc. In some embodiments, the feature and the predetermined width of the feature correspond to the minimum feature size of the design. For example, the first material (e.g., the white region) of dispersion region 430 in FIG. 4A can be roughly represented by an octagon having a width of 100 nm.

[0067] Referring again to FIG. 6 , in some embodiments, manufacturing loss is determined by generating a convolution kernel (e.g., circular, square, octagonal, etc.) having a width equal to the minimum feature size. The convolution kernel is then shifted through the design domain of the simulation environment to determine voxel locations within the design domain (i.e., individual voxels) that fit the convolution kernel within the design domain without extending beyond the design domain. The convolution kernel is then convolved at each voxel location with a structural parameter associated with the voxel location to determine a first manufacturing value. The structural parameter is then inverted, and the convolution kernel is again convolved at each voxel location with the inverted structural parameter to determine a second manufacturing value. The first and second manufacturing values ​​are then subsequently combined to determine manufacturing loss for the design domain. This process of determining manufacturing loss may encourage structural elements of the design domain to have a curvature less than a threshold size (i.e., the inverse of half the minimum feature size).

[0068] Block 630 illustrates backpropagating the loss metric via the loss function through the simulation environment to determine the effect of structural parameter changes (i.e., structural gradients) on the loss metric. The loss metric is treated as an adjoint or virtual source and is incrementally backpropagated from the final time step to earlier time steps in the backward simulation to determine the structural gradients of the photonic device.

[0069] Block 635 indicates modifying the design of the photonic integrated circuit (e.g., generating a revised description) by updating the structural parameters to adjust the loss metric. In some embodiments, adjusting the loss metric may reduce the loss metric. However, in other embodiments, the loss metric may be adjusted or otherwise compensated for in a manner that does not necessarily reduce the loss metric. In one embodiment, adjusting the loss metric may also maintain manufacturability while providing a general direction in the parameterization space to ultimately obtain a design that results in improved performance while maintaining the device's manufacturability and target performance metric. In some embodiments, the revised description is generated by utilizing an optimization scheme after cycles of adjoint simulation and operation via a gradient descent algorithm, a Markov chain Monte Carlo algorithm, or other optimization technique. In other words, the iterative cycle of simulating the photonic integrated circuit, determining the loss metric, backpropagating the loss metric, and updating the structural parameters to adjust the loss metric may be performed continuously until the loss metric substantially converges such that the difference between the performance metric and the target performance metric is within a threshold range, while also taking into account binarization due to manufacturability and manufacturing losses. In some embodiments, the term "converge" may simply indicate that the difference is within a threshold range and / or is below some threshold.

[0070] Block 640 illustrates determining whether the loss metric substantially converges such that the difference between the performance metric and the target performance metric is within a threshold range. An iterative cycle of simulating the photonic integrated circuit with a pump source selected from a plurality of distinct wavelength channels, back-propagating the loss metric, and revising the design by updating structural parameters to reduce the loss metric until the loss metric substantially converges such that the difference between the performance metric and the target performance metric is within a threshold range. In some embodiments, structural parameters of the design domain of the integrated photonic circuit are revised when the cycle of causing the photonic integrated circuit design domain to separate the optical signal into a plurality of multi-channel signals that are guided to respective ones of a plurality of second communication domains based on the mapping of block 615 is performed.

[0071] Block 645 illustrates outputting an optimized design of the photonic integrated circuit in which the structural parameters have been updated such that the difference between the performance metric and the target performance metric is within a threshold range, while also performing minimum feature size and binarization.

[0072] The processes described above are described with reference to computer software and hardware. The described techniques may constitute machine-executable instructions embodied in a tangible or non-transitory machine (e.g., computer) readable storage medium that, when executed by a machine, causes the machine to perform the described operations. Furthermore, the processes may be embodied in application specific integrated circuits ("ASICs") or other hardware, such as

[0073] A tangible, machine-readable storage medium includes any mechanism that provides (i.e., stores) information in a non-transitory form accessible by a machine (e.g., a computer, a network device, a personal digital assistant, a manufacturing tool, any device with a set of one or more processors, etc.). For example, machine-readable storage media include recordable and non-recordable media (e.g., read only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, etc.).

[0074] The above description of illustrated embodiments of the present invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise form disclosed. While specific embodiments of and examples for the present invention have been described herein for illustrative purposes, those skilled in the art will recognize that various modifications are possible within the scope of the present invention.

[0075] These modifications can be made to the invention in light of the above detailed description. In general, the terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed herein. Rather, the scope of the invention should be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.

Claims

1. 1. A photonic integrated circuit comprising: an optical deinterleaver, an input region adapted to receive an optical signal including a plurality of channels, each characterized by a distinct wavelength; a dispersive region optically coupled to the input region to receive the optical signal, the dispersive region comprising a heterogeneous arrangement of a first material and a second material, the heterogeneous arrangement of the first material and the second material within the dispersive region forming a plurality of interfaces that collectively form a material interface pattern to structure the dispersive region to separate the optical signal into a plurality of multi-channel optical signals, including a first multi-channel optical signal and a second multi-channel optical signal; at least two output regions, including a first output region and a second output region, optically coupled to the dispersion region and physically separated from the input region, the first output region positioned to receive the first multi-channel optical signal and the second output region positioned to receive the second multi-channel optical signal; 2. A photonic integrated circuit comprising:

2. 2. The photonic integrated circuit of claim 1, wherein the plurality of channels includes odd and even channels when the plurality of channels are sequentially arranged according to the distinct wavelengths, and wherein the dispersion region separately directs the odd and even channels to respective ones of the at least two output regions.

3. The photonic integrated circuit of claim 1 , wherein the dispersive region of the optical deinterleaver has a fixed area laterally surrounded by a perimeter region formed of the second material.

4. The optical deinterleaver a first continuous path formed of the first material extending from the input region through the dispersion region to the first output region; 4. The photonic integrated circuit of claim 3, further comprising: a second continuous path formed of the first material extending from the input region through the dispersive region to the second output region, the first continuous path and the second continuous path overlapping within the input region.

5. 4. The photonic integrated circuit of claim 3, wherein the second material included in the circumferential region of the optical deinterleaver proximate to the dispersion region extends continuously around the dispersion region except for the input region and the at least two output regions.

6. The non-homogeneous arrangement of the first material and the second material within the dispersion region comprises: a plurality of first islands, each formed of the first material and surrounded by the second material; a plurality of second islands, each formed from the second material and surrounded by the first material; a plurality of protrusions, each formed from the second material, extending from the perimeter region into the dispersion region; or at least one dendritic structure having an alternating width along a first direction; The photonic integrated circuit of claim 3 , comprising at least one of:

7. The photonic integrated circuit of claim 6 , wherein a group of islands included in the first plurality of islands or the second plurality of islands are arranged along a common direction within the dispersion region.

8. The photonic integrated circuit of claim 7 , wherein the common direction extends from the input region to the first output region or the second output region.

9. The photonic integrated circuit of claim 1 , wherein the non-homogeneous arrangement of the first and second materials within the dispersive region lacks overall periodicity.

10. 10. The photonic integrated circuit of claim 9, wherein the non-uniform arrangement of one or more regions within the dispersion region has a local periodicity, each one of the one or more regions corresponding to less than 10% of a cross-sectional area of ​​the dispersion region.

11. a first demultiplexer optically coupled to the first output region of the optical deinterleaver to demultiplex the first multi-channel optical signal; 10. The photonic integrated circuit of claim 1, further comprising: a second demultiplexer optically coupled to the second output region of the optical deinterleaver to demultiplex the second multi-channel optical signal.

12. 12. The photonic integrated circuit of claim 11, wherein the first demultiplexer and the second demultiplexer each include a respective dispersion region, the respective dispersion region including a corresponding non-homogeneous arrangement of the first material and the second material to structure the respective dispersion region to separate the first multi-channel optical signal or the second multi-channel optical signal into individual channels included in the plurality of channels.

13. 13. The photonic integrated circuit of claim 12, wherein the first demultiplexer and the second demultiplexer are each four-channel demultiplexers.

14. 12. The photonic integrated circuit of claim 11, further comprising a first intermediate deinterleaver optically coupled between the dispersive region of the optical deinterleaver and the first demultiplexer, the first intermediate deinterleaver configured to separate the first multi-channel optical signal received from the dispersive region of the optical deinterleaver into two or more reduced multi-channel optical signals.

15. a second intermediate deinterleaver optically coupled between the dispersive region of the optical deinterleaver and the second demultiplexer; a third demultiplexer, wherein the first intermediate deinterleaver is optically coupled between the dispersive region of the optical deinterleaver and the third demultiplexer; 15. The photonic integrated circuit of claim 14, further comprising: a fourth demultiplexer, wherein the second intermediate deinterleaver is optically coupled between the dispersive region of the optical deinterleaver and the fourth demultiplexer.

16. 16. The photonic integrated circuit of claim 15, wherein the optical deinterleaver, the first intermediate deinterleaver, the second intermediate deinterleaver, the first demultiplexer, the second demultiplexer, the third demultiplexer, and the fourth demultiplexer form a monolithic structure contained in or on a substrate material.

17. 12. The photonic integrated circuit of claim 11, further comprising: a filter optically coupled to the first demultiplexer to receive a demultiplexed first channel from the first multi-channel optical signal and to substantially attenuate light outside the first channel, the first demultiplexer being optically coupled between the filter and the dispersive region of the optical deinterleaver.

18. The photonic integrated circuit of claim 1 , wherein the non-homogeneous arrangement of the first material and the second material within the dispersive region of the optical deinterleaver is substantially proportional to a design obtainable in an inverse design process.

19. at least one non-transitory machine-accessible storage medium providing instructions that, when executed by a machine, cause the machine to perform operations for generally reproducing a design for a photonic integrated circuit, the photonic integrated circuit comprising: an optical deinterleaver, the optical deinterleaver comprising: an input region adapted to receive an optical signal including a plurality of channels, each characterized by a distinct wavelength; a dispersive region optically coupled to the input region to receive the optical signal, the dispersive region comprising a heterogeneous arrangement of a first material and a second material, the heterogeneous arrangement of the first material and the second material within the dispersive region forming a plurality of interfaces that collectively form a material interface pattern to structure the dispersive region to separate the optical signal into a plurality of multi-channel optical signals, including a first multi-channel optical signal and a second multi-channel optical signal; at least two output regions, including a first output region and a second output region, optically coupled to the dispersion region and physically separated from the input region, the first output region positioned to receive the first multi-channel optical signal and the second output region positioned to receive the second multi-channel optical signal; At least one non-transitory machine-accessible storage medium, including:

20. 20. The at least one non-transitory machine-accessible storage medium of claim 19, wherein the plurality of channels includes odd and even channels when the plurality of channels are sequentially arranged according to the distinct wavelengths, and the dispersion region of the optical deinterleaver separately directs the odd and even channels to respective ones of the at least two output regions.

21. the design of the photonic integrated circuit a first demultiplexer optically coupled to the first output region of the optical deinterleaver to demultiplex the first multi-channel optical signal; a second demultiplexer optically coupled to the second output region of the optical deinterleaver to demultiplex the second multi-channel optical signal; 20. The at least one non-transitory machine-accessible storage medium of claim 19, further comprising: a first intermediate deinterleaver optically coupled between the dispersion region of the optical deinterleaver and the first demultiplexer, the first intermediate deinterleaver configured to separate the first multi-channel optical signal received from the dispersion region of the optical deinterleaver into two or more reduced multi-channel optical signals, each of the two or more reduced multi-channel optical signals comprising at least two channels included in the plurality of channels.

22. The optical deinterleaver included in the design of the photonic integrated circuit comprises: a peripheral region of the optical deinterleaver formed of the second material that laterally surrounds the fixed area of ​​the dispersion region; a first continuous path formed of the first material extending from the input region through the dispersion region to the first output region; 20. The at least one non-transitory machine-accessible storage medium of claim 19, further comprising: a second continuous path formed of the first material extending from the input region through the dispersion region to the second output region, wherein the first continuous path and the second continuous path overlap within the input region.

23. The photonic integrated circuit design according to claim 22, wherein the optical deinterleaver comprises: a peripheral region formed of the second material laterally surrounding the fixed area of ​​the dispersion region; The non-homogeneous arrangement of the first material and the second material within a dispersion region of the optical deinterleaver included in the design of the photonic integrated circuit comprises: a plurality of first islands, each formed of the first material and surrounded by the second material; a plurality of second islands, each formed from the second material and surrounded by the first material; a plurality of protrusions, each formed from the second material, extending from the perimeter region into the dispersion region; or at least one dendritic structure having an alternating width along a first direction; 20. The at least one non-transitory machine-accessible storage medium of claim 19, further comprising at least one of:

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