Atomic layer etching equipment with a structure that reduces substrate damage

Abstract

To provide an atomic layer etching device with a structure that reduces substrate damage.SOLUTION: The present invention relates to an atomic layer etching device with a structure that reduces substrate damage. The atomic layer etching device includes a showerhead 11 that guides plasma generated from a remote plasma source (RPS) into a chamber (C), a ceramic sheet 12 that is disposed on the upper surface of a support block (SB) on which a wafer (W) is fixed and has multiple grooves (G_1 to G_N) formed therein, a temperature control block 16 that is disposed below the ceramic sheet 12, and a DC application pin 15 whose end protrudes into at least one of the multiple grooves (G_1 to G_N).SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This research was conducted with funding from the Republic of Korea government (Ministry of Science and ICT, Ministry of Trade, Industry and Energy) and support from the Next Generation Smart Semiconductor Development Corporation (RS-2024-00407627, Development of high-productivity and low-damage hybrid atomic layer etching equipment for deep trench silicon below 10nm level).

[0002] The present invention relates to an atomic layer etching apparatus having a structure for reducing substrate damage, and more particularly to an atomic layer etching apparatus having a structure for reducing substrate damage using remote plasma and DC pulse bias. [Background technology]

[0003] As device integration becomes more advanced, expectations and requirements for dry etching are becoming more challenging. In the case of logic devices, Fin Field Effect Transistors (FinFETs) have already been commercialized, and Gate All Around (GAA) is being considered as the next-generation device. Pattern sizes have already exceeded 3 nm, reaching the level of several tens of atoms. Conventional reactive ion etching (RIE) technology induces the linearity of ions through plasma and an electric field, resulting in rapid collisions with the target material with very high ion energy, leading to the etching process. This has the disadvantage of ions colliding with the substrate with high energy, causing damage to the substrate surface. Furthermore, conventional etching techniques rely on the interaction between radicals and ions, resulting in simultaneous radical surface adsorption and ion bombardment. This makes it difficult to independently control the radicals and ions, making it extremely difficult to achieve atomic-level processing precision. To address these issues, atomic layer etching (ALE) technology is being actively developed. The ALE process allows for independent control of radical adsorption on the substrate surface and ion irradiation, and is therefore expected to overcome the limitations of conventional dry etching techniques and achieve atomic-level processing precision. Regarding ALE (Atomic Layer Etching), Korean Patent Publication No. 10-2017-0124087 discloses a method and apparatus for processing a semiconductor substrate. Korean Patent Publication No. 10-2020-0116273 also discloses a method for manufacturing a microelectronic workpiece, including forming a patterned structure on the microelectronic workpiece.

[0004] In the ALE process, reactive gases adhere to the surface to be etched and are then removed using ionic or thermal energy. The ALE process removes atoms bonded to the etching layer, creating a physically smooth surface. Furthermore, the ALE process employs a technique for removing thin layers of material using sequential self-limiting reactions, making it one of the most promising technologies for achieving the low process variability required at the atomic level. The first step in the ALE process mechanism is when an etching gas is flowed into the chamber and adsorbs onto the thin film to be etched, causing the reaction to proceed. To increase the adsorption rate, the etching gas often utilizes radicals dissociated in a plasma state. Once the etching gas is sufficiently adsorbed onto the surface of a single thin film layer, self-limitation prevents further adsorption reactions. Step 2 of the process mechanism removes all residual gases except for the etching gas adsorbed on the thin film surface. Step 3 of the process mechanism can be divided into two methods: plasma-based ALE, which bombards low-energy inert ions onto the thin film surface, and thermal ALE, which applies heat to remove the reactive surface layer where the etching gas has adsorbed. In step 3, if the ion or thermal energy is sufficient to remove the chemically modified layer but not enough to etch the underlying bulk material, only the reactive surface layer is removed due to self-limitation. Each method can be selected based on the reactivity characteristics of the surface material and the process profile. Step 4 of the ALE process mechanism, up to the step where the etching by-products are removed from the chamber, constitutes one cycle, and this cycle must be repeated to etch to the desired thickness or depth. The plasma ALE technology has the advantages of improving the adsorption rate using dissociated radicals and etching using ion energy in the removal step, allowing the process to proceed at a low temperature and shortening the process time.However, due to surface damage caused by high-energy plasma and the extremely close spacing between the sputtering threshold voltage of the bulk material and the modified layer, which results in self-limiting behavior, a very precise ion energy control technique is required, but the prior art does not disclose a technique that can meet such requirements.

[0005] The present invention aims to provide a solution to this problem using remote plasma and DC pulse bias, and has the following objectives. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Korean Patent Publication No. 10-2017-0124087 (Lam Research Corporation, published November 9, 2017) Substrate etching using ALE and selective deposition [Patent Document 2] Korean Patent Publication No. 10-2020-0116273 (Tokyo Electron Limited, published October 7, 2020) Atomic layer etching of tungsten or other metal layers Summary of the Invention [Problem to be solved by the invention]

[0007] SUMMARY OF THE INVENTION An object of the present invention is to provide an atomic layer etching apparatus that utilizes remote plasma and DC pulse bias and has a structure that reduces substrate damage. [Means for solving the problem]

[0008] According to a preferred embodiment of the present invention, an atomic layer etching apparatus includes: a showerhead that introduces plasma generated from a remote plasma source into a chamber; a ceramic sheet that is disposed on an upper surface of a support block to which a wafer is fixed and has a plurality of grooves formed therein; a temperature control block that is disposed below the ceramic sheet; and a DC application pin whose end protrudes into at least one of the plurality of grooves.

[0009] According to another preferred embodiment of the present invention, the substrate further includes a gas supply path formed to allow an inert gas to be supplied to the plurality of grooves.

[0010] According to yet another suitable embodiment of the present invention, the end of the DC application pin is housed in a pinhole, and the pinhole is sealed.

[0011] According to yet another preferred embodiment of the present invention, the gas supply path passes through the temperature control block.

[0012] According to yet another suitable embodiment of the present invention, the device may further include a DC pulse bias port for applying a DC pulse voltage to the DC application pin, and the frequency, amplitude, duration, phase, or duty cycle of the pulse power applied through the DC pulse bias port may be controlled.

[0013] According to yet another suitable embodiment of the present invention, the device further includes a lift ring that can be raised and lowered.

[0014] According to yet another suitable embodiment of the present invention, the lift ring is raised during the removal stage of the ALE process.

[0015] According to yet another suitable embodiment of the present invention, the shower head further includes a moving gas wall that is provided above the showerhead and can be raised and lowered.

[0016] According to yet another preferred embodiment of the present invention, there is provided an atomic layer etching apparatus, wherein the DC application pin is capable of contacting the wafer. [Effects of the Invention]

[0017] As semiconductor processes become more miniaturized, there is an increasing demand for etching atomically thin films with high aspect ratios. Accordingly, as technologies related to the ALE process advance, the development of related equipment is also underway. For the ALE process, a technique is required to precisely control the ion energy incident on the substrate using bias power to minimize damage to the substrate. The etching apparatus according to the present invention enables precise control of ion energy using remote plasma and DC bias pulses. The etching apparatus according to the present invention reduces substrate surface damage during the ALE modification step by utilizing remote plasma, and precisely controls the ion energy incident on the substrate by utilizing a DC pulse bias directly applied to the wafer during the removal step. This enables a precise atomic layer etching process without damaging the substrate. The etching apparatus according to the present invention can be applied to, but is not limited to, various substrate etching processes. [Brief explanation of the drawings]

[0018] [Figure 1] 1 is a diagram showing an embodiment of an atomic layer etching apparatus having a structure for reducing substrate damage according to the present invention; [Figure 2] 1 is a diagram illustrating an embodiment in which a self-limiting modification step, which corresponds to one of the ALE processes, is performed in an etching apparatus according to the present invention. [Figure 3] 1 is a diagram showing an embodiment in which a removal process, which corresponds to one of the ALE processes, is performed in an etching apparatus according to the present invention. [Figure 4] 10 is a view showing another embodiment in which a removal process, which corresponds to one of the ALE processes, is performed in an etching apparatus according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, the present invention will be described in detail with reference to the embodiments shown in the accompanying drawings, but the embodiments are for a clear understanding of the present invention and the present invention is not limited thereto. In the following description, components having the same reference numerals in different drawings have similar functions, and therefore, unless necessary for understanding the invention, repeated description will not be provided. Known components will be briefly described or omitted, but should not be understood as being excluded from the embodiments of the present invention.

[0020] FIG. 1 illustrates an embodiment of an atomic layer etching apparatus with a substrate damage reduction structure according to the present invention.

[0021] Referring to FIG. 1, the atomic layer etching apparatus with a substrate damage reduction structure includes a showerhead 11 that guides plasma generated from a remote plasma source (RPS) into the chamber (C); a ceramic sheet 12 that is disposed on the upper surface of a support block (SB) to which a wafer (W) is fixed and has a number of grooves (G_1 to G_N) formed therein; a temperature control block 16 that is disposed below the ceramic sheet 12; and a DC application pin 15 whose end protrudes into at least one of the number of grooves (G_1 to G_N).

[0022] The atomic layer etching apparatus may have a chamber structure, and plasma may be generated from a remote plasma source (RPS) installed outside the chamber. The chamber is evacuated, and a chamber lid is installed on the upper side of the chamber. The remote plasma source (RPS) may have a structure suitable for generating plasma, and plasma may be generated by flowing a gas for plasma generation into the RPS. The generated plasma is guided to the upper side of a showerhead 11 formed inside the chamber through a plasma path (RP) formed to connect the RPS to the upper side of the chamber. The showerhead 11 may function to uniformly guide the introduced plasma to the inside of the chamber or to an electrostatic chuck. An electrostatic chuck, to which a wafer (W) is fixed, is disposed below the showerhead 11. The electrostatic chuck may include a ceramic sheet 12 functioning as a susceptor and a temperature control block 16 formed below the ceramic sheet 12. The ceramic sheet 12 may have a structure on its upper surface to which a wafer (W) is fixed. For example, the ceramic sheet 12 may be in the shape of a disk or cylinder having a certain thickness. The ceramic sheet 12 may be made of various materials, such as ceramic materials. Specifically, the ceramic sheet 12 may be made of alumina ceramic (Al2O3), but is not limited thereto. At least one groove (G_1 to G_N) is formed on the upper surface of the ceramic sheet 12. For example, multiple circular grooves (G_1 to G_N) having different diameters are formed around the center of the ceramic sheet 12, and the different circular grooves (G_1 to G_N) are connected to allow gas flow. At least one plate-shaped heater 13 is disposed inside the ceramic sheet 12 to control the temperature of the ceramic sheet 12 during the etching process. A power supply line for supplying power to the plate-shaped heater 13 extends downward through the ceramic sheet 12 and the temperature control block 16. A heater power port 19 for supplying power to the plate heater 13 for heating may be formed below the temperature control block 16. A DC electrode plate 14 is disposed inside the ceramic sheet 12, and a DC voltage is applied through a DC electrode port 141.The wafer (W) is stably fixed on the upper surface of the electrostatic chuck or ceramic sheet 12 by DC power applied to the DC electrode plate 14 through the DC electrode port 141 .

[0023] The DC application pin 15 is arranged to contact the backside of the wafer (W), thereby applying a DC voltage, preferably a DC pulse voltage, to the wafer (W) during the ALE process. The DC application pin 15 protrudes upward from the bottom of the temperature control block 16, penetrating the temperature control block 16 and through grooves (G_1 to G_N) formed in the ceramic sheet 12. The upwardly protruding end of the DC application pin 15 has a needle shape and contacts the backside of the wafer (W). The lower end of the DC application pin 15 may be located on the bottom of the temperature control block 16 and may form a DC application port 151. The pinhole where the upper end of the DC application pin 15 is located is sealed to maintain a vacuum inside the chamber. For example, DC pulse bias power is applied through the DC application port 151, and the frequency, amplitude, duration, phase, or duty cycle of the applied DC pulse bias power may be controlled. The application of DC pulse bias power and parameter control adjust the energy of ions generated from the remote plasma incident on the wafer (W). For example, during the adsorption step of the ALE process, the wafer (W) is fixed to an electrostatic chuck or ceramic sheet 12, and ions or radicals generated by the remote plasma may cause a self-limited modification reaction process on the wafer (W) surface. Furthermore, ions generated from a remote plasma source (RPS) may be incident on the wafer (W) surface, causing etching through a sputtering reaction on the adsorbed surface. During this process, DC pulse bias power with controlled parameters is applied through the DC application pin 15, efficiently controlling the etching process. This allows the etching process to proceed to a desired width or depth. At least one DC application pin 15 is provided, and the present invention is not limited by the arrangement or number of the DC application pins 15.

[0024] A cooling path (CP) is formed in the temperature control block 16, and cooling water injected through a cooling water injection port 17 is circulated to control the temperature of the ceramic sheet 12. For example, but not limited to, the temperature control block 16 controls the temperature of the ceramic sheet 12 to a temperature range of -40 to 100°C. An inert gas such as He is injected into at least one groove (G_1 to G_N) formed in the ceramic sheet 12, and a gas injection port 18 may be formed in the temperature control block 16 for this purpose. A gas path (GH) may be formed from the gas injection port 18 through the temperature control block 16 and connected to at least one groove (G_1 to G_N). During the ALE process, a gas such as He is injected through the gas injection port 18, and the injected gas flows along the gas path (GH) and is supplied to at least one groove (G_1 to G_N). A plurality of grooves (G_1 to G_N) are formed in a circular shape with different diameters on the upper surface of the ceramic sheet 12, and the grooves (G_1 to G_N) with different diameters are connected to each other to allow gas flow. The grooves (G_1 to G_N) may be formed in various shapes, numbers, or depths, and the present invention is not limited thereto.

[0025] FIG. 2 illustrates an embodiment in which a self-limiting modification step, which corresponds to one of the ALE processes, is performed in an etching apparatus according to the present invention.

[0026] Referring to FIG. 2, a self-limiting modification process corresponding to the ALE process is performed in an etching apparatus. For the self-limiting modification process, a remote plasma generated from a remote plasma source (RPS) is guided into a chamber (C) through a plasma path (RP). A wafer (W) is fixed to the upper surface of a ceramic sheet 12 corresponding to a susceptor, and the wafer (W) is supported by a lift ring 24. The showerhead may include an internal showerhead 23a and an annular external showerhead 23b extending obliquely downward from the frame of the internal showerhead 23a. A hollow, cylindrical internal wall 21a is formed on the lid of the chamber (C), and the internal wall 21a moves up and down along a pair of linear wall guides 21b arranged opposite each other. A pair of drive motors (M1) are provided to operate each linear wall guide 21b, and the internal wall 21a may form a sealed space between the internal showerhead 23a and the chamber lid. A planar heater 22 is disposed above the internal showerhead 23a to adjust the temperature of the internal showerhead 23a and the external showerhead 23b. A power supply port 221 for supplying power to the planar heater 22 is formed on the top of the lid. The temperature of the planar heater 22 is adjusted by supplying power through the power supply port 221, thereby adjusting the temperature of the internal showerhead 23a and the external showerhead 23b. In the self-limiting reforming step, the temperature of the internal showerhead 23a is maintained at 400°C, and the temperature of the external showerhead 23b is maintained at 150°C. The plasma induced above the internal showerhead 23a is uniformly dispersed through the internal showerhead 23a and the external showerhead 23b and then directed above the wafer (W). A pin heater 25 is disposed inside the lift ring 24, and power is supplied to the pin heater 25 through a pin heater power port 251 to adjust the temperature of the lift ring 24. For example, in the self-limiting reforming step, the temperature of the lift ring 24 is maintained at 200°C. The lift ring 24 may have a structure that allows it to be raised and lowered freely, and the lift ring 24 is raised and lowered by raising and lowering the vertical movement unit 27. The lift ring 24 is fixed to the upper end of the vertical movement unit 27, and the vertical movement unit 27 can move along the linear induction gear 26.The lift ring 24 is raised and lowered by a moving means having a rack and pinion gear structure, and the vertical moving unit 27 is raised and lowered along the linear induction gear 26 while being rotated by the moving induction motor M2. The wafer (W) is raised and lowered by the lift ring 24, thereby adjusting the size of the space formed between the showerheads 23a and 23b and the wafer (W). During the self-limiting reforming step, the lift ring 24 is held stationary, thereby fixing the wafer (W) to the upper surface of the ceramic sheet 12. The temperature of the electrostatic chuck or ceramic sheet 12 is adjusted by cooling water flowing along the cooling channels CP formed in the temperature control block 16, and the internal temperature of the chamber C is maintained at 100°C by the internal chamber heater. During the self-limiting reforming step, an adsorption reaction may occur as gases such as NH3, NF3, or Ar come into contact with the wafer (W) along with the plasma. After this adsorption reaction, the removal step may occur. The removal step can be selectively performed using either a thermal method, which corresponds to isotropic etching using an upper heat source while the wafer (W) is elevated by the lift ring 24, or a plasma-based method, which corresponds to anisotropic etching using remote plasma and a DC pulse bias. The atomic layer etching process using remote plasma and a DC pulse involves applying a DC pulse bias to the wafer (W) to adjust the energy of ions incident on the wafer (W). This process is an etching method with a direction in which a desired atomic layer is etched by adjusting the ion energy. The thermal method and the plasma-based method will be described in detail below.

[0027] FIG. 3 illustrates an embodiment in which a removal process, which is one of the ALE processes, is performed in an etching apparatus according to the present invention.

[0028] Referring to FIG. 3, to apply the heat removal method, the pair of lift rings 24 rise, thereby separating the wafer (W) from the ceramic sheet 12 and moving upward. Driven by a pair of movement induction motors (M2), the vertical movement unit 27 operates to move upward along the linear induction gear 26, and the pair of lift rings 24 move upward and contact the lower portion of the external showerhead 23b. This allows the wafer (W) to rise and be positioned below the internal showerhead 26a, thereby forming a removal space between the lower surface of the internal showerhead 26a and the upper surface of the wafer (W). Operation of a pair of drive motors (M1) moves the internal wall 21a below the lid along the linear wall guides 21b, thereby blocking the periphery of the internal showerhead 23a. Operation of the remote plasma source (RPS) is stopped, stopping the flow of plasma through the plasma path (PR), and Ar is introduced into the plasma path (PR). Ar gas guided to the upper side of the internal showerhead 23a is guided through flow holes uniformly formed in the internal showerhead 23a into a removal space formed between the lower surface of the internal showerhead 23a and the upper surface of the wafer (W). The temperatures of the internal showerhead 23a and the external showerhead 23b are maintained at 400°C and 150°C, respectively, by the plate heater 22, and the temperature of the lift ring 24 is controlled by the pin heater 25 to maintain a temperature of 200°C, while the temperature of the lower portion of the wafer (W) can be maintained at 300°C. At the same time, the ambient temperature of the support block (SB), which has the plate heater 13 disposed on its upper portion and the temperature control block 16 installed therein, is maintained at 100°C. Under these conditions, the etching process proceeds while Ar is in contact with the top surface of the wafer (W), and Ar introduced into the removal space for the etching process is introduced to the upper side of the internal showerhead 23a through gaps formed on the side of the removal space or in the middle of the external showerhead 23b, which contacts the lift ring 24, and then moves downward through guide holes uniformly formed in the external showerhead 23b. The heat removal process proceeds under various conditions, and the temperatures presented are merely examples, and the present invention is not limited thereto.As mentioned above, the heat removal method and the plasma-based method can be selectively performed. The plasma-based method will now be described.

[0029] FIG. 4 illustrates another embodiment in which a removal process, which is one of the ALE processes, is performed in an etching apparatus according to the present invention.

[0030] Referring to FIG. 4, to apply a plasma-based method for the ALE process, a wafer (W) is fixed in contact with the upper surface of the ceramic sheet 12. A remote plasma is generated from a remote plasma source (RPS) and guided to the upper side of the internal showerhead 23a through the plasma path (PR). Argon is also guided to the upper side of the internal showerhead 23a. The plasma flows into the chamber (C) through flow holes formed in the internal showerhead 23a, and Argon is guided into the chamber (C) via the internal showerhead 23a and the external showerhead 23b. The temperatures of the internal showerhead 23a and the external showerhead 23b are maintained at 400°C and 150°C, respectively, and the temperature of the lift ring 24 is maintained at 200°C by the pin heater 25. The temperature of the space surrounding the support block SB is maintained at 100°C. Under these conditions, a DC pulse bias power of 1 to 500 V is applied to the DC application pin 15, which is in contact with the lower surface of the wafer (W). Parameters such as the frequency, amplitude, duration, phase, and duty cycle of the applied DC pulse bias power are controlled. This allows atomic layer etching to proceed as desired. Thus, the etching apparatus according to the present invention allows the plasma-based removal process of the ALE process to be performed at a desired level through control of the DC pulse bias power. The removal process can be performed under various conditions by the etching apparatus according to the present invention, and the present invention is not limited thereto.

[0031] Although the present invention has been described in detail above with reference to the embodiments presented, those skilled in the art may make various modifications and alterations without departing from the technical spirit of the present invention by referring to the embodiments presented. The present invention is not limited by such modifications and alterations, but is limited only by the scope of the claims. [Explanation of symbols]

[0032] 11: Shower head 12: Ceramic sheet 15: DC application pin 16: Temperature control block 21a: Moving gas wall 24: Lift Ring 151: DC pulse bias port

Claims

1. a showerhead 11 for directing plasma generated from a remote plasma source (RPS) into the chamber (C); a ceramic sheet 12 having a number of grooves G_1 to G_N formed thereon and disposed on the upper surface of a support block SB on which a wafer W is fixed; a temperature control block 16 disposed below the ceramic sheet 12; a DC application pin 15 having an end protruding into at least one of the grooves G_1 to G_N; An atomic layer etching apparatus comprising:

2. 2. The atomic layer etching apparatus of claim 1, further comprising a gas supply path (GP) formed to supply an inert gas to the plurality of grooves (G_1 to G_N).

3. 2. The atomic layer etching apparatus according to claim 1, wherein an end of the DC application pin is accommodated in a pinhole, and the pinhole is sealed.

4. 3. The atomic layer etching apparatus according to claim 2, wherein the gas supply path (GP) penetrates the temperature control block (16).

5. 2. The atomic layer etching apparatus of claim 1, further comprising a DC pulse bias port 151 for applying a DC pulse voltage to the DC application pin 15, wherein the frequency, amplitude, duration, phase, or duty cycle of the pulse power applied through the DC pulse bias port 151 is controlled.

6. 2. The atomic layer etching apparatus of claim 1, further comprising a lift ring (24) that can be raised and lowered.

7. 7. The atomic layer etching apparatus of claim 6, wherein the lift ring is lifted during the removal step of the ALE process.

8. 2. The atomic layer etching apparatus according to claim 1, further comprising a moving gas wall (21a) that is provided above the shower head (11) and can be raised and lowered.

9. 2. The atomic layer etching apparatus according to claim 1, wherein the DC application pins are capable of contacting the wafer.

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