Circuit boards and power devices

Abstract

Circuit boards and power devices that maintain heat dissipation while improving resistance to thermal cycling Provide chairs. The present invention relates to a ceramic substrate (10) made of a material containing silicon nitride as a main component, and a ceramic substrate (10) made of a material containing silicon nitride as a main component. A bonding layer 20 containing Ti formed on one main surface 12 of the mixed substrate 10, and the bonding layer 2 a conductive layer 30 bonded to the ceramic substrate 10 via a bonding layer 2 The thickness of the circuit board 50 is 0.3 μm or more and 3 μm or less.

Description

Technical Field

[0001] The present invention relates to a circuit board and a power device.

Background Art

[0002] Since silicon nitride has high thermal conductivity and strength, it has attracted attention as an insulating heat dissipation substrate for power modules for inverters mounted in electric vehicles (EVs) and hybrid vehicles (HVs). Conventionally, aluminum nitride has been widely used as an insulating heat dissipation substrate material. However, in the case of power modules for high currents such as EVs, the temperature rises to about 250°C, and a large thermal stress is generated in the substrate due to the difference in thermal expansion from metals such as copper that are joined, and aluminum nitride with low strength has cracks and fractures. Therefore, although the thermal conductivity is inferior to that of aluminum nitride, among general insulating ceramics, silicon nitride has high thermal conductivity and is increasingly being adopted due to its higher strength. The joining of a silicon nitride heat dissipation substrate and a conductor layer is generally performed by a brazing method with a brazing material containing a metal interposed therebetween.

[0003] Patent Document 1 discloses a method for manufacturing a ceramic circuit board and a ceramic circuit board provided with a stress relaxation portion in which two or more independent through-holes reaching a ceramic substrate are arranged on at least one surface or both surfaces of a metal circuit surface and a heat dissipation surface, and in the relationship between the distance (h1) from the circuit end to the through-hole end and the diameter (D) of the through-hole in a straight portion of the circuit shape, (0 <) h1 ≦ 2D, the interval (h2) between adjacent through-holes is such that the metal thickness < h2 < 2D, and moreover, in the end shape of the metal circuit surface, the tangent angle (θ1) of the circuit end and the tangent angle (θ2) inside the through-hole are such that θ2 < θ1 < 90°.

[0004] Patent Document 2 discloses a ceramic circuit board comprising a ceramic substrate, a copper circuit plate, and a brazing filler metal protrusion portion, wherein the copper circuit plate is joined to at least one surface of the ceramic substrate via a brazing filler metal layer containing Ag, Cu, and Ti, and the brazing filler metal protrusion portion is formed by the brazing filler metal layer protruding outward from the side surface of the copper circuit plate, and the total amount of Ti phase and TiN phase in the brazing filler metal protrusion portion is 3 mass% or more, and different from the total amount of Ti phase and TiN phase in the brazing filler metal layer 4b interposed between the ceramic substrate and the copper circuit plate, the brazing filler metal protrusion portion has one or less (including zero) voids each with an area of ​​200 μm2 or less. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-175525 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-207482 Summary of the Invention [Problem to be solved by the invention]

[0006] In both Patent Document 1 and Patent Document 2, the silicon nitride heat dissipation substrate and the conductor layer are joined by brazing. When manufacturing a circuit board by brazing a silicon nitride heat dissipation substrate and a conductor layer, the brazing filler metal must be relatively thick to firmly join the silicon nitride heat dissipation substrate and the conductor layer. However, if the brazing filler metal is too thick, the thermal conductivity of the brazed portion decreases, resulting in poor heat dissipation. On the other hand, if the brazing filler metal is too thin, the risk of interfacial cracks occurring due to thermal cycling increases.

[0007] For these reasons, when using a circuit board in which a silicon nitride heat dissipation substrate and a conductor layer are bonded as a circuit board for a power device, there has been a demand for a circuit board that maintains heat dissipation properties while improving resistance to thermal cycles.

[0008] The present invention has been made in view of the above circumstances, and has an object to provide a circuit board and a power device that have improved resistance to thermal cycles while maintaining heat dissipation properties. [Means for solving the problem]

[0009] (1) In order to achieve the above object, the circuit board of the present invention employs the following means: That is, the circuit board of the application example of the present invention comprises a ceramic substrate made of a material containing silicon nitride as a main component, a bonding layer containing Ti formed on one main surface of the ceramic substrate, and a conductor layer bonded to the ceramic substrate via the bonding layer, and the thickness of the bonding layer is 0.3 μm or more and 3 μm or less. The thickness of the conductor layer is 0.3 mm or more and 1.5 mm or less. do.

[0010] (2) In the circuit board of the application example of (1) above, a diffusion layer containing Ti is present on the bonding layer side of the ceramic substrate, and the thickness of the diffusion layer is 0.2 μm or more and 3 μm or less.

[0011] (3) In the circuit board according to the application example of (1) or (2) above, the bonding layer contains at least one of Si, Cu, and N.

[0012] (4) In addition, in the circuit board of any of the application examples (1) to (3) above, a second bonding layer containing Ti formed on the other main surface opposite to the one main surface of the ceramic substrate, and a second conductor layer bonded to the ceramic substrate via the second bonding layer, wherein the thickness of the second bonding layer is 0.3 μm or more and 3 μm or less. The thickness of the second conductor layer is 0.3 mm or more and 1.5 mm or less. do.

[0013] (5) In the circuit board according to the application example of (4) above, the second conductor layer is bonded to an area of ​​75% or more of the area of ​​the other main surface of the ceramic substrate.

[0014] (6) In addition, in the circuit board of any of the application examples (1) to (5) above, The thickness of the bonding layer is 0.3 μm or more and 1 μm or less. .

[0015] (7) In the circuit board according to the application example of (4) or (5) above, the thermal conductivity of the circuit board in a direction perpendicular to the one main surface is 120 W / mK or more.

[0016] (8) A power device according to an application example of the present invention includes the circuit board according to any one of (1) to (7) above, and a power semiconductor mounted on the conductor layer. [Effects of the Invention]

[0017] According to the circuit board or power device of the present invention, it is possible to provide a circuit board or power device that has improved resistance to thermal cycles while maintaining heat dissipation properties. [Brief explanation of the drawings]

[0018] [Figure 1] 1 is a schematic cross-sectional view showing an example of a circuit board according to a first embodiment. [Figure 2] FIG. 2 is a schematic plan view showing an example of a circuit board according to the first embodiment. [Figure 3] 1 is a schematic partially enlarged cross-sectional view showing an example of a circuit board according to a first embodiment. [Figure 4] FIG. 10 is a schematic cross-sectional view showing an example of a circuit board according to a second embodiment. [Figure 5] FIG. 10 is a schematic bottom view showing an example of a circuit board according to a second embodiment. [Figure 6] FIG. 10 is a schematic partially enlarged cross-sectional view showing an example of a circuit board according to a second embodiment. [Figure 7] 1 is a schematic cross-sectional view showing an example of a power device according to an embodiment. [Figure 8] 1 is a table showing the thickness of each layer, the thermal conductivity, and the results of a thermal cycle test of the circuit boards of Examples and Comparative Examples. [Figure 9] 2(a) and 2(b) are graphs showing the results of SEM-EDX analysis on line AB or line CD drawn on an SEM image of Example 2, respectively. DETAILED DESCRIPTION OF THE INVENTION

[0019] Next, an embodiment of the present invention will be described with reference to the drawings. To facilitate understanding of the description, the same reference numerals are used to designate the same components in the drawings, and duplicated descriptions will be omitted. Note that in the configuration diagrams, the size of each component is shown conceptually and does not necessarily represent the actual dimensional ratio.

[0020] [Circuit board configuration] (First embodiment) First, a circuit board according to a first embodiment of the present invention will be described. Fig. 1 is a schematic cross-sectional view showing an example of a circuit board 50 according to the first embodiment of the present invention. Fig. 2 is a schematic plan view showing an example of a circuit board 50 according to the first embodiment of the present invention. The circuit board 50 according to the first embodiment of the present invention includes a ceramic substrate 10, a bonding layer 20, and a conductor layer 30.

[0021] The ceramic substrate 10 is made of a material containing silicon nitride as a main component. "Containing silicon nitride as a main component" means that the material contains 86 wt% or more of silicon nitride. The ceramic substrate 10 may also contain sialon. The ceramic substrate 10 is formed, for example, in the shape of a flat plate.

[0022] The thickness of the ceramic substrate 10 in the direction perpendicular to one main surface 12 is preferably 220 μm or more and 690 μm or less. This allows a good balance between the strength and heat dissipation of the ceramic substrate 10. If the thickness is smaller than this range, the strength of the ceramic substrate 10 may be reduced. On the other hand, if the thickness is larger than this range, the heat dissipation properties may be reduced.

[0023] The bonding layer 20 is formed on one main surface 12 of the ceramic substrate 10. The bonding layer 20 contains Ti. The thickness of the bonding layer 20 is 0.3 μm or more and 3 μm or less. This improves the heat transfer between the ceramic substrate 10 and the conductor layer 30, and increases the heat dissipation of the circuit board 50.

[0024] The thickness of the bonding layer 20 can be determined by SEM (Scanning Electron Microscope) observation. Specifically, five locations are randomly selected on the polished surface of a cross section perpendicular to one of the main surfaces of the ceramic substrate 10, and a 120 μm × 90 μm field of view is observed at 2000x magnification. Next, the lengths of ten line segments drawn at equal intervals perpendicular to a 100 μm line segment drawn at the interface between the ceramic substrate 10 and the bonding layer 20 are determined. The average of these values ​​is then taken as the thickness of the bonding layer 20.

[0025] The bonding layer 20 preferably contains at least one of Si, Cu, and N. This increases the bonding strength between the ceramic substrate 10 and the conductor layer 30, and increases the resistance to thermal cycles.

[0026] The types of elements contained in the ceramic substrate 10, the bonding layer 20, and the conductor layer 30 can be confirmed by SEM-EDX (scanning electron microscope energy dispersive X-ray spectroscopy).

[0027] The conductor layer 30 is bonded to the ceramic substrate 10 via the bonding layer 20. The conductor layer 30 is preferably made of a metal, more preferably made of a metal containing copper as its main component, and even more preferably made of oxygen-free copper. A metal containing copper as its main component refers to a metal containing 99 wt% or more of copper. The thickness of the conductor layer 30 is preferably 0.2 mm or more and 1.5 mm or less.

[0028] 3 is a schematic partially enlarged cross-sectional view showing an example of the circuit board 50 according to the first embodiment. As shown in FIG. 3, a diffusion layer 14 containing Ti is preferably present on the bonding layer 20 side of the ceramic substrate 10. In this case, the thickness of the diffusion layer 14 is preferably 0.2 μm or more and 3 μm or less. This increases the bonding strength between the ceramic substrate 10 and the conductor layer 30 and improves resistance to thermal cycles.

[0029] The presence of the diffusion layer 14 can be confirmed by SEM observation of the cross section of the bonding interface between the ceramic substrate 10 and the bonding layer 20 of the circuit board 50. The thickness of the diffusion layer 14 can be determined by SEM-EDX analysis along a line drawn on the SEM image of the cross section. Specifically, five locations are randomly selected on the polished surface of a cross section perpendicular to one of the main surfaces of the ceramic substrate 10, and a 120 μm × 90 μm field of view is observed at 2000x magnification. Next, two or more lines perpendicular to the line drawn at the interface between the ceramic substrate 10 and the bonding layer 20 are drawn on the SEM image. The spacing between the lines is preferably equal. Next, line analysis is performed using SEM-EDX along the drawn lines to determine the region where Ti has diffused into the ceramic substrate 10. The diffusion layer 14 is defined as the point from the interface between the ceramic substrate 10 and the bonding layer 20 that first falls below one-tenth of the maximum count number of Ti in the line analysis of the bonding layer 20. The length of the determined region along the line is then measured. The average of these values ​​is then taken as the thickness of the diffusion layer 14. The line set to determine the thickness of the diffusion layer 14 may be an extension of any of the ten line segments used to determine the thickness of the bonding layer 20.

[0030] (Second embodiment) Next, a circuit board according to a second embodiment of the present invention will be described. The circuit board 50 according to the second embodiment has many overlapping portions with the circuit board 50 according to the first embodiment, so only the differences will be described. FIG. 4 is a schematic cross-sectional view showing an example of the circuit board 50 according to the second embodiment of the present invention. FIG. 5 is a schematic bottom view showing an example of the circuit board 50 according to the second embodiment of the present invention. The circuit board 50 according to the second embodiment of the present invention includes a ceramic substrate 10, a bonding layer 20, a conductor layer 30, a second bonding layer 22, and a second conductor layer 32. The configurations of the ceramic substrate 10, the bonding layer 20, and the conductor layer 30 are the same as those of the circuit board 50 according to the first embodiment.

[0031] Second bonding layer 22 is formed on the other main surface 16 opposite one main surface 12 of ceramic substrate 10. Second bonding layer 22 preferably contains Ti. Second bonding layer 22 preferably has a thickness of 0.3 μm or more and 3 μm or less. This improves the heat transfer between ceramic substrate 10 and second conductor layer 32, and increases the heat dissipation of circuit board 50. The method for determining the thickness of second bonding layer 22 is the same as the method for determining the thickness of bonding layer 20. The thickness of second bonding layer 22 may be the same as or different from the thickness of bonding layer 20.

[0032] Second bonding layer 22 preferably contains at least one of Si, Cu, and N. This increases the bonding strength between ceramic substrate 10 and second conductor layer 32 and increases resistance to thermal cycles. The types of atoms contained in second bonding layer 22 can be confirmed by SEM-EDX.

[0033] The second conductor layer 32 is bonded to the ceramic substrate 10 via the second bonding layer 22. The second conductor layer 32 is preferably made of a metal, more preferably made of a metal containing copper as a main component, and even more preferably made of oxygen-free copper. The material of the second conductor layer 32 may be different from the material of the conductor layer 30, but is preferably the same. The thickness of the second conductor layer 32 is preferably 0.2 mm or more and 1.5 mm or less. The thickness of the second conductor layer 32 may be the same as or different from the thickness of the conductor layer 30.

[0034] 5, the second conductor layer 32 is preferably bonded to an area that occupies 75% or more of the area of ​​the other main surface 16 of the ceramic substrate 10. This allows heat to be dissipated efficiently from the second conductor layer 32, improving the heat dissipation performance of the circuit board 50.

[0035] 6 is a schematic, partially enlarged cross-sectional view showing an example of a circuit board 50 according to the second embodiment. A second diffusion layer 18 containing Ti is preferably present on the second bonding layer 22 side of the ceramic substrate 10. In this case, the thickness of the second diffusion layer 18 is preferably 0.2 μm or more and 3 μm or less. This increases the bonding strength between the ceramic substrate 10 and the second conductor layer 32. The thickness of the second diffusion layer 18 may be the same as or different from the thickness of the diffusion layer 14.

[0036] The presence of the second diffusion layer 18 can be confirmed by SEM observation of the cross section of the bonding interface between the ceramic substrate 10 and the second bonding layer 22 of the circuit board 50. The thickness of the second diffusion layer 18 can be determined by SEM-EDX analysis along a line set on the SEM image of the cross section, similar to the method for determining the thickness of the bonding layer 20.

[0037] The thermal conductivity of the circuit board 50 in the direction perpendicular to the one main surface 12 is preferably 120 W / mK or more. This sufficiently improves the heat dissipation properties of the circuit board 50. Note that the thermal conductivity in the direction perpendicular to the one main surface 12 of the circuit board 50 is measured for a circuit board 50 that includes a conductor layer 30 and a second conductor layer 32, such as the circuit board 50 according to the second embodiment.

[0038] The thermal conductivity in the direction perpendicular to one main surface 12 of the circuit board 50 can be measured and calculated by a laser flash method.

[0039] These features allow the circuit board 50 to maintain heat dissipation properties while improving resistance to thermal cycles.

[0040] [Power device configuration] 7 is a schematic cross-sectional view showing an example of a power device according to an embodiment of the present invention. The power device 100 includes a circuit board 50 and a power semiconductor 60. In FIG. 7, the bonding layer 20, the second bonding layer 22, etc. of the circuit board 50 are omitted.

[0041] The circuit board 50 is the above-described circuit board 50. The circuit board 50 has a conductor layer 30 formed on at least one main surface 12 of the ceramic substrate 10. The circuit board 50 may have a second conductor layer 32 formed on the other main surface 16 opposite the one main surface 12.

[0042] A power semiconductor 60 is mounted on the upper side of the conductor layer 30 of the circuit board 50. The power semiconductor 60 and the conductor layer 30 may be joined using solder 52 or the like. The power semiconductor 60 may be, for example, a semiconductor for an EV that flows a large current and is prone to high temperatures. The circuit board 50 of the present invention maintains heat dissipation properties while improving resistance to thermal cycles, and is therefore less likely to crack or break even if a large thermal stress is generated in the ceramic substrate 10 due to the difference in thermal expansion between the ceramic substrate 10 and the joined metal due to high temperatures.

[0043] When the circuit board 50 includes the second conductor layer 32, the heat sink 70 may be bonded to the underside of the second conductor layer 32. The heat sink 70 and the second conductor layer 32 may be bonded using solder 52 or the like.

[0044] The surface of the heat sink 70 opposite to the surface bonded to the second conductor layer 32 may be in contact with the heat dissipation member 80 via grease 72 or the like. The heat sink 70 is preferably made of metal, more preferably made of a metal containing copper as its main component, and even more preferably made of oxygen-free copper. The heat dissipation member 80 preferably has heat dissipation fins formed thereon. The heat dissipation member 80 is preferably made of metal, more preferably made of a metal containing copper or aluminum as its main component.

[0045] [Circuit board manufacturing method] An example of a method for manufacturing the above circuit board is shown below. A general silicon nitride sintered body can be used as the ceramic substrate. The silicon nitride sintered body can be manufactured, for example, by the following method. First, raw material powder for the silicon nitride sintered body is weighed. The raw material powder for the silicon nitride sintered body is a mixture of oxides, carbonates, hydroxides, nitrides, etc. of the elements contained in the silicon nitride sintered body. thing The raw material powder of the silicon nitride sintered body may be, in addition to silicon nitride, for example, magnesium carbonate, calcium carbonate, yttrium oxide, etc.

[0046] Ethanol is added to these raw material powders, and the mixture is wet-mixed and pulverized in a ball mill for, for example, 6 to 60 hours to obtain a slurry. The slurry is dried in a hot water bath or with a spray dryer, etc., to obtain a mixed powder.

[0047] Next, the mixed powder is filled into a mold and pressed uniaxially at a pressure of, for example, 30 MPa to form it into the desired shape. After that, a CIP (cold isostatic pressing) process is performed at a pressure of, for example, 150 MPa to obtain a green body. The obtained green body (CIP pressed body) is placed in a silicon carbide mold with the inside coated with BN, and sintered at a maximum temperature of 1800°C to 1900°C for 5 to 30 hours in a nitrogen atmosphere at 9 atmospheres to obtain a silicon nitride sintered body.

[0048] The resulting silicon nitride sintered body is processed to a predetermined shape and thickness to produce a ceramic substrate. Processing can be performed by, for example, cutting, grinding, polishing, etc. The main surface of the ceramic substrate to which the conductor layer is bonded is preferably polished to a surface roughness Ra of 0.5 μm or less.

[0049] Separately from the manufacture of the ceramic substrate, a plate material of a predetermined thickness that will serve as the conductor layer is prepared. The plate material is preferably made of metal, more preferably made of a metal containing copper as its main component, and even more preferably made of oxygen-free copper. Next, a metal film containing Ti that will serve as the bonding layer is formed on one main surface of the plate material or the ceramic substrate. The metal film can be formed by vapor deposition, sputtering, plating, etc. The thickness of the metal film is preferably 0.3 μm or more and 3 μm or less. If a metal foil of a similar thickness can be prepared, it is not necessary to form the metal film.

[0050] Next, the plate material with the metal film formed thereon and the ceramic substrate are laminated so that the metal film is sandwiched between them. If no metal film is formed, the plate material, metal foil, and ceramic substrate are laminated in that order. Then, the plate material and the ceramic substrate can be bonded by HP treatment (hot pressing) or HIP treatment (hot isostatic pressing). The HP treatment conditions can be, for example, a pressure of 5 MPa to 30 MPa, a maximum temperature of 700°C to 980°C, and a maximum temperature holding time of 10 minutes to 2 hours.

[0051] This manufacturing method makes it possible to manufacture a circuit board that maintains heat dissipation properties and has improved resistance to thermal cycles.

[0052] [Examples and Comparative Examples] Example 1 The raw material powders were weighed out to a total of 94 wt% silicon nitride powder (average particle size 1.4 μm), 3 wt% magnesium carbonate powder (average particle size 2.5 μm), and 3 wt% yttrium oxide powder (average particle size 1.0 μm). Next, the weighed raw material powders were ball milled to obtain a mixed slurry. For ball milling, the raw material powders and ethanol were placed in a resin pot and milled and mixed at 60 rpm for 24 hours using silicon nitride balls. The resulting mixed slurry was dried in a hot water bath to obtain a mixed powder.

[0053] The resulting mixed powder was subjected to powder press molding using uniaxial pressing and CIP to produce a compact. First, the mixed powder was filled into a dedicated mold and then preformed using uniaxial pressing at a pressure of 30 MPa. Next, the preform was placed in a dedicated bag through vacuum suction and subjected to CIP molding at a pressure of 150 MPa. The resulting compact was then fired. The sintering method involved atmospheric firing under a nitrogen gas pressure of 9 atmospheres, with the maximum temperature held at 1900°C for 10 hours. A silicon carbide mold with a BN coating on the inside was used. The fired silicon nitride sintered compact was cut into a size of 100 mm x 100 mm x 0.32 mm and polished to a surface roughness Ra of 0.5 μm or less on the bonding surface of the conductor layer to prepare a ceramic substrate.

[0054] Separately, two oxygen-free copper plates measuring 100 mm × 100 mm × 0.3 mm were prepared. Next, Ti was vapor-deposited to a thickness of 0.3 μm on the bonding surface of each plate to be bonded to the ceramic substrate, to prepare two conductor layers. The conductor layer, ceramic substrate, and conductor layer (second conductor layer) were then stacked in this order and bonded by HP treatment (hot pressing). The pressure was 10 MPa, the maximum temperature was 900°C, and the maximum temperature was maintained for 30 minutes. In this way, the circuit board of Example 1 was produced.

[0055] Example 2 The circuit board of Example 2 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was set to 0.5 μm.

[0056] Example 3 The circuit board of Example 3 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was 1 μm.

[0057] Example 4 The circuit board of Example 4 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was set to 2 μm.

[0058] Example 5 The circuit board of Example 5 was produced under the same conditions as the circuit board of Example 1, except that the thickness of Ti vapor-deposited on the plate material was set to 3 μm.

[0059] (Comparative Example 1) The circuit board of Comparative Example 1 was produced under the same conditions as the circuit board of Example 1, except that Ti was not vapor-deposited on the plate material, but a brazing material containing Ti, Cu, and Ag was applied to a thickness of 15 μm and heated to 800°C for bonding.

[0060] [Various measurements] The obtained circuit boards of the examples and comparative examples were evaluated by the following measurements.

[0061] (Calculation of thermal conductivity) The thermal conductivity of the circuit boards of the examples and comparative examples was determined by a laser flash method at room temperature.

[0062] (heat cycle test) The circuit boards of the examples and comparative examples were placed in a thermal cycle tester and subjected to the following thermal cycle test. One cycle of the thermal cycle test consisted of -40°C for 30 minutes, 25°C for 10 minutes, 130°C for 30 minutes, 25°C for 10 minutes, and then cooled to -40°C. The circuit boards were observed after 500 cycles. Those that had no bulging of the conductor layer or second conductor layer or cracks in the ceramic substrate were judged as passing (◯), and those that had bulging of the conductor layer or second conductor layer or cracks in the ceramic substrate were judged as failing (×).

[0063] (Check the diffusion layer) The circuit board was cut perpendicular to one main surface of the ceramic substrate and polished. The presence of a diffusion layer was confirmed by observing the cross section in an SEM image at 2000x magnification.

[0064] (Measurement of elements contained in each layer) The circuit board was cut perpendicular to one of the main surfaces of the ceramic substrate and polished. Next, SEM images of the cross section were taken at 2000x magnification in five locations. Next, for each SEM image, a straight line was drawn at the interface between the ceramic substrate and the bonding layer, and two lines perpendicular to that line were set. The distance between the two lines was approximately 4 μm. The lines were then analyzed using SEM-EDX to measure the types and relative amounts of elements contained in each layer.

[0065] (result) 8 is a table showing the thickness, thermal conductivity, and thermal cycle test results of each layer of the circuit boards of the examples and comparative examples. Examples 1 to 5, in which the thickness of the bonding layer was 0.3 μm or more and 3 μm or less, had high thermal conductivity and passed the thermal cycle test. In contrast, Comparative Example 1, in which bonding was performed using a conventional brazing material and the bonding layer was thick, had low thermal conductivity and failed the thermal cycle test. This shows that the thickness of the bonding layer is preferably 0.3 μm or more and 3 μm or less.

[0066] When observing the SEM image, the ceramic substrate, bonding layer, and conductor layer were clearly distinguishable due to their different color tones. Furthermore, the SEM-EDX analysis below confirmed that a diffusion layer had formed on the ceramic substrate side of the interface between the ceramic substrate and bonding layer, and that it could be distinguished from the ceramic substrate without a diffusion layer. Therefore, the thickness of the diffusion layer was calculated from the results of the SEM-EDX analysis.

[0067] Figures 9(a) and (b) are graphs showing the results of SEM-EDX analysis of lines AB and CD drawn on SEM images of Example 2, respectively. The dotted lines indicating the interface between the ceramic substrate and the bonding layer and the interface between the bonding layer and the conductor layer in Figures 9(a) and (b) indicate the positions of the interfaces observed in the SEM images. As shown in Figures 9(a) and (b), Ti was confirmed to have diffused from the bonding layer interface observed in the SEM images toward the ceramic substrate. This indicated that Ti was contained in the diffusion layer of the ceramic substrate. The length of the Ti-diffused region from the interface between the ceramic substrate and the bonding layer was measured, and the average value of the values ​​obtained for 10 lines in 5 images was used as the thickness of the diffusion layer. It was also found that Si, Cu, or N was contained in the bonding layer, although this varied depending on the distance from the ceramic substrate and the conductor layer.

[0068] As described above, the circuit board of the present invention has a sufficiently thin bonding layer and a diffusion layer formed in the ceramic substrate, which increases the bonding strength between the ceramic substrate and the conductor layer, and is presumably able to maintain heat dissipation while increasing resistance to thermal cycles.

[0069] From the above results, it was confirmed that the circuit board and power device of the present invention can maintain heat dissipation properties while improving resistance to thermal cycles.

[0070] The present invention is not limited to the above-described embodiments, and various modifications and equivalents are included within the spirit and scope of the present invention. Furthermore, the structure, shape, number, position, size, etc. of the components shown in each drawing are for the convenience of explanation and may be changed as appropriate. [Explanation of symbols]

[0071] 10 Ceramic substrate 12 One main surface 14 Diffusion layer 16 Other main surface 18 Second diffusion layer 20 Bonding layer 22 Second bonding layer 30 Conductor Layer 32 Second conductor layer 50 Circuit Board 52 Solder 60 Power Semiconductors 70 Heat sink 72 Grease 80 Heat dissipation material 100 Power Devices

Claims

1. a ceramic substrate made of a material containing silicon nitride as a main component; a bonding layer containing Ti formed on one main surface of the ceramic substrate; a conductor layer bonded to the ceramic substrate via the bonding layer, The thickness of the bonding layer is 0.3 μm or more and 3 μm or less, The circuit board is characterized in that the thickness of the conductor layer is 0.3 mm or more and 1.5 mm or less.

2. a diffusion layer containing Ti is present on the bonding layer side of the ceramic substrate, 2. The method according to claim 1, wherein the thickness of the diffusion layer is 0.2 μm or more and 3 μm or less. The circuit board described.

3. The bonding layer contains at least one of Si, Cu, and N.

3. The circuit board according to claim 1 or 2.

4. The ceramic substrate includes a first main surface and a second main surface. a second bonding layer; and a second conductor layer bonded to the ceramic substrate via the second bonding layer; and In preparation for the thickness of the second bonding layer is 0.3 μm or more and 3 μm or less; 3. The circuit board according to claim 1, wherein the second conductor layer has a thickness of 0.3 mm or more and 1.5 mm or less.

5. The second conductor layer has an area of ​​75% or more of the area of ​​the other main surface of the ceramic substrate.

5. The circuit board according to claim 4, wherein the circuit board is bonded to the area.

6. A circuit board as described in claim 1 or claim 2, characterized in that the thickness of the bonding layer is 0.3 μm or more and 1 μm or less.

7. The thermal conductivity of the circuit board in a direction perpendicular to the one main surface is 120 W / mK or more.

5. The circuit board according to claim 4.

8. The circuit board according to claim 1 or 2; a power semiconductor mounted on the conductor layer.

Images