Die bonding apparatus, die bonding method, and semiconductor device manufacturing method

The die bonding apparatus uses coaxial lighting and image processing to distinguish glass chips from dicing tape, addressing detection challenges and enhancing productivity by reducing errors and ensuring cleanliness.

JP7804547B2Active Publication Date: 2026-01-22FASFORD TECH
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Patent Information

Application Number
JP2022120952
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-07-28
Publication Date
2026-01-22
Estimated Expiration
2042-07-28

AI Technical Summary

Technical Problem

Existing die bonding technologies face challenges in accurately determining the presence or absence of transparent glass chips on dicing tape, leading to potential pick-up errors and reduced productivity due to the difficulty in distinguishing between the glass chip and the dicing tape using conventional lighting methods.

Method used

A die bonding apparatus equipped with a dome having suction holes, an illumination device, and an imaging device that uses coaxial lighting to emphasize brightness differences between the recess and periphery of the dicing tape, allowing for precise determination of the presence or absence of glass chips through image processing.

Benefits of technology

Enables accurate detection of glass chips, reduces pick-up errors, maintains equipment cleanliness, and enhances production efficiency by ensuring the presence of chips before pickup, thereby improving the yield of assembled products.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a technique capable of confirming whether a transparent die is present on a dicing tape.SOLUTION: A die bonding device comprises: a dome having a suction hole for sucking a dicing tape having a transparent die stuck; a lighting device provided above the dome; an imaging device provided above the dome; and a controller. The controller is configured to: suck the dicing tape through the suction hole so as to form a recessed part of the dicing tape when the die is not present above the center part of the top surface of the dome; irradiate, by the lighting device, the dicing tape with illumination light emphasizing the lightness difference between the recessed part and the periphery of the recessed part; acquire an image by photographing the dicing tape by the imaging device; and then determine whether the die is present from the image.SELECTED DRAWING: Figure 9
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Description

[Technical Field]

[0001] The present disclosure relates to a die bonding apparatus and is applicable to, for example, a die bonding apparatus that picks up a glass chip. [Background technology]

[0002] A die bonding device such as a die bonder is a device that uses a bonding material to bond (place and adhere) an element onto a substrate or other element. The bonding material is, for example, a liquid or film-like resin or solder. The element is, for example, a semiconductor chip, a glass chip, a silicon chip, etc. The semiconductor chip is, for example, a logic chip, a memory chip, an image sensor chip, etc. The substrate is, for example, a wiring board, a lead frame formed from a thin metal plate, a glass substrate, etc. The semiconductor chip is provided to the die bonder after being cut with a wafer attachment tape (dicing tape) attached to the semiconductor wafer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-153874 Summary of the Invention [Problem to be solved by the invention]

[0004] When glass chips (hereinafter also referred to as "dies") are cut and provided to a die bonder with dicing tape attached to the glass wafer, similar to semiconductor chips, it may be necessary to check whether or not the die is present on the dicing tape.

[0005] An object of the present disclosure is to provide a technology that enables the presence or absence of a transparent die on a dicing tape. Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0006] A representative aspect of the present disclosure can be briefly summarized as follows: A die bonding apparatus includes a dome having suction holes for suctioning a dicing tape having a transparent die attached thereto, an illumination device provided above the dome, an imaging device provided above the dome, and a control device. The control device is configured to suction the dicing tape with the suction holes to form a recess in the dicing tape when the die is not located above the center of the upper surface of the dome, to irradiate the dicing tape with illumination light that emphasizes the brightness difference between the recess and its periphery using the illumination device, to photograph the dicing tape using the imaging device to obtain an image, and to determine the presence or absence of a die based on the image. [Effects of the Invention]

[0007] According to the present disclosure, it is possible to check the presence or absence of a transparent die on a dicing tape. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a top view showing an outline of a die bonder according to an embodiment. [Figure 2] FIG. 2 is a cross-sectional view showing an outline of the die supply section shown in FIG. [Figure 3] FIG. 3 is a side view showing an outline of the preform part shown in FIG. [Figure 4] FIG. 4 is a side view showing an outline of the die supply section and bonding section shown in FIG. [Figure 5] FIG. 5 is a flowchart showing a method for manufacturing a semiconductor device using the die bonder shown in FIG. [Figure 6] FIG. 6 is a top view showing the push-up unit shown in FIG. 2 and the glass chip attached to the dicing tape. [Figure 7] FIG. 7 is a schematic diagram showing the state of illumination light when there is a glass chip on the dicing tape. [Figure 8] FIG. 8 is a schematic diagram showing the state of illumination light when there is no glass chip on the dicing tape. [Figure 9] FIG. 9 is a diagram showing the wafer recognition camera, the lens, the dome, and the subject. [Figure 10] FIG. 10 shows a state in which the suction operation is performed when a glass chip is present. [Figure 11] FIG. 11 shows a state in which the suction operation is performed when there is no glass chip. [Figure 12] FIG. 12 is a diagram showing a schematic view of an image taken in the presence of a glass chip. [Figure 13] FIG. 13 is a diagram schematically showing an image taken when there is no target glass chip. [Figure 14] FIG. 14 is a flowchart showing a part of the bonding process. [Figure 15] FIG. 15 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in the first modified example. [Figure 16] FIG. 16 is a diagram showing a schematic image taken in the presence of a glass chip. [Figure 17] FIG. 17 is a diagram showing a schematic image taken without a glass chip. [Figure 18] FIG. 18 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in the second modified example. [Figure 19] FIG. 19 shows a state in which the suction operation is performed when there is no glass chip. [Figure 20] FIG. 20 is a diagram showing a schematic image taken in the presence of a glass chip. [Figure 21] FIG. 21 is a diagram schematically showing an image taken in the absence of a target glass chip. [Figure 22] FIG. 22 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in the third modified example. [Figure 23]FIG. 23 is a diagram showing a wafer recognition camera, an illumination device, a dome, and an object in the fourth modified example. [Figure 24] FIG. 24 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in the fifth modified example. [Figure 25] FIG. 25 is a diagram schematically showing an image captured when the target glass chip and one adjacent glass chip are not present. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described with reference to the drawings. However, in the following description, the same components will be assigned the same reference numerals, and repeated description may be omitted. Note that, in order to clarify the description, the width, thickness, shape, etc. of each part may be shown schematically compared to the actual embodiment. Furthermore, the dimensional relationships, ratios, etc. of each element between multiple drawings do not necessarily match.

[0010] The configuration of a die bonder, which is one embodiment of semiconductor manufacturing equipment, will be described with reference to FIGS. 1 to 4 and 6. FIG.

[0011] As shown in Figure 1, the die bonder 1 broadly comprises a die supply unit 10, a preform unit 90, a bonding unit 40, a transport unit 50, a substrate supply unit 60, a substrate unloading unit 70, and a control unit (control device) 80. The Y direction is the front-to-rear direction of the die bonder 1, and the X direction is the left-to-right direction. The die supply unit 10 is located on the front side of the die bonder 1, and the bonding unit 40 is located on the rear side. The die supply unit 10 supplies glass chips D to be mounted on a substrate S. Here, semiconductor chips HT are mounted on multiple product areas on the substrate S, which will eventually become a single package.

[0012] As shown in FIGS. 2 and 6, the die supply unit 10 includes a wafer holder 12 that holds a wafer W, a push-up unit 13 that pushes up glass chips D from the wafer W, and a wafer recognition camera 24. The wafer W is a disc-shaped glass plate to which a dicing tape DT is attached, and the wafer W is diced into multiple glass chips D. The wafer holder 12 includes an expander ring 15 that holds a wafer ring WR and a support ring 17 that horizontally positions the dicing tape DT, which is held by the wafer ring WR and has multiple glass chips D attached thereto. As shown in FIG. 6, the push-up unit 13 includes a dome 131 having multiple suction holes 132 that suction the dicing tape DT and needles 133 that push up the dicing tape DT. The suction holes 132 are located not only under the glass chip D to be picked up (target glass chip Dp) but also under the glass chip D adjacent to the target glass chip Dp (adjacent glass chip Da). The push-up unit 13 is disposed inside the support ring 17. Control unit 80 moves wafer holder 12 in the X-axis direction and Y-axis direction using a wafer table (not shown), and moves target glass chip Dp to the position of push-up unit 13 (pick-up position).

[0013] When the target glass chip Dp is pushed up, the wafer holder 12 lowers the expand ring 15 holding the wafer ring WR. As a result, the dicing tape DT held by the wafer ring WR is stretched, widening the gap between the target glass chip Dp and the adjacent glass chip Da, and the push-up unit 13 pushes up the target glass chip Dp from below, improving the pick-up ability of the target glass chip Dp.

[0014] 3, the preform unit 90 has a syringe 91, a drive unit (not shown) that moves the syringe 91 in the X-axis direction, the Y-axis direction, and the up-and-down direction, and a preform camera 94 that recognizes the application position of the syringe 91. The preform unit 90 applies paste in a frame shape using the syringe 91 to a semiconductor chip HT mounted on a substrate S that has been transported by the transport unit 50. The syringe 91 is filled with paste, and is configured so that the paste is extruded by air pressure from the tip of a nozzle 92 and applied to the semiconductor chip HT mounted on the substrate S.

[0015] As shown in FIG. 4, the bonding unit 40 includes a bond head 41, a Y-axis drive unit (not shown), and a substrate recognition camera 44. The bond head 41 includes a collet 42 that holds a glass chip D by suction at its tip. The Y-axis drive unit moves the bond head 41 in the Y-axis direction. The substrate recognition camera 44 captures an image of a position recognition mark (not shown) on the substrate S and recognizes the bond position. The bonding unit 40 picks up a glass chip D from the die supply unit 10 and bonds it onto a semiconductor chip HT that is mounted on the transported substrate S and has a frame-shaped paste PA applied thereto. At this time, the bond head 41 corrects the pickup position and orientation based on the image data captured by the wafer recognition camera 24 and picks up the glass chip D from the wafer W. The bond head 41 then bonds the glass chip D onto the semiconductor chip HT mounted on the substrate based on the image data captured by the substrate recognition camera 44.

[0016] 1, the transport unit 50 has a transport lane 52 as a transport path along which the substrate S moves. With this configuration, the substrate S moves from the substrate supply unit 60 along the transport lane 52 to the coating position, and after coating, moves to the bonding position, and after bonding, moves to the substrate unloading unit 70 and hands over the substrate S to the substrate unloading unit 70.

[0017] The control unit 80 includes a memory that stores a program (software) that monitors and controls the operation of each of the above-mentioned parts of the die bonder 1, and a central processing unit (CPU) that executes the program stored in the memory.

[0018] Next, a method for manufacturing a semiconductor device using the die bonder in the embodiment will be described with reference to Fig. 5. In the following description, the operation of each part constituting the die bonder 1 is controlled by a control unit 80.

[0019] (Wafer loading process: process S1) A wafer ring WR is supplied to the die bonder 1. The supplied wafer ring WR is carried into the die supply unit 10. Here, the wafer ring WR holds a dicing tape DT to which glass chips D separated from the wafer W are attached.

[0020] (Substrate loading process: Process S2) The substrate S on which the semiconductor chip HT is mounted is carried into the substrate supply unit 60 of the die bonder 1. After being carried in, the substrate S is carried to the preform stage 96 by the transport unit 50.

[0021] (Preforming process: Process S3) The preform camera 94 acquires an image of the surface of the semiconductor chip HT mounted on the substrate S before application, and the surface to which the paste PA is to be applied is confirmed. If there are no problems with the surface to be applied, the position on the substrate S supported by the preform stage 96 where the paste is to be applied is confirmed and positioned. Positioning is performed by pattern matching or the like, as in the bonding section 40.

[0022] A paste PA is applied from a nozzle 92 at the tip of a syringe 91 to a semiconductor chip HT mounted on a substrate S. The paste PA is, for example, a UV (ultraviolet) curing adhesive. After application, the applied paste PA is photographed by a preform camera 94. Whether the paste PA has been applied accurately is confirmed based on the image acquired by photographing, and an inspection (visual inspection) of the applied paste PA is performed. If there are no problems with the application, the transport unit 50 transports the substrate S to the bond stage 46.

[0023] (Bond process: Process S4) (Positioning of glass chips) After step S1, a wafer table pitch operation is performed in which the wafer holder 12 is moved so that the desired glass chip D can be picked up from the wafer W. The glass chip D is photographed by the wafer recognition camera 24, and the glass chip D is positioned and its surface inspected based on the image data acquired by the photograph. The image data is processed to calculate the amount of deviation (X, Y, and θ directions) of the glass chip D on the wafer holder 12 from the die position reference point of the die bonder 1, and positioning is performed. Note that the die position reference point is previously held at a predetermined position of the wafer holder 12 as the initial setting for the device. The image data is processed to perform surface inspection of the glass chip D.

[0024] (Board positioning) After step S3, the substrate S placed on the bond stage 46 is photographed by the substrate recognition camera 44, and image data is acquired. The image data is processed to calculate the amount of deviation (X, Y, and θ directions) of the substrate S from the substrate position reference point of the die bonder 1. Note that the substrate position reference point is previously held at a predetermined position of the bonding unit 40 as an initial setting for the device.

[0025] (Pickup & Bond) The bond head 41 is translated and lowered to just above the glass chip D to be picked up, the suction position of the bond head 41 is corrected based on the calculated amount of deviation of the glass chip D, and the glass chip D is vacuum-sucked by the collet 42. The bond head 41 that has sucked the glass chip D from the wafer W bonds the glass chip D to a predetermined position on the semiconductor chip HT mounted on the substrate S on the bond stage 46. The substrate recognition camera 44 photographs the glass chip D bonded to the semiconductor chip HT, and based on the image data obtained by photographing, an inspection is performed to determine whether the glass chip D has been bonded in the desired position, etc.

[0026] (Substrate unloading process: Process S5) The substrate S with the glass chip D bonded thereto is transported to the substrate unloading section 70. The substrate S with the glass chip D bonded thereto is taken out from the substrate unloading section 70. The substrate S is unloaded from the die bonder 1.

[0027] To clarify this embodiment, the problem of checking the presence or absence of a glass chip D will be explained using Fig. 7 and Fig. 8. Fig. 7 is a schematic diagram showing the state of illumination light when there is a glass chip on the dicing tape. Fig. 8 is a schematic diagram showing the state of illumination light when there is no glass chip on the dicing tape.

[0028] As shown in Figure 7, the surface of the glass chip D, which is transparent in the visible light region, generates surface diffuse reflected light DRL due to slight diffuse reflection of incident light IL, and specular reflected light SRL due to a certain degree of specular reflection. Inside the glass chip D, transmitted light TRL due to transmission and internal scattered light SCL due to slight scattering are generated. The interface between the bottom surface of the glass chip D and the top surface of the dicing tape DT generates surface diffuse reflected light DRL' due to slight diffuse reflection of transmitted light TRL, and specular reflected light SRL' due to a certain degree of specular reflection. The specular reflected light SRL' passes through the glass chip D and is output to the outside of the glass chip D.

[0029] Furthermore, the dicing tape DT, which is transparent in the visible light range, has properties similar to those of the glass chip D, and the reflectance, transmittance, and diffusion rate of the dicing tape DT are close to those of the glass chip D. Therefore, inside the dicing tape DT, transmitted light TRL' is generated due to transmission, and internal scattered light SCL' is generated due to slight scattering. The bottom surface of the dicing tape DT generates surface diffuse reflected light DRL" due to slight diffuse reflection in response to the transmitted light TRL', and specular reflected light SRL" due to a certain degree of specular reflection. The specular reflected light SRL" passes through the dicing tape DT and the glass chip D and is output to the outside of the glass chip D. The camera captures the specular reflected light SRL, specular reflected light SRL', and specular reflected light SRL".

[0030] As shown in Figure 8, the surface of the dicing tape DT generates surface diffuse reflected light DRL due to slight diffuse reflection of incident light IL, and specular reflected light SRL due to a certain degree of specular reflection. Inside the dicing tape DT, transmitted light TRL due to transmission and internal scattered light SCL due to slight scattering are generated. The bottom surface of the dicing tape DT generates surface diffuse reflected light DRL' due to slight diffuse reflection of transmitted light TRL, and specular reflected light SRL' due to a certain degree of specular reflection. The specular reflected light SRL' passes through the glass chip D and is output to the outside of the glass chip D. The camera captures the specular reflected light SRL and the specular reflected light SRL'.

[0031] In this case, the only difference between a case where there is a glass chip on the dicing tape and a case where there is no glass chip on the dicing tape is whether or not specular reflected light SRL" is included, and because the amount of specular reflected light SRL" is very small, it is difficult to recognize the difference between the two. For this reason, it is difficult to confirm the presence or absence of one of the two layers that form a layer structure as parallel planes.

[0032] As a result, with coaxial lighting, the specularly reflected light from the surface is the same for the glass chip D and the dicing tape DT, making them difficult to distinguish. Also, with oblique lighting, the light is transmitted in the same way, making the dome 131 of the push-up unit 13 below visible, making them difficult to distinguish. Furthermore, with dome lighting, coaxial lighting and oblique lighting are combined, so there is almost no difference, making it difficult to distinguish.

[0033] Although the reflectance, transmittance, and diffusion rate of a material can be changed to some extent by changing the wavelength, polarized light, or angle of incidence, in the case of a material that is originally transparent in the visible light range, it is difficult to produce a clear difference even if you limit or select those factors in the visible light range.

[0034] The above-mentioned problems are solved in the die supply unit 10 of this embodiment. First, the optical system of the die supply unit 10 will be described with reference to Fig. 9. Fig. 9 is a diagram showing the wafer recognition camera, lens, dome, and subject.

[0035] A dicing tape DT with a glass chip D attached thereto is placed on the dome 131, and a wafer recognition camera 24 is provided above the glass chip D. An illumination device 25 is placed between the wafer recognition camera 24 and the glass chip D. The illumination device 25 includes a surface-emitting illuminator (light source) 251 and a half mirror (semi-transparent mirror) 252 therein. Illumination light from the surface-emitting illuminator 251 is reflected by the half mirror 252 on the same optical axis as the wafer recognition camera 24, and is irradiated onto the glass chip D as vertically incident parallel light. The illumination device 25 is a coaxial illumination device within a lens barrel. The surface-emitting illuminator 251 is a surface-emitting type LED (Light Emitting Diode) light source.

[0036] A method for checking the presence or absence of a glass chip D will be described with reference to Figs. 10 to 13 and 25. Fig. 10 is a diagram showing the state in which a suction operation is performed when a glass chip is present. Fig. 11 is a diagram showing the state in which a suction operation is performed when a glass chip is not present. Fig. 12 is a diagram showing a schematic image taken when a glass chip is present. Fig. 13 is a diagram showing a schematic image taken when the target glass chip is not present. Fig. 25 is a diagram showing a schematic image taken when the target glass chip and one adjacent glass chip are not present.

[0037] When the suction operation is performed with the glass chip D on the dome 131, the upper surface of the dicing tape DT remains flat because it is held by the glass chip D, as shown in Fig. 10. In contrast, when the suction operation is performed with no glass chip D on the dome 131, the dicing tape DT is soft, and a mortar-shaped depression is formed at the position of the suction hole 132, as shown in Fig. 11.

[0038] In this state, for example, when vertically incident parallel light PL is irradiated as coaxial lighting, the surface (top surface) of the glass chip D directly reflects the specular reflected light SRL directly upward, as shown in Fig. 10. In contrast, on the slope of the recessed portion caused by the adsorption of the dicing tape DT, the specular reflected light SRL is not reflected directly upward, as shown in Fig. 11, and when an image is taken with the wafer recognition camera 24 installed directly above, the difference from when the glass chip D is present becomes apparent.

[0039] That is, for example, if the target glass chip Dp is not present, as shown in FIG. 13, the specularly reflected light SRL from the recessed portion does not reach the wafer recognition camera 24, so only the area of ​​the suction hole 132 appears dark. However, the bottom of the recess appears bright because the specularly reflected light SRL is directed toward the wafer recognition camera 24. In contrast, if the glass chip D is present, the area of ​​the suction hole 132 is difficult to distinguish from other areas, as shown in FIG. 12. In this state, the presence or absence of the glass chip D can be determined by measuring the brightness of the area where the target glass chip Dp should be (the central area) through image processing. Note that the adjacent glass chip Da is located within the same field of view as the target glass chip Dp and the wafer recognition camera 24. Therefore, for example, as shown in FIG. 25, even if there is no adjacent glass chip Da adjacent to the target glass chip Dp on the left side of the drawing, the area of ​​the suction hole 132 appears dark, just as when the target glass chip Dp is not present. Therefore, it is possible to determine the presence or absence of not only the target glass chip Dp but also the adjacent glass chip Da. If it is determined that the glass chip D is not present, pickup at the position where the glass chip D is not present can be skipped.

[0040] Several examples of methods for image processing in the area where the glass chip to be picked up should be located to check for the presence or absence of the glass chip D will be described.

[0041] (Method 1) The area of ​​the suction hole 132 is set in advance, and the change in the average brightness within that area is checked. A threshold value is set, and if there is a change of a certain level or more, it is determined that the glass tip D is not present.

[0042] (Method 2) The difference between the maximum and minimum brightness values ​​of the area where the glass chip D should be is measured. If the difference exceeds a predetermined value, it is determined that the glass chip D is not present.

[0043] (Method 3) The patterns that appear in the suction hole 132 when the glass tip D is present and when it is absent are registered as models, and the presence or absence of changes is confirmed using normalized correlation matching or the like.

[0044] (Method 4) A histogram is obtained using the brightness of the area where the glass tip D should be as an index. Since the needle 133 has a high brightness and the suction hole 132 has a low brightness, if there are two peaks in the frequency of appearance brightness, it is determined that the glass tip D is not present.

[0045] The bonding step (step S4) will be described in detail with reference to Fig. 14. Fig. 14 is a flowchart showing part of the bonding step.

[0046] (Wafer table pitch movement: step S41) A wafer table pitch operation is performed to move wafer holder 12 so that the desired glass chip D can be picked up from wafer W, and glass chip D is placed at the center of dome 131 of push-up unit 13 as shown in FIG.

[0047] (Dome suction: process S42) The dome 131 is moved upward to a position where it comes into contact with the dicing tape DT, and the dicing tape DT is sucked by the suction holes 132 provided in the dome 131 .

[0048] (Check for the presence of glass chips: Step S43) Using the wafer recognition camera 24 and the lighting device 25 provided above the dome 131, an image of the dome 131 and its surroundings as shown in FIG. 6 is taken to confirm the presence or absence of the glass chip D. The method for checking the presence or absence of the glass chip D will be described later. If the glass chip D is not present, the process returns to step S41. If the glass chip D is present, the process proceeds to step S44.

[0049] (Glass chip positioning: step S44) 6 is photographed using the wafer recognition camera 24 and the lighting device 25, and the dome 131 and its periphery as shown in Fig. 6 are positioned using the image of the dicing groove DG. Note that step S44 may be performed before step S43.

[0050] (Pickup: Process S45) In step S45, the glass chip D is picked up as described above, and the process returns to step S41.

[0051] In this way, the presence or absence of the glass chip D is confirmed in the surface inspection of the glass chip D in step S4. The presence or absence of the glass chip D is confirmed in order to avoid the following problems.

[0052] If the glass chip D on the dicing tape DT is missing for some reason and pickup is attempted without noticing this, an error occurs because the landing sensor of the bond head 41 cannot detect the landing. The landing sensor cannot detect the landing because if the contact surface of the collet 42 comes into contact with the dicing tape DT, scratches or dirt may adhere to the surface of the collet 42, potentially making it impossible to ensure the cleanliness of the product. If an error occurs, the missing glass chip D is only discovered after the pickup process has begun, resulting in inefficiency and reduced productivity of the equipment. In the worst case scenario, the contact surface of the collet 42 may come into contact with the dicing tape DT. As a result, as described above, it becomes impossible to ensure the cleanliness of the product.

[0053] In this embodiment, the suction operation is performed so as to cause the surface of the glass chip D and the dicing tape DT to lose parallelism. As a result, if a predetermined condition is met using lighting, etc., it is possible to create a difference in the direction of the reflective surface even with the same lighting, making it possible to confirm the presence or absence of the glass chip D. The predetermined condition in this embodiment is to irradiate vertically incident parallel light using coaxial lighting.

[0054] According to this embodiment, one or more of the following effects are achieved.

[0055] (a) The presence or absence of a glass chip can be determined.

[0056] (b) By being able to check whether a glass chip is present before picking it up, pick-up errors can be reduced, thereby improving production efficiency.

[0057] (c) The possibility of the collet accidentally coming into contact with the dicing tape surface can be reduced, which helps maintain the cleanliness of the collet contact surface and ensures the cleanliness of the product.

[0058] (d) When a parallel light source is used as coaxial epi-illumination to illuminate a glass chip, the outline of the glass chip can be clearly visualized.

[0059] (e) The presence or absence of a glass chip can be confirmed using the same lighting as for positioning, so a single captured image can be used for both presence inspection and positioning image processing, preventing a decrease in equipment takt time and improving productivity.

[0060] (f) The yield of products assembled by the die bonder can be improved.

[0061] <Modification> Below, several representative modified examples of the embodiments are given. In the following description of the modified examples, the same reference numerals as those in the above-described embodiments may be used for parts having the same configurations and functions as those described in the above-described embodiments. Furthermore, the description of such parts may be appropriately cited within the scope of technical inconsistency. Furthermore, a part of the above-described examples and all or part of the multiple modified examples may be appropriately applied in combination within the scope of technical inconsistency.

[0062] The presence or absence of glass chips can be determined if certain conditions are met using lighting, etc. However, (1) dome lighting, (2) coaxial lighting that emits diffused surface-emitting light, and (3) oblique lighting do not meet these conditions.

[0063] The above (1) and (2) are good at capturing uneven surfaces evenly, so they even out the shading of the uneven areas caused by adhesion, reducing the difference. The above (3) is dominated by transmitted light, so the surface of the dome 131 is visible.

[0064] For this reason, it is necessary to not only focus on adsorption but also to irradiate the material with an appropriate illumination light. Some examples are given below.

[0065] (First Modification) Fig. 15 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in a first modified example. Fig. 16 is a diagram showing an image captured when a target glass chip is present. Fig. 17 is a diagram showing an image captured when a target glass chip is not present.

[0066] In the embodiment, an example of a coaxial illumination device that emits vertically incident parallel light has been described as the illumination device, but a coaxial illumination device that emits point light may also be used.

[0067] The illumination device 25 in the first modified example is a coaxial illumination device having a point light source 253 with a small light-emitting surface and a half mirror 252. The light-emitting surface is a few millimeters or less in size. The point light source 253 exhibits properties similar to a parallel light source in a narrow area, so as shown in FIG. 17, when there is no target glass chip Dp, the surface irregularities of the dicing tape DT can be emphasized. However, as shown in FIG. 16, when there is a target glass chip Dp, the surface irregularities of the dicing tape DT are not emphasized.

[0068] (Second Modification) Fig. 18 is a diagram showing a wafer recognition camera, lighting device, dome, and subject in a second modified example. Fig. 19 is a diagram showing a state in which a suction operation is performed when there is no glass chip. Fig. 20 is a diagram showing a schematic image taken when there is a glass chip. Fig. 21 is a diagram showing a schematic image taken when there is no target glass chip.

[0069] In the embodiment, an example of a coaxial illumination device with vertically incident parallel light has been described as the illumination device, but oblique illumination may also be used. The illumination device 25 in the second modification is an oblique light bar illumination provided near the wafer recognition camera 24.

[0070] Although it depends on the angle (θ) formed by the depression (concavity) in the dicing tape DT, as long as the incident angle of the illumination device 25 is within the range in which the specularly reflected light SRL reflected on the surface of the depression is directed toward the wafer recognition camera 24 directly above, a portion of the depression can be captured brightly. Here, the incident angle is the angle with respect to the optical axis of the wafer recognition camera 24. In this case, in the other flat area A, the specularly reflected light SRL does not direct toward the wafer recognition camera 24 directly above, and therefore appears dark. The specularly reflected light SRL from the inclined surface B enters the wafer recognition camera 24. The incident angle of light that satisfies the conditions is up to twice (2θ) the angle indicated by the arc arrow in Figure 19. As shown in Figure 18, the illumination device 25 is installed within this range. In other words, the illumination device 25 is positioned at an angle within twice the predetermined angle (θ) with respect to the optical axis of the wafer recognition camera 24 as viewed from the intersection of the optical axis of the wafer recognition camera 24 and the dicing tape DT. Here, the upper limit of 2θ is approximately 10 to 15 degrees.

[0071] As shown in Fig. 21, when there is no target glass chip Dp, the surface irregularities of the dicing tape DT can be emphasized. However, as shown in Fig. 20, when there is a glass chip D, the surface irregularities of the dicing tape DT are not emphasized.

[0072] (Third Modification) FIG. 22 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in the third modified example.

[0073] In the embodiment, an example of a coaxial illuminator that emits vertically incident parallel light has been described as the illumination device, but a coaxial illuminator with an asymmetric illumination area may also be used. The illumination device 25 in the third modified example has a surface-emitting illuminator (light source) 251, a half mirror 252, and a light-shielding plate 254. The illumination device 25 is a coaxial illuminator that emits diffused light of a surface-emitting type. Because the illumination light is reflected by the half mirror 252, the surface-emitting illuminator 251 and the light-shielding plate 254 can be considered to be located at the positions indicated by the dotted lines.

[0074] As with the second modification, this utilizes the difference in the orientation of the inclined surface of the recess. The illumination area of ​​the surface-emitting light 251, which is installed within a range of ±2θ with respect to the optical axis of the wafer recognition camera 24, is made asymmetric. For example, by providing a light-shielding plate 254 or the like within the range of ±2θ in the incident angle, it is possible to make part of the inclined surface of the recess bright and part dark.

[0075] The surface-emitting light 251 may be configured with LEDs arranged in an array, and the illuminated area may be made asymmetrical by turning the LEDs on and off, or the surface-emitting light 251 may be configured with a liquid crystal display device, and the illuminated area may be made asymmetrical by turning the LEDs on and off. The light-shielding plate 254 and the unlit area of ​​the surface-emitting light do not necessarily need to be completely shielded from illumination light, as long as the illumination is darker than the area without the light-shielding plate 254 or the lit area of ​​the surface-emitting light. For example, the light-shielding plate 254 may be configured with a translucent member or a plate with slits. The luminance of the unlit area of ​​the surface-emitting light may be lower than the luminance of the lit area of ​​the surface-emitting light.

[0076] (Fourth Modification) FIG. 23 is a diagram showing a wafer recognition camera, an illumination device, a dome, and an object in the fourth modified example.

[0077] Since the light shielding plate 254 in the third modified example is provided to eliminate the symmetry of the irradiation area, the light shielding plate may be installed below the half mirror as long as it does not affect the camera field of view. The light shielding plate 255 in the fourth modified example is installed below or under the illumination device 25 within a range of ±2θ with respect to the optical axis of the wafer recognition camera 24. Like the light shielding plate 254, the light shielding plate 255 may be made of a translucent material or a plate with slits.

[0078] (Fifth Modification) FIG. 24 is a diagram showing a wafer recognition camera, an illumination device, a dome, and a subject in the fifth modified example.

[0079] In the fourth modified example, an example in which the light shielding plate 255 is provided below or below the lighting device 25 has been described, but an obstacle may also be provided below the lighting device. Therefore, instead of a light shielding plate, another drivable unit such as a bond head or a pickup head may temporarily serve as the light shielding plate.

[0080] In particular, the pickup head is usually retracted to a position that does not affect the illumination, but by moving this retracted position closer to the optical axis and having it wait at a position that eliminates the symmetry of the illumination irradiation area, it is possible to obtain benefits. This makes it possible to visualize by simply changing the operation sequence and retracted position without adding new hardware to the current die bonder configuration.

[0081] The disclosure made by the present inventors has been specifically described above based on the embodiments, but it goes without saying that the present disclosure is not limited to the above embodiments and can be modified in various ways.

[0082] For example, in the embodiment, an example has been described in which a cone-shaped depression is created in the dicing tape DT by the suction action of the suction holes 132 of the dome 131. In addition to suction, unevenness may also be created in the dicing tape DT by weakening the stretching force of the dicing tape DT held by the wafer ring WR.

[0083] In addition, in the embodiment, the determination of the presence or absence of an adjacent glass chip Dp is described, but in the modified example, the adjacent glass chip Da is located within the same field of view of the wafer recognition camera 24 as the target glass chip Dp, so it is possible to determine the presence or absence of not only the target glass chip Dp but also the adjacent glass chip Da. [Explanation of symbols]

[0084] 1. Die bonder (die bonding device) 131 Dome 132...Adsorption hole 24 Wafer recognition camera (imaging device) 25. Lighting equipment 80... Control unit (control device) D···Glass chip (die) DT··· Dicing Tape

Claims

1. a dome having suction holes for suctioning a dicing tape having a transparent die attached thereto; a lighting device provided above the dome; an imaging device provided above the dome; a control device; Equipped with The control device When the die is not located above the center of the upper surface of the dome, the dicing tape is sucked by the suction holes to form a recess in the dicing tape; the lighting device irradiates the dicing tape with illumination light that emphasizes the difference in brightness between the recess and the periphery of the recess; The imaging device photographs the dicing tape to obtain an image; A die bonding apparatus configured to determine the presence or absence of a die based on the image.

2. 2. The die bonding apparatus of claim 1, The die bonding apparatus, wherein the illumination device is a coaxial illumination device that irradiates parallel light.

3. 2. The die bonding apparatus of claim 1, The die bonding apparatus, wherein the illumination device is a coaxial illumination device having a point light source and a semi-transparent mirror onto which the point light source is irradiated.

4. 2. The die bonding apparatus of claim 1, the illumination device is an oblique illumination device positioned at an angle within twice a predetermined angle with respect to the optical axis of the imaging device when viewed from an intersection of the optical axis of the imaging device and the dicing tape, The predetermined angle is an angle formed between the upper surface and the recess.

5. 2. The die bonding apparatus of claim 1, the illumination device is a coaxial illumination device having a surface-emitting illumination device and a semi-transparent mirror onto which the surface-emitting illumination device is irradiated, When viewed from an intersection of the optical axis of the imaging device and the dicing tape, the illumination light is not irradiated in a part within twice a predetermined angle with respect to the optical axis of the imaging device, The predetermined angle is an angle formed between the upper surface and the recess.

6. 6. The die bonding apparatus according to claim 5, The die bonding apparatus includes a light blocking plate between the surface emitting light source and the semi-transparent mirror, the light blocking plate blocking part of the illumination light.

7. 6. The die bonding apparatus according to claim 5, The surface emitting light is a die bonding device that is configured with a plurality of LEDs or a liquid crystal display device arranged in an array.

8. 6. The die bonding apparatus according to claim 5, Further, a light blocking plate is provided below or under the lighting device, A die bonding apparatus in which part of the illumination light from the illumination device is blocked by the light blocking plate.

9. 6. The die bonding apparatus according to claim 5, Further, the head is provided with A die bonding apparatus in which part of the illumination light from the illumination device is blocked by the head.

10. a carrying-in process of carrying a wafer ring holding a dicing tape to which a transparent die is affixed into a die bonding apparatus including: a dome having an upper surface and suction holes provided on the upper surface; an illumination device provided above the dome; and an imaging device provided above the dome; a bonding step of picking up the die from the wafer ring and bonding it to a substrate; and The bonding step includes the steps of: a step of sucking the dicing tape by the suction holes to form a recess in the dicing tape when the die is not located above the center of the upper surface of the dome; a step of irradiating the dicing tape with illumination light by the lighting device, which light emphasizes a difference in brightness between the recess and a periphery of the recess; a step of photographing the dicing tape with the imaging device to obtain an image; determining whether or not a die is present based on the image; A die bonding method comprising:

11. a carrying-in process of carrying a wafer ring holding a dicing tape to which a transparent die is affixed into a die bonding apparatus including: a dome having an upper surface and suction holes provided on the upper surface; an illumination device provided above the dome; and an imaging device provided above the dome; a bonding step of picking up the die from the wafer ring and bonding it to a semiconductor chip bonded to a substrate; and The bonding step includes the steps of: a step of sucking the dicing tape by the suction holes to form a recess in the dicing tape when the die is not located above the center of the upper surface of the dome; a step of irradiating the dicing tape with illumination light by the lighting device, which light emphasizes a difference in brightness between the recess and a periphery of the recess; a step of photographing the dicing tape with the imaging device to obtain an image; determining whether or not a die is present based on the image; A method for manufacturing a semiconductor device having the above structure.

Citation Information

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