Semiconductor Devices

Abstract

To provide a semiconductor device including a monopolar logic circuit.SOLUTION: A semiconductor device prevents a decrease in an output voltage of a logic circuit by boosting a gate voltage by using a capacitor element 117. A first transistor 111 has a drain and a gate electrically connected to a first wire 121, and a source electrically connected to a first node 131. A second transistor 112 has a drain electrically connected to the first node, a source electrically connected to a second wire 122, and a gate electrically connected to a second node 132. A third transistor 113 has a drain electrically connected to a third wire 123, a source electrically connected to a third node 133, and a gate electrically connected to the first node. A fourth transistor has a drain electrically connected to the third node, a source electrically connected to a fourth wire 124, and a gate electrically connected to the second node. The capacitor element has one electrode electrically connected to the first node and the other electrode electrically connected to the third node.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one aspect of the invention disclosed in the present specification etc. is a process, a machine, a manufacture In particular, this specification One embodiment of the invention disclosed in the document relates to a semiconductor device and an electronic device including the semiconductor device. This is what is done.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to display devices (liquid crystal display devices, light emitting display devices, etc.), lighting devices, electro-optical devices, Power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, etc. have semiconductor devices. There are cases where this happens. [Background technology]

[0003] Recently, oxide semiconductors (OS) have been used in the semiconductor layer where the channel is formed. Transistors using an OS transistor (hereinafter also referred to as OS transistors) are attracting attention. Oxide semiconductors can be formed into films by sputtering or the like, so for example, It can be used for the semiconductor layer of a transistor that constitutes a large display device. A transistor is a type of transistor that uses amorphous silicon in the semiconductor layer where the channel is formed. It is possible to improve and use some of the production equipment, which has the advantage of reducing capital investment. There are also some.

[0004] In addition, OS transistors are known to have extremely low leakage current when they are off. For example, low leakage current is achieved by utilizing the extremely low leakage current characteristics of OS transistors. A CPU with low power consumption has been disclosed (see Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 Summary of the Invention [Problem to be solved by the invention]

[0006] However, it is known that it is difficult to realize p-channel OS transistors. Therefore, to construct a logic circuit using only OS transistors, It is necessary to configure a logic circuit.

[0007] On the other hand, even if a p-channel transistor could be realized, it would be difficult to fabricate a p-channel transistor on the same substrate. When a n-channel transistor and an n-channel transistor are separately manufactured, the number of manufacturing steps increases, and the This increases the manufacturing cost and reduces productivity. It is preferable that the transistors are of the same conductivity type. In a unipolar logic circuit composed of transistors, the output voltage corresponds to the threshold voltage of the transistor. There is a problem in that the amount of

[0008] An object of one embodiment of the present invention is to provide a semiconductor device or the like with high productivity. Another object of the present invention is to provide a semiconductor device or the like with low power consumption. Another object of the present invention is to provide a semiconductor device or the like having excellent characteristics. It is an object of the present invention to provide a semiconductor device including a unipolar logic circuit. It is an object of the present invention to provide a semiconductor device or the like.

[0009] The description of these problems does not preclude the existence of other problems. It is not necessary for the present invention to solve all of these problems. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other issues from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0010] One embodiment of the present invention is a semiconductor device including first to fourth transistors and a capacitor. One of the source and drain of the first transistor is electrically connected to the first wiring. The gate of the first transistor is electrically connected to the first wiring, and the source or drain of the first transistor is The other input is electrically connected to one of the source and drain of the second transistor, The other of the source and drain of the second transistor is electrically connected to the second wiring. The gate of the third transistor is electrically connected to the gate of the fourth transistor. One of the source and the drain is electrically connected to the third wiring, and the source of the third transistor The other of the drains is electrically connected to one of the source and drain of the fourth transistor. The gate of the third transistor is connected to the other of the source and drain of the first transistor. The other of the source and drain of the fourth transistor is electrically connected to the fourth wiring. One electrode of the capacitance element is electrically connected to the gate of the third transistor. The other electrode of the capacitor is electrically connected to the other of the source and drain of the third transistor. The semiconductor device is characterized in that

[0011] Alternatively, one embodiment of the present invention is a semiconductor device including first to fourth transistors and a capacitor. Each of the first to fourth transistors has a first gate and a second gate. a first gate of the first transistor electrically connected to the first wiring; The second gate of the first transistor is electrically connected to the first wiring, and the source or drain of the first transistor is One of the inputs is electrically connected to the first wiring, and the other of the inputs is connected to the source or drain of the first transistor. The other end is electrically connected to one of the source and drain of the second transistor. The other of the source and drain of the second transistor is electrically connected to the second wiring. The first gate of the second transistor is electrically connected to the second gate of the third transistor. One of the source and the drain is electrically connected to the third wiring, and the first gate of the third transistor The gate is electrically connected to the other of the source and drain of the first transistor, and the third transistor The second gate of the third transistor is electrically connected to the other of the source and drain of the third transistor. The source or drain of the fourth transistor is connected to the source or drain of the third transistor. The other of the source and drain of the fourth transistor is electrically connected to The first gate of the fourth transistor is electrically connected to the fourth wiring. The first gate of the second transistor is electrically connected to the first gate of the fourth transistor. One electrode of the capacitance element is electrically connected to the first gate of the third transistor. The other electrode of the capacitance element is connected to the other of the source and drain of the third transistor. The semiconductor device is characterized in that the first gate and the second gate are electrically connected to each other. One of the ports functions as a gate and the other functions as a back gate.

[0012] The transistor preferably includes an oxide semiconductor in a semiconductor layer in which a channel is formed. stomach.

[0013] It is preferable that the channel length of the second transistor is shorter than the channel length of the first transistor. In addition, the channel width of the second transistor is longer than the channel width of the first transistor. It is preferable that [Effects of the Invention]

[0014] It is possible to provide a semiconductor device with high productivity. It is possible to provide a semiconductor device or the like having good reliability. Alternatively, a semiconductor device including a unipolar logic circuit or the like can be provided. Alternatively, a novel semiconductor device or the like can be provided.

[0015] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description, This becomes clear from the description, drawings, claims, etc. From any description, it is possible to extract effects other than these. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 1 is a circuit diagram illustrating a semiconductor device. [Figure 2] 1 is a timing chart illustrating an operation of a semiconductor device. [Figure 3] FIG. 1 is a circuit diagram illustrating an operation of a semiconductor device. [Figure 4] FIG. 1 is a circuit diagram illustrating an operation of a semiconductor device. [Figure 5] FIG. 1 is a circuit diagram illustrating a semiconductor device. [Figure 6] 1 is a timing chart illustrating an operation of a semiconductor device. [Figure 7] FIG. 1 is a circuit diagram illustrating an operation of a semiconductor device. [Figure 8] FIG. 1 is a circuit diagram illustrating an operation of a semiconductor device. [Figure 9] FIG. 1 is a circuit diagram illustrating a semiconductor device. [Figure 10] 1A and 1B illustrate an example of a transistor. [Figure 11] 1A and 1B illustrate an example of a transistor. [Figure 12] 1A and 1B illustrate an example of a transistor. [Figure 13] 1A and 1B illustrate an example of a transistor. [Figure 14] 1A and 1B illustrate an example of a transistor. [Figure 15] 1A and 1B illustrate an example of a transistor. [Figure 16] 1A and 1B illustrate an example of a transistor. [Figure 17] 1A and 1B illustrate an example of a transistor. [Figure 18] 1A and 1B illustrate an example of a transistor. [Figure 19] 1A and 1B illustrate an example of a transistor. [Figure 20] FIG. 2 is a diagram illustrating an energy band structure. [Figure 21] 1A and 1B are a flowchart and a schematic perspective view illustrating an example of a manufacturing process for an electronic component. [Figure 22] 1A to 1C illustrate examples of electronic devices. [Figure 23] 1A to 1C illustrate examples of electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0017] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in the form and details thereof without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be achieved by the following embodiments. It should not be construed as being limited to the contents of the description. The same reference numerals are used in different drawings to denote the same parts or parts having similar functions. The repeated explanation may be omitted.

[0018] In addition, the position, size, range, etc. of each component shown in the drawings are for the purpose of facilitating understanding of the invention. Therefore, the actual location, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc.

[0019] In addition, in the drawings, in order to facilitate understanding of the invention, the illustration of some components may be omitted. In addition, some hidden lines may be omitted.

[0020] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The numbers are used to indicate the order or priority of the processes or stacking steps. In addition, even if a term is not accompanied by an ordinal number in this specification, etc., it is used to avoid confusion of the constituent elements. In order to clarify the scope of the invention, ordinal numbers may be used in the claims. Even if a term has an ordinal number in the first place, it may be given a different ordinal number in the claims. In addition, even if a term is given an ordinal number in this specification, etc., it may be used in the patent. Ordinal numbers may be omitted in claims, etc.

[0021] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring." Furthermore, the terms "electrode" and "wiring" are used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the "line" is formed as a single unit.

[0022] In this specification, the terms "above" and "below" refer to the positional relationship of components directly above or below each other. For example, "electrode on insulating layer A" is not limited to being below and in direct contact with the insulating layer A. If the expression is "B", electrode B does not need to be formed directly on insulating layer A, The inclusion of other components between the edge layer A and the electrode B is not excluded.

[0023] The source and drain functions may also be different when using transistors with different polarities or when using circuits When the direction of the current changes during circuit operation, they are interchanged depending on the operating conditions. Therefore, it is difficult to determine which is the source and which is the drain. In this specification, the terms source and drain may be used interchangeably. Let's say.

[0024] In addition, when it is explicitly stated in this specification that X and Y are connected, is when X and Y are electrically connected and when X and Y are functionally connected. and the case where X and Y are directly connected are considered to be disclosed in this specification and the like. Therefore, the present invention is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also considered to be described in the drawings or text. do.

[0025] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a " is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. Therefore, even when it is expressed as "electrically connecting," in an actual circuit, In some cases, there are no physical connections and only wires running.

[0026] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). In the region where a channel is formed (also called a "channel forming region") , source (source region or source electrode) and drain (drain region or drain electrode) ) in one transistor. The channel length of a transistor is not necessarily the same value. Therefore, in this specification, the channel length is the area where the channel is formed. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0027] The channel width is the width of the semiconductor (or transistor) when it is in the on state. The region where the current flows and the gate electrode overlap, or the region where the channel is formed. The length of the part where the source and drain face each other in the region. In a transistor, the channel width does not necessarily have the same value in all regions. The channel width of each transistor may not be determined to be a single value. In the document, the channel width is defined as any one value, maximum value, or The minimum or average value.

[0028] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width (also called the "effective channel width") and the The channel width (also called "apparent channel width") may differ from the When the gate electrode covers the side surface of the semiconductor layer, the effective channel width is For example, when the gate voltage is too high and the In a transistor in which the electrodes cover the side of the semiconductor, the portion of the channel region formed on the side of the semiconductor In this case, the effective channel width may be larger than the apparent channel width. The width of the rule becomes larger.

[0029] In such a case, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known exactly, it is difficult to estimate the effective chip size. Channel width is difficult to measure accurately.

[0030] Therefore, in this specification, the apparent channel width is referred to as the "surrounding channel width (SCW)". In addition, in this specification, So, when we simply write "channel width," it means the enclosed channel width or the apparent channel width. In this specification, when simply referred to as a channel width, it may refer to the actual It may refer to the effective channel width. The width, apparent channel width, and enclosed channel width can be determined by analyzing cross-sectional TEM images. The value can be determined by, for example,

[0031] The field effect mobility of the transistor and the current value per channel width are calculated. In this case, the effective channel width is calculated using the enclosed channel width. The value may differ from that calculated using the channel width.

[0032] In addition, unless otherwise specified, the transistors shown in this specification and the like are enhancement transistors. The transistor is a normally-off type field effect transistor.

[0033] The impurities in a semiconductor refer to, for example, substances other than the main components that make up the semiconductor. For example, the concentration Elements with a concentration of less than 0.1 atomic percent can be considered impurities. The DOS (Density of States) of the conductor increases and carrier mobility The semiconductor may be an oxide semiconductor, and the crystallinity may decrease. In the case of a conductor, impurities that change the properties of the semiconductor include, for example, elements of Group 1, Group elements, Group 13 elements, Group 14 elements, Group 15 elements, and elements other than the main components of oxide semiconductors transition metals, especially hydrogen (which is also contained in water), lithium, sodium , silicon, boron, phosphorus, carbon, nitrogen, etc. In the case of oxide semiconductors, for example, hydrogen The inclusion of impurities can cause oxygen vacancies. In this case, impurities that change the properties of the semiconductor include, for example, oxygen and group 1 elements excluding hydrogen. These include the elements of Group 2, Group 13, and Group 15.

[0034] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to a state in which two lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" and "orthogonal" mean that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. "Straight" refers to two straight lines that form an angle of 60° or more and 120° or less.

[0035] In this specification, the terms "identical," "same," and "equal" are used to refer to counting values ​​and measurement values. " or "uniform" (including their synonyms) unless expressly stated otherwise. The calculations are subject to a margin of error of plus or minus 20%.

[0036] In addition, in this specification, when an etching process is performed after a photolithography process, In this case, unless otherwise specified, the resist mask formed in the photolithography process is It shall be removed after the etching process is completed.

[0037] In this specification, a high power supply potential VDD (hereinafter simply referred to as "VDD" or "H potential") ) indicates a power supply potential that is higher than the low power supply potential VSS. The potential VSS (hereinafter simply referred to as "VSS" or "L potential") is the high power supply potential VDD. It also refers to the power supply potential that is lower than the ground potential. For example, if VDD is at ground potential, VSS is at a potential lower than ground potential. When VSS is at ground potential, VDD is at a potential higher than ground potential.

[0038] Generally, "voltage" refers to the difference between a certain potential and a reference potential (for example, ground potential (GND potential) or In many cases, it refers to the potential difference between the source and the source potential. Therefore, the potential applied to wiring etc. may change depending on the reference potential. In some cases, the terms "voltage" and "potential" can be used interchangeably. Unless otherwise specified, VSS is the reference potential.

[0039] The words "film" and "layer" may be used interchangeably depending on the situation. For example, the term "conductive layer" can be replaced with "conductive film." ". Alternatively, for example, the term "insulating film" may be used. It may be possible to change the term to "insulating layer."

[0040] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is expressed as a hexagonal crystal system. .

[0041] (Embodiment 1) A semiconductor device 100 of one embodiment of the present invention will be described with reference to the drawings. FIG. 2 is a circuit diagram illustrating the configuration of the body device 100.

[0042] <Configuration example of semiconductor device 100> The semiconductor device 100 shown in FIG. 1A includes transistors 111 to 114, and a capacitor 117. The transistors 111 to 114 have a source, It is an n-channel transistor having a drain, a gate, and a back gate.

[0043] The gate and back gate are arranged to sandwich the channel forming region of the semiconductor layer. Therefore, the back gate can function in the same way as a gate. The potential may be the same as the gate, or may be the ground potential (GND potential) or any other potential. In addition, by changing the potential of the back gate independently of the gate, The threshold voltage of the transistor can be changed. One of the gates may be called "Gate 1" and the other "Gate 2." do.

[0044] In the semiconductor device 100 shown in FIG. 1A, the first gate and The second gate is electrically connected to the wiring 121, and either the source or the drain is connected to the wiring 121. and the other of the source and drain is electrically connected to node 131. In addition, one of the source and drain of the transistor 112 is electrically connected to the node 131. The other of the source and drain is electrically connected to the wiring 122, and the first gate The first gate and the second gate of the transistor 11 are electrically connected to a node 132. 3, one of the source and drain is electrically connected to the wiring 123, and the source or drain The other input is electrically connected to node 133, and either the first gate or the second gate is connected to node The other of the first gate and the second gate is electrically connected to the node 131. In addition, one of the source and drain of the transistor 114 is electrically connected to the The other of the source and drain is electrically connected to the wiring 124. The first gate and the second gate are electrically connected to a node 132. One electrode of the capacitor 117 is electrically connected to the node 131, and the other electrode is electrically connected to the node Node 132 is electrically connected to terminal 102. , node 133 is electrically connected to terminal 105 .

[0045] By providing a back gate in addition to the gate, the carriers flow The flow area becomes larger in the film thickness direction, and the amount of carrier movement increases. As a result, the on-state current of the transistor increases and the field-effect mobility also increases. Therefore, a transistor having a back gate needs to have a transistor with a required on-state current. In addition, the semiconductor layer is covered with the gate and back gate. This reduces the influence of the external electric field on the channel formation region, improving the reliability of the semiconductor device. The back gate will be explained in detail later.

[0046] In addition, when the same potential is supplied to the wiring 121 and the wiring 123, one of the wirings can be omitted. In addition, when the same potential is supplied to the wiring 122 and the wiring 124, either One of the wirings may be omitted. One of the source or drain of transistor 11 and one of the source or drain of transistor 113 The source or drain of the transistor 112 is electrically connected to the wiring 121. The other of the drain and the other of the source or drain of the transistor 114 are electrically connected to the wiring 122. are actively connected.

[0047] In addition, as in the semiconductor device 100b shown in FIG. 1C, the first gate of the transistor 112 Alternatively, one of the second gates may be electrically connected to the wiring 122. Either the first gate or the second gate may be electrically connected to the wiring 124. One of the first gate or second gate of transistor 111 and one of the first gate or second gate of transistor 113 are connected to each other. Alternatively, one of the second gates may be electrically connected to the wiring 125. For example, VSS or a potential equivalent to that of the wiring 122 or the wiring 124 is supplied.

[0048] If necessary, some or all of the transistors included in the semiconductor device 100 may be replaced with barrier transistors. It is also possible to make a transistor without a back gate. The circuit diagram of the semiconductor device 100 configured with a resistor is shown in FIG. 1(D) as a semiconductor device 100c. show.

[0049] The transistors 111 to 114 are OS transistors. Since the band gap of an oxide semiconductor is 2 eV or more, an OS transistor Specifically, when the voltage between the source and drain is At 3.5V and room temperature (25°C), the off-state current per 1µm of channel width is 1×10 - 20 Less than A, 1 x 10 -22 Less than A or 1 x 10 -24 Can be less than A In other words, the on / off ratio can be set to between 20 and 150 digits. OS transistors have a high withstand voltage between the source and drain. A semiconductor device for high power applications can be provided.

[0050] <<Operation Example of Semiconductor Device 100>> The semiconductor device 100 can function as an inverter circuit. When a high potential is input to terminal 02, a low potential is output from terminal 105, and when a low potential is input to terminal 102, When this signal is input, a high potential is output from terminal 105.

[0051] An example of the operation of the semiconductor device 100 will be described with reference to the timing chart of FIG. 2 and the circuits of FIGS. 3 and 4. The following description will be given using a circuit diagram. The wiring 121 and the wiring 123 are supplied with an H potential (VDD). It is assumed that the wiring 122 and the wiring 124 are supplied with an L potential (VSS). The threshold voltages of the transistors 111 to 114 are all the same. In the above, Vth is expressed as "Vth". Vth is greater than 0 volts and is less than (VDD-V SS) / 2.

[0052] [Period 151: H potential input period] During a period 151, when an H potential is input to the terminal 102, the node 132 becomes an H potential. The transistor 112 and the transistor 114 are turned on. The node 133 is at an L potential, and the transistor 113 is turned off. An L potential is output from a terminal 105 electrically connected to 33 (see FIG. 3(A)).

[0053] The transistors 111 and 112 are simultaneously turned on. In order to make the potential of 1 approach the L potential, the on-resistance of the transistor 112 (when the transistor is on) The resistance between the source and drain when the transistor 111 is turned on is set to For example, it is preferable to make the channel length of the transistor 112 as short as that of the transistor 112. Specifically, the channel length of the transistor 112 may be set to be shorter than that of the transistor 111. is set to 1 / 2 or less, preferably 1 / 5 or less, more preferably 1 / 4 or less, of the channel length of the transistor 111. It is preferable that the ratio is 1 / 10 or less, and more preferably 1 / 20 or less. The channel width of the transistor 112 may be set to be longer than the channel width of the transistor 111. Specifically, the channel width of the transistor 112 is set to be at least twice the channel width of the transistor 111. Preferably, the ratio is 5 times or more, more preferably 10 times or more, and even more preferably 20 times or more. For example, the transistor 112 may be a transistor having a back gate. Alternatively, the transistor 111 may not have a back gate.

[0054] [Period 152: L potential input period] During a period 152, when an L potential is input to the terminal 102, the node 132 becomes an L potential. The transistor 112 and the transistor 114 are turned off. A potential is supplied to the node 131 via the transistor 111. At this time, the potential of the node 131 The potential is VDD-Vth (see FIG. 3(B)).

[0055] In addition, since the potential of the node 131 is higher than Vth, the transistor 113 is turned on. Then, the voltage Vcc is applied from the wiring 123 to the node 1 through the transistor 113 (see FIG. 3B). At this time, the potential of the node 133 is VDD -Vth.

[0056] When a potential is supplied to the node 133, the potential of the node 131 coupled through the capacitor 117 Specifically, the potential of the node 131 becomes 2×(VDD−Vth). In addition, the potential of the node 133 finally becomes equal to that of the wiring 123. The potential rises to the vicinity of 2×VDD−Vth. Therefore, the transistor 111 is in the off state. Furthermore, an H potential (VDD) is output from the terminal 105 (see FIG. 4(B)).

[0057] <Variation 1> A circuit diagram of a semiconductor device 110 having a different configuration from the semiconductor device 100 is shown in FIG. The semiconductor device 110 includes transistors 111 to 113 and a capacitor 114. The semiconductor device 110 has fewer transistors than the semiconductor device 100. Therefore, the occupied area can be reduced compared to the semiconductor device 100. To avoid repetition, the following mainly describes the differences from the semiconductor device 100.

[0058] <Configuration Example of Semiconductor Device 110> In the semiconductor device 110 shown in FIG. 5A, the source or drain of the transistor 111 One of the inputs is electrically connected to the wiring 121, and the other of the source or drain and the first The gate is electrically connected to node 131, and the second gate is electrically connected to node 133. In addition, one of the source and drain of the transistor 112 is connected to the node 131. The other end is electrically connected to the wiring 122, and the first gate and the second gate is electrically connected to the terminal 102. One of the sources or drains is electrically connected to terminal 106, and the other of the sources or drains is connected to node 1. 33, and the first gate and the second gate are electrically connected to the wiring 123. One electrode of the capacitor 117 is electrically connected to the node 131, and the other electrode The pole is electrically connected to node 133. Node 131 is electrically connected to terminal 105. is connected to.

[0059] In addition, when the same potential is supplied to the wiring 121 and the wiring 123, one of the wirings can be omitted. The semiconductor device 110a shown in FIG. The first gate and the second gate are electrically connected to the wiring 121 .

[0060] Also, as in the semiconductor device 110b shown in FIG. 5C, the first gate of the transistor 112 Alternatively, one of the second gates may be electrically connected to the wiring 122. Either the first gate or the second gate may be electrically connected to the wiring 124. 124 is supplied with VSS.

[0061] If necessary, at least one of the transistor 112 and the transistor 113 may be The transistors 112 and 113 may be transistors without a back gate. The semiconductor device 1 is a semiconductor device in which both of the transistors 113 are transistors without back gates. A circuit diagram of the semiconductor device 10 is shown in FIG. 5(D) as a semiconductor device 110c.

[0062] <<Operation Example of Semiconductor Device 110>> The semiconductor device 110 can function as an inverter circuit. When a high potential is input to terminal 02, a low potential is output from terminal 105, and when a low potential is input to terminal 102, When this signal is input, a high potential is output from terminal 105.

[0063] Moreover, different potentials are supplied to the terminals 102 and 106. When an H potential is supplied to terminal 102, an L potential is supplied to terminal 106. If so, the terminal 106 is supplied with an H potential.

[0064] An example of the operation of the semiconductor device 110 will be described with reference to the timing chart of FIG. 6 and the circuits of FIGS. 7 and 8. This will be explained using a road diagram.

[0065] [Period 151: H potential input period] During a period 151, an H potential is input to the terminal 102, and an L potential is input to the terminal 106. Then, the transistors 112 and 113 are turned on, and the nodes 131 and An L potential is supplied to the node 131 and the node 133. An L potential is output from 105 (see FIG. 7(A)).

[0066] In the semiconductor device 110, the transistor 111 and the transistor 112 are simultaneously in an on state. Therefore, the transistor 111 and the transistor 112 in the semiconductor device 100 There are no restrictions on the on-resistance of 112.

[0067] [Period 152: L potential input period] During a period 152, an L potential is input to the terminal 102, and an H potential is input to the terminal 106. When this happens, the transistor 112 is turned off. A potential is supplied to the terminal 133 from the terminal 106. At this time, the gate of the transistor 113 is connected to the Since the H potential (VDD) is supplied from 123, the potential of the node 131 is VDD-Vt h (see FIG. 7(B)).

[0068] In addition, since the potential of the node 133 is higher than Vth, the transistor 111 is turned on. Then, the wiring 121 is connected to the node 1 through the transistor 111 (see FIG. 7B). 31 is supplied with a potential.

[0069] When a potential is supplied to the node 131, the potential of the node 133 coupled through the capacitor 117 Eventually, the potential of node 133 rises to approximately 2×VDD−Vth. Therefore, the transistor 113 is turned off. Also, the terminal 105 is supplied with an H potential (VD D) is output (see Figure 8).

[0070] <Variation 2> FIG. 9(A) shows a circuit diagram of a semiconductor device in which the number of transistors is further reduced from that of the semiconductor device 110. The semiconductor device 120 shown in FIG. 9A includes a transistor 111 and a transistor The semiconductor device 120 has fewer transistors than the semiconductor device 110. Therefore, the area occupied by the semiconductor device 110 can be reduced.

[0071] <Configuration example of semiconductor device 120> In the semiconductor device 120 shown in FIG. 9A, the source or drain of the transistor 111 One of the inputs is electrically connected to the wiring 125, and the other of the source or drain and the first The gate is electrically connected to node 131, and the second gate is electrically connected to terminal 103. In addition, one of the source and drain of the transistor 112 is connected to the node 131. The other end is electrically connected to the wiring 123, and the other end is electrically connected to the first gate or the second gate. One of the first gate and the second gate is electrically connected to the terminal 102, and the other of the first gate and the second gate is electrically connected to the terminal 104. Node 131 is electrically connected to terminal 105. .

[0072] Also, as in the semiconductor device 120a shown in FIG. 9(B), the first gate of the transistor 112 Either the first gate or the second gate may be electrically connected to the wiring 123. Since the number of input terminals can be reduced compared to the semiconductor device 120, Productivity can be improved.

[0073] <<Operation Example of Semiconductor Device 120>> The semiconductor device 120 can function as an inverter circuit. When a high potential is input to terminal 102 and terminal 104, and a low potential is input to terminal 103, An L potential is output from terminal 5. An L potential is input to terminals 102 and 104, and When a high potential is input to the terminal 103, VDD-Vth is output from the terminal 105. To output a high potential from terminal 105, a potential of VDD+Vth or higher must be input to terminal 103. Just put in the effort.

[0074] <Variation 3> FIG. 9C shows a circuit diagram of a semiconductor device in which the number of transistors is further reduced from that of the semiconductor device 110. The semiconductor device 130 shown in FIG. 9C includes a transistor 111 and a transistor The semiconductor device 130 has fewer transistors than the semiconductor device 110. Therefore, the area occupied by the semiconductor device 110 can be reduced.

[0075] <Configuration Example of Semiconductor Device 130> In the semiconductor device 130 shown in FIG. 9C, the source or drain of the transistor 111 One of the inputs is electrically connected to the wiring 125, and the other of the source and drain is connected to the node 13. 1, and one of the first gate and the second gate is electrically connected to the terminal 101. The other of the first gate and the second gate is electrically connected to a terminal 103. One of the source and drain of the transistor 112 is electrically connected to the node 131. The other is electrically connected to the wiring 123, and one of the first gate and the second gate is connected to the terminal 1 02, and the other of the first gate and the second gate is electrically connected to terminal 104. In addition, the node 131 is electrically connected to the terminal 105.

[0076] Also, as in the semiconductor device 130a shown in FIG. 9(D), the first gate of the transistor 111 Either the first gate or the second gate of the transistor 112 may be electrically connected to the wiring 123. Either the first gate or the second gate may be electrically connected to the wiring 123. The device 130a can reduce the number of input terminals compared to the semiconductor device 130, The productivity of semiconductor devices can be improved.

[0077] <<Operation Example of Semiconductor Device 130>> The semiconductor device 130 can function as an inverter circuit. A high potential is input to terminals 102 and 104, and a low potential is input to terminals 101 and 103. When the L potential is applied to the terminal 102 and the terminal 104, the L potential is output from the terminal 105. When a high potential is input to terminal 101 and terminal 103, VD In order to output a high potential from the terminal 105, 1 and terminal 103, a potential equal to or higher than VDD+Vth may be input.

[0078] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0079] (Embodiment 2) In this embodiment mode, a transistor that can be used in the semiconductor device shown in the above embodiment mode will be described. An example of the data is shown below.

[0080] The semiconductor device of one embodiment of the present invention includes a bottom-gate transistor and a top-gate transistor. The present invention can be implemented using various types of transistors, such as a transistor having a MOSFET, ... and a transistor having a MOSFET. The semiconductor layer material and transistor structure can be easily replaced to suit the production line. It is possible.

[0081] [Bottom-gate transistor] Figure 10(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 2 is a cross-sectional view of a transistor 410. The transistor 410 is formed on a substrate 271 with an insulating layer 272 interposed therebetween. The semiconductor layer 242 is formed on the electrode 246 via the insulating layer 226. The electrode 246 can function as a gate electrode. The insulating layer 226 can function as a gate insulating layer. It can function.

[0082] The insulating layer 225 is provided on the channel formation region of the semiconductor layer 242. Electrodes 244a and 244b are provided on the insulating layer 226 in contact with a portion of the insulating layer 226. A portion of electrode 244 a and a portion of electrode 244 b are formed on insulating layer 225 .

[0083] The insulating layer 225 can function as a channel protection layer. By providing the electrode 244a and the electrode 244b, the exposure of the semiconductor layer 242 that occurs when the electrode 244a and the electrode 244b are formed can be prevented. Therefore, when the electrodes 244a and 244b are formed, the semiconductor layer This prevents the channel formation region 242 from being etched. According to this, a transistor with good electrical characteristics can be realized.

[0084] The transistor 410 is also provided with an insulating layer 225 on the electrodes 244a and 244b. The insulating layer 228 has a layer 229 on it.

[0085] When an oxide semiconductor is used for the semiconductor layer 242, the electrodes 244a and 244b At least the portion in contact with the semiconductor layer 242 is provided with oxygen by removing oxygen from a portion of the semiconductor layer 242. It is preferable to use a material that can generate oxygen vacancies. The carrier concentration in the region where the defect occurs increases, and the region becomes n-type, and the n-type region (n + layer) and Therefore, the region can function as a source region or a drain region. Examples of materials that can remove oxygen from an oxide semiconductor and cause oxygen vacancies include , tungsten, titanium, etc.

[0086] The source and drain regions are formed in the semiconductor layer 242, forming an electrode 244a In addition, the contact resistance between the electrode 244b and the semiconductor layer 242 can be reduced. The electrical characteristics of the transistor, such as the effective mobility and threshold voltage, can be improved. can.

[0087] When a semiconductor such as silicon is used for the semiconductor layer 242, the semiconductor layer 242 and the electrode 244a and between the semiconductor layer 242 and the electrode 244b, as an n-type semiconductor or a p-type semiconductor. It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. It can function as a source or drain region of a transistor.

[0088] The insulating layer 229 has a function of preventing or reducing the diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 229 using a material having the above properties. You can also do this.

[0089] When an oxide semiconductor is used for the semiconductor layer 242, the insulating layer 229 is formed before or after the insulating layer 229 is formed. Alternatively, heat treatment may be performed before or after the formation of the insulating layer 229. The oxygen contained in the insulating layer 229 and other insulating layers is diffused into the semiconductor layer 242, Alternatively, the insulating layer 229 can be formed by heating. By doing so, oxygen vacancies in the semiconductor layer 242 can be compensated for.

[0090] The transistor 411 shown in FIG. 10A2 has a gate electrode formed on the insulating layer 229 and functioning as a back gate. The transistor 410 differs from the transistor 410 in that it has an electrode 223 that can be connected to the electrode 246. It can be formed using the same materials and methods as those described above.

[0091] <About the back gate> Generally, the back gate is formed of a conductive layer, and the gate and back gate form a channel in the semiconductor layer. The back gate is arranged to sandwich the formation region. Therefore, the back gate functions in the same way as the gate. The potential of the back gate may be the same as that of the gate, or may be the GND potential or The back gate potential may be changed independently of the gate potential. By changing the voltage, the threshold voltage of the transistor can be changed.

[0092] Both electrode 246 and electrode 223 can function as gates. The insulating layer 226, the insulating layer 225, the insulating layer 228, and the insulating layer 229 are gate insulating layers. The electrode 223 can function as an insulating layer. It may be provided between.

[0093] In addition, either the electrode 246 or the electrode 223 may be referred to as a "gate" or a "gate electrode." In this case, the other is called the "back gate" or "back gate electrode." In 411, when the electrode 223 is called a "gate electrode," the electrode 246 is called a "back gate." When the electrode 223 is used as a "gate electrode," the transistor 4 11 can be considered as a type of top-gate transistor. Either the electrode 221 or the electrode 223 is referred to as the "first gate" or the "first gate electrode", and the other The second gate electrode is sometimes called the "second gate" or "second gate electrode."

[0094] By providing the electrode 246 and the electrode 223 with the semiconductor layer 242 interposed therebetween, the electrode 24 6 and the electrode 223 are set to the same potential, the region where carriers flow in the semiconductor layer 242 The area becomes larger in the film thickness direction, so the amount of carrier movement increases. As the on-current of the transistor 411 increases, the field effect mobility also increases.

[0095] Therefore, the transistor 411 is a transistor having a large on-state current relative to its area. That is, the area occupied by the transistor 411 is determined based on the required on-current. According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It is possible.

[0096] In addition, since the gate and back gate are made of conductive layers, the electric current generated outside the transistor is The function of preventing magnetic fields from acting on the semiconductor layer where the channel is formed (especially against static electricity) The back gate is formed larger than the semiconductor layer, By covering the semiconductor layer with a gate, the electric field shielding function can be improved.

[0097] The electrode 246 (gate) and the electrode 223 (back gate) are each externally Therefore, the load generated on the insulating layer 272 side or above the electrode 223 is blocked. Charges such as electrons do not affect the channel forming region of the semiconductor layer 242. As a result, stress Testing (e.g., applying a negative charge to the gate of an NGBT (Negative Gate B ias-Temperature Stress Test (also known as "NBT" or "NBTS") The deterioration due to the drain voltage is suppressed. This can reduce the phenomenon that the gate voltage (start voltage) starts to change. This effect occurs when the electrode 246 and the electrode 223 are at the same potential or at different potentials. arise.

[0098] In addition, a transistor with a back gate is called a PGBT (PGBT) which applies a positive charge to the gate. Positive Gate Bias-Temperature Stress Test (PB The variation of the threshold voltage before and after the back gate transistor (PBTS) is also is smaller than a transistor without

[0099] Note that BT stress tests such as NGBT and PGBT are types of accelerated tests and are used for long periods of time. It is possible to quickly evaluate the change in transistor characteristics (aging) that occurs during use. In particular, the amount of change in the threshold voltage of a transistor before and after the BT stress test is The smaller the threshold voltage fluctuation, the higher the reliability. It can be said that this is a high-performance transistor.

[0100] In addition, the electrode 246 and the electrode 223 are provided, and the electrode 246 and the electrode 223 are set to the same potential. This reduces the amount of variation in threshold voltage. At the same time, the variations in electrical characteristics are reduced.

[0101] In addition, by forming the back gate using a conductive film having a light-shielding property, the semiconductor This prevents light from entering the conductor layer. This can prevent deterioration of electrical characteristics such as a shift in the threshold voltage of the transistor.

[0102] According to one embodiment of the present invention, a highly reliable transistor can be provided. A highly reliable semiconductor device can be realized.

[0103] Figure 10(B1) shows a channel protection transistor, which is one of the bottom gate transistors. 4 shows a cross-sectional view of transistor 420. Transistor 420 has a similar structure to transistor 410. The structure is different in that an insulating layer 225 covers the semiconductor layer 242. 25, the semiconductor layer 242 that is generated when the electrode 244a and the electrode 244b are formed Therefore, when the electrodes 244a and 244b are formed, the semiconductor This can prevent the layer 242 from becoming thin.

[0104] In addition, a portion of the insulating layer 225 overlapping the semiconductor layer 242 is selectively removed to form an opening. In this case, the semiconductor layer 242 and the electrode 244a are electrically connected to each other. In another opening formed by selectively removing a part of the insulating layer 225 overlapping the semiconductor layer The insulating layer 225 overlaps the channel forming region and is electrically connected to the electrode 244b. This region can function as a channel protection layer.

[0105] The transistor 421 shown in FIG. 10B2 has a gate electrode formed on the insulating layer 229 and functioning as a back gate. The transistor 420 differs from the transistor 420 in that it has an electrode 223 that can be connected.

[0106] Also, the transistors 420 and 421 are the same as the transistors 410 and 421. The distance between the electrode 244a and the electrode 246 and the distance between the electrode 244b and the electrode 246 are larger than the distance between the electrode 244a and the electrode 246 and the electrode 244b. Therefore, the distance between the electrodes 244a and 246 is increased. In addition, the parasitic capacitance generated between the electrode 244b and the electrode 246 can be reduced. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be realized. Cut.

[0107] The transistor 425 shown in FIG. 10C1 is a bottom-gate transistor. The transistor 425 is a channel-etched transistor having an insulating layer 225. Instead, the electrode 244a and the electrode 244b are formed in contact with the semiconductor layer 242. Therefore, the part of the semiconductor layer 242 that is exposed when the electrodes 244a and 244b are formed is etched. On the other hand, since the insulating layer 225 is not provided, productivity of the transistor can be improved. It can be done.

[0108] The transistor 426 shown in FIG. 10C2 has a gate electrode formed on the insulating layer 229 and functioning as a back gate. The transistor 425 differs from the transistor 425 in that it has an electrode 223 that can be connected.

[0109] [Top-gate transistor] FIG. 11A1 shows a cross-sectional view of a transistor 430, which is a type of top-gate transistor. The transistor 430 is formed by a semiconductor layer 272 on a substrate 271 via an insulating layer 272. 42, and an electrode contacting a part of the semiconductor layer 242 is provided on the semiconductor layer 242 and the insulating layer 272. and an electrode 244b in contact with a part of the semiconductor layer 242. , electrode 244a, and electrode 244b, and an insulating layer 226 is formed on the insulating layer 226. It has 46.

[0110] The transistor 430 is connected between the electrode 246 and the electrode 244a, and between the electrode 246 and the electrode 244b do not overlap, the parasitic capacitance generated between the electrode 246 and the electrode 244a, and Furthermore, the parasitic capacitance occurring between the electrode 246 and the electrode 244b can be reduced. After the electrode 246 is formed, the impurity 255 is introduced into the semiconductor using the electrode 246 as a mask. By introducing the impurities into the semiconductor layer 242, the impurities are self-aligned in the semiconductor layer 242. A pure region can be formed (see FIG. 11(A3)). A transistor with good electrical characteristics can be realized.

[0111] The introduction of the impurity 255 can be performed using an ion implantation device, an ion doping device, or a plasma treatment device. This can be done using a processing device.

[0112] The impurity 255 may be, for example, at least one of group 13 elements or group 15 elements. When an oxide semiconductor is used for the semiconductor layer 242, As the impurity 255, at least one element selected from rare gases, hydrogen, and nitrogen is used. It is also possible that

[0113] The transistor 431 shown in FIG. 11A2 has an electrode 223 and an insulating layer 227. The transistor 431 is formed on the insulating layer 272. The electrode 223 has an insulating layer 227 formed on the electrode 223. The electrode 223 has a Therefore, the insulating layer 227 can function as a gate insulating layer. The insulating layer 227 can function as the insulating layer 226. It can be achieved.

[0114] Like the transistor 411, the transistor 431 has a large on-state current relative to its area. That is, for the required on-current, the transistor 4 According to one aspect of the present invention, the area occupied by the transistor 31 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A body device can be realized.

[0115] The transistor 440 illustrated in FIG. 11B1 is a top-gate transistor. The transistor 440 is formed by forming the electrodes 244a and 244b on a semiconductor substrate. The transistor 430 differs from the transistor 430 in that the layer 242 is formed. The transistor 441 has an electrode 223 and an insulating layer 227. 40. In the transistor 440 and the transistor 441, the semiconductor layer 242 A part of the semiconductor layer 242 is formed on the electrode 244a, and another part of the semiconductor layer 242 is formed on the electrode 244b. will be done.

[0116] Like the transistor 411, the transistor 441 has a large on-state current relative to its area. That is, for the required on-current, the transistor 4 According to one aspect of the present invention, the area occupied by the transistor 41 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A body device can be realized.

[0117] The transistor 442 illustrated in FIG. 12A1 is a top-gate transistor. The transistor 442 has an electrode 244a and an electrode 244b on the insulating layer 229. The electrodes 244a and 244b are formed on the insulating layers 228 and 229. The opening is electrically connected to the semiconductor layer 242 .

[0118] Also, a part of the insulating layer 226 that does not overlap with the electrode 246 is removed. A portion of the insulating layer 226 of the electrode 442 extends beyond the end of the electrode 246 .

[0119] The electrode 246 and the insulating layer 226 are used as a mask to introduce impurities 255 into the semiconductor layer 242. By this, an impurity region is formed in the semiconductor layer 242 in a self-aligned manner. (See FIG. 12(A3)).

[0120] At this time, the impurity 255 is not introduced into the region of the semiconductor layer 242 that overlaps with the electrode 246, and the electrode Impurities 255 are introduced into the region that does not overlap with the insulating layer 246. The impurity concentration in the region where the impurity 255 is introduced through the insulating layer 226 is The electrode 246 in the semiconductor layer 242 is lower than the region where the impurity 255 is introduced. An LDD (Lightly Doped Drain) region is formed in the adjacent region.

[0121] The transistor 443 shown in FIG. 12A2 has an electrode 223 below the semiconductor layer 242. The electrode 223 is connected to the semiconductor layer 221 via an insulating layer 272. 242. The electrode 223 can function as a back gate electrode.

[0122] In addition, the transistor 444 shown in FIG. 12B1 and the transistor shown in FIG. 12B2 Like the area 445, the insulating layer 226 may be entirely removed in areas that do not overlap with the electrode 246. In addition, the transistor 446 shown in FIG. 12C1 and the transistor shown in FIG. 12C2 As in the case of the insulating layer 226, the insulating layer 226 may be left without being removed except for the opening.

[0123] The transistors 444 to 447 are also formed by forming the electrode 246. As a result, the semiconductor layer 242 is doped with impurities 255 using the mask. An impurity region can be formed in a self-aligned manner.

[0124] [s-channel transistor] FIG. 13 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 242. In FIG. The transistor 450 illustrated in FIG. 13 includes a semiconductor layer 242b formed on a semiconductor layer 242a. The upper surface of the semiconductor layer 242b and the side surfaces of the semiconductor layers 242a and 242b are The transistor 450 has a structure covered with the semiconductor layer 242c. FIG. 13(B) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 13(A). FIG. 13(C) is a cross-sectional view in the channel length direction. FIG. 1 is a cross-sectional view (cross-sectional view in the channel width direction) of a portion indicated by a dotted chain line.

[0125] The transistor 450 also includes an electrode 243 that functions as a gate electrode. The electrode 3 can be formed using the same material and method as the electrode 246. The electrode 243 is a laminate of two conductive layers.

[0126] The semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c are made of In or Ga. It is made of a material containing one or both of these. Typically, it is made of In-Ga oxide (In and Ga). oxides containing In and Zn), In-Zn oxides (oxides containing In and Zn), In-Zn-Zn oxides ( Oxides containing In, element M, and Zn. Element M is Al, Ti, Ga, Y, Zr, La, One or more elements selected from Ce, Nd, or Hf, which have a stronger bond with oxygen than In. It is a rare metal element.

[0127] The semiconductor layer 242a and the semiconductor layer 242c are formed by the same metal element as that of the semiconductor layer 242b. In other words, it is preferable that the material contains one or more kinds of the same metal element. When the material is used, the interface between the semiconductor layer 242a and the semiconductor layer 242b and the semiconductor layer This can make it difficult for interface states to occur at the interface between the semiconductor layer 242c and the semiconductor layer 242b. This makes it difficult for carriers to be scattered or captured at the interface, and improves the field-effect mobility of the transistor. It is also possible to reduce the variation in the threshold voltage of the transistor. Therefore, it is possible to realize a semiconductor device with good electrical characteristics. This becomes:

[0128] The thickness of the semiconductor layer 242a and the semiconductor layer 242c is preferably 3 nm or more and 100 nm or less. The thickness of the semiconductor layer 242b is set to be 3 nm or more and 50 nm or less. 0 nm or less, preferably 3 nm to 100 nm, and more preferably 3 nm to 50 nm m or less.

[0129] The semiconductor layer 242b is an In-M-Zn oxide, and the semiconductor layer 242a and the semiconductor When the layer 242c is also an In-M-Zn oxide, the semiconductor layer 242a and the semiconductor layer 242 c is In:M:Zn=x1:y1:z1 [atomic ratio], and the semiconductor layer 242b is In:M:Z If n=x2:y2:z2 [atomic ratio], then y1 / x1 is greater than y2 / x2 The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b can be selected so that Preferably, the semiconductor is arranged so that y1 / x1 is 1.5 times or more larger than y2 / x2. The semiconductor layer 242a, the semiconductor layer 242c, and the semiconductor layer 242b are preferably selected. The semiconductor layer 242a and the semiconductor layer 242b are formed such that y1 / x1 is at least twice as large as y2 / x2. More preferably, y1 / x1 is selected to be greater than y2 / x2 or more. Select layer 242b. When y1 is equal to or greater than x1, the transistor has stable electrical characteristics. However, if y1 is three times or more than x1, the field effect of the transistor Since the mobility is reduced, it is preferable that y1 is less than three times x1. By configuring the semiconductor layer 242a and the semiconductor layer 242c as described above, The layer 242c can be a layer in which oxygen vacancies are less likely to occur than in the semiconductor layer 242b.

[0130] When the semiconductor layer 242a and the semiconductor layer 242c are made of In-M-Zn oxide, I When the sum of n and element M is 100 atomic %, the atomic ratio of In to element M is: Preferably, In is less than 50 atomic % and the element M is 50 atomic % or more, and more preferably Preferably, In is less than 25 atomic % and the element M is 75 atomic % or more. When the semiconductor layer 242b is an In-M-Zn oxide, the sum of In and element M is 100 The atomic ratio of In to element M in atomic % is preferably 25 atoms. ic% or more, element M is less than 75 atomic %, and more preferably In is 34 atomic % or more. c% or more, and element M is less than 66 atomic %.

[0131] For example, the semiconductor layer 242a containing In or Ga and the semiconductor layer 242b containing In or Ga 242c as In:Ga:Zn=1:3:2, 1:3:4, 1:3:6, 1:4:5, In-Ga formed using targets with atomic ratios of 1:6:4 or 1:9:6 -Zn oxide or In formed using a target with an atomic ratio of In:Ga=1:9 The semiconductor layer 242b may be formed of a gallium oxide or a gallium nitride. In:Ga:Zn=3:1:2, 1:1:1, 5:5:6, 5:1:7, or 4:2 In-Ga-Zn oxide formed using a target with an atomic ratio of 4.1 was used. The semiconductor layers 242a, 242b, and 242c can be The atomic ratios each include a variation of ±20% of the above atomic ratios as an error.

[0132] In order to provide a transistor using the semiconductor layer 242b with stable electrical characteristics, The impurities and oxygen vacancies in the layer 242b are reduced to make the semiconductor layer 242b highly intrinsic. It is preferable to use an oxide semiconductor layer that can be regarded as pure intrinsic or substantially highly pure intrinsic. In addition, at least the channel forming region in the semiconductor layer 242b is highly pure intrinsic or substantially highly pure. It is preferable to use a semiconductor layer that can be regarded as intrinsic.

[0133] Note that an oxide semiconductor layer that can be considered to be substantially highly pure and intrinsic is one in which the carriers in the oxide semiconductor layer The density is 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 Less than, even more preferred Or 1 x 10 10 / cm 3 Less than 1 x 10 -9 / cm 3 The oxide semiconductor This refers to the layer.

[0134] FIG. 14 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 242. In FIG. The transistor 422 illustrated in FIG. 14 includes a semiconductor layer 242b formed on a semiconductor layer 242a. The transistor 422 is a bottom-gate transistor having a back gate. FIG. 14A is a top view of the transistor 422. FIG. 14B is a 14(A) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 14(A) (cross-section in the channel length direction). FIG. 14(C) is a cross-section of the portion indicated by the dashed line Y1-Y2 in FIG. 14(A). FIG. 1 is a cross-sectional view in the channel width direction.

[0135] The electrode 223 provided on the insulating layer 229 is connected to the insulating layer 226, the insulating layer 228, and the insulating layer 229. The openings 247a and 247b in the electrode 229 are electrically connected to the electrode 246. Therefore, the same potential is supplied to the electrode 223 and the electrode 246. It is not necessary to provide either the opening 247a or the opening 247b. It is not necessary to provide both the opening 247a and the opening 247b. If no electrode is provided, different potentials can be applied to the electrode 223 and the electrode 246 .

[0136] [Energy band structure of oxide semiconductors] Here, the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c are stacked. The function and effect of the semiconductor layer 242 formed will be described with reference to FIGS. 20(A) and 20(B). ) will be explained using the energy band structure diagram shown in Figure 20(A). 20(A) is an energy band diagram of the region indicated by the dashed line in 1-D2. 4 shows the energy band structure of the channel forming region of the transistor 450.

[0137] In Figure 20(A), Ec382, Ec383a, Ec383b, Ec383c, and Ec386 are the insulating layer 272, the semiconductor layer 242a, the semiconductor layer 242b, and the semiconductor layer 242c, respectively. , indicates the energy of the conduction band minimum of the insulating layer 226.

[0138] Here, the difference between the vacuum level and the energy at the bottom of the conduction band (also called "electron affinity") is The energy difference between the empty level and the top of the valence band (also called the ionization potential) The energy gap is calculated by subtracting the energy gap. For example, the measurement can be performed using HORIBA JOBIN YVON UT-300. The energy difference between the vacuum level and the top of the valence band was measured by ultraviolet photoelectron spectroscopy (UPS). Traviolet Photoelectron Spectroscopy ( For example, it can be measured using VersaProbe (PHI).

[0139] The In-Ga was formed using a target with an atomic ratio of In:Ga:Zn=1:3:2. The energy gap of a-Zn oxide is about 3.5 eV and the electron affinity is about 4.5 eV. In addition, the In- Ga -Zn target with an atomic ratio of In:Ga:Zn=1:3:4 was used. The energy gap of Ga-Zn oxide is approximately 3.4 eV and the electron affinity is approximately 4.5 eV. In addition, the In film was formed using a target with an atomic ratio of In:Ga:Zn=1:3:6. The energy gap of Ga-Zn oxide is about 3.3 eV, and the electron affinity is about 4.5 eV. In addition, the I layer was formed using a target with an atomic ratio of In:Ga:Zn=1:6:2. The energy gap of n-Ga-Zn oxide is approximately 3.9 eV, and the electron affinity is approximately 4.3 eV. In addition, the film was formed using a target with an atomic ratio of In:Ga:Zn=1:6:8. The energy gap of In-Ga-Zn oxide is approximately 3.5 eV, and the electron affinity is approximately 4.4 e V. In addition, a target with an atomic ratio of In:Ga:Zn=1:6:10 was used for formation. The energy gap of the In-Ga-Zn oxide is approximately 3.5 eV and the electron affinity is approximately 4. 5 eV. In addition, a target with an atomic ratio of In:Ga:Zn=1:1:1 was used. The energy gap of the synthesized In-Ga-Zn oxide is approximately 3.2 eV, and the electron affinity is approximately 4 0.7 eV. In addition, using a target with an atomic ratio of In:Ga:Zn=3:1:2, The energy gap of the formed In-Ga-Zn oxide is approximately 2.8 eV, and the electron affinity is approximately It is 5.0 eV.

[0140] Since the insulating layer 272 and the insulating layer 226 are insulators, Ec382 and Ec386 are Closer to the vacuum level (lower electron affinity) than 3a, Ec383b, and Ec383c .

[0141] Also, Ec383a is closer to the vacuum level than Ec383b. is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more or 0 0.15eV or more and 2eV or less, 1eV or less, 0.5eV or less, or 0.4eV or less It is preferable that the level is close to an unoccupied level.

[0142] Also, Ec383c is closer to the vacuum level than Ec383b. is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more or 0 0.15eV or more and 2eV or less, 1eV or less, 0.5eV or less, or 0.4eV or less It is preferable that the level is close to an unoccupied level.

[0143] In addition, the vicinity of the interface between the semiconductor layer 242a and the semiconductor layer 242b and the A mixed region is formed near the interface with the semiconductor layer 242c, so that the energy of the conduction band minimum That is, at these interfaces, there are no or almost no levels. stomach.

[0144] Therefore, in the stacked structure having this energy band structure, electrons are transported through the semiconductor layer 242b Therefore, the interface between the semiconductor layer 242a and the insulating layer 272, Alternatively, even if a level exists at the interface between the semiconductor layer 242c and the insulating layer 226, the level The boundary between the semiconductor layer 242a and the semiconductor layer 242b has almost no effect on the movement of electrons. There is almost no level at the interface between the semiconductor layer 242c and the semiconductor layer 242b. Therefore, the movement of electrons in the region is not hindered. A transistor having a stacked structure of conductors can achieve high field-effect mobility.

[0145] As shown in FIG. 20A, the interface between the semiconductor layer 242a and the insulating layer 272 and the semiconductor layer 242b are In the vicinity of the interface between the dielectric layer 242c and the insulating layer 226, there are trap levels 39 due to impurities and defects. Although 0 can be formed, the semiconductor layer 242a and the semiconductor layer 242c are present. This can keep the semiconductor layer 242b away from the trap level.

[0146] In particular, in the transistor 134 exemplified in this embodiment, the upper surface and the side surface of the semiconductor layer 242b are The lower surface of the semiconductor layer 242b is in contact with the semiconductor layer 242a. In this way, the semiconductor layer 242b is covered with the semiconductor layer 242a and the semiconductor layer 242c. By forming the semiconductor layer in this manner, the influence of the trap levels can be further reduced.

[0147] However, if the energy difference between Ec383a or Ec383c and Ec383b is small, In this case, electrons in the semiconductor layer 242b may exceed the energy difference and reach the trap level. When electrons are captured in the trap level, a negative fixed charge is generated at the interface of the insulating layer, The threshold voltage of the transistor is shifted in the positive direction.

[0148] Therefore, the energy difference between Ec383a and Ec383c and Ec383b is When each of these is set to 0.1 eV or more, preferably 0.15 eV or more, the threshold voltage of the transistor is This reduces voltage fluctuations and improves the electrical characteristics of the transistor. Desirable.

[0149] The band gaps of the semiconductor layer 242a and the semiconductor layer 242c are It is preferable that the band gap is wider than that of b.

[0150] FIG. 20(B) shows the energy band structure of the portion indicated by the dashed line D3-D4 in FIG. 14(B). FIG. 20B shows the energy band of the channel formation region of the transistor 422. The structure is shown.

[0151] In FIG. 20B, Ec387 represents the energy of the bottom of the conduction band of the insulating layer 228. By forming the semiconductor layer 242 into two layers, the semiconductor layer 242a and the semiconductor layer 242b, a transistor In addition, since the semiconductor layer 242c is not provided, the trap level 390, but the semiconductor layer 242 is more susceptible to the influence of the electric field 390 than when the semiconductor layer 242 has a single layer structure. Effective mobility can be achieved.

[0152] According to one embodiment of the present invention, a transistor with little variation in electrical characteristics can be provided. Therefore, a semiconductor device with little variation in electrical characteristics can be realized. According to one embodiment, a highly reliable transistor can be realized. Therefore, a semiconductor device with good performance can be realized.

[0153] In addition, oxide semiconductors have a large energy gap of 2 eV or more, making them highly transparent to visible light. In addition, in a transistor obtained by processing an oxide semiconductor under appropriate conditions, indicates that the off-state current is 100 zA (1 x 10 -19 A) or less, or 10zA (1 x 10 -20 A) or less, and even 1zA (1 × 1 0 -21 A) or less. Therefore, a semiconductor device with low power consumption can be provided. It is possible.

[0154] According to one embodiment of the present invention, a transistor with low power consumption can be provided. As a result, a semiconductor device such as a display element or a display device with low power consumption can be realized. Furthermore, it is possible to realize a semiconductor device such as a display element or a display device with high reliability.

[0155] Returning to the description of the transistor 450 shown in FIG. By providing the layer 242b, the side surface of the semiconductor layer 242b can also be covered with the electrode 243. That is, the transistor 450 can be configured such that the semiconductor layer 242b In this way, the electric field of the conductive film The structure of a transistor that electrically surrounds the semiconductor layer in which the channel is formed is called a surro This is called an unded channel (s-channel) structure. A transistor with an EL structure is called an "s-channel transistor" or "s -channel transistor.

[0156] In the s-channel structure, a channel is formed in the entire (bulk) semiconductor layer 242b. In the s-channel structure, the drain current of the transistor can be increased. Furthermore, the electric field of the electrode 243 can As a result, the entire channel formation region formed in the semiconductor layer 242b can be depleted. Therefore, in the s-channel structure, the off-state current of the transistor can be further reduced. It is possible.

[0157] In addition, by increasing the height of the protrusions of the insulating layer 272 and reducing the channel width, the s-channel The effect of increasing the on-current and reducing the off-current due to the n-type structure can be further enhanced. Furthermore, when forming the semiconductor layer 242b, the exposed semiconductor layer 242a may be removed. In this case, the side surfaces of the semiconductor layer 242a and the semiconductor layer 242b may be aligned.

[0158] 15, a transistor 451 is provided below the semiconductor layer 242 with an insulating layer interposed therebetween. An electrode 223 may be provided instead. FIG. 15A is a top view of the transistor 451. 15(B) is a cross-sectional view of the area indicated by the dashed line X1-X2 in FIG. 15(A). 15(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 15(A).

[0159] 16, an insulating layer 275 is provided above the electrode 243. 16A, the layer 214 may be provided over the insulating layer 275. 16(B) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 16(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. FIG.

[0160] In FIG. 16, the layer 214 is provided on the insulating layer 275, but it may be provided on the insulating layer 228 or The layer 214 may be provided over the insulating layer 229. By forming the layer 214 using a light-blocking material, This can prevent the transistor characteristics from changing due to irradiation and the reliability from decreasing. The layer 214 is formed to be at least larger than the semiconductor layer 242b, and the layer 214 is formed to be at least larger than the semiconductor layer 242b. The layer 214 can be made of an organic material, an inorganic material, or the like. Alternatively, the layer 214 may be made of a conductive material. In this case, the layer 214 may be supplied with a voltage or may be left in an electrically floating state. You may do so.

[0161] FIG. 17 shows an example of a transistor having an s-channel structure. The transistor 448 has almost the same configuration as the transistor 447 described above. In the transistor 448 , the semiconductor layer 242 is formed on the protrusion of the insulating layer 272 . The transistor 448 is a type of top-gate transistor with a back gate electrode. FIG. 17A is a top view of the transistor 448. FIG. 17B is a top view of the transistor 448. 17(A) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. ) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG.

[0162] In FIG. 17, the semiconductor layer 242 constituting the transistor 448 is made of an inorganic semiconductor such as silicon. In FIG. 17, the semiconductor layer 242 is formed in a region overlapping with the gate electrode. The semiconductor layer 242i, two semiconductor layers 242t, and two semiconductor layers 242u are provided in the region. The semiconductor layer 242i is disposed between two semiconductor layers 242t. The layer 242i and the two semiconductor layers 242t are disposed between the two semiconductor layers 242u. .

[0163] When the transistor 448 is in an on state, a channel is formed in the semiconductor layer 242i. The semiconductor layer 242i functions as a channel formation region. The semiconductor layer 242u functions as a high concentration impurity region (LDD). In addition, one or both of the two semiconductor layers 242t t may not be provided. In addition, one of the two semiconductor layers 242u functions as a source region, and the other semiconductor layer 242u functions as a drain region.

[0164] The electrode 244a provided on the insulating layer 229 is connected to the insulating layer 226, the insulating layer 228, and the insulating layer 229. An opening 247c is provided in the layer 229, and the opening 247c is electrically connected to one of the semiconductor layers 242u. The electrode 244b provided on the insulating layer 229 is connected to the insulating layer 226 and the insulating layer 229. 28 and the other side of the semiconductor layer 242u in the opening 247d provided in the insulating layer 229. and is electrically connected.

[0165] The electrode 243 provided on the insulating layer 226 is connected to the insulating layer 226 and the insulating layer 272. The electrode 223 is electrically connected to the opening 247a and the opening 247b. Therefore, the same potential is supplied to the electrode 243 and the electrode 223. It is not necessary to provide either the opening 247a or the opening 247b. In the case where both the openings 247a and 247b are not provided, In this case, different potentials can be applied to the electrodes 223 and 243 .

[0166] 18(A) and 18(B) show another example of an s-channel transistor. FIG. 18A is a plan view of the transistor 473. FIG. 18B is a plan view of the transistor 473. (A) is a cross-sectional view of the area indicated by the dashed line L1-L2 and the area indicated by the dashed line W1-W2. In FIG. 18B, L1-L2 is a cross section of the transistor 473 in the channel length direction. 10, where W1-W2 is a cross-sectional view of the transistor 473 in the channel width direction.

[0167] The transistor 473 includes a semiconductor layer 242, an insulating layer 226, an electrode 246, an electrode 244a, and The insulating layer 226 has an electrode 244b. The electrode 246 can function as a gate electrode. The electrode 244a can function as either a source electrode or a drain electrode. The electrode 244b can function as the other of the source electrode or the drain electrode. The transistor 473 has an insulating layer 273 and an insulating layer 272 formed on a substrate 271. It is provided through.

[0168] In FIG. 18B, an insulating layer 273 is provided on a substrate 271, and an insulating film is provided on the insulating layer 273. The insulating layer 272 has a protrusion, and an island-shaped semiconductor layer 24 is formed on the protrusion. 2a and an island-shaped semiconductor layer 242b are provided. Also, an electrode 24 is provided on the semiconductor layer 242b. 4a and an electrode 244b are provided. The region can function as either the source or the drain of the transistor 473. The area of ​​the electrode 242b overlapping with the electrode 244b is the source or drain of the transistor 473. Therefore, the semiconductor layer 242b can function as the other electrode. The enclosed region 269 can function as a channel forming region.

[0169] In addition, an oxide semiconductor layer 274 is provided over the electrode 244a and the electrode 244b. An insulating layer 275 is provided over the semiconductor layer 274. An opening is provided in the layer 275 in an area overlapping the area 269, and the opening has a side and a bottom surface. A semiconductor layer 242c is provided in the opening. An insulating layer 226 is provided along the side and bottom surfaces of the opening. , through the semiconductor layer 242c and the insulating layer 226, and along the side and bottom surfaces of the opening. Thus, an electrode 246 is provided.

[0170] The opening is formed between the semiconductor layer 242a and the semiconductor layer 24 in the cross section in the channel width direction. Therefore, in the region 269, the semiconductor layer 242a and The side surfaces of the semiconductor layer 242b and the semiconductor layer 242c are covered with the semiconductor layer 242c. The side surfaces of the body layer 242a and the semiconductor layer 242b are covered with an oxide semiconductor layer 274.

[0171] Moreover, an insulating layer 276 is provided on the insulating layer 275, and an insulating layer 277 is provided on the insulating layer 276. In addition, electrodes 289a, 289b, and 289c are provided on the insulating layer 277. The electrode 289a is formed by insulating layers 277, 276, 275, and In the opening formed by removing a part of the oxide semiconductor layer 274, the contact plug 28 The electrode 289b is electrically connected to the electrode 244a via the insulating layer 289a. 77, the insulating layer 276, the insulating layer 275, and the oxide semiconductor layer 274 are removed. In the opening, the electrode 244b is electrically connected to the contact plug 288b. The electrode 289c is formed by removing a part of the insulating layer 277 and the insulating layer 276. In the opening, the electrode 246 is electrically connected via a contact plug 288c. There are.

[0172] As shown in FIG. 18B, the transistor 473 has a current The electrode 246 covers the semiconductor layer 242b. Therefore, the side surface of the semiconductor layer 242b can also be covered with the electrode 246.

[0173] The transistor 474 shown in FIGS. 19A and 19B has an insulating layer 273 and an insulating layer 274. The transistor 473 has an electrode 223 functioning as a back gate electrode between the gate electrodes 72. FIG. 19A is a plan view of the transistor 474. FIG. 19B is a plan view of the transistor 474. 9(A) shows the cross section of the area indicated by the dashed line L1-L2 and the area indicated by the dashed line W1-W2. The electrode 223 may be provided between the substrate 271 and the insulating layer 273.

[0174] Both the electrode 246 and the electrode 223 can function as gate electrodes. The insulating layer 272 and the insulating layer 226 each function as a gate insulating layer. can be done.

[0175] By providing the electrode 246 and the electrode 223 with the semiconductor layer 242 interposed therebetween, the electrode 24 6 and the electrode 223 are set to the same potential, the region where carriers flow in the semiconductor layer 242 The area becomes larger in the film thickness direction, so the amount of carrier movement increases. As the on-current of transistor 474 increases, the field effect mobility also increases.

[0176] Also, for example, as shown in FIG. 19(C), an insulating layer 281 is formed on the electrode 223, and an insulating An insulating layer 282 may be formed over the layer 281 , and an insulating layer 272 may be formed over the insulating layer 282 . The insulating layer 281 and the insulating layer 282 are formed using the same material and method as the insulating layer 272. This can be done.

[0177] The insulating layer 282 may be made of hafnium oxide, aluminum oxide, tantalum oxide, or aluminum. By forming the insulating layer 282 from silicate or the like, it is possible to make the insulating layer 282 function as a charge trapping layer. By injecting electrons into the insulating layer 282, the threshold voltage of the transistor can be changed. Electrons can be injected into the insulating layer 282 by using, for example, the tunnel effect. By applying a positive voltage to the electrode 223, tunnel electrons are injected into the insulating layer 282. You can enter.

[0178] <Film formation method> The conductive layers, insulating layers, and semiconductor layers such as electrodes shown in this specification and the like can be formed by a CVD method, a vapor deposition method, or Generally, the CVD method is a method for forming a thin film by plasma deposition. Plasma Enhanced CVD (PECVD) These methods can be classified into the thermal CVD (TCVD) method, which uses heat, and the thermal CVD method. Furthermore, depending on the source gas used, metal CVD (MCVD) and organic metal CVD are also available. It can be classified into metal organic CVD (MOCVD) and other methods.

[0179] Generally, the evaporation method includes resistance heating evaporation, electron beam evaporation, MBE (Molecular Beam Evaporation), Beam Epitaxy) method, PLD (Pulsed Laser Deposit) ion) method, IAD (Ion beam Assisted Deposition) method , ALD (Atomic Layer Deposition) method, etc.

[0180] The plasma CVD method can produce high-quality films at relatively low temperatures. When using a deposition method that does not use plasma during deposition, damage to the surface to be deposited may occur. Moreover, a film with few defects can be obtained.

[0181] Generally, the sputtering method is classified into DC sputtering method, magnetron sputtering method, sputtering, RF sputtering, ion beam sputtering, ECR (Electro Cyclotron Resonance (Cyclotron Resonance) sputtering method, facing target sputtering They can be classified into methods such as the tarring method.

[0182] In the facing target sputtering method, the plasma is confined between the targets. It is possible to reduce plasma damage to the substrate. Also, depending on the tilt of the target, This allows the incident angle of sputtering particles onto the substrate to be shallow, improving step coverage. It can be done.

[0183] The CVD and ALD methods are film formation methods in which particles emitted from a target or the like are deposited. Unlike the conventional method, this is a film formation method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film formation method that is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method has excellent step coverage and thickness uniformity, making it suitable for aspect ratio However, the ALD method is relatively Because the deposition rate is slow, it is used in combination with other deposition methods such as CVD, which has a faster deposition rate. In some cases, this is preferable.

[0184] In the CVD and ALD methods, the composition of the resulting film can be controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any desired value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having a composition. By changing the flow rate ratio of the source gases while When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film by hand, the time required for film formation is shortened by the time required for transport and pressure adjustment. Therefore, the productivity of transistors and semiconductor devices can be improved. There are cases where this happens.

[0185] <Substrate> There is no particular limitation on the material used for the substrate 271. Depending on the purpose, the material may be transparent or non-transparent, or may be heat-treated. The material should be selected taking into consideration the heat resistance required to withstand the heat. Glass substrates such as glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, and surface treatment substrates. The substrate 271 may be a semiconductor substrate, a flexible substrate, or the like. (Flexible substrate), laminated film, base film, etc. may also be used.

[0186] The semiconductor substrate may be a single semiconductor made of silicon or germanium, for example. Conductor substrate, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of silicon, zinc oxide, or gallium oxide are also available. The semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0187] Examples of materials for flexible substrates, laminating films, and base films include polyethylene. polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether Polypropylene (PES), Polytetrafluoroethylene (PTFE), Polypropylene, Poly Ester, polyvinyl fluoride, polyvinyl chloride, polyolefin, polyamide (nylon , aramid, etc.), polyimide, polycarbonate, aramid, epoxy resin, acrylic Resins and the like can be used.

[0188] The flexible substrate used for the substrate 271 is preferably one having a lower linear expansion coefficient, since deformation due to the environment is suppressed. The flexible substrate used for the substrate 271 has a linear expansion coefficient of, for example, 1×10 -3 / K or less, 5 x10 -5 / K or less, or 1×10 -5 / K or less. Since ramid has a low linear expansion coefficient, it is suitable for a flexible substrate.

[0189] <Insulating layer> The insulating layer 272, the insulating layer 226, the insulating layer 225, the insulating layer 228, and the insulating layer 229 are made of nitrogen. Aluminum nitride, aluminum oxide, aluminum oxide nitride, aluminum oxynitride, oxide magnesium nitride, silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, Gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide , neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc. The above-mentioned materials are used in a single layer or a laminated layer. A mixture of a plurality of materials selected from the group consisting of nitride oxide materials and silicon dioxide materials may also be used.

[0190] In this specification, the term "nitride oxide" refers to a compound containing more nitrogen than oxygen. Also, oxynitrides refer to compounds that contain more oxygen than nitrogen. The content of Measurements can be made using techniques such as kScattering Spectrometry. .

[0191] In particular, the insulating layer 272 and the insulating layer 229 are formed using an insulating material that is difficult for impurities to penetrate. For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, A single layer of insulating material containing zirconium, lanthanum, neodymium, hafnium or tantalum For example, oxide films can be used as insulating materials that are difficult for impurities to penetrate. Aluminum, Aluminum Nitride, Aluminum Oxide Nitride, Aluminum Oxide Nitride, Oxide Gallium, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, acid Examples of the oxide include neodymium oxide, hafnium oxide, tantalum oxide, and silicon nitride. The insulating layer 272 or the insulating layer 229 may be made of indium tin zinc oxide (I n-Sn-Zn oxide) may also be used.

[0192] By using an insulating material that is difficult for impurities to penetrate for the insulating layer 272, impurities from the substrate 271 side can be prevented. The diffusion of impurities can be suppressed, and the reliability of the transistor can be improved. By using an insulating material that is difficult for objects to penetrate, the diffusion of impurities from the insulating layer 229 side is suppressed. This can improve the reliability of the transistor.

[0193] As insulating layer 272, insulating layer 226, insulating layer 225, insulating layer 228, and insulating layer 229 A plurality of insulating layers made of these materials may be stacked. The method for forming the insulating layer 226, the insulating layer 225, the insulating layer 228, and the insulating layer 229 is not particularly limited. , sputtering method, CVD method, MBE method or PLD method, ALD method, spin coating method, etc. Any of a variety of forming methods can be used.

[0194] For example, when forming an aluminum oxide film using thermal CVD, the solvent and aluminum A liquid containing aluminum precursor compounds (such as trimethylaluminum (TMA)) is vaporized. Two types of gases are used: trimethylaluminum gas and H2O as an oxidizer. The chemical formula is Al(CH3)3. Other material liquids include tris(dimethylamide) ) Aluminum, triisobutylaluminum, aluminum tris(2,2,6,6- tetramethyl-3,5-heptanedionate).

[0195] In addition, when an oxide semiconductor is used for the semiconductor layer 242, the hydrogen concentration in the semiconductor layer 242 is In order to prevent this increase, it is preferable to reduce the hydrogen concentration in the insulating layer. It is preferable to reduce the hydrogen concentration in the insulating layer in contact with 2. Specifically, The concentration was 2×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, More preferably 5×10 18 atoms / cm 3 In addition, the semiconductor layer 242 In order to prevent an increase in the nitrogen concentration, it is preferable to reduce the nitrogen concentration in the insulating layer. It is preferable to reduce the nitrogen concentration in the insulating layer in contact with the conductor layer 242. The nitrogen concentration in the layer was measured by SIMS at 5×10 19 atoms / cm 3 Less than, preferably is 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0196] The concentration measured by SIMS analysis may vary by ±40%. There is.

[0197] When an oxide semiconductor is used for the semiconductor layer 242, oxygen is released from the insulating layer by heating. In particular, the insulating layer in contact with the semiconductor layer 242 is preferably formed using an insulating layer that is exposed to light. For example, when the surface temperature of the insulating layer is 100 Temperature-programmed desorption is carried out at a temperature of 100°C to 700°C, preferably 100°C to 500°C. Degassing analysis method (TDS: Thermal Desorption Spectroscopy) py), the amount of oxygen desorbed from the insulating layer converted into oxygen atoms is 1.0 × 10 18 a toms / cm 3 More than 1.0×10 is preferable. 19 atoms / cm 3 More is preferred 1.0×10 20 atoms / cm 3 It is more preferable that In this case, the oxygen released by heating is also called "excess oxygen."

[0198] Alternatively, an insulating layer containing excess oxygen can be formed by adding oxygen to an insulating layer. The process of adding oxygen can be carried out by heat treatment under an oxygen atmosphere, ion implantation equipment, ion doping equipment, etc. This can be done using a doping device or a plasma treatment device. As a gas, 16 O2 or 18 Oxygen gas such as O2, nitrous oxide gas or ozone In this specification, the process of adding oxygen is referred to as "oxygen doping." Also called "processing."

[0199] In addition, the insulating layer is formed by sputtering in an atmosphere containing oxygen. Oxygen can be introduced into the layer.

[0200] Generally, a capacitance element has a structure in which a dielectric is sandwiched between two opposing electrodes. The thinner the thickness (the shorter the distance between the two opposing electrodes), and the higher the dielectric constant of the dielectric However, the thinner the dielectric, the larger the capacitance value. The current that flows unintentionally between the two electrodes due to the tunnel effect, etc. (hereinafter referred to as "leak") The capacitance element's breakdown voltage is likely to decrease. do.

[0201] The overlapping portion of the gate electrode, gate insulating layer, and semiconductor layer of the transistor acts as a capacitance element. (Hereinafter, this function is also referred to as "gate capacitance"). A channel is formed in the region where the gate electrode overlaps. The formation region functions as two electrodes of the capacitor element. It is preferable that the gate capacitance has a large value, but increasing the capacitance value If the gate insulating layer is made thinner to reduce the gate capacitance, problems such as an increase in leakage current and a decrease in dielectric strength will occur. This can easily cause problems.

[0202] Therefore, hafnium silicate (HfSi x O y (x>0, y>0) Nitrogen-doped hafnium silicate (HfSi x O y N z (x>0, y>0, z>0 )), nitrogen-doped hafnium aluminate (HfAl x O y N z (x>0, y>0 , z>0), hafnium oxide, or yttrium oxide. This makes it possible to ensure a sufficient capacitance value of the capacitance element even if the dielectric is made thick.

[0203] For example, if a high-k material with a large dielectric constant is used as the dielectric, the dielectric Since the capacitance value is equivalent to that when silicon oxide is used as the dielectric, the capacitance element can be This reduces the leakage current that occurs between the two electrodes formed. The insulating material may be laminated with another insulating material.

[0204] The insulating layer 275 has a flat surface. In addition to insulating materials, polyimide, acrylic resin, benzocyclobutene resin, polyamide Organic materials having heat resistance, such as amides and epoxy resins, can be used. In addition to the electrical materials, low-k materials, siloxane resins, PSG (Lingala It is possible to use materials such as BPSG (borophosphorus glass) and BPSG (borophosphorus glass). A plurality of insulating layers may be stacked.

[0205] The siloxane resin is a Si—O— compound formed using a siloxane material as a starting material. It corresponds to a resin containing Si bonds. Siloxane resins contain organic groups (e.g., alkane) as substituents. Alternatively, an alkyl group or an aryl group, or a fluoro group may be used. It's okay to be there.

[0206] The method for forming the insulating layer 275 is not particularly limited, and may be a sputtering method, an SOG method, or the like depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, etc.), printing For example, a printing method (screen printing, offset printing, etc.) may be used.

[0207] Further, the sample surface may be subjected to CMP treatment. This reduces the unevenness of the surface, thereby improving the coverage of the insulating layer and conductive layer that will be formed later.

[0208] <Semiconductor layer> The semiconductor layer 242 may be formed of a material such as a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor. Examples of semiconductor materials that can be used include silicon and germanium. Silicon germanium, silicon carbide, gallium arsenide, and oxide can also be used. Compound semiconductors such as nitride semiconductors and nitride semiconductors, as well as organic semiconductors can be used. .

[0209] In addition, when an organic semiconductor is used as the semiconductor layer 242, a low molecular weight organic material having an aromatic ring is used. and π-electron conjugated conductive polymers can be used. For example, rubrene, tetracene, etc. , pentacene, perylenediimide, tetracyanoquinodimethane, polythiophene, polya Cetylene, polyparaphenylene vinylene, etc. can be used.

[0210] As mentioned above, the band gap of the oxide semiconductor is 2 eV or more. By using an oxide semiconductor for 42, it is possible to realize a transistor with extremely low off-state current. In addition, OS transistors have a high withstand voltage between the source and drain. Furthermore, highly reliable display devices and semiconductor devices can be manufactured using the same. We can provide the following services.

[0211] In this embodiment, the case where an oxide semiconductor is used for the semiconductor layer 242 will be described. The oxide semiconductor used for the semiconductor layer 242 is, for example, an oxide semiconductor containing indium (In). For example, when an oxide semiconductor contains indium, carrier transport is facilitated. In addition, the oxide semiconductor preferably contains an element M.

[0212] The element M is preferably aluminum, gallium, yttrium, tin, or the like. Other elements that can be used for element M include boron, silicon, titanium, iron, and nickel. , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium However, the element M is the same as the above. In some cases, a combination of multiple elements may be used. For example, the element M has a bond energy with oxygen of 0. The element M is an element with a high energy. For example, the element M increases the energy gap of an oxide semiconductor. The oxide semiconductor preferably contains zinc. Conductors containing zinc may be prone to crystallization.

[0213] However, the oxide semiconductor used for the semiconductor layer 242 is not limited to an oxide containing indium. Examples of oxide semiconductors include zinc tin oxide, gallium tin oxide, and gallium oxide. oxides containing zinc, oxides containing gallium, oxides containing tin, and oxides not containing indium It may be a semiconductor or the like.

[0214] For example, the semiconductor layer 242 may be formed by thermal CVD using InGaZnO X (X>0) Deposit a film In the case of trimethylindium (In(CH3)3), trimethylgallium (Ga(C H3)3), and dimethylzinc (Zn(CH3)2). The combination is not limited to the above, and triethylgallium (Ga(C2H5)) may be used instead of trimethylgallium. 3) can also be used, and diethyl zinc (Zn(C2H5)2) can be used instead of dimethyl zinc. It can also be used.

[0215] For example, the semiconductor layer 242 may be formed by an ALD method using InGaZnO X (X>0) Deposit a film In this case, In(CH3)3 gas and O3 gas are introduced repeatedly to form an InO2 layer. Then, Ga(CH3)3 gas and O3 gas are introduced repeatedly to form a GaO layer. Then, Zn(CH3)2 gas and O3 gas are introduced repeatedly to form a ZnO layer. The order of these layers is not limited to this example. Two-layer and mixed compound layers such as InZnO2 layer, GaInO layer, ZnInO layer, GaZnO layer Alternatively, instead of O3 gas, H may be formed by bubbling water with an inert gas such as Ar. Although O gas may be used, it is preferable to use O gas that does not contain H. Instead of CH3)3 gas, In(C2H5)3 gas or tris(acetylacetonato)in Tris(acetylacetonato)indium may be used. Also, instead of Ga(CH3)3 gas, Ga(C2H5)3 gas or Tris(acetylacetonato)gallium may also be used. Gallium (Ga) is also called Ga(acac)3. It is also used in gases such as Zn(CH3)2 and zinc acetate. Lead may also be used. The gas species are not limited to these.

[0216] When oxide semiconductors are deposited by sputtering, indium is used to reduce the number of particles. It is preferable to use a target containing M. Also, an oxide target having a high atomic ratio of element M is preferable. When using a target containing indium, the conductivity of the target may be reduced. When using a target, the conductivity of the target can be increased, making DC discharge and AC discharge easier. Therefore, it becomes easier to handle large-area substrates, which increases the productivity of semiconductor devices. It is possible.

[0217] As mentioned above, when forming an oxide semiconductor film by sputtering, the target element For example, the molecular ratio of In:M:Zn is 3:1:1, 3:1:2, 3:1:4, 1:1:0. .5, 1:1:1, 1:1:2, 1:4:4, 5:1:7, 4:2:4.1, etc. good.

[0218] When an oxide semiconductor is formed by sputtering, the atomic ratio of the target is deviated. In particular, zinc may be deposited as an oxide semiconductor with a target atomic ratio of 0.1 to 0.2. The atomic ratio of the deposited film may be smaller than that of the target. The ratio of the number of atoms of zinc to be used may be between 40 atomic % and 90 atomic %. be.

[0219] In addition, in order to provide stable electrical characteristics to an OS transistor, it is necessary to reduce the impurities in the oxide semiconductor layer. The impurities and oxygen vacancies are reduced to make the semiconductor layer 242 highly intrinsic or substantially intrinsic. It is preferable that the oxide semiconductor layer be regarded as a highly pure intrinsic oxide semiconductor layer. The channel forming region in layer 242 is an oxide that can be considered to be highly pure intrinsic or substantially highly pure intrinsic. It is preferably a semiconductor layer.

[0220] When an oxide semiconductor is used for the semiconductor layer 242, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) It is preferable to use the oxide having a plurality of crystal parts aligned along the c-axis. It is a type of semiconductor.

[0221] In addition, the oxide semiconductor layer used for the semiconductor layer 242 has a region that is not CAAC. It is preferable that the thickness is less than 20% of the total body layer.

[0222] The CAAC-OS has a dielectric anisotropy. The dielectric constant in the c-axis direction is larger than that in the b-axis direction. The transistor with the gate electrode aligned along the c-axis using CAAC-OS has Because of its large dielectric constant, the electric field generated from the gate electrode easily reaches the entire CAAC-OS. This makes it possible to reduce the subthreshold swing value (S value). Transistors using CAAC-OS layers are less likely to experience an increase in S value due to miniaturization.

[0223] In addition, the CAAC-OS has a small dielectric constant in the a-axis and b-axis directions, so the source and drain Therefore, the influence of the electric field generated between the gates is reduced. , etc. are unlikely to occur, and the reliability of the transistor can be improved.

[0224] Here, the channel length modulation effect is the effect of increasing the drain voltage when the drain voltage is higher than the threshold voltage. This refers to the phenomenon in which the depletion layer expands from the inside, shortening the effective channel length. The channel effect is a phenomenon in which a decrease in the threshold voltage and other electrical characteristics occur due to a shortened channel length. The smaller the transistor, the greater the deterioration of electrical characteristics due to these phenomena. It is easy to occur.

[0225] After the oxide semiconductor layer is formed, oxygen doping treatment may be performed. In order to further reduce impurities such as moisture or hydrogen contained in the oxide semiconductor layer and to highly purify the oxide semiconductor layer, It is preferable to carry out a heat treatment.

[0226] For example, under a reduced pressure atmosphere, under an inert atmosphere such as nitrogen or a rare gas, under an oxidizing atmosphere, or under an ultra-dry atmosphere. Dry air (measured using a CRDS (cavity ring-down laser spectroscopy) dew point meter) The moisture content when the air is cooled is 20 ppm or less (-55°C in terms of dew point), preferably 1 ppm or less. Preferably, the oxide semiconductor layer is subjected to heat treatment in an air atmosphere of 10 ppb or less. An oxidizing atmosphere is an atmosphere containing 10 ppm or more of oxidizing gases such as oxygen, ozone, or nitrogen dioxide. An inert atmosphere is an atmosphere in which the above-mentioned oxidizing gases are less than 10 ppm. It also refers to an atmosphere filled with nitrogen or a rare gas.

[0227] Furthermore, by performing a heat treatment, the impurities are released and the oxygen contained in the insulating layer 226 is also removed. The oxygen vacancies in the oxide semiconductor layer can be reduced by diffusing the oxygen vacancies in the oxide semiconductor layer. After the heat treatment in an inert atmosphere, an oxidizing gas is added to replace the desorbed oxygen. The heat treatment may be carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more. The heat treatment may be performed at any time after the oxide semiconductor layer is formed.

[0228] There is no particular limitation on the heating device used for the heat treatment. For example, an electric furnace or an LR furnace may be used. TA (Lamp Rapid Thermal Anneal) equipment, GRTA (Gas Rapid Thermal Anneal (RTA) equipment The LRTA device uses a halogen lamp, Metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium The light (electromagnetic waves) emitted from lamps such as lamps and high-pressure mercury lamps The GRTA device is a device that uses high-temperature gas to perform heat treatment.

[0229] The heat treatment is carried out at a temperature of 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower. The treatment time should be within 24 hours. Heat treatment for more than 24 hours will result in a decrease in productivity. Therefore, it is not desirable.

[0230] <Electrode> Electrode 246, Electrode 223, Electrode 244a, Electrode 244b, Electrode 287, Electrode 297, Electrode The conductive material for forming the electrodes 289a, 289b, 292a, and 292b is Aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molyb Density, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zinc Materials containing one or more metal elements selected from the group consisting of ruthenium, beryllium, etc. can be used. In addition, there are also polycrystalline silicon containing impurity elements such as phosphorus, which have low electrical conductivity. Highly conductive semiconductors and silicides such as nickel silicide may also be used. A plurality of conductive layers may be stacked.

[0231] In addition, the electrodes 246, 223, 244a, 244b, 287, and 297 , a conductive material for forming the electrodes 289a, 289b, 292a, and 292b. Materials include indium tin oxide (ITO) and tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide oxides such as indium gallium zinc oxide, indium tin oxide doped with silicon Conductive materials containing nitrogen, such as titanium nitride and tantalum nitride, are used. It is also possible to combine the material containing the metal element with a conductive material containing oxygen. It is also possible to form a laminated structure in which the material containing the metal element and the material containing nitrogen are mixed. It is also possible to use a laminated structure in which a conductive material is combined with the above-mentioned material containing a metal element. The conductive material is a laminated structure that combines a conductive material containing oxygen and a conductive material containing nitrogen. The method for forming the conductive material is not particularly limited, and may be a vapor deposition method, a CVD method, a sputtering method, or the like. Various methods for forming the conductive layer, such as a coating method, can be used.

[0232] <Contact plug> Contact plug 288a, contact plug 288b, contact plug 288c, The contact plug 298a and the contact plug 298b are made of, for example, tungsten. A conductive material with high embeddability, such as silicon or polysilicon, can be used. The side and bottom surfaces of the material are covered with a barrier layer made of a titanium layer, a titanium nitride layer, or a laminate of these. In this case, the barrier layer is also called a contact plug. There is a match.

[0233] According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided. According to one embodiment of the present invention, a highly integrated semiconductor device can be provided.

[0234] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0235] (Embodiment 3) In this embodiment, examples of applying the semiconductor device described in the above embodiments to electronic components, and Examples of electronic devices equipped with the electronic components will be described with reference to FIGS. 21 and 22. Electronic components are also called semiconductor packages or IC packages. There are multiple standards and names depending on the terminal extraction direction and terminal shape. In this embodiment, an example of an electronic component will be described.

[0236] The electronic component is a semiconductor device according to the above embodiment that is used in an assembly process (post-process). The device is completed by combining components other than the semiconductor device.

[0237] The post-process will be explained using the flowchart shown in Figure 21(A). After the element substrate having the semiconductor device shown in the above embodiment is completed, the back surface ( The back surface (the surface on which semiconductor devices are not formed) is ground (step S1). By thinning the element substrate through grinding, warping of the element substrate can be reduced, and electronic components can be It is possible to reduce the size of the device.

[0238] Next, a "dicing step" is carried out to separate the element substrate into a plurality of chips (step S2). Then, the separated chips are individually picked up and bonded onto the lead frame. The die bonding process is then carried out (step S3). The joining to the frame is done by resin joining, tape joining, etc., depending on the product. In addition, instead of a lead frame, the chip is bonded to an interposer substrate. You may do so.

[0239] Next, the leads of the lead frame and the electrodes on the chip are electrically connected with thin metal wires. The wire bonding process is then carried out to connect the wires to the substrate (step S4). Silver wire or gold wire can be used. Wire bonding is also called ball bonding. Alternatively, wedge bonding can be used.

[0240] The wire-bonded chip is sealed with epoxy resin in the "sealing process (module)". The electronic components are then sealed in a resin (step S5). The circuitry built into the chip and the wires connecting the chip and the leads are mechanically It can protect from external forces and reduce deterioration of characteristics (reduced reliability) due to moisture and dust. It is possible.

[0241] Next, a "lead plating process" is carried out to plate the leads of the lead frame (step The plating process prevents the leads from rusting and makes it easier to mount the leads on a printed circuit board. The soldering can be done more reliably. Then, the leads are cut and shaped. Then, a "forming process" is carried out (step S7).

[0242] Next, a "marking process" is carried out, in which printing (marking) is applied to the surface of the package. (Step S8) Then, the "inspection process" ( After step S9), the electronic component is completed.

[0243] The electronic components described above may be configured to include the transistors described in the above embodiments. This reduces malfunctions in high temperature environments and reduces manufacturing costs. It is possible to realize an electronic component having the semiconductor device. The present invention includes a semiconductor device that reduces malfunctions under high voltage and suppresses manufacturing costs. This is an electronic component that has been miniaturized and has relaxed restrictions on the environment in which it can be used.

[0244] A perspective view of the completed electronic component is shown in FIG. 21(B). As an example of a product, a perspective view of a QFP (Quad Flat Package) is shown below. The electronic component 700 shown in FIG. 21(B) includes leads 705 and a semiconductor device 703. The semiconductor device 703 is the semiconductor device described in the above embodiment mode or the like. It is possible.

[0245] The electronic component 700 shown in FIG. 21(B) is mounted on, for example, a printed circuit board 702. A plurality of such electronic components 700 are combined together, and each is electrically connected to a printed circuit board 702. By connecting the components together, a substrate (mounting substrate 704) on which electronic components are mounted is completed. The mounting board 704 is used in electronic devices and the like.

[0246] Next, referring to FIG. 22, a vehicle (such as a bicycle) driven by power from a fixed power source is provided with a power supply. Examples of applications in which the above electronic components are applied to drive circuits that drive inverters, motors, etc. We will explain about this.

[0247] FIG. 22(A) shows an electric bicycle 1010 as an application example. The electric bicycle is powered by passing an electric current through the motor 1011. 1010 is a storage device 1012 for supplying current to a motor 1011, and 22(A) has a driving circuit 1013 for driving the pedal. Although illustrated, it is not necessary.

[0248] The driver circuit 1013 is provided with an electronic component including the semiconductor device described in the above embodiment. The mounting board is installed. Therefore, it is possible to make an electric bicycle equipped with miniaturized electronic components. It will also be possible to realize electric bicycles with low power consumption and long range. Furthermore, it is possible to realize an electric bicycle with good reliability.

[0249] FIG. 22(B) shows an electric vehicle 1020 as another application example. 20 obtains power by passing current through the motor 1021. The electric vehicle 1020 includes a power storage device 1022 for supplying current to the motor 1021, and and a drive circuit 1023 for driving the motor.

[0250] The driver circuit 1023 is provided with an electronic component including the semiconductor device described in the above embodiment. Therefore, it is possible to make an electric vehicle equipped with miniaturized electronic components. It will also be possible to realize electric vehicles with low power consumption and long driving range. Furthermore, a highly reliable electric vehicle can be realized.

[0251] Further, electronic components including the semiconductor device described in the above embodiment can be used not only in electric vehicles (EVs). It is used in hybrid vehicles (HEV) and plug-in hybrid vehicles (PHEV), etc. It is also possible.

[0252] As described above, the electronic devices described in this embodiment mode include the semiconductor device according to the above embodiment. The electronic components are mounted on a mounting board. It is possible to realize electronic devices equipped with these components. It is also possible to realize electronic devices with low power consumption. Furthermore, it is possible to realize an electronic device with good reliability.

[0253] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0254] (Fourth embodiment) A semiconductor device according to one embodiment of the present invention can be used in a control circuit of various electronic devices. Specific examples of electronic devices using a semiconductor device according to one embodiment of the present invention are illustrated in FIGS.

[0255] Examples of electronic devices using a semiconductor device according to one embodiment of the present invention include display devices such as televisions and monitors. , lighting equipment, desktop or notebook personal computers, word processors stored on recording media such as DVD (Digital Versatile Disc) Image playback devices that play still or moving images, portable CD players, radios, tapes Recorders, headphone stereos, stereos, table clocks, wall clocks, cordless telephone handsets , transceivers, mobile phones, car phones, portable game consoles, tablet terminals, pachinko machines large game consoles such as PCs, calculators, personal digital assistants, electronic organizers, e-book readers, electronic translators, High frequency devices such as voice input devices, video cameras, digital still cameras, electric shavers, microwave ovens, etc. Wave heating devices, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, electric fans, hair dryers, air Air conditioning equipment such as conditioners, humidifiers, dehumidifiers, dishwashers, dish dryers, and clothes dryers electric refrigerators, electric freezers, electric refrigerator-freezers, DNA storage freezers, pocket refrigerators Examples include electric lights, tools such as chainsaws, smoke detectors, and medical equipment such as dialysis machines. Furthermore, guide lights, traffic lights, conveyor belts, elevators, escalators, and industrial robots , energy storage systems, industrial equipment such as energy storage devices for power leveling and smart grids Examples include:

[0256] In addition, moving objects propelled by electric motors using power from a power storage device are also included in the category of electronic devices. The above-mentioned mobile units include, for example, electric vehicles (EVs), vehicles with internal combustion engines and electric vehicles (EVs), and Hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs), These tires and wheels are converted into tracks, and motorized vehicles including electrically assisted bicycles are also available. Bicycles, motorcycles, electric wheelchairs, golf carts, small or large boats, submarines, helicopters Examples include aircraft, rockets, satellites, space probes, planetary probes, and spacecraft. .

[0257] An example of an electronic device is shown in FIG. 23. In FIG. 23, a display device 8000 is an embodiment of the present invention. 8 is an example of an electronic device using the semiconductor device 8004 according to the present invention. 8000 corresponds to a display device for receiving TV broadcasts, and includes a housing 8001, a display unit 8002, and a speaker unit. 8003, a semiconductor device 8004, a power storage device 8005, and the like. The semiconductor device 8004 is provided inside the housing 8001. This controls the driving of the cooling fan inside the display device 8000 and the adjustment of the light emission brightness. The display device 8000 can also be supplied with power from a commercial power source. Alternatively, power stored in the power storage device 8005 can be used.

[0258] The display unit 8002 includes a liquid crystal display device, an emitting device having a light emitting element such as an organic EL element in each pixel, and Device, electrophoretic display device, DMD (Digital Micromirror Device) ce), PDP (Plasma Display Panel), FED (Field A display device such as a Fluorescence Emission Display can be used.

[0259] In addition to TV broadcast reception, display devices are also used for personal computers and advertising displays. , including all display devices for displaying information.

[0260] In FIG. 23, a stationary lighting device 8100 includes a semiconductor device 8 according to one embodiment of the present invention. 8103. Specifically, the lighting device 8100 includes a housing 8101, The device includes a light source 8102, a semiconductor device 8103, a power storage device 8105, and the like. The body device 8103 is installed inside a ceiling 8104 where a housing 8101 and a light source 8102 are installed. However, the semiconductor device 8103 may be provided inside the housing 8101. The semiconductor device 8103 controls the luminance of the light source 8102. The lighting device 8100 can also be supplied with power from a commercial power source. Alternatively, power stored in a power storage device can be used.

[0261] 23 shows an example of a lighting device 8100 installed on a ceiling 8104. However, in the semiconductor device according to one embodiment of the present invention, the sidewall 8405, the floor 8406, and the like are not included in the ceiling 8104. 8406, windows 8407, etc., or It can also be used as a tabletop lighting device.

[0262] The light source 8102 may be an artificial light source that artificially obtains light using electricity. Specifically, incandescent lamps, fluorescent lamps and other discharge lamps, and light-emitting devices such as LEDs and organic EL elements The element is an example of the artificial light source.

[0263] In FIG. 23, an air conditioner having an indoor unit 8200 and an outdoor unit 8204 is 8A and 8B are examples of electronic devices using a semiconductor device 8203 according to one embodiment of the present invention. The internal unit 8200 includes a housing 8201, an air outlet 8202, a semiconductor device 8203, a power storage device 820 23, the semiconductor device 8203 is provided in an indoor unit 8200. However, the semiconductor device 8203 may be provided in the outdoor unit 8204. Alternatively, the semiconductor device 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204. The semiconductor device 8203 can be used in the compressor of an air conditioner. The air conditioner can also be powered by commercial power. The power can be supplied from the power storage device 8205 or can be stored in the power storage device 8205. It is also possible.

[0264] In Figure 23, a separate type air conditioner consisting of an indoor unit and an outdoor unit is shown. As an example, it is an all-in-one air conditioner that has the functions of both the indoor unit and the outdoor unit in a single housing. The semiconductor device according to one embodiment of the present invention can be used for the conditioner.

[0265] In FIG. 23 , an electric refrigerator-freezer 8300 includes a semiconductor device 8304 according to one embodiment of the present invention. Specifically, an electric refrigerator-freezer 8300 includes a housing 8301, Refrigerator door 8302, freezer door 8303, semiconductor device 8304, power storage device 8305, etc. In FIG. 23, a semiconductor device 8304 provided inside a housing 8301 It controls the operation of the motor used in the compressor of the electric refrigerator / freezer 8300. The Electric Refrigerator-Freezer 8300 can also be powered by a commercial power source. Alternatively, power stored in the power storage device 8305 can be used.

[0266] Among the above-mentioned electronic devices, high-frequency heating devices such as microwave ovens and electric rice cookers The sub-devices require high power for a short period of time, and also need to control high power consumption stably for a certain period of time. By using a semiconductor device according to one embodiment of the present invention, it is possible to stably control power. Therefore, a highly reliable electronic device can be realized.

[0267] This embodiment mode can be implemented in appropriate combination with other embodiment modes. [Explanation of symbols]

[0268] 100 Semiconductor device 101 terminal 102 terminals 103 terminal 104 terminals 105 terminal 106 terminals 110 Semiconductor device 111 Transistor 112 transistors 113 Transistor 114 transistors 117 Capacitor 120 Semiconductor device 121 Wiring 122 Wiring 123 Wiring 124 Wiring 125 Wiring 130 Semiconductor devices 131 nodes 132 nodes 133 nodes 151 period 152 period 214 layers 223 Electrode 225 Insulating Layer 226 Insulating Layer 227 Insulating Layer 228 Insulating Layer 229 Insulating Layer 242 Semiconductor layer 243 Electrode 246 Electrode 255 Impurities 269 ​​areas 271 Circuit Board 272 Insulating Layer 273 Insulating Layer 274 Oxide semiconductor layer 275 Insulating Layer 276 Insulating Layer 277 Insulating Layer 281 Insulating Layer 282 Insulating Layer 287 Electrode 297 Electrode 382 Ec 386 Ec 387 Ec 390 trap levels 410 Transistor 411 Transistor 420 transistors 421 Transistor 422 transistor 425 transistor 426 Transistor 430 transistors 431 Transistor 440 transistors 441 Transistor 442 transistors 443 Transistor 444 transistor 445 transistor 446 Transistor 447 Transistor 448 transistors 450 transistors 451 Transistor 452 transistors 473 Transistors 474 transistors 700 Electronic Components 702 Printed Circuit Board 703 Semiconductor Devices 704 Mounting board 705 Lead 1010 Electric Bicycle 1011 Motor 1012 Electricity storage device 1013 Drive circuit 1020 Electric Vehicle 1021 Motor 1022 Electricity storage device 1023 drive circuit 8000 display device 8001 Case 8002 Display section 8003 Speaker section 8004 Semiconductor devices 8005 Electricity storage devices 8100 Lighting equipment 8101 Housing 8102 Light source 8103 Semiconductor devices 8104 Ceiling 8105 Electricity storage devices 8200 indoor unit 8201 Housing 8202 Ventilation outlet 8203 Semiconductor devices 8204 Outdoor unit 8205 Energy storage devices 8300 Electric refrigerator-freezer 8301 Housing 8302 Refrigerator door 8303 Freezer door 8304 Semiconductor devices 8305 Energy storage devices 8405 Side wall 8406 floors 8407 Window 100a Semiconductor device 100b semiconductor device 100c Semiconductor device 110a Semiconductor device 110b semiconductor device 110c Semiconductor device 120a Semiconductor device 130a Semiconductor device 242a Semiconductor layer 242b Semiconductor layer 242c Semiconductor layer 242i Semiconductor layer 242t Semiconductor layer 242u Semiconductor layer 244a electrode 244b electrode 247a aperture 247b aperture 247c aperture 247d aperture 288a contact plug 288b contact plug 288c contact plug 289a electrode 289b Electrode 289c electrode 292a electrode 292b Electrode 298a Contact plug 298b contact plug 383a Ec 383b Ec 383c Ec

Claims

[Claim 1] The semiconductor device includes first to third transistors and a capacitance element, the first transistor has a first gate and a second gate; each of the second and third transistors is a bottom-gate transistor; a first gate of the first transistor is always electrically connected to a first wiring; a second gate of the first transistor is always electrically connected to one of the source and the drain of the third transistor; one of the source and the drain of the first transistor is always electrically connected to the first wiring; the other of the source and the drain of the first transistor is always electrically connected to a second wiring; one of the source and the drain of the second transistor is always electrically connected to the first wiring; the other of the source and the drain of the second transistor is always electrically connected to a third wiring; a first gate of the second transistor is always electrically connected to a fourth wiring; the other of the source and the drain of the third transistor is always electrically connected to a fifth wiring; a first gate of the third transistor is always electrically connected to a sixth wiring; one electrode of the capacitance element is always electrically connected to the second gate of the first transistor; The other electrode of the capacitance element is always electrically connected to the first wiring.

Images