Josephson device, superconducting circuit, quantum computing device, and method of manufacturing Josephson device

Abstract

This Josephson element has: a first superconducting metal layer comprising a first surface; a second superconducting metal layer comprising a second surface facing the first surface; and an insulating layer provided between the first surface and the second surface, wherein in a plan view seen from a direction orthogonal to the first surface, the contour of the second surface is inside the contour of the first surface.

Description

[Technical Field]

[0001] The present disclosure relates to a Josephson device, a superconducting circuit, a quantum computing device, and a method for manufacturing a Josephson device. [Background technology]

[0002] The quantum processing device includes a plurality of quantum bits, and the quantum bits include, for example, Josephson devices. The Josephson device includes two superconducting metal layers and an insulating layer therebetween. Various configurations of Josephson devices have been proposed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2015 / 0340584 [Patent Document 2] Japanese Patent Application Publication No. 2-288403 [Patent Document 3] US Patent Application Publication No. 2004 / 0183065 [Patent Document 4] Japanese Patent Application Publication No. 5-315659 Summary of the Invention [Problem to be solved by the invention]

[0004] The characteristics of multiple quantum bits included in a quantum computing device can vary. When the characteristics of multiple quantum bits vary, the coherence time varies, making it difficult to perform stable quantum operations.

[0005] An object of the present disclosure is to provide a Josephson device, a superconducting circuit, a quantum processing device, and a method for manufacturing a Josephson device that can suppress variations in characteristics among a plurality of quantum bits. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, there is provided a semiconductor device having a first superconducting metal layer having a first surface, a second superconducting metal layer having a second surface facing the first surface, and an insulating layer provided between the first surface and the second surface, wherein, in a plan view from a direction perpendicular to the first surface, the outline of the second surface is inside the outline of the first surface. The first surface and the second surface are circular, and the diameter of the second surface is smaller than the diameter of the first surface. A Josephson device is provided. [Effects of the Invention]

[0007] According to the present disclosure, it is possible to suppress variations in characteristics among a plurality of quantum bits. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view showing a deposition mask used in the first reference example. [Figure 2] FIG. 2 is a cross-sectional view showing a deposition mask used in the first reference example. [Figure 3] 3A to 3C are cross-sectional views (part 1) illustrating a method for manufacturing a Josephson element according to a first reference example. [Figure 4] 4A to 4C are cross-sectional views (part 2) illustrating a method for manufacturing a Josephson element according to the first reference example. [Figure 5] FIG. 5 is a schematic diagram (part 1) showing the relationship between the substrate and the evaporation source during evaporation in the first reference example. [Figure 6] FIG. 6 is a schematic diagram (part 2) showing the relationship between the substrate and the evaporation source during evaporation in the first reference example. [Figure 7] FIG. 7 is a cross-sectional view showing the difference in shape between two Josephson junctions in the first reference example. [Figure 8] FIG. 8 is a plan view showing a deposition mask used in the second reference example. [Figure 9] FIG. 9 is a cross-sectional view (part 1) showing a deposition mask used in the second reference example. [Figure 10] FIG. 10 is a cross-sectional view (part 2) showing the deposition mask used in the second reference example. [Figure 11]FIG. 11 is a cross-sectional view (part 1) showing a method for manufacturing a Josephson element according to a second reference example. [Figure 12] 12A to 12C are cross-sectional views (part 2) illustrating a method for manufacturing a Josephson element according to a second reference example. [Figure 13] FIG. 13 is a cross-sectional view showing the difference in shape between two Josephson junctions in the second reference example. [Figure 14] FIG. 14 is a plan view showing the Josephson device according to the first embodiment. [Figure 15] FIG. 15 is a cross-sectional view showing the Josephson device according to the first embodiment. [Figure 16] FIG. 16 is a cross-sectional view (part 1) showing a method for manufacturing a Josephson device according to the first embodiment. [Figure 17] FIG. 17 is a cross-sectional view (part 2) showing the method for manufacturing the Josephson device according to the first embodiment. [Figure 18] FIG. 18 is a cross-sectional view (part 3) showing the method for manufacturing the Josephson device according to the first embodiment. [Figure 19] FIG. 19 is a cross-sectional view (part 4) illustrating the method for manufacturing the Josephson device according to the first embodiment. [Figure 20] FIG. 20 is a cross-sectional view (part 5) illustrating the method for manufacturing the Josephson device according to the first embodiment. [Figure 21] FIG. 21 is a schematic diagram showing the relationship between the substrate and the evaporation source during evaporation in the first embodiment. [Figure 22] FIG. 22 is a plan view showing a Josephson device according to the second embodiment. [Figure 23] FIG. 23 is a cross-sectional view showing a Josephson device according to the second embodiment. [Figure 24] FIG. 24 is a cross-sectional view (part 1) showing a method for manufacturing a Josephson device according to the second embodiment. [Figure 25] FIG. 25 is a cross-sectional view (part 2) showing the method for manufacturing a Josephson device according to the second embodiment. [Figure 26]FIG. 26 is a cross-sectional view (part 3) showing the method for manufacturing the Josephson element according to the second embodiment. [Figure 27] FIG. 27 is a cross-sectional view (part 4) showing the method for manufacturing the Josephson device according to the second embodiment. [Figure 28] FIG. 28 is a schematic diagram showing the relationship between the substrate and the evaporation source during evaporation in the second embodiment. [Figure 29] FIG. 29 is a plan view showing a superconducting circuit according to the third embodiment. [Figure 30] FIG. 30 is a cross-sectional view showing a superconducting circuit according to the third embodiment. [Figure 31] FIG. 31 is a cross-sectional view (part 1) showing a method for manufacturing a superconducting circuit according to the third embodiment. [Figure 32] FIG. 32 is a cross-sectional view (part 2) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 33] FIG. 33 is a cross-sectional view (part 3) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 34] FIG. 34 is a cross-sectional view (part 4) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 35] FIG. 35 is a cross-sectional view (part 5) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 36] FIG. 36 is a cross-sectional view (part 6) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 37] FIG. 37 is a cross-sectional view (part 7) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 38] FIG. 38 is a cross-sectional view (part 8) showing the method for manufacturing a superconducting circuit according to the third embodiment. [Figure 39] FIG. 39 is a plan view showing a superconducting circuit according to the fourth embodiment. [Figure 40] FIG. 40 is a cross-sectional view showing a superconducting circuit according to the fourth embodiment. [Figure 41] FIG. 41 is a cross-sectional view (part 1) showing a method for manufacturing a superconducting circuit according to the fourth embodiment. [Figure 42] FIG. 42 is a cross-sectional view (part 2) showing the method for manufacturing a superconducting circuit according to the fourth embodiment. [Figure 43] FIG. 43 is a cross-sectional view (part 3) showing the method for manufacturing a superconducting circuit according to the fourth embodiment. [Figure 44] FIG. 44 is a cross-sectional view showing a superconducting circuit according to the fifth embodiment. [Figure 45] FIG. 45 is a cross-sectional view (part 1) showing a method for manufacturing a superconducting circuit according to the fifth embodiment. [Figure 46] FIG. 46 is a cross-sectional view (part 2) showing the method for manufacturing a superconducting circuit according to the fifth embodiment. [Figure 47] FIG. 47 is a cross-sectional view (part 3) showing the method for manufacturing a superconducting circuit according to the fifth embodiment. [Figure 48] FIG. 48 is a cross-sectional view (part 4) showing the method for manufacturing a superconducting circuit according to the fifth embodiment. [Figure 49] FIG. 49 is a plan view showing a superconducting circuit according to the sixth embodiment. [Figure 50] FIG. 50 is a cross-sectional view showing a superconducting circuit according to the sixth embodiment. [Figure 51] FIG. 51 is a cross-sectional view (part 1) showing a method for manufacturing a superconducting circuit according to the sixth embodiment. [Figure 52] FIG. 52 is a cross-sectional view (part 2) showing the method for manufacturing a superconducting circuit according to the sixth embodiment. [Figure 53] FIG. 53 is a cross-sectional view (part 3) showing the method for manufacturing a superconducting circuit according to the sixth embodiment. [Figure 54] FIG. 54 is a cross-sectional view showing a superconducting circuit according to the seventh embodiment. [Figure 55] FIG. 55 is a cross-sectional view (part 1) showing a method for manufacturing a superconducting circuit according to the seventh embodiment. [Figure 56] FIG. 56 is a cross-sectional view (part 2) showing the method for manufacturing a superconducting circuit according to the seventh embodiment. [Figure 57] FIG. 57 is a cross-sectional view (part 3) showing the method for manufacturing a superconducting circuit according to the seventh embodiment. [Figure 58] FIG. 58 is a cross-sectional view showing a superconducting circuit according to a modification of the fifth embodiment. [Figure 59] FIG. 59 is a diagram illustrating a quantum processing device according to the eighth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description may be omitted. In this disclosure, a plan view refers to a plan view from a direction perpendicular to the upper surface of the substrate.

[0010] First, a reference example of a method for manufacturing a Josephson device will be described. In the reference example, a superconducting metal layer is formed on a substrate using a deposition mask.

[0011] (1st reference example) A first reference example will be described. Fig. 1 is a plan view showing a deposition mask used in the first reference example. Fig. 2 is a cross-sectional view showing a deposition mask used in the first reference example. Fig. 2 corresponds to a cross-sectional view taken along line II-II in Fig. 1. Figs. 3 and 4 are cross-sectional views showing a method for manufacturing a Josephson device according to the first reference example. Figs. 5 and 6 are schematic views showing the relationship between a substrate and a deposition source during deposition in the first reference example.

[0012] The deposition mask 1200 used in the first reference example has a first resist layer 1210 and a second resist layer 1220. The first resist layer 1210 is provided on the substrate 1100, and the second resist layer 1220 is provided on the first resist layer 1210. The second resist layer 1220 has a first opening pattern 1221 extending in the X-axis direction parallel to the upper surface of the substrate 1100, and a second opening pattern 1222 extending in the Y-axis direction parallel to the upper surface of the substrate 1100 and perpendicular to the X-axis direction. The second opening pattern 1222 is located near one end of the first opening pattern 1221. The first resist layer 1210 has an opening pattern 1211 that surrounds the first opening pattern 1221 and the second opening pattern 1222 in a plan view from at least the Z-axis direction perpendicular to the upper surface of the substrate 1100.

[0013] When manufacturing a Josephson device, first, as shown in FIG. 3, a first superconducting metal layer 1310 is formed on a substrate 1100 by a vapor deposition method. At this time, as shown in FIG. 5, the Z-axis direction of the substrate 1100 is made non-parallel to a traveling direction 1501 of the evaporated material emitted from the evaporation source 1500. Specifically, a direction inclined from the +Z side to the +X side of the substrate 1100 is made parallel to the traveling direction 1501. The inclination angle θ1 at this time is set to an extent that the evaporated material passes through both the first opening pattern 1221 and the second opening pattern 1222. The first superconducting metal layer 1310 is formed at a position shifted toward the -X side from the first opening pattern 1221 and the second opening pattern 1222 in a plan view from the Z-axis direction. The first superconducting metal layer 1310 has a first pattern 1311 made of the evaporated material that passed through the first opening pattern 1221 and a second pattern 1312 made of the evaporated material that passed through the second opening pattern 1222. The first pattern 1311 extends in the X-axis direction, similar to the first opening pattern 1221, and the second pattern 1312 extends in the Y-axis direction, similar to the second opening pattern 1222.

[0014] After the first superconducting metal layer 1310 is formed, as shown in FIG. 4, the surface of the first superconducting metal layer 1310 is oxidized to form an oxide film 1330. Next, as also shown in FIG. 4, a second superconducting metal layer 1320 is formed on the substrate 1100 and the oxide film 1330 by vapor deposition. At this time, as shown in FIG. 6, the Z-axis direction of the substrate 1100 is made non-parallel to the traveling direction 1501 of the evaporated material emitted from the vapor deposition source 1500. Specifically, the direction tilted from the +Z side of the substrate 1100 to the -X side is made parallel to the traveling direction 1501. The tilt angle θ2 at this time is set to an extent that the evaporated material passes through both the first opening pattern 1221 and the second opening pattern 1222. The second superconducting metal layer 1320 is formed at a position shifted toward the +X side from the first opening pattern 1221 and the second opening pattern 1222 in a plan view from the Z-axis direction. The second superconducting metal layer 1320 has a first pattern 1321 made of evaporated raw material that has passed through the first opening pattern 1221, and a second pattern 1322 made of evaporated raw material that has passed through the second opening pattern 1222. The first pattern 1321 extends in the X-axis direction, similar to the first opening pattern 1221, and the second pattern 1322 extends in the Y-axis direction, similar to the second opening pattern 1222.

[0015] The second pattern 1312 of the first superconducting metal layer 1310 and the first pattern 1321 of the second superconducting metal layer 1320 are stacked with an oxide film 1330 sandwiched between them. The second pattern 1312 of the first superconducting metal layer 1310, the oxide film 1330, and the first pattern 1321 of the second superconducting metal layer 1320 form a Josephson junction.

[0016] However, when forming the first superconducting metal layer 1310, the angle of incidence of the evaporated material on the substrate 1100 varies depending on the position in the X-axis direction. For example, when forming the first superconducting metal layer 1310, the angle of incidence on the center of the substrate 1100 is 90°-θ1, but the angle of incidence near the end on the +X side of the substrate 1100 is greater than 90°-θ1, and the angle of incidence near the end on the +X side of the substrate 1100 is smaller than 90°-θ1. For example, if the diameter of the substrate 1100 is 6 inches (approximately 15 cm), the distance between the center of the substrate 1100 and the evaporation source 1500 is 60 cm, and the tilt angle θ1 is 30°, the angle of incidence on the center of the substrate 1100 is 60°, the angle of incidence on the end on the +X side of the substrate 1100 is 66.3°, and the angle of incidence near the end on the +X side of the substrate 1100 is 54.2°. Therefore, the angles of incidence can differ by as much as 12.1°.

[0017] Similarly, the angle of incidence of the evaporated material onto substrate 1100 during the formation of second superconducting metal layer 1320 also differs depending on the position in the X-axis direction. For example, during the formation of second superconducting metal layer 1320, the angle of incidence onto the center of substrate 1100 is 90°-θ2, but the angle of incidence onto the vicinity of the end on the +X side of substrate 1100 is smaller than 90°-θ2, and the angle of incidence onto the vicinity of the end on the +X side of substrate 1100 is larger than 90°-θ1.

[0018] Therefore, strictly speaking, as shown in Fig. 7, the Josephson junction formed near the end on the +X side of the substrate 1100 has a different shape from the Josephson junction formed near the end on the -X side. In the first reference example, this difference in shape causes variations in the characteristics of the Josephson junction. There is also a risk of a break in the second superconducting metal layer 1320. Fig. 7 is a cross-sectional view showing the difference in shape between the two Josephson junctions in the first reference example.

[0019] (2nd reference example) A second reference example will be described. Fig. 8 is a plan view showing a deposition mask used in the second reference example. Figs. 9 and 10 are cross-sectional views showing a deposition mask used in the second reference example. Fig. 9 corresponds to a cross-sectional view taken along line IX-IX in Fig. 8, and Fig. 10 corresponds to a cross-sectional view taken along line XX in Fig. 8. Figs. 11 and 12 are cross-sectional views showing a method for manufacturing a Josephson device according to the second reference example. Figs. 11 and 12 correspond to cross-sectional views taken along line XI-XI in Fig. 8.

[0020] The deposition mask 2200 used in the second reference example has a first resist layer 2210 and a second resist layer 2220. The first resist layer 2210 is provided on the substrate 1100, and the second resist layer 2220 is provided on the first resist layer 2210. The second resist layer 2220 has a first opening pattern 2221 extending in the X-axis direction parallel to the upper surface of the substrate 1100, and a second opening pattern 2222 extending in the Y-axis direction parallel to the upper surface of the substrate 1100 and perpendicular to the X-axis direction. The first opening pattern 2221 and the second opening pattern 2222 intersect each other near the center in the longitudinal direction. The first resist layer 2210 has a first opening pattern 2211 surrounding the first opening pattern 2221 and a second opening pattern 2212 surrounding the second opening pattern 2222 in a plan view from the Z-axis direction perpendicular to the upper surface of the substrate 1100.

[0021] When manufacturing a Josephson device, first, as shown in FIG. 11 , a first superconducting metal layer 2310 is formed on a substrate 1100 by vapor deposition. At this time, as in the first reference example, the Z-axis direction of the substrate 1100 is made non-parallel to the traveling direction 1501 of the evaporated material emitted from the vapor deposition source. Specifically, the direction tilted from the +Z side to the +X side of the substrate 1100 is made parallel to the traveling direction 1501. The tilt angle at this time is set to such an extent that the evaporated material passes through the first opening pattern 2221 but cannot pass through the second opening pattern 2222. The first superconducting metal layer 2310 extends in the X-axis direction, similar to the first opening pattern 2221.

[0022] After the first superconducting metal layer 2310 is formed, as shown in FIG. 12, the surface of the first superconducting metal layer 2310 is oxidized to form an oxide film 2330. Next, as also shown in FIG. 12, a second superconducting metal layer 2320 is formed on the substrate 1100 and the oxide film 2330 by vapor deposition. At this time, the Z-axis direction of the substrate 1100 is made non-parallel to the traveling direction 1501 of the evaporated material emitted from the vapor deposition source 1500. Specifically, the direction inclined from the +Z side to the +Y side of the substrate 1100 is made parallel to the traveling direction 1501. The inclination angle at this time is set to such an extent that the evaporated material passes through the second opening pattern 2222 but cannot pass through the first opening pattern 2221. The second superconducting metal layer 2320 extends in the Y-axis direction, similar to the second opening pattern 2222. In other words, the first superconducting metal layer 2310 and the second superconducting metal layer 2320 intersect.

[0023] A first superconducting metal layer 2310 and a second superconducting metal layer 2320 are stacked with an oxide film 2330 sandwiched therebetween. The first superconducting metal layer 2310, the oxide film 2330, and the second superconducting metal layer 2320 constitute a Josephson junction.

[0024] However, when forming the first superconducting metal layer 2310, the angle of incidence of the evaporated material onto the substrate 1100 differs depending on the position in the X-axis direction, and when forming the second superconducting metal layer 2320, the angle of incidence of the evaporated material onto the substrate 1100 differs depending on the position in the Y-axis direction.

[0025] Therefore, strictly speaking, as shown in Fig. 13, the Josephson junction formed near the end on the +Y side of the substrate 1100 has a different shape from the Josephson junction formed near the end on the -Y side. In the second reference example, this difference in shape causes variations in the characteristics of the Josephson junction. There is also a risk of breakage in the second superconducting metal layer 2320. Fig. 13 is a cross-sectional view showing the difference in shape between the two Josephson junctions in the second reference example.

[0026] Based on the above findings, the inventors of the present application have conducted extensive research to suppress variations in characteristics among a plurality of quantum bits, and have come up with the following embodiment.

[0027] (First embodiment) A first embodiment will be described. Fig. 14 is a plan view showing a Josephson device according to the first embodiment. Fig. 15 is a cross-sectional view showing a Josephson device according to the first embodiment. Fig. 15 corresponds to a cross-sectional view taken along line XV-XV in Fig. 14.

[0028] The Josephson junction 1 according to the first embodiment has a first superconducting metal layer 110, a second superconducting metal layer 120, and an insulating layer 130. The first superconducting metal layer 110 has an upper surface 111, and the second superconducting metal layer 120 has a lower surface 122. The lower surface 122 faces the upper surface 111. The first superconducting metal layer 110 and the second superconducting metal layer 120 are both substantially cylindrical in shape. The insulating layer 130 is provided between the upper surface 111 of the first superconducting metal layer 110 and the lower surface 122 of the second superconducting metal layer 120. In a plan view perpendicular to the upper surface 111, the outline of the lower surface 122 is inside the outline of the upper surface 111. The insulating layer 130 may also be provided on a side surface of the first superconducting metal layer 110. The Josephson junction 1 is provided on, for example, a substrate 100. The upper surface 111 is an example of a first surface, and the lower surface 122 is an example of a second surface.

[0029] Next, a method for manufacturing the Josephson device 1 will be described. Figures 16 to 20 are cross-sectional views showing a method for manufacturing the Josephson device 1 according to the first embodiment. Figure 21 is a schematic diagram showing the relationship between the substrate and the evaporation source during evaporation in the first embodiment.

[0030] First, as shown in Fig. 16, a resist layer 191 having an opening 191X and a resist layer 192 having an opening 192X are formed on a substrate 100. The resist layer 191 is formed on the substrate 100 side of the resist layer 192. The opening 192X has a shape and size corresponding to the upper surface of the first superconducting metal layer 110 to be formed in a plan view. The opening 191X surrounds the opening 192X in a plan view.

[0031] 17, using the resist layers 191 and 192 as a deposition mask, a first superconducting metal layer 110 is formed on the substrate 100 inside the opening 191X by a deposition method. At this time, as shown in FIG. 21, the Z-axis direction of the substrate 100 is set parallel to the traveling direction 151 of the evaporated material (first evaporated material) emitted from the deposition source 150. Therefore, the incident angle of the evaporated material to the center of the substrate 100 is 90°.

[0032] Thereafter, the resist layers 191 and 192 are removed as shown in Fig. 18. Although not shown, evaporated material is also deposited on the resist layer 192, and this deposited evaporated material is removed together with the resist layers 191 and 192. In other words, lift-off is performed. Furthermore, the surface (top surface and side surface) of the first superconducting metal layer 110 is oxidized to form the insulating layer 130.

[0033] 19, a resist layer 193 having an opening 193X and a resist layer 194 having an opening 194X are formed on the substrate 100. The resist layer 193 is formed on the substrate 100 side of the resist layer 194. The opening 194X surrounds the outline of the upper surface 111 of the first superconducting metal layer 110 in a plan view, and has a shape and size corresponding to the upper surface of the second superconducting metal layer 120 to be formed. The opening 193X surrounds the opening 194X in a plan view.

[0034] 20, using resist layers 193 and 194 as a deposition mask, second superconducting metal layer 120 is formed by deposition inside opening 193X on a portion of insulating layer 130 above upper surface 111 of first superconducting metal layer 110. At this time, too, the Z-axis direction of substrate 100 is parallel to traveling direction 151 of the evaporated material (second evaporated material), as shown in FIG. 21. Therefore, the incident angle of the evaporated material to the center of substrate 100 is 90°.

[0035] Thereafter, the resist layers 193 and 194 are removed (see FIG. 15). Although not shown, evaporated material is also deposited on the resist layer 194, but this deposited evaporated material is removed together with the resist layers 193 and 194. In other words, lift-off is performed.

[0036] In this manner, the Josephson device 1 according to the first embodiment can be manufactured.

[0037] In this embodiment, in a plan view, the outline of the lower surface 122 of the second superconducting metal layer 120 is inside the outline of the upper surface 111 of the first superconducting metal layer 110. Therefore, when the first superconducting metal layer 110 and the second superconducting metal layer 120 are formed, the Z-axis direction of the substrate 100 can be made parallel to the traveling direction 151 of the evaporated material. This makes it possible to suppress differences in the angle of incidence of the evaporated material onto the substrate 100. For example, if the diameter of the substrate 100 is 6 inches (approximately 15 cm) and the distance between the center of the substrate 100 and the deposition source 150 is 60 cm, the angle of incidence onto the center of the substrate 100 is 90°, and the angle of incidence onto the edge of the substrate 100 is 82.9°. Therefore, the difference in the angles of incidence is at most 7.1°.

[0038] Therefore, the difference in shape between the multiple Josephson junctions 1 formed on the substrate 100 is small, and the variation in the characteristics of the Josephson junctions 1 can be suppressed.

[0039] (Second embodiment) A second embodiment will now be described. Fig. 22 is a plan view showing a Josephson device according to the second embodiment. Fig. 23 is a cross-sectional view showing a Josephson device according to the second embodiment. Fig. 23 corresponds to a cross-sectional view taken along line XXIII-XXIII in Fig. 22.

[0040] The Josephson junction 2 according to the second embodiment includes a first superconducting metal layer 210, a second superconducting metal layer 220, and an insulating layer 230. The first superconducting metal layer 210 has an upper surface 211, and the second superconducting metal layer 220 has a lower surface 222. The lower surface 222 faces the upper surface 211. The first superconducting metal layer 110 has a substantially truncated cone shape, and the second superconducting metal layer 120 has a substantially cylindrical shape. The insulating layer 230 is provided between the upper surface 211 of the first superconducting metal layer 210 and the lower surface 222 of the second superconducting metal layer 220. In a plan view perpendicular to the upper surface 211, the outline of the lower surface 222 is inside the outline of the upper surface 211. The insulating layer 230 may also be provided on a side surface of the first superconducting metal layer 210. The Josephson junction 2 is provided on, for example, a substrate 100. The upper surface 211 is an example of a first surface, and the lower surface 222 is an example of a second surface.

[0041] Next, a method for manufacturing the Josephson element 2 will be described. Figures 24 to 27 are cross-sectional views showing a method for manufacturing the Josephson element 2 according to the second embodiment. Figure 28 is a schematic view showing the relationship between the substrate and the evaporation source during evaporation in the second embodiment.

[0042] 24, a resist layer 291 having an opening 291X and a resist layer 292 having an opening 292X are formed on a substrate 100. The resist layer 291 is formed on the substrate 100 side of the resist layer 292. The opening 292X has a shape and size corresponding to the upper surface of the second superconducting metal layer 220 to be formed in a plan view. The opening 291X has a shape and size that surrounds the outline of the lower surface of the first superconducting metal layer 210 to be formed in a plan view.

[0043] Next, as shown in FIG. 25, using resist layers 291 and 292 as a deposition mask, first superconducting metal layer 210 is formed on substrate 100 inside opening 291X by a deposition method. At this time, as shown in FIG. 28, the Z-axis direction of substrate 100 is made non-parallel to traveling direction 151 of the evaporated material (first evaporated material) emitted from deposition source 150, and substrate 100 is rotated about a line passing through the center of the upper surface of substrate 100 and perpendicular to the upper surface as the rotation center. The tilt angle θ3 at this time is set to an extent that the portion where lower surface 222 of second superconducting metal layer 220 to be formed later is located can be seen from deposition source 150 at any position on substrate 100. The tilt angle θ3 is set to, for example, about 1° to 10°.

[0044] Thereafter, as shown in FIG. 26, the surface (top and side surfaces) of the first superconducting metal layer 210 is oxidized while leaving the resist layers 291 and 292, to form the insulating layer 230.

[0045] 27, using resist layers 291 and 292 as a deposition mask, second superconducting metal layer 220 is formed by deposition inside opening 291X on a portion of insulating layer 230 above upper surface 211 of first superconducting metal layer 210. At this time, as shown in FIG. 21, the Z-axis direction of substrate 100 is set parallel to traveling direction 151 of the evaporated material (second evaporated material). Therefore, the incident angle of the evaporated material to the center of substrate 100 is 90°.

[0046] Preferably, the formation of the first superconducting metal layer 210, the formation of the insulating layer 230, and the formation of the second superconducting metal layer 220 are performed successively in a vacuum chamber while maintaining a vacuum state.

[0047] Thereafter, the resist layers 291 and 292 are removed (see FIG. 23). Although not shown, evaporated material is also deposited on the resist layer 292 when the first superconducting metal layer 210 and the second superconducting metal layer 220 are formed, but this deposited evaporated material is removed together with the resist layers 291 and 292. In other words, lift-off is performed.

[0048] In this manner, the Josephson device 1 according to the first embodiment can be manufactured.

[0049] In this embodiment, in plan view, the outline of lower surface 222 of second superconducting metal layer 220 is inside the outline of upper surface 211 of first superconducting metal layer 210. Therefore, the tilt angle θ1 during formation of first superconducting metal layer 210 can be made small, and the Z-axis direction of substrate 100 can be made parallel to traveling direction 151 of the evaporated material during formation of second superconducting metal layer 220. Therefore, similar to the first embodiment, differences in the angle of incidence of the evaporated material onto substrate 100 can be suppressed.

[0050] Therefore, the difference in shape between the multiple Josephson junctions 2 formed on the substrate 100 is small, and the variation in the characteristics of the Josephson junctions 2 can be suppressed.

[0051] Furthermore, since the first superconducting metal layer 210 and the second superconducting metal layer 220 can be formed using the resist layers 191 and 192, the throughput can be improved.

[0052] (Third embodiment) A third embodiment will be described. The third embodiment relates to a superconducting circuit including a Josephson device. FIG. 29 is a plan view showing a superconducting circuit according to the third embodiment. FIG. 30 is a cross-sectional view showing a superconducting circuit according to the third embodiment. FIG. 29 shows some components, such as insulating layers, in a see-through manner. FIG. 30 corresponds to a cross-sectional view taken along line XXX-XXX in FIG. 29.

[0053] The superconducting circuit 30 according to the third embodiment mainly comprises a substrate 300, a first superconducting metal layer 310, a second superconducting metal layer 320, an insulating layer 330, a third superconducting metal layer 340, a fourth superconducting metal layer 350, and a dielectric layer 390.

[0054] The substrate 300 is, for example, a high-resistivity Si substrate.

[0055] A third superconducting metal layer 340 is formed on the substrate 300. The third superconducting metal layer 340 extends in the X-axis direction parallel to the upper surface of the substrate 300. One end of the third superconducting metal layer 340 has a semicircular arc shape in plan view. The third superconducting metal layer 340 is, for example, an Al layer with a thickness of 30 nm to 70 nm.

[0056] A first superconducting metal layer 310 is formed on the third superconducting metal layer 340 near the semicircular end of the third superconducting metal layer 340. The first superconducting metal layer 310 is shaped like a truncated cone. The first superconducting metal layer 310 is, for example, an Al layer with a thickness of 30 nm to 70 nm. An insulating layer 341 is formed on the surface (top and side surfaces) of the third superconducting metal layer 340 except for the portion where the first superconducting metal layer 310 is formed. The insulating layer 341 is, for example, an Al oxide layer with a thickness of 1 nm to 5 nm.

[0057] An insulating layer 330 is formed on the surfaces (top and side surfaces) of the first superconducting metal layer 310. The insulating layer 330 is, for example, an aluminum oxide layer having a thickness of 1 nm to 5 nm.

[0058] Second superconducting metal layer 320 is formed on a portion of insulating layer 330 above upper surface 311 of first superconducting metal layer 310. Lower surface 322 of second superconducting metal layer 320 faces upper surface 311 of first superconducting metal layer 310, and a portion of insulating layer 330 is provided between upper surface 311 of first superconducting metal layer 310 and lower surface 322 of second superconducting metal layer 320. In a plan view from a direction perpendicular to upper surface 311, the outline of lower surface 322 is inside the outline of upper surface 311. Second superconducting metal layer 320 has a substantially cylindrical shape. Second superconducting metal layer 320 is, for example, an Al layer with a thickness of 250 nm to 350 nm. Upper surface 311 is an example of a first surface, and lower surface 322 is an example of a second surface.

[0059] A dielectric layer 390 covering the third superconducting metal layer 340, the insulating layer 341, the first superconducting metal layer 310, and the insulating layer 330 is formed on the substrate 300. The upper surface of the dielectric layer 390 is located above the lower surface 322 of the second superconducting metal layer 320 and below the upper surface of the second superconducting metal layer 320 in the Z-axis direction perpendicular to the upper surface of the substrate 300. The dielectric layer 390 is, for example, a benzocyclobutene (BCB) layer. An insulating layer 321 is formed on a portion of the side surface of the second superconducting metal layer 320 below the upper surface of the dielectric layer 390. That is, the insulating layer 321 is formed between the second superconducting metal layer 320 and the dielectric layer 390. The insulating layer 321 is, for example, an aluminum oxide layer having a thickness of 1 nm to 5 nm.

[0060] A fourth superconducting metal layer 350 is formed on the dielectric layer 390. The fourth superconducting metal layer 350 contacts a portion of the second superconducting metal layer 320 that is higher than the upper surface of the dielectric layer 390. The fourth superconducting metal layer 350 extends in the X-axis direction. The fourth superconducting metal layer 350 is, for example, an Al layer with a thickness of 30 nm to 70 nm. An insulating layer 351 is formed on the surface (upper surface and side surfaces) of the fourth superconducting metal layer 350. The insulating layer 351 is, for example, an Al oxide layer with a thickness of 1 nm to 5 nm.

[0061] The superconducting circuit 30 according to this embodiment includes a Josephson junction 3 having a first superconducting metal layer 310 , a second superconducting metal layer 320 , and an insulating layer 330 .

[0062] Next, we will explain a method for manufacturing the superconducting circuit 30. Figures 31 to 38 are cross-sectional views showing a method for manufacturing the superconducting circuit 30 according to the third embodiment.

[0063] First, as shown in Fig. 31 , a third superconducting metal layer 340 is formed on a substrate 300. The third superconducting metal layer 340 can be formed by vapor deposition and lift-off, for example, in the same manner as in the formation of the first superconducting metal layer 110 in the first embodiment. The third superconducting metal layer 340 is formed in a vacuum, but when the third superconducting metal layer 340 is exposed to the atmosphere, an insulating layer 341 is formed on the surface of the third superconducting metal layer 340 by natural oxidation.

[0064] Next, as shown in FIG. 32 , a resist layer 391 with an opening 391X and a resist layer 392 with an opening 392X are formed on the substrate 300 so as to cover the third superconducting metal layer 340 and the insulating layer 341. For example, after forming the two resist layers, electron beam exposure can be performed to form the resist layer 391 with the opening 391X and the resist layer 392 with the opening 392X. The opening 392X has a shape and size corresponding to the upper surface of the second superconducting metal layer 320 to be formed in a plan view. The opening 391X has a shape and size that surrounds the outline of the lower surface of the first superconducting metal layer 310 to be formed in a plan view. A portion of the insulating layer 341 is exposed from the openings 391X and 392X.

[0065] Thereafter, as shown in FIG. 33 , portions of insulating layer 341 exposed from openings 391X and 392X are removed by ion milling using Ar ions in a vacuum. Next, using resist layers 391 and 392 as a deposition mask, first superconducting metal layer 310 is formed in a vacuum on the portions of third superconducting metal layer 340 from which insulating layer 341 has been removed by a deposition method. At this time, similar to the formation of first superconducting metal layer 210 in the second embodiment, the Z-axis direction of substrate 300 is made non-parallel to the traveling direction of the evaporated material (first evaporated material) emitted from the deposition source, and substrate 300 is rotated around a line passing through the center of the upper surface of substrate 300 and perpendicular to the upper surface. The tilt angle at this time is set to such an extent that the portion where lower surface 322 of second superconducting metal layer 320 to be formed later is located can be seen from the deposition source at any position within substrate 300. The tilt angle is, for example, approximately 1° to 10°.

[0066] 34, the surfaces (top and side surfaces) of the first superconducting metal layer 310 are oxidized while leaving the resist layers 391 and 392, to form an insulating layer 330. In forming the insulating layer 330, for example, oxygen is supplied into a vacuum without being exposed to the atmosphere.

[0067] 35, using resist layers 391 and 392 as a deposition mask, second superconducting metal layer 320 is formed inside opening 391X by deposition on the portion of insulating layer 330 above upper surface 311 of first superconducting metal layer 310. At this time, similar to the formation of second superconducting metal layer 220 in the second embodiment, the Z-axis direction of substrate 300 is set parallel to the traveling direction of the evaporated material (second evaporated material).

[0068] Preferably, the ion milling of insulating layer 341, the formation of first superconducting metal layer 310, the formation of insulating layer 330, and the formation of second superconducting metal layer 320 are performed successively in a vacuum chamber while maintaining a vacuum state.

[0069] 36, the resist layers 391 and 392 are removed. Although not shown, when the first superconducting metal layer 310 and the second superconducting metal layer 320 are formed, evaporated material is also deposited on the resist layer 392, and this deposited evaporated material is removed together with the resist layers 391 and 392. In other words, lift-off is performed. Furthermore, when the second superconducting metal layer 320 is exposed to the atmosphere, an insulating layer 321 is formed on the surface of the second superconducting metal layer 320 by natural oxidation.

[0070] 37, a dielectric layer 390 covering the third superconducting metal layer 340, the insulating layer 341, the first superconducting metal layer 310, the insulating layer 330, the second superconducting metal layer 320, and the insulating layer 321 is formed on the substrate 300. The top surface of the dielectric layer 390 is positioned higher in the Z-axis direction than the top surface of the second superconducting metal layer 320. In forming the dielectric layer 390, for example, BCB resin is spin-coated, and then the BCB resin is thermally cured.

[0071] 38 , the dielectric layer 390 is etched back by dry etching so that the upper surface of the dielectric layer 390 is positioned lower than the upper surface of the second superconducting metal layer 320. In other words, a part of the second superconducting metal layer 320 is made to protrude from the dielectric layer 390.

[0072] Next, in a vacuum, insulating layer 321 formed on the surface of the portion of second superconducting metal layer 320 that protrudes from dielectric layer 390 is removed, and fourth superconducting metal layer 350 is formed on dielectric layer 390 in contact with the portion of second superconducting metal layer 320 that is above the upper surface of dielectric layer 390 (see FIG. 30). Insulating layer 321 can be removed by ion milling using Ar ions. Fourth superconducting metal layer 350 can be formed, for example, by vapor deposition and lift-off, similar to the formation of third superconducting metal layer 340. When fourth superconducting metal layer 350 is exposed to the atmosphere, insulating layer 351 is formed on the surface of fourth superconducting metal layer 350 by natural oxidation.

[0073] In this manner, the superconducting circuit 30 according to the third embodiment can be manufactured.

[0074] In this embodiment, in plan view, the outline of lower surface 322 of second superconducting metal layer 320 is inside the outline of upper surface 311 of first superconducting metal layer 310. This makes it possible to reduce the tilt angle when first superconducting metal layer 310 is formed, and to make the Z-axis direction of substrate 300 parallel to the traveling direction of the evaporated material when second superconducting metal layer 320 is formed. This makes it possible to suppress differences in the angle of incidence of the evaporated material onto substrate 300, similar to the first embodiment.

[0075] Therefore, the difference in shape between the multiple Josephson junctions 3 formed on the substrate 300 is small, and the variation in the characteristics of the Josephson junctions 3 can be suppressed.

[0076] Furthermore, the third superconducting metal layer 340 in contact with the first superconducting metal layer 310 and the fourth superconducting metal layer 350 in contact with the second superconducting metal layer 320 can be used as wiring connected to the Josephson junction 3 .

[0077] (Fourth embodiment) A fourth embodiment will now be described. The fourth embodiment also relates to a superconducting circuit including a Josephson device. FIG. 39 is a plan view showing a superconducting circuit according to the fourth embodiment. FIG. 40 is a cross-sectional view showing a superconducting circuit according to the fourth embodiment. FIG. 39 shows some components, such as insulating layers, in a see-through manner. FIG. 40 corresponds to a cross-sectional view taken along line XL-XL in FIG. 39.

[0078] The superconducting circuit 40 according to the fourth embodiment mainly includes a substrate 300, a first superconducting metal layer 310, a second superconducting metal layer 320, an insulating layer 330, a third superconducting metal layer 340, a fourth superconducting metal layer 450, a fifth superconducting metal layer 460, and a dielectric layer 390.

[0079] The fifth superconducting metal layer 460 is formed on the substrate 300. Like the third superconducting metal layer 340, the fifth superconducting metal layer 460 extends in the X-axis direction parallel to the top surface of the substrate 300. The fifth superconducting metal layer 460 is disposed away from the third superconducting metal layer 340 on the +X side of the third superconducting metal layer 340. The fifth superconducting metal layer 460 is, for example, an Al layer with a thickness of 30 nm to 70 nm. An insulating layer 461 is formed on the surface (top surface and side surface) of the fifth superconducting metal layer 460. The insulating layer 461 is, for example, an Al oxide layer with a thickness of 1 nm to 5 nm. An opening 461X is formed in the insulating layer 461 so as to overlap a portion of the fifth superconducting metal layer 460 in a planar view.

[0080] The dielectric layer 390 also covers the fifth superconducting metal layer 460 and the insulating layer 461. The dielectric layer 390 has an opening 490X formed therein that overlaps with the opening 461X in plan view.

[0081] The fourth superconducting metal layer 450 is formed on the dielectric layer 390 and inside the openings 490X and 461X. The fourth superconducting metal layer 450 contacts a portion of the second superconducting metal layer 320 above the upper surface of the dielectric layer 390 and the fifth superconducting metal layer 460. The fourth superconducting metal layer 450 is, for example, an Al layer. The thickness of the portion of the fourth superconducting metal layer 450 above the dielectric layer 390 is, for example, 30 nm to 70 nm. An insulating layer 451 is formed on the surface (upper surface and side surfaces) of the fourth superconducting metal layer 450. The insulating layer 451 is, for example, an Al oxide layer with a thickness of 1 nm to 5 nm.

[0082] The other configurations are the same as those of the third embodiment.

[0083] Next, a description will be given of a method for manufacturing the superconducting circuit 40. Figures 41 to 43 are cross-sectional views showing a method for manufacturing the superconducting circuit 40 according to the fourth embodiment.

[0084] 41 , a third superconducting metal layer 340 and a fifth superconducting metal layer 460 are formed on a substrate 300. The third superconducting metal layer 340 and the fifth superconducting metal layer 460 can be formed, for example, by vapor deposition and lift-off, similar to the formation of the first superconducting metal layer 110 in the first embodiment. The third superconducting metal layer 340 and the fifth superconducting metal layer 460 are formed in a vacuum, but when the third superconducting metal layer 340 and the fifth superconducting metal layer 460 are exposed to the atmosphere, an insulating layer 341 is formed on the surface of the third superconducting metal layer 340 by natural oxidation, and an insulating layer 461 is formed on the surface of the fifth superconducting metal layer 460.

[0085] 42, similarly to the third embodiment, processes from the formation of resist layers 391 and 392 to the formation of dielectric layer 390 are performed. Thereafter, resist layer 491 having opening 491X is formed on dielectric layer 390. Opening 491X has a shape and size corresponding to opening 490X to be formed in plan view.

[0086] 43, the resist layer 491 and the dielectric layer 390 are etched back by dry etching to form an opening 490X in the dielectric layer 390 while positioning the upper surface of the dielectric layer 390 lower than the upper surface of the second superconducting metal layer 320. The resist layer 491 is removed by the etch back.

[0087] Next, in a vacuum, the insulating layer 321 formed on the surface of the portion of the second superconducting metal layer 320 that protrudes from the dielectric layer 390 and the insulating layer 461 exposed from the opening 490X are removed. An opening 461X is formed in the insulating layer 461. Then, a fourth superconducting metal layer 450 is formed in contact with the portion of the second superconducting metal layer 320 above the upper surface of the dielectric layer 390 and with the fifth superconducting metal layer 460 (see FIG. 40). The insulating layers 321 and 461 can be removed by ion milling using Ar ions. The fourth superconducting metal layer 450 can be formed, for example, by vapor deposition and lift-off, similar to the formation of the third superconducting metal layer 340 and the fifth superconducting metal layer 460. When the fourth superconducting metal layer 450 is exposed to the atmosphere, an insulating layer 451 is formed on the surface of the fourth superconducting metal layer 450 by natural oxidation.

[0088] In this manner, the superconducting circuit 40 according to the fourth embodiment can be manufactured.

[0089] In this embodiment as well, the difference in shape between the plurality of Josephson junctions 3 formed on the substrate 300 is slight, and the variation in the characteristics of the Josephson junctions 3 can be suppressed.

[0090] Furthermore, the third superconducting metal layer 340 in contact with the first superconducting metal layer 310, the fourth superconducting metal layer 450 in contact with the second superconducting metal layer 320, and the fifth superconducting metal layer 460 in contact with the fourth superconducting metal layer 450 can be used as wiring connected to the Josephson element 3.

[0091] (Fifth embodiment) A fifth embodiment will now be described. The fifth embodiment also relates to a superconducting circuit including a Josephson device. Fig. 44 is a cross-sectional view showing a superconducting circuit according to the fifth embodiment. Like Fig. 40, Fig. 44 corresponds to a cross-sectional view taken along line XL-XL in Fig. 39.

[0092] The superconducting circuit 50 according to the fifth embodiment mainly includes a substrate 300, a first superconducting metal layer 310, a second superconducting metal layer 320, an insulating layer 330, a third superconducting metal layer 340, a fourth superconducting metal layer 450, and a fifth superconducting metal layer 460. The superconducting circuit 50 does not include a dielectric layer 390. An insulating layer 451 is formed on almost the entire side surface of the fourth superconducting metal layer 450 so as to be connected to the insulating layer 461.

[0093] The other configurations are the same as those of the fourth embodiment.

[0094] Next, we will explain a method for manufacturing the superconducting circuit 50. Figures 45 to 48 are cross-sectional views showing a method for manufacturing the superconducting circuit 50 according to the fifth embodiment.

[0095] First, as shown in Fig. 45, resist layers 391 and 392 are removed in the same manner as in the fourth embodiment. Next, a sacrificial layer 590 covering third superconducting metal layer 340, insulating layer 341, first superconducting metal layer 310, insulating layer 330, second superconducting metal layer 320, and insulating layer 321 is formed on substrate 300. The upper surface of sacrificial layer 590 is positioned higher in the Z-axis direction than the upper surface of second superconducting metal layer 320. In forming sacrificial layer 590, for example, polymethyl glutarimide (PMGI) resin is spin-coated, and then the PMGI resin is thermally cured.

[0096] 46, a resist layer 591 having an opening 591X is formed on the sacrificial layer 590. The opening 591X has a shape and a size, in plan view, corresponding to a portion of the fourth superconducting metal layer 450 to be formed later, extending in the Z-axis direction.

[0097] 47, the resist layer 591 and the sacrificial layer 590 are etched back by dry etching to form an opening 590X in the sacrificial layer 590 while positioning the upper surface of the sacrificial layer 590 lower than the upper surface of the second superconducting metal layer 320. The resist layer 591 is removed by the etch back.

[0098] 48, insulating layer 321 formed on the surface of the portion of second superconducting metal layer 320 protruding from sacrificial layer 590 and insulating layer 461 exposed from opening 590X are removed in a vacuum. Opening 461X is formed in insulating layer 461. Then, fourth superconducting metal layer 450 is formed in contact with the portion of second superconducting metal layer 320 above the top surface of sacrificial layer 590 and with fifth superconducting metal layer 460. When fourth superconducting metal layer 450 is exposed to the atmosphere, insulating layer 451 is formed on the surface of fourth superconducting metal layer 450 by natural oxidation.

[0099] The sacrificial layer 590 is then dissolved and removed using a solvent (see FIG. 44).

[0100] In this manner, the superconducting circuit 50 according to the fifth embodiment can be manufactured.

[0101] In this embodiment as well, the difference in shape between the plurality of Josephson junctions 3 formed on the substrate 300 is slight, and the variation in the characteristics of the Josephson junctions 3 can be suppressed.

[0102] Generally, a dielectric contains a defect called a two-level system (TLS), and therefore, if a dielectric exists near a Josephson junction, it is difficult to extend the coherence time. In contrast, in this embodiment, the superconducting circuit 50 has an air bridge structure, and no dielectric layer 390 is provided around the Josephson junction 3. Therefore, according to this embodiment, the coherence time of the Josephson junction 3 can be extended, making it suitable for quantum computing.

[0103] (Sixth embodiment) A sixth embodiment will now be described. The sixth embodiment also relates to a superconducting circuit including a Josephson device. FIG. 49 is a plan view showing a superconducting circuit according to the sixth embodiment. FIG. 50 is a cross-sectional view showing a superconducting circuit according to the sixth embodiment. FIG. 50 corresponds to a cross-sectional view taken along line LL in FIG. 49.

[0104] In the superconducting circuit 60 according to the sixth embodiment, a trench 601 is formed in the surface of the substrate 300 around the Josephson junction 3, along the edges of the third superconducting metal layer 340 and the insulating layer 341. For example, the trench 601 is formed along the edge of the third superconducting metal layer 340 that is semicircular in shape in a plan view and the edge of the insulating layer 341 that is formed on the side surface of the third superconducting metal layer 340. The depth of the trench 601 is, for example, 50 nm to 200 nm.

[0105] The other configurations are the same as those in the fifth embodiment.

[0106] Next, a description will be given of a method for manufacturing the superconducting circuit 60. Figures 51 to 53 are cross-sectional views showing a method for manufacturing the superconducting circuit 60 according to the sixth embodiment.

[0107] First, as shown in Fig. 51 , a third superconducting metal layer 340 and a fifth superconducting metal layer 460 are formed on a substrate 300 in the same manner as in the fourth embodiment. When the third superconducting metal layer 340 and the fifth superconducting metal layer 460 are exposed to the atmosphere, natural oxidation occurs, forming an insulating layer 341 on the surface of the third superconducting metal layer 340 and an insulating layer 461 on the surface of the fifth superconducting metal layer 460. Next, a resist layer 691 with an opening 691X is formed on the substrate 300 so as to cover the third superconducting metal layer 340, the insulating layer 341, the fifth superconducting metal layer 460, and the insulating layer 461. The opening 691X has a shape and size corresponding to the trench 601 to be formed in a plan view.

[0108] Thereafter, as shown in FIG. 52, trenches 601 are formed in the surface of the substrate 300 by dry etching using the resist layer 691 as an etching mask.

[0109] 53, the resist layer 691 is removed, and similarly to the fifth embodiment, a resist layer 391 having an opening 391X and a resist layer 392 having an opening 392X are formed on the substrate 300. At this time, the resist layer 391 is also formed inside the trench 601.

[0110] Next, similarly to the fifth embodiment, the processes from removing the insulating layer 341 to removing the sacrificial layer 590 are performed (see FIG. 50).

[0111] In this manner, the superconducting circuit 60 according to the sixth embodiment can be manufactured.

[0112] In this embodiment as well, the difference in shape between the plurality of Josephson junctions 3 formed on the substrate 300 is slight, and the variation in the characteristics of the Josephson junctions 3 can be suppressed.

[0113] Furthermore, since the trench 601 is formed in the surface of the substrate 300, the distance between the Josephson junction 3 and the TLS present on the surface of the substrate 300 can be increased, thereby reducing dielectric loss, and therefore the coherence time of the Josephson junction 3 can be further extended.

[0114] (Seventh embodiment) A seventh embodiment will now be described. The seventh embodiment also relates to a superconducting circuit including a Josephson device. Fig. 54 is a cross-sectional view showing a superconducting circuit according to the seventh embodiment. Like Fig. 50, Fig. 54 corresponds to a cross-sectional view taken along line LL in Fig. 49.

[0115] In the superconducting circuit 70 according to the seventh embodiment, similarly to the sixth embodiment, a trench 601 is formed in the surface of the substrate 300 around the Josephson junction 3 along the edges of the third superconducting metal layer 340 and the insulating layer 341. Furthermore, a recess 701 connected to the trench 601 is formed in the surface of the substrate 300 below the Josephson junction 3. Therefore, a space exists between the third superconducting metal layer 340 and the substrate 300. An insulating layer 341 is also formed on the lower surface (the surface on the -Z side) of the third superconducting metal layer 340. The depth of the trench 601 and the recess 701 is, for example, 50 nm to 200 nm.

[0116] The other configurations are the same as those in the sixth embodiment.

[0117] Next, a description will be given of a method for manufacturing the superconducting circuit 70. Figures 55 to 57 are cross-sectional views showing a method for manufacturing the superconducting circuit 70 according to the seventh embodiment.

[0118] First, as shown in Fig. 55, a third superconducting metal layer 340 and a fifth superconducting metal layer 460 are formed on a substrate 300 in the same manner as in the fourth embodiment. When the third superconducting metal layer 340 and the fifth superconducting metal layer 460 are exposed to the atmosphere, natural oxidation occurs, forming an insulating layer 341 on the surface of the third superconducting metal layer 340 and an insulating layer 461 on the surface of the fifth superconducting metal layer 460. Next, a resist layer 791 with an opening 791X is formed on the substrate 300 so as to cover the third superconducting metal layer 340, the insulating layer 341, the fifth superconducting metal layer 460, and the insulating layer 461. The opening 791X has a shape and size corresponding to the trench 601 and the recess 701 to be formed in a plan view.

[0119] 56, using the resist layer 791 as an etching mask, trenches 601 and recesses 701 are formed in the surface of the substrate 300 by dry etching. For example, by setting the dry etching pressure higher than when forming the trenches 601 in the sixth embodiment, it is possible to make it easier to cause side etching of the substrate 300.

[0120] 57, resist layer 791 is removed, and resist layer 391 having openings 391X and resist layer 392 having openings 392X are formed on substrate 300 in the same manner as in the fifth embodiment. At this time, resist layer 391 is also formed inside trench 601 and recess 701. Furthermore, when third superconducting metal layer 340 is exposed to the atmosphere after recess 701 is formed, insulating layer 341 is also formed on the lower surface of third superconducting metal layer 340 due to natural oxidation.

[0121] Next, similarly to the fifth embodiment, the processes from removing the insulating layer 341 to removing the sacrificial layer 590 are performed (see FIG. 54).

[0122] In this manner, the superconducting circuit 70 according to the seventh embodiment can be manufactured.

[0123] In this embodiment as well, the difference in shape between the plurality of Josephson junctions 3 formed on the substrate 300 is slight, and the variation in the characteristics of the Josephson junctions 3 can be suppressed.

[0124] Furthermore, since not only the trench 601 but also the recess 701 is formed on the surface of the substrate 300, the dielectric loss can be further reduced, and therefore the coherence time of the Josephson junction 3 can be further extended.

[0125] In each embodiment, the material of the superconducting metal layer is not particularly limited. For example, the material of the superconducting metal layer may be Al, Nb, Nb nitride, Ta, Ta nitride, Ti nitride, etc. In other words, the superconducting metal layer may contain Al, Nb, Nb nitride, Ta, Ta nitride, Ti nitride, etc. For example, in the fifth embodiment, the third superconducting metal layer 340 and the fifth superconducting metal layer 460 may be Nb layers.

[0126] Furthermore, each superconducting metal layer may have a laminated structure. Fig. 58 is a cross-sectional view showing a superconducting circuit according to a modification of the fifth embodiment. For example, as shown in Fig. 58, in a superconducting circuit 51 according to a modification of the fifth embodiment, the first superconducting metal layer 310 has a sixth superconducting metal layer 310A in contact with the third superconducting metal layer 340 and a seventh superconducting metal layer 310B on the sixth superconducting metal layer 310A. For example, the sixth superconducting metal layer 310A is an Al layer, and the seventh superconducting metal layer 310B is an Nb layer. Furthermore, the third superconducting metal layer 340 and the fifth superconducting metal layer 460 may be Ti nitride layers, and the fourth superconducting metal layer 350 may be a Ta layer.

[0127] (Eighth embodiment) An eighth embodiment will be described. The eighth embodiment relates to a quantum processing device including Josephson devices. Fig. 59 is a diagram showing a quantum processing device according to the eighth embodiment.

[0128] As shown in FIG. 59 , quantum processing device 800 according to the eighth embodiment includes a quantum bit chip 810, a signal generator 820, a signal demodulator 830, and a cryogenic dilution refrigerator 840. The quantum bit chip 810 is housed in the cryogenic dilution refrigerator 840 and cooled to a temperature of 10 mK or less. The signal generator 820 generates a microwave pulse signal, and the microwave pulse signal is input to the quantum bit chip 810. The quantum bit chip 810 outputs a signal corresponding to the microwave pulse signal, and the signal demodulator 830 demodulates the signal output from the quantum bit chip 810. The signal generator 820 and the signal demodulator 830 are used at a temperature around room temperature, for example.

[0129] Quantum bit chip 810 includes a plurality of superconducting quantum bits 850, each of which has a Josephson junction 851 and a capacitor 852 electrically connected in parallel to Josephson junction 851. Josephson junction 851 is a Josephson junction 3 in any of the third to seventh embodiments, and the wiring of the third superconducting metal layer and the wiring of the fourth superconducting metal layer or the fifth superconducting metal layer are connected to capacitor 852.

[0130] Since the Josephson junction 851 included in the quantum processing device 800 according to the eighth embodiment is a Josephson junction 3 according to any one of the third to seventh embodiments, the variation in characteristics among a plurality of Josephson junctions 3 is suppressed, enabling calculations to be performed with excellent reliability.

[0131] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims. [Explanation of symbols]

[0132] 1, 2, 3: Josephson element 110, 210, 310: First superconducting metal layer 111, 211, 311: Top surface 120, 220, 320: Second superconducting metal layer 122, 222, 322: Bottom surface 130, 230, 330: Insulating layer 300: Substrate 340: Third superconducting metal layer 350, 450: Fourth superconducting metal layer 460: 5th superconducting metal layer 800: Quantum computing device 810: Quantum bit chip 850: Superconducting qubit 851: Josephson element

Claims

1. a first superconducting metal layer having a first surface; a second superconducting metal layer having a second surface opposite the first surface; an insulating layer provided between the first surface and the second surface; and In a plan view from a direction perpendicular to the first surface, a contour of the second surface is inside a contour of the first surface, the first surface and the second surface have a circular shape; A Josephson element, wherein the diameter of the second surface is smaller than the diameter of the first surface.

2. A substrate; a third superconducting metal layer formed on the substrate; a Josephson element according to claim 1, wherein the first superconducting metal layer is formed on the third superconducting metal layer, the first superconducting metal layer being in contact with the third superconducting metal layer; a fourth superconducting metal layer connected to the second superconducting metal layer; A superconducting circuit comprising:

3. 3. The superconducting circuit according to claim 2, wherein the Josephson element is surrounded by a hollow space.

4. A substrate, a third superconducting metal layer formed on the substrate; a Josephson junction formed on the third superconducting metal layer; a fourth superconducting metal layer; and and The Josephson element is a first superconducting metal layer having a first surface; a second superconducting metal layer having a second surface opposite the first surface; an insulating layer provided between the first surface and the second surface; and In a plan view from a direction perpendicular to the first surface, a contour of the second surface is inside a contour of the first surface, the first superconducting metal layer contacts the third superconducting metal layer; the fourth superconducting metal layer is connected to the second superconducting metal layer; A superconducting circuit characterized in that the Josephson element is surrounded by a hollow space.

5. a fifth superconducting metal layer formed on the substrate; 5. The superconducting circuit according to claim 2, wherein the fourth superconducting metal layer is in contact with the third superconducting metal layer and the fifth superconducting metal layer.

6. A substrate, a third superconducting metal layer formed on the substrate; a Josephson junction formed on the third superconducting metal layer; a fourth superconducting metal layer; and and The Josephson element is a first superconducting metal layer having a first surface; a second superconducting metal layer having a second surface opposite the first surface; an insulating layer provided between the first surface and the second surface; and In a plan view from a direction perpendicular to the first surface, a contour of the second surface is inside a contour of the first surface, the first superconducting metal layer contacts the third superconducting metal layer; the fourth superconducting metal layer is connected to the second superconducting metal layer; a fifth superconducting metal layer formed on the substrate; A superconducting circuit, characterized in that the fourth superconducting metal layer is in contact with the third superconducting metal layer and the fifth superconducting metal layer.

7. 7. The superconducting circuit according to claim 2, wherein a trench is formed in a region surrounding the Josephson junction in a plan view of the surface of the substrate.

8. A substrate; a third superconducting metal layer formed on the substrate; a Josephson junction formed on the third superconducting metal layer; a fourth superconducting metal layer; and and The Josephson element is a first superconducting metal layer having a first surface; a second superconducting metal layer having a second surface opposite the first surface; an insulating layer provided between the first surface and the second surface; and In a plan view from a direction perpendicular to the first surface, a contour of the second surface is inside a contour of the first surface, the first superconducting metal layer contacts the third superconducting metal layer; the fourth superconducting metal layer is connected to the second superconducting metal layer; A superconducting circuit, characterized in that a trench is formed in a region surrounding the Josephson element in a plan view of the surface of the substrate.

9. 9. The superconducting circuit according to claim 2, wherein a recess is formed in the surface of the substrate below the Josephson element, and a space exists between the third superconducting metal layer and the substrate.

10. A substrate; a third superconducting metal layer formed on the substrate; a Josephson junction formed on the third superconducting metal layer; a fourth superconducting metal layer; and and The Josephson element is a first superconducting metal layer having a first surface; a second superconducting metal layer having a second surface opposite the first surface; an insulating layer provided between the first surface and the second surface; and In a plan view from a direction perpendicular to the first surface, a contour of the second surface is inside a contour of the first surface, the first superconducting metal layer contacts the third superconducting metal layer; the fourth superconducting metal layer is connected to the second superconducting metal layer; A superconducting circuit, characterized in that a recess is formed in the surface of said substrate below said Josephson junction, and a space exists between said third superconducting metal layer and said substrate.

11. A quantum computing device comprising the superconducting circuit according to any one of claims 2 to 10.

12. forming a mask having an opening on a substrate; supplying a first evaporated material toward an upper surface of the substrate through the opening to form a first superconducting metal layer having a first surface on the substrate; oxidizing the surface of the first superconducting metal layer to form an insulating layer; supplying a second evaporated material toward the upper surface to form a second superconducting metal layer on the insulating layer through the opening, the second superconducting metal layer having a second surface opposite to the first surface; and 10. A method for manufacturing a Josephson element, wherein in the step of forming the second superconducting metal layer, the second evaporated material is supplied so that the outline of the second surface is located inside the outline of the first surface when viewed in a plan view from a direction perpendicular to the first surface.

13. The step of forming the first superconducting metal layer includes: rotating the substrate about a line passing through the center of the upper surface and perpendicular to the upper surface; supplying the first evaporation material toward the upper surface from a direction inclined from the straight line; 13. The method for manufacturing a Josephson element according to claim 12, further comprising:

14. 14. The method for manufacturing a Josephson element according to claim 12, wherein the steps of forming the first superconducting metal layer, forming the insulating layer, and forming the second superconducting metal layer are performed in a vacuum chamber while maintaining a vacuum state.

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