Drive unit

Abstract

To provide a drive unit capable of contributing to downsizing of a casing size while achieving reduction in cost.SOLUTION: A drive unit includes a first drive part group 11 of which each generates magnetic field and which has a plurality of first drive parts for driving a first object 1_1 with a first magnet 3_1 in an optical axis direction, and a second drive part group 12 of which each generates magnetic field and which has a plurality of second drive parts for driving a second object 1_2 with a second magnet 3_2 in the optical axis direction. Each of the plurality of first drive parts and the plurality of second drive parts has a first terminal and a second terminal connected with a master for controlling itself as a slave via a clock signal line and a data signal line. In the plurality of first drive parts, the first terminal is straight connected to the clock signal line and the second terminal is straight connected to the data signal line. In the plurality of second drive parts, the second terminal is reversely connected to the clock signal line and the first terminal is reversely connected to the data signal line.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a drive device. [Background technology]

[0002] Patent document 1 states that "the motor drive system 1 comprises a first motor drive control device 50a, a second motor drive control device 50b, a control unit 2a, and a switch unit 6 that can switch between an enabled state and an disabled state for a first communication line 4a and a second communication line 4b that connect a common terminal 2b of the control unit 2a to the first motor drive control device 50a and the second motor drive control device 50b, respectively." [Prior art document] [Patent documents] [Patent Document 1] U.S. Patent No. 10,749,452 [Patent Document 2] Patent No. 6644529 [Patent Document 3] U.S. Patent No. 11039071 Summary of the Invention

[0003] When the movable range of an object is divided into a plurality of sections using a plurality of drive units, the number of communication lines increases if communication is performed using a communication means having a chip selector function, for example. To solve these problems,A first aspect of the present invention provides a drive device. The drive device may include a first drive unit group having a first plurality of drive units, each of which generates a magnetic field to drive a first object having a first lens and a first magnet in the optical axis direction. The drive device may include a second drive unit group having a second plurality of drive units, each of which generates a magnetic field to drive a second object having a second lens and a second magnet in the optical axis direction. Each of the first and second drive units may have a first terminal and a second terminal connected to a master that controls it as a slave via a clock signal line and a data signal line. At least one drive unit in the first plurality of drive units may have the first terminal connected to the clock signal line and the second terminal connected to the data signal line in a forward direction. At least one drive unit in the second plurality of drive units may have the second terminal connected to the clock signal line and the first terminal connected to the data signal line in a reverse direction.

[0004] The first plurality of drive units and the second plurality of drive units may each be slave-connected to a host that functions as a common controller that controls the first group of drive units and the second group of drive units.

[0005] All of the drivers in the first plurality of drivers may be connected to the host with the first terminals connected to the clock signal lines and the second terminals connected to the data signal lines in a forward direction. All of the drivers in the second plurality of drivers may be connected to the host with the second terminals connected to the clock signal lines and the first terminals connected to the data signal lines in a reverse direction.

[0006] The drive device may further include the host.

[0007] A first driver in the first plurality of drivers and a second driver in the second plurality of drivers may be slaved to a host. Other drivers in the first plurality of drivers may be slaved to the first driver. Other drivers in the second plurality of drivers may be slaved to the second driver.

[0008] The first driver may have the first terminal connected to a primary clock signal line and the second terminal connected to a primary data signal line in a forward direction between the first driver and the host. The second driver may have the second terminal connected to the primary clock signal line and the first terminal connected to the primary data signal line in a reverse direction between the second driver and the host.

[0009] At least one of the other driving units in the first plurality of driving units may have the first terminal connected to a secondary first clock signal line and the second terminal connected to a secondary first data signal line in a forward direction between the first driving unit and the other driving unit. At least one of the other driving units in the first plurality of driving units may have the second terminal connected to the secondary first clock signal line and the first terminal connected to the secondary first data signal line in a reverse direction between the first driving unit and the other driving unit.

[0010] At least one of the other driving units in the second plurality of driving units may have the first terminal connected to a secondary second clock signal line and the second terminal connected to a secondary second data signal line in a forward direction between the second driving unit and the driving unit. At least one of the other driving units in the second plurality of driving units may have the second terminal connected to the secondary second clock signal line and the first terminal connected to the secondary second data signal line in a reverse direction between the second driving unit and the driving unit.

[0011] The first drive unit and the second drive unit may function as individual controllers that respectively control the drive unit groups to which they belong.

[0012] A first driver in the first plurality of drivers may be slaved to a host, and the first plurality of drivers and other drivers in the second plurality of drivers may be slaved to the first driver.

[0013] All other drivers in the first plurality of drivers may be forward-connected to the first driver at the first terminal to a secondary clock signal line and at the second terminal to a secondary data signal line. All drivers in the second plurality of drivers may be reverse-connected to the first driver at the second terminal to the secondary clock signal line and at the first terminal to the secondary data signal line.

[0014] The first drive unit may function as a common controller that controls the first drive unit group and the second drive unit group.

[0015] The at least one reverse-connected driving unit may be capable of communicating with the master as a slave different from the at least one forward-connected driving unit.

[0016] The at least one reversely connected driver may distinguish between a clock signal and a data signal and switch between the internal clock signal line and the internal data signal line.

[0017] The at least one reversely connected driving section may change its own slave address in response to switching of the internal clock signal line and the internal data signal line.

[0018] Each of the first plurality of drive sections and the second plurality of drive sections may be configured to be able to distinguish between the clock signal and the data signal and switch between the internal clock signal line and the internal data signal line.

[0019] Each of the first plurality of drivers may drive the first object by feedback control based on a target position command signal for the first object and a detected position signal for the first object, and each of the second plurality of drivers may drive the second object by feedback control based on a target position command signal for the second object and a detected position signal for the second object.

[0020] Each of the first plurality of actuators may include at least one magnetic sensor element that detects a magnetic field generated by the first magnet, and each of the second plurality of actuators may include at least one magnetic sensor element that detects a magnetic field generated by the second magnet.

[0021] The controller may control at least one of the first group of driving units and the second group of driving units to drive at least one of the first object and the second object to a target position in the optical axis direction.

[0022] When driving at least one of the first object and the second object to the target position, the controller may set a plurality of waypoints that divide the route to the target position, and may perform driving to each of the plurality of waypoints in stages.

[0023] When the target position is changed, the controller may drive at least one of the first object and the second object from a route point immediately after the change among the plurality of route points to the changed target position.

[0024] The controller may be capable of switching whether or not to perform the driving stepwise, depending on the operating state of a system including the object.

[0025] The above summary of the invention does not list all of the features of the present invention, and subcombinations of these features may also be inventions. [Brief explanation of the drawings]

[0026] [Figure 1] An example of a block diagram of a driving device 10 according to a first embodiment is shown together with an object 1 and a host 20. [Figure 2] An example of a wiring diagram of the drive device 10 according to the first embodiment is shown together with the host 20. [Figure 3] An example of a block diagram of a driving device 10 according to a second embodiment is shown together with an object 1 and a host 20'. [Figure 4] An example of a wiring diagram of a driving device 10 according to a second embodiment is shown together with a host 20'. [Figure 5] An example of a block diagram of a driving device 10 according to a third embodiment is shown together with an object 1 and a host 20′. [Figure 6] An example of a wiring diagram of a driving device 10 according to a third embodiment is shown together with a host 20'. [Figure 7] 1 shows an example of a block diagram for realizing a switching function in the driving unit 100. FIG. [Figure 8] An example of a block diagram for realizing the driving function in the driving unit 100 is shown together with the target object 1. [Figure 9] An example of allocation of the driving units 100 responsible for each of the multiple sections is shown. [Figure 10] An example of a simulation result of a magnetic field detected when the target object 1 is driven within the movable range is shown. [Figure 11] 10 shows an example of a flow in which the controller controls the drive device 10 according to the present embodiment. [Figure 12] 10 shows an example of driving the object 1 all at once and an example of driving the object 1 in stages. [Figure 13] 99 illustrates an example computer 9900 in which aspects of the present invention may be embodied, in whole or in part. DETAILED DESCRIPTION OF THE INVENTION

[0027] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0028] FIG. 1 shows an example of a block diagram of a drive device 10 according to the first embodiment, together with an object 1 and a host 20. Note that these blocks are functionally separated functional blocks and may not necessarily correspond to the actual device configuration. In other words, just because something is shown as one block in this diagram does not necessarily mean that it is composed of one device. Also, just because something is shown as separate blocks in this diagram does not necessarily mean that it is composed of separate devices. The same applies to other diagrams.

[0029] The driving device 10 according to this embodiment includes a first group of driving units that drives a first object and a second group of driving units that drives a second object. In the driving device 10 according to this embodiment, at least one driving unit in the first group of driving units has a clock signal line and a data signal line connected in a forward direction, whereas at least one driving unit in the second group of driving units has a clock signal line and a data signal line connected in a reverse direction.

[0030] The driving device 10 drives a plurality of driving objects. In the figure, as an example, the driving device 10 drives two objects, a first object 1_1 and a second object 1_2 (collectively referred to as "object 1"). However, this is not limited to this. The driving device 10 may drive three or more driving objects.

[0031] The object 1 is a device whose position changes in response to an input signal. As an example, the object 1 may be a linear motion device. In a linear motion device, the input signal and the displacement corresponding to the input signal are expressed as a linear function. An example of such a linear motion device is a camera autofocus / zoom lens. From here on, a case where the object 1 is a camera autofocus / zoom lens will be described as an example. However, this is not limited to this. The object 1 may be various devices whose position can change in response to an input signal. The object 1 is provided with a pair of lenses 2 and a magnet 3. That is, the first object 1_1 is provided with a first lens 2_1 and a first magnet 3_1. Similarly, the second object 1_2 is provided with a second lens 2_2 and a second magnet 3_2. Here, the first lens 2_1 and the second lens 2_2 are collectively referred to as "lenses 2." Furthermore, the first magnet 3_1 and the second magnet 3_2 are collectively referred to as "magnets 3."

[0032] The lens 2 is an optical element that refracts and focuses light. In autofocus / zoom control, focusing and changing the magnification are performed by displacing the lens 2 in the optical axis direction.

[0033] The magnet 3 is a permanent magnet fixed to the lens 2. As an example, the magnet 3 may have its south poles and north poles alternately arranged along the optical axis direction of the lens 2. When a current flows through a drive coil (described later), the magnet 3 generates a magnetic force between the drive coil and the magnet 3, displacing the lens 2 in the optical axis direction. The drive device 10 according to this embodiment drives a plurality of such objects 1.

[0034] The driving device 10 includes a plurality of groups of driving units that respectively drive a plurality of driving targets. In the figure, the driving device 10 includes a first group of driving units 11 that drives a first object 1_1 and a second group of driving units 12 that drives a second object 1_2, as an example. However, the present invention is not limited to this. The driving device 10 may include three or more groups of driving units depending on the number of objects 1 to be driven.

[0035] The first driving unit group 11 drives the first object 1_1 within a first movable range. This first movable range may be a predetermined range for moving the first object 1_1 in the optical axis direction of the first lens 2_1. The first driving unit group 11 includes a first driving unit 100a_1, a first second driving unit 100b_1, a first third driving unit 100c_1, and a first fourth driving unit 100d_1 (collectively referred to as "first plurality of driving units 100_1"), each of which generates a magnetic field to drive the first object 1_1, including the first lens 2_1 and the first magnet 3_1, in the optical axis direction. The first plurality of driving units 100_1 are arranged along the optical axis direction of the first lens 2_1. In this first plurality of driving units 100_1, one driving unit is assigned in advance to drive the first object 1_1 for each of a plurality of sections obtained by dividing the first movable range. Each drive unit drives the first object 1_1 in its assigned section, and the first plurality of drive units 100_1 cooperate to drive the first object 1_1 over the first movable range. Note that, although the first drive unit group 11 includes four drive units in this figure, the present invention is not limited to this. The first drive unit group 11 may include two, three, or more than four drive units.

[0036] Similarly, the second driving unit group 12 drives the second object 1_2 within a second movable range. Such a second movable range may be a range determined in advance to move the second object 1_2 in the optical axis direction of the second lens 2_2. Note that the optical axis direction of the first lens 2_1 and the optical axis direction of the second lens 2_2 may be the same direction. Furthermore, at least a portion of the second movable range may overlap at least a portion of the first movable range. The second driving unit group 12 includes a second first driving unit 100a_2, a second second driving unit 100b_2, a second third driving unit 100c_2, and a second fourth driving unit 100d_2 (collectively referred to as the "second plurality of driving units 100_2." The first plurality of driving units 100_1 and the second plurality of driving units 100_2 are collectively referred to as the "driving unit 100.") that each generate a magnetic field to drive the second object 1_2, on which the second lens 2_2 and the second magnet 3_2 are provided, in the optical axis direction. The second plurality of driving units 100_2 are arranged along the optical axis direction of the second lens 2_2. In such second plurality of driving units 100_2, one driving unit is assigned in advance to drive the second object 1_2 for each of a plurality of sections obtained by dividing the second movable range. Then, each drive unit drives the second object 1_2 in its assigned section, whereby the second plurality of drive units 100_2 cooperate to drive the second object 1_2 over the second movable range. Note that, like the first drive unit group 11, the second drive unit group 12 may have two, three, or more than four drive units. Note that the drive units 100 will be described in detail later.

[0037] The host 20 is a higher-level control device that controls the drive device 10. In the first embodiment, the host 20 functions as a common controller that controls the first drive unit group 11 and the second drive unit group 12. That is, the host 20 may include an autofocus / zoom controller. In the first embodiment, the first plurality of drive units 100_1 and the second plurality of drive units 100_2 are each slave-connected to the host 20 that functions as a common controller that controls the first drive unit group 11 and the second drive unit group 12. Note that such a controller may include, for example, a drive algorithm that drives each drive unit 100 to move each object 1 to a target position, and an algorithm that determines the position of each object 1 (i.e., the position of each magnet 3). In this case, the controller may store magnetic field information and the like required for the algorithm in an internal memory.

[0038] FIG. 2 shows an example of a wiring diagram of the drive device 10 according to the first embodiment, together with the host 20. The host 20 and the drive device 10 are connected by a serial communication method such as I2C (Inter-Integrated Circuit). In I2C, one master and one or more slaves are generally connected in a party line fashion using two signal lines: a clock signal line SCL and a data signal line SDA. Each slave has an address, and only one slave designated by the address included in the data communicates with the master on a one-to-one basis.

[0039] In this figure, the white terminal is the first terminal 110. The first terminal 110 may be, for example, an SCL port in I2C. Also in this figure, the black terminal is the second terminal 120. The second terminal 120 may be, for example, an SDA port in I2C. As shown in this figure, each of the first plurality of driving units 100_1 and the second plurality of driving units 100_2 has the first terminal 110 and the second terminal 120 connected to a master that controls it as a slave via a clock signal line and a data signal line.

[0040] In this diagram, the signal line marked with the letter C indicates the clock signal line SCL. Also, in this diagram, the signal line marked with the letter D indicates the data signal line SDA. The clock signal line SCL and the data signal line SDA are connected to a power supply via pull-up resistors.

[0041] In the driving device 10 according to the first embodiment, the first terminals 110 of all of the driving units 100a_1 to 100d_1 in the first plurality of driving units 100_1 are connected to the clock signal line SCL and the second terminals 120 are connected to the data signal line SDA in this order between the host 20. That is, the first plurality of driving units 100_1 are connected to the host 20 by normal wiring in I2C.

[0042] In contrast, all of the driving units 100a_2 to 100d_2 in the second plurality of driving units 100_2 are reversely connected between the host 20 and the host 20, with the second terminals 120 being connected to the clock signal line SCL and the first terminals 110 being connected to the data signal line SDA. That is, the second plurality of driving units 100_2 are connected to the host 20 by wiring that is reverse to the normal wiring in I2C.

[0043] In the above description, a case where all of the drive units 100a_1 to 100d_1 in the first plurality of drive units 100_1 are forward-connected and all of the drive units 100a_2 to 100d_2 in the second plurality of drive units 100_2 are reverse-connected in connection with the host 20 has been described as an example, but this is not limiting. For example, in the first drive unit group 11, the first drive unit 100a_1 and the first third drive unit 100c_1 may be forward-connected and the first second drive unit 100b_1 and the first fourth drive unit 100d_1 may be reverse-connected, and in the second drive unit group 12, the second second drive unit 100b_2 and the second fourth drive unit 100d_2 may be forward-connected and the second first drive unit 100a_2 and the second third drive unit 100c_2 may be reverse-connected. In this way, forward and reverse connections may be mixed within a drive unit group.

[0044] In the driving device 10 according to the first embodiment, for example, by wiring in this manner, at least one driving unit in the first plurality of driving units 100_1 may have the first terminal 110 connected to the clock signal line SCL and the second terminal 120 connected to the data signal line SDA in a forward direction, and at least one driving unit in the second plurality of driving units 100_2 may have the second terminal 120 connected to the clock signal line SCL and the first terminal 110 connected to the data signal line SDA in a reverse direction.

[0045] In the above description, the case where the drive unit 10 and the host 20 are configured as separate devices has been shown as an example, but the present invention is not limited to this. The drive unit 10 and the host 20 may also be configured as an integrated device. In other words, the drive unit 10 may further include a host 20.

[0046] FIG. 3 shows an example of a block diagram of a drive device 10 according to a second embodiment, together with an object 1 and a host 20′. In FIG. 3, components having the same functions and configurations as those in FIG. 1 are denoted by the same reference numerals, and descriptions thereof will be omitted hereinafter except for differences. In the first embodiment, the host 20 functions as a common controller for controlling the first drive unit group 11 and the second drive unit group 12. However, in the second embodiment, the host 20′ does not function as a controller for controlling the first drive unit group 11 and the second drive unit group 12. In other words, the host 20′ does not include an autofocus / zoom controller. An example of such a host 20′ is an ISP (Image Signal Processor). The ISP is an image processing processor in a camera system.

[0047] In the second embodiment, the first driving unit in the first plurality of driving units 100_1 and the second driving unit in the second plurality of driving units 100_2 are slave-connected to the host 20′ via primary signal lines. Note that in this figure, the first first driving unit 100a_1 is the “first driving unit” and the second first driving unit 100a_2 is the “second driving unit” as an example. The other driving units in the first plurality of driving units 100_1 are slave-connected to the first driving unit via secondary signal lines, and the other driving units in the second plurality of driving units 100_2 are slave-connected to the second driving unit via secondary signal lines. In the second embodiment, the first driving unit and the second driving unit function as individual controllers that respectively control the driving unit groups to which they belong. This eliminates the need for a separate controller in the second embodiment.

[0048] FIG. 4 shows an example of a wiring diagram of a drive device 10 according to the second embodiment, together with a host 20'. In FIG. 4, components having the same functions and configurations as those in FIG. 2 are given the same reference numerals, and descriptions thereof will be omitted hereinafter except for differences. In this diagram, the signal line marked with the reference symbol C indicates the primary clock signal line SCL. Also, in this diagram, the signal line marked with the reference symbol D indicates the primary data signal line SDA. The primary clock signal line SCL and the primary data signal line SDA are connected to a power supply via pull-up resistors.

[0049] In this diagram, the signal line marked with the symbol C' indicates the secondary first clock signal line SCL'. Also, in this diagram, the signal line marked with the symbol D' indicates the secondary first data signal line SDA'. The secondary first clock signal line SCL' and the secondary first data signal line SDA' are also connected to the power supply via pull-up resistors.

[0050] In this diagram, the signal line marked with the symbol C" indicates the secondary second clock signal line SCL". Also in this diagram, the signal line marked with the symbol D" indicates the secondary second data signal line SDA". The secondary second clock signal line SCL" and the secondary second data signal line SDA" are also connected to a power supply via pull-up resistors. Here, unless there is a particular need to distinguish between them, the primary clock signal line SCL, the secondary first clock signal line SCL', and the secondary second clock signal line SCL" will be collectively referred to as the "clock signal lines SCL". Similarly, the primary data signal line SDA, the secondary first data signal line SDA', and the secondary second data signal line SDA" will be collectively referred to as the "data signal lines SDA".

[0051] Although the present diagram shows an example in which all signal lines are connected to a common power supply via pull-up resistors, this is not limiting. At least one of the signal lines may be connected to a different power supply via a pull-up resistor. Furthermore, the present diagram shows an example in which all signal lines are connected to a power supply via individual pull-up resistors, but this is not limiting. At least two of the signal lines may share a pull-up resistor.

[0052] First, let us focus on the primary connection with the host 20'. The first first driving unit 100a_1, which is the first driving unit, is connected to the host 20' in a forward direction with its first terminal 110 being connected to the primary clock signal line SCL and its second terminal 120 being connected to the primary data signal line SDA. Furthermore, the second first driving unit 100a_2, which is the second driving unit, is connected to the host 20' in a reverse direction with its second terminal 120 being connected to the primary clock signal line SCL and its first terminal 110 being connected to the primary data signal line SDA.

[0053] In the second embodiment, the first first driving unit 100a_1 that is primarily connected to the host 20' functions as a controller that controls the first driving unit group 11. That is, the first first driving unit 100a_1 functions as both a driving unit 100 and a controller. Similarly, the second first driving unit 100a_2 that is primarily connected to the host 20' functions as a controller that controls the second driving unit group 12. That is, the second first driving unit 100a_2 functions as both a driving unit 100 and a controller.

[0054] Next, attention will be paid to the secondary connection with the controller. Between the first second drive unit 100b_1 and the first first drive unit 100a_1, the first terminal 110 is connected to the secondary first clock signal line SCL' and the second terminal 120 is connected to the secondary first data signal line SDA' in a forward direction. Furthermore, between the first third drive unit 100c_1 and the first first drive unit 100a_1, the second terminal 120 is connected to the secondary first clock signal line SCL' and the first terminal 110 is connected to the secondary first data signal line SDA' in a reverse direction. Furthermore, between the first fourth drive unit 100d_1 and the first first drive unit 100a_1, the first terminal 110 is connected to the secondary first clock signal line SCL' and the second terminal 120 is connected to the secondary first data signal line SDA' in a forward direction. In this way, at least one of the other driver units 100b_1-100d_1 in the first plurality of driver units 100_1 may have the first terminal 110 connected to the secondary first clock signal line SCL' and the second terminal 120 connected to the secondary first data signal line SDA' in a forward direction between the first driver unit (first first driver unit 100a_1). Furthermore, at least one of the other driver units 100b_1-100d_1 in the first plurality of driver units 100_1 may have the second terminal 120 connected to the secondary first clock signal line SCL' and the first terminal 110 connected to the secondary first data signal line SDA' in a reverse direction between the first driver unit (first first driver unit 100a_1).

[0055] Similarly, the second second drive unit 100b_2 has its second terminal 120 connected to the secondary second clock signal line SCL" and its first terminal 110 connected to the secondary second data signal line SDA" in reverse between it and the second first drive unit 100a_2. Furthermore, the second third drive unit 100c_2 has its first terminal 110 connected to the secondary second clock signal line SCL" and its second terminal 120 connected to the secondary second data signal line SDA" in forward between it and the second first drive unit 100a_2. Furthermore, the second fourth drive unit 100d_2 has its second terminal 120 connected to the secondary second clock signal line SCL" and its first terminal 110 connected to the secondary second data signal line SDA" in reverse between it and the second first drive unit 100a_2. In this way, at least one of the other driver units 100b_2 to 100d_2 in the second plurality of driver units 100_2 may have the first terminal 110 connected to the secondary second clock signal line SCL" and the second terminal 120 connected to the secondary second data signal line SDA" in a forward direction between the driver unit and the second driver unit (second first driver unit 100a_2). Furthermore, at least one of the other driver units 100b_2 to 100d_2 in the second plurality of driver units 100_2 may have the second terminal 120 connected to the secondary second clock signal line SCL" and the first terminal 110 connected to the secondary second data signal line SDA" in a reverse direction between the driver unit and the second driver unit (second first driver unit 100a_2).

[0056] In the above description, a case where forward connection and reverse connection are mixed within the drive unit group in the secondary connection with the controller has been shown as an example, but this is not limited to this. In the secondary connection with the controller, all other drive units in the drive unit group may be forward connected, or all other drive units in the drive unit group may be reverse connected.

[0057] In the driving device 10 according to the second embodiment, for example, by wiring in this manner, at least one driving unit in the first plurality of driving units 100_1 may have the first terminal 110 connected to the clock signal line SCL and the second terminal 120 connected to the data signal line SDA in a forward direction, and at least one driving unit in the second plurality of driving units 100_2 may have the second terminal 120 connected to the clock signal line SCL and the first terminal 110 connected to the data signal line SDA in a reverse direction.

[0058] FIG. 5 shows an example of a block diagram of a drive device 10 according to a third embodiment, together with an object 1 and a host 20′. In FIG. 5, components having the same functions and configurations as those in FIG. 3 are denoted by the same reference numerals, and descriptions thereof will be omitted hereinafter except for differences. In the second embodiment, an example was shown in which the first drive unit and the second drive unit function as individual controllers that respectively control the drive unit groups to which they belong. However, in the third embodiment, the first drive unit functions as a common controller that controls the first drive unit group 11 and the second drive unit group 12.

[0059] In the third embodiment, a first driver in the first plurality of driver units 100_1 is slave-connected to the host 20' via a primary signal line. Note that in this figure, the first driver unit 100a_1 is shown as the "first driver unit" as an example. The other drivers in the first plurality of driver units 100_1 and the second plurality of driver units 100_2 are slave-connected to the first driver unit via secondary signal lines. In the third embodiment, the first driver unit functions as a common controller that controls the first driver unit group 11 and the second driver unit group 12. As a result, in the third embodiment, the controller can be shared by the first driver unit group 11 and the second driver unit group 12.

[0060] FIG. 6 shows an example of a wiring diagram of a drive device 10 according to a third embodiment, together with a host 20'. In FIG. 6, components having the same functions and configurations as those in FIG. 4 are given the same reference numerals, and descriptions thereof will be omitted hereinafter except for differences. In this diagram, the signal line marked with the reference symbol C indicates the primary clock signal line SCL. Also, in this diagram, the signal line marked with the reference symbol D indicates the primary data signal line SDA. The primary clock signal line SCL and the primary data signal line SDA are connected to a power supply via pull-up resistors.

[0061] In this diagram, the signal line marked with the symbol C' indicates the secondary clock signal line SCL'. Also, in this diagram, the signal line marked with the symbol D' indicates the secondary data signal line SDA'. The secondary clock signal line SCL' and the secondary data signal line SDA' are also connected to a power supply via pull-up resistors. Here, unless there is a particular need to distinguish between them, the primary clock signal line SCL and the secondary clock signal line SCL' will be collectively referred to as the "clock signal line SCL." Similarly, the primary data signal line SDA and the secondary data signal line SDA' will be collectively referred to as the "data signal line SDA."

[0062] In the third embodiment, as in the second embodiment, at least one of the signal lines may be connected to a different power supply via a pull-up resistor, and at least two of the signal lines may share a pull-up resistor.

[0063] First, attention is focused on the primary connection with the host 20'. Between the host 20', the first first driving unit 100a_1, which is the first driving unit, has a first terminal 110 connected to a primary clock signal line SCL and a second terminal 120 connected to a primary data signal line SDA.

[0064] In the third embodiment, the first first driving unit 100a_1 that is primarily connected to the host 20′ functions as a common controller that controls the first driving unit group 11 and the second driving unit group 12. That is, the first first driving unit 100a_1 functions as both the driving unit 100 and the controller.

[0065] Next, attention will be paid to the secondary connection with the controller. Between the first second driving unit 100b_1, the first third driving unit 100c_1, and the first fourth driving unit 100d_1 and the first first driving unit 100a_1, the first terminals 110 are sequentially connected to the secondary clock signal line SCL' and the second terminals 120 are sequentially connected to the secondary data signal line SDA'. In this way, between the first driving unit (first first driving unit 100a_1) and all other driving units 100b_1 to 100d_1 in the first plurality of driving units 100_1, the first terminals 110 may be sequentially connected to the secondary clock signal line SCL' and the second terminals 120 are sequentially connected to the secondary data signal line SDA'.

[0066] Furthermore, the second first driving unit 100a_2, the second second driving unit 100b_2, the second third driving unit 100c_2, and the second fourth driving unit 100d_2 have their second terminals 120 connected to the secondary clock signal line SCL' and their first terminals 110 connected to the secondary data signal line SDA'. In this way, all of the driving units 100a_2 to 100d_2 in the second plurality of driving units 100_2 may be reversely connected to the first driving unit (first first driving unit 100a_1) with their second terminals 120 connected to the secondary clock signal line SCL' and their first terminals 110 connected to the secondary data signal line SDA'.

[0067] In the above description, a case where all other drivers 100b_1 to 100d_1 in the first plurality of drivers 100_1 are forward-connected and all drivers 100a_2 to 100d_2 in the second plurality of drivers 100_2 are reverse-connected in the secondary connection with the controller has been described as an example, but this is not limited thereto. For example, in the first driver group 11, the first driver 100b_1 and the first driver 100d_1 may be forward-connected and the first driver 100c_1 may be reverse-connected, and in the second driver group 12, the second driver 100a_2 and the second driver 100c_2 may be forward-connected and the second driver 100b_2 and the second driver 100d_2 may be reverse-connected. In this way, forward and reverse connections may be mixed within a driver group.

[0068] In the driving device 10 according to the third embodiment, for example, by wiring in this manner, at least one driving unit in the first plurality of driving units 100_1 may have the first terminal 110 connected to the clock signal line SCL and the second terminal 120 connected to the data signal line SDA in a forward direction, and at least one driving unit in the second plurality of driving units 100_2 may have the second terminal 120 connected to the clock signal line SCL and the first terminal 110 connected to the data signal line SDA in a reverse direction.

[0069] Up to this point, examples of wiring for the drive device 10 according to this embodiment have been explained using the first to third embodiments, but even when wiring is performed in this manner, at least one reversely connected drive unit can communicate with the master as a slave different from at least one forwardly connected drive unit. This will be explained in detail.

[0070] 7 shows an example of a block diagram that realizes the switching function in the driving unit 100. The driving unit 100 determines the connection destinations of the first terminal 110 and the second terminal 120 based on the input signal, and changes its own slave address depending on the connection destination. The driving unit 100 includes a connection unit 130, a processing unit 140, a processing result storage unit 150, an output terminal 160, a determination unit 170, a change unit 180, and a fixing unit 190.

[0071] The connection unit 130 switches between a first state and a second state based on a signal input from outside. For example, the first state is a connection state inside the drive unit 100 corresponding to a state in which the clock signal line SCL is connected to the first terminal 110 and the data signal line SDA is connected to the second terminal 120. The connection unit 130 switches the connection inside the drive unit 100 from the first state to the second state in response to a signal notifying that the clock signal line SCL has been connected to the second terminal 120 in the first state. The second state is a connection state inside the drive unit 100 corresponding to a state in which the data signal line SDA is connected to the first terminal 110 and the clock signal line SCL is connected to the second terminal 120.

[0072] For example, in a first state, the connection unit 130 outputs a clock signal from one output and outputs a data signal from another output different from the one output, and in a second state, the connection unit 130 outputs a data signal from the one output and outputs a clock signal from the other output.

[0073] Furthermore, the connection unit 130 may receive a data signal from inside the drive unit 100 and, based on a signal input from outside, switch to output the input signal from either the first terminal 110 or the second terminal 120. For example, in the first state, the connection unit 130 may switch to output the data signal from inside the drive unit 100 from the second terminal 120, and in the second state, may switch to output the data signal from the first terminal 110. When a command input from either the first terminal 110 or the second terminal 120 includes a read command, the connection unit 130 may switch to output the data signal from the inside.

[0074] The connection unit 130 has a first amplifier 312, a second amplifier 314, a first switch 316, a filter unit 318, a second switch 326, a filter unit 328, a delay unit 332, a third switch 334, a first inverting amplifier 336, a first switch element 338, a fourth switch 344, a second inverting amplifier 346, and a second switch element 348. The first switch 316, the second switch 326, the third switch 334, and the fourth switch 344 may be switches that perform switching operations in conjunction with each other in response to an externally input signal.

[0075] The first amplifier 312 amplifies the signal input from the first terminal 110. The first amplifier 312 may function as a buffer that amplifies the amplitude voltage of the input signal to approximately 1. The first amplifier 312 supplies the amplified signal to the first switch 316 and the second switch 326.

[0076] The second amplifier 314 amplifies the signal input from the second terminal 120. The second amplifier 314 may function as a buffer that amplifies the amplitude voltage of the input signal to approximately 1. The second amplifier 314 supplies the amplified signal to the first switch 316 and the second switch 326.

[0077] The first switch 316 switches and outputs one of the signals input from the first terminal 110 and the second terminal 120. For example, in the first state, the first switch 316 outputs the clock signal input from the first terminal 110. In addition, in the second state, the first switch 316 outputs the clock signal input from the second terminal 120.

[0078] The first switch 316 may switch and output an input signal based on an externally input signal. As an example, the first switch 316 is switched to output a clock signal from among the signals input from the first terminal 110 and the second terminal 120. The first switch 316 supplies the output signal to the filter unit 318.

[0079] The filter unit 318 reduces noise in the input signal. The filter unit 318 may be any one of a low-pass filter, a high-pass filter, and a band-pass filter, or a combination thereof. The filter unit 318 may output the noise-reduced signal to the processing unit 140. That is, for example, the connection unit 130 is switched to supply the clock signal from one output regardless of the connection state between the first terminal 110 and the second terminal 120 and the clock signal line.

[0080] The second switch 326 switches and outputs the other of the signals input from the first terminal 110 and the second terminal 120. The second switch 326 is switched in conjunction with the first switch 316, and outputs the other signal that is different from the one signal output by the first switch 316. For example, in the first state, the second switch 326 outputs the data signal input from the second terminal 120. In addition, in the second state, the second switch 326 outputs the data signal input from the first terminal 110.

[0081] The second switch 326 may switch and output an input signal based on an externally input signal. As an example, the second switch 326 is switched to output a data signal from among the signals input from the first terminal 110 and the second terminal 120. The second switch 326 supplies the output signal to the filter unit 328.

[0082] The filter unit 328 reduces noise in the input signal. The filter unit 328 may be any one of a low-pass filter, a high-pass filter, and a band-pass filter, or a combination thereof. The filter unit 328 may output the noise-reduced signal to the processing unit 140. That is, as an example, the connection unit 130 can be switched to supply the data signal from another output regardless of the connection state between the first terminal 110 and the second terminal 120 and the data signal line.

[0083] The delay unit 332 receives a data signal from inside the driver unit 100. The delay unit 332 may receive the data signal from the processing unit 140. The delay unit 332 delays the input signal by a predetermined or set time and outputs the signal. For example, the delay unit 332 adjusts the timing of data supply to a master connected to the driver unit 100 by adding a delay to the data signal to be supplied, in order to supply the data signal in response to a read command from the master. The delay unit 332 supplies the delayed data signal to a third switch 334 and a fourth switch 344. The delay unit 332 may include a delay circuit such as a flip-flop or a delay line.

[0084] The third switch 334 switches whether to output the input signal based on an externally input signal. The third switch 334 may be switched in conjunction with the first switch 316 and / or the second switch 326. For example, when the first switch 316 connects the signal from the first terminal 110 to one output, the third switch 334 electrically disconnects the input and output and turns off. Furthermore, when the second switch 326 connects the signal from the first terminal 110 to another output, the third switch 334 electrically connects the input and output and turns on in response to a signal instructing the output of the input signal. In this case, the third switch 334 supplies the input signal to the first inverting amplifier 336.

[0085] The first inverting amplifier 336 inverts and amplifies the input signal. The first inverting amplifier 336 may function as a buffer that amplifies the amplitude voltage of the input signal to approximately −1. The first inverting amplifier 336 supplies the amplified signal to the first switch element 338.

[0086] The first switch element 338 electrically connects or disconnects the first terminal 110 and the reference potential in response to an input signal. The first switch element 338 may include a transistor, an FET, an operational amplifier, or the like, and may connect the first terminal 110 and the reference potential when the input signal is high, and disconnect the first terminal 110 and the reference potential when the input signal is low. Here, the reference potential may be a ground voltage, for example, 0 V.

[0087] As a result, for example, when a high voltage is applied to the first terminal 110 via a pull-up resistor, when the input signal becomes high, the first switch element 338 causes a current to flow from the pull-up resistor to the reference potential, causing a voltage drop and setting the first terminal 110 to a low state. In this case, when the input signal becomes low, the first switch element 338 cuts off the current from the pull-up resistor to the reference potential and sets the first terminal 110 to a high state. In other words, the first switch element 338 causes the first terminal 110 to output a logic signal that is substantially the same as the logic of the data signal input to the first inverting amplifier 336.

[0088] Like the third switch 334, the fourth switch 344 switches whether to output an input signal based on an externally input signal. The fourth switch 344 may be switched in conjunction with the first switch 316 and / or the second switch 326. For example, when the second switch 326 connects the signal from the second terminal 120 to another output, the fourth switch 344 electrically disconnects the input and output and turns off. Furthermore, when the second switch 326 connects the signal from the second terminal 120 to one output, the fourth switch 344 electrically connects the input and output and turns on in response to a signal instructing the output of the input signal. In this case, the fourth switch 344 supplies the input signal to the second inverting amplifier 346.

[0089] The second inverting amplifier 346 inverts and amplifies the input signal. The second inverting amplifier 346 may function as a buffer that amplifies the amplitude voltage of the input signal to approximately −1. The second inverting amplifier 346 supplies the amplified signal to the second switch element 348.

[0090] The second switch element 348 electrically connects or disconnects the second terminal 120 and the reference potential in response to an input signal. The second switch element 348 may include a transistor, a FET, and / or an operational amplifier, and may connect the second terminal 120 and the reference potential when the input signal is high and disconnect the second terminal 120 and the reference potential when the input signal is low. As a result, the second switch element 348, like the first switch element 338, outputs from the second terminal 120 a logic signal substantially identical to the logic of the data signal input to the second inverting amplifier 346. While the diagram illustrates an example in which both the first terminal 110 and the second terminal 120 employ open-drain output as the signal output form, this is not limiting. At least one of the first terminal 110 and the second terminal 120 may employ push-pull output as the signal output form.

[0091] The processing unit 140 executes processing according to data supplied from the interface. For example, the processing unit 140 may write data in response to a write command, or may read data in response to a read command and supply the data to the interface. The processing unit 140 may also calculate data in response to a calculation command, and may store the calculation results.

[0092] The processing unit 140 transmits and receives data signals to and from the interface using a standardized communication method. The processing unit 140 may transmit and receive data using serial data communication. In this embodiment, an example will be described in which the processing unit 140 transmits and receives data using the I2C communication method. The processing unit 140 may also convert serial data into parallel data. The processing unit 140 has a clock receiving internal terminal 142, a data transmitting internal terminal 143, a data receiving internal terminal 144, a determination circuit 146, and a storage unit 148.

[0093] The clock receiving internal terminal 142 receives the clock signal supplied from the clock signal line SCL inside the driver 100. The clock receiving internal terminal 142 receives the clock signal supplied from one output of the connection unit 130, for example.

[0094] The data transmission internal terminal 143 transmits a data signal from inside the driver unit 100 in response to a read command or the like. The data transmission internal terminal 143 supplies the data signal from inside the driver unit 100 to the delay unit 332, for example.

[0095] The data receiving internal terminal 144 receives the data signal supplied from the data signal line SDA within the driver 100. The data receiving internal terminal 144 receives the data signal supplied from another output of the connection unit 130, for example.

[0096] That is, for example, in the first state, the connection unit 130 connects the first terminal 110 to the clock receiving internal terminal 142, and connects the second terminal 120 to the data receiving internal terminal 144. Then, in response to an external instruction, the connection unit 130 switches to a second state in which the first terminal 110 is connected to the data receiving internal terminal 144 and the second terminal 120 is connected to the clock receiving internal terminal 142.

[0097] The determination circuit 146 starts receiving the data signal based on the phases of the clock signal and the data signal received by the clock receiving internal terminal 142 and the data receiving internal terminal 144. As an example, the determination circuit 146 starts receiving the data signal in response to the data signal input from the data receiving internal terminal 144 changing from high to low, provided that the clock signal input from the clock receiving internal terminal 142 is high.

[0098] The storage unit 148 stores the address of the device. The storage unit 148 may store the address of the device in a changeable manner. Alternatively, the storage unit 148 may store a plurality of addresses. Note that the address may be an address corresponding to the connection state of the first terminal 110 and the second terminal 120.

[0099] The storage unit 148 stores, for example, a first address corresponding to a first state in which the first terminal 110 is connected to the clock signal line SCL and the second terminal 120 is connected to the data signal line SDA. The storage unit 148 may also be able to change the first address to a second address corresponding to a second state in which the first terminal 110 is connected to the data signal line SDA and the first terminal 110 is connected to the clock signal line SCL. Alternatively, the storage unit 148 may store the first address and the second address separately. In this case, the storage unit 148 stores address information together with a value indicating which of the first address and the second address is valid.

[0100] After the determination circuit 146 starts receiving a data signal, the processing unit 140 according to the present embodiment executes processing in accordance with the data signal in response to the address included in the data signal specifying a (valid) address stored in the storage unit 148. For example, in response to a first address being stored (validated) in the storage unit 148, the processing unit 140 executes processing in accordance with the data signal, with the first address specified in the data signal as the condition. Furthermore, in response to the information of the first address in the storage unit 148 being changed to a second address (the second address being changed to valid), the processing unit 140 executes processing in accordance with the data signal in response to the second address specified in the data signal as the condition.

[0101] The processing result storage unit 150 stores the results of processing performed by the processing unit 140. Data may be written to the processing result storage unit 150 by a write process performed by the processing unit 140. The processing result storage unit 150 may read the written data by the processing unit 140. The processing result storage unit 150 may store data in advance, and the processing unit 140 may read the data. The processing result storage unit 150 may store the calculation results of the processing unit 140, etc.

[0102] The processing result storage unit 150 may also store the connection state inside the drive unit 100. The processing result storage unit 150 may store the current connection state, etc., between the first state and the second state switched by the connection unit 130. The processing result storage unit 150 may also store setting values, etc. of the drive unit 100. In response to a request from each unit in the drive unit 100, the processing result storage unit 150 may supply the stored setting values, data, etc. to the request source.

[0103] Furthermore, the processing result storage unit 150 may be connected to an output terminal 160 and communicate with the outside via the output terminal 160. That is, the processing result storage unit 150 may supply the stored processing results of the processing unit 140 to the outside. The processing unit 140 may communicate with the interface using a standardized serial data communication method at a speed conforming to the standard and convert the received data signal to parallel. The processing result storage unit 150 may then store the converted data and supply the stored data from the output terminal 160 to the outside using a method different from the communication method used between the processing unit 140 and the interface. In this case, the communication speed from the output terminal 160 to the outside may be slower than the communication speed between the processing unit 140 and the interface.

[0104] The determination unit 170 determines whether the clock signal line SCL is connected to the first terminal 110 or the second terminal 120, based on signals input from the first terminal 110 and the second terminal 120. The determination unit 170 determines whether the clock signal line SCL is connected to the first terminal 110 or the second terminal 120, based on the phase difference between the signals supplied from the clock signal line SCL0 and the data signal line SDA.

[0105] The determining unit 170 may receive the clock signal output from the filter unit 318 and the data signal output from the filter unit 328, and determine whether or not the clock signal line SCL is connected to the second terminal 120 based on the received signals. For example, the determining unit 170 determines that the clock signal line SCL is connected to the second terminal 120 in response to a change in the data signal input from the first terminal 110 from high to low, provided that the data signal input from the second terminal 120 is high. The determining unit 170 may supply the determination result to the connecting unit 130, the changing unit 180, and the fixing unit 190.

[0106] The change unit 180 changes the address of the drive unit 100 based on the determination by the determination unit 170 of the connection between the second terminal 120 and the clock signal line SCL. In this case, the change unit 180 may change the first address stored in the storage unit 148 to the second address. Alternatively, when the first address and the second address are stored in the storage unit 148 and the first address is valid, the change unit 180 may invalidate the first address and validate the second address.

[0107] In response to an external instruction, the fixing unit 190 fixes the connections between the first terminal 110 and the second terminal 120 and the clock receiving internal terminal 142 and the data receiving internal terminal 144. In other words, the fixing unit 190 stops or disables the switching operation by the connecting unit 130, and fixes the internal connections of the connecting unit 130.

[0108] Furthermore, upon receiving an instruction from the outside, the fixing unit 190 fixes the address of the driver unit 100 to an address corresponding to the connection between the first terminal 110 and the second terminal 120 and the clock receiving internal terminal 142 and the data receiving internal terminal 144. That is, the fixing unit 190 stops or disables the address changing operation by the changing unit 180, and fixes the address of the driver unit 100. The fixing unit 190 may also instruct the third switch 334 and the fourth switch 344 to be switched.

[0109] In addition, for example, in the case where there is a driver 100 that cannot be distinguished solely by the forward / reverse connection of I2C, such as the first second driver 100b_1 and the first fourth driver 100d_1, or the second second driver 100b_2 and the second fourth driver 100d_2 in the second embodiment shown in FIG. 3, the driver 100 may further have the function described in JP 2019-046098 A, i.e., the function of receiving an external output and changing the slave address, as a specific means for changing the slave address.

[0110] For example, in the drive device 10, there may be drive units 100 that are near the magnet 3 and drive units 100 that are not near the magnet 3. As an example, in the first drive unit group 11 of the second embodiment, when the first magnet 3_1 is located at the position shown in FIG. 3, the first first drive unit 100a_1 and the first fourth drive unit 100d_1 are far from the first magnet 3_1, and therefore, the magnetic field generated by the first magnet 3_1 hardly enters the first drive unit 100a_1 and the first fourth drive unit 100d_1. In contrast, the first second drive unit 100b_1 and the first third drive unit 100c_1 are near the first magnet 3_1, and therefore, the magnetic field generated by the first magnet 3_1 enters the first second drive unit 100b_1 and the first third drive unit 100c_1. Therefore, the drive unit 100 may determine such conditions (such as the magnitude of the magnetic field) and change the slave address.

[0111] Alternatively, or in addition, the driving unit 100 may further have the function described in Patent No. 6927811 as a specific means for changing the slave address, i.e., the function of using the driver output terminal like a chip selector.

[0112] As an example, in the second driver group 12 of the second embodiment, the second first driver 100a_2, which is the master, may transition the slave-connected second second driver 100b_2, second third driver 100c_2, and second fourth driver 100d_2 to the selection mode. The selection circuit may then provide a “High” signal to the slave it desires to designate and a “Low” signal to the other slaves. This may allow the designated slave to sense that it has been selected. The second first driver 100a_2, which is the master, may then provide slave address change information. This may allow only the slave that senses its selection to change its slave address. More specifically, control target lines may be drawn from the slave-connected second second driver 100b_2, second third driver 100c_2, and second fourth driver 100d_2, and each control target line may be connected to the selection circuit. In this case, a GPIO (General Purpose Input / Output) of the host 20' may be used as the selection circuit. Then, by setting the GPIO pin to "High" or "Low," only the designated driver 100 may sense that it has been selected and change its slave address.

[0113] In this way, each of the first plurality of drive units 100_1 and the second plurality of drive units 100_2 is configured to be able to distinguish between clock signals and data signals and switch between internal clock signal lines and internal data signal lines. At least one reverse-connected drive unit distinguishes between clock signals and data signals, switches between internal clock signal lines and internal data signal lines, and changes its own slave address in response to the switching between the internal clock signal line and the internal data signal line. As a result, the at least one reverse-connected drive unit can communicate with the master as a slave different from the at least one forward-connected drive unit.

[0114] 8 shows an example of a block diagram for realizing the driving function of the driving unit 100, together with the target object 1. The driving unit 100 includes a magnetic sensor 410, an A / D conversion circuit 420, a position command signal generation circuit 430, a PID control circuit 440, a D / A conversion circuit 450, an output driver 460, and a driving coil 470.

[0115] The magnetic sensor 410 detects a magnetic field generated by the magnet 3 provided on the target 1 and outputs a detection position signal Vip corresponding to the value of the detected magnetic field. For example, the magnetic sensor 410 may be a Hall sensor that uses the Hall effect to detect changes in an external magnetic field from the generated electromotive force. However, the magnetic sensor 410 is not limited to this. The magnetic sensor 410 may be any of various sensors capable of detecting a magnetic field, such as a spin-valve magnetoresistive element (e.g., a GMR element or a TMR element) whose resistance changes in response to changes in the external magnetic field, or a combination of these various sensors. The magnetic sensor 410 may also be composed of a sensor element group consisting of a plurality of magnetic sensor elements. That is, each of the first plurality of driving units 100_1 may include at least one magnetic sensor element that detects a magnetic field generated by the first magnet 3_1. Each of the second plurality of driving units 100_2 may include at least one magnetic sensor element that detects a magnetic field generated by the second magnet 3_2.

[0116] The A / D conversion circuit 420 amplifies and A / D converts the detected position signal from the magnetic sensor 410, and outputs the A / D converted detected position signal Vip.

[0117] The position command signal generating circuit 430 outputs a target position command signal VTARG that indicates a target position to which the target object 1 should be moved, in response to the data signal.

[0118] The PID control circuit 440 outputs a control signal MV for moving the object 1 to the target position based on the current position of the object 1 indicated by the detected position signal Vip and the target position of the object 1 indicated by the target position command signal VTARG.

[0119] The D / A conversion circuit 450 D / A converts the control signal MV from the PID control circuit 440 and outputs the D / A converted control signal MV.

[0120] The output driver 460 supplies a drive current to the drive coil 470 in response to a control signal MV from the D / A conversion circuit 450 .

[0121] The drive coil 470 drives the magnet 3 provided on the object 1. The drive coil 470 is wound along the optical axis direction of the lens 2 provided on the object 1, and has a first output terminal OUT1 at one end in the optical axis direction and a second output terminal OUT2 at the other end. When a drive current is supplied from the output driver 460, the drive coil 470 generates a magnetic field corresponding to the drive current. At this time, the magnetic field generated when the drive current flows from the first output terminal OUT1 to the second output terminal OUT2 is in the opposite direction to when the drive current flows from the second output terminal OUT2 to the first output terminal OUT1. As a result, the drive coil 470 can drive the object 1, on which the magnet 3 is provided, back and forth along the optical axis direction.

[0122] PID control is a type of feedback control that controls input values ​​using three elements: the deviation between the output value and the target value, its integral, and its derivative. Proportional control (P control) is a basic form of feedback control. This controls the input value as a linear function of the deviation between the output value and the target value. In PID control, the action that changes the input value in proportion to this deviation is called proportional action or P action (P stands for Proportional). In other words, the longer a deviation continues, the greater the change in the input value is, in an effort to bring it closer to the target value. The action that changes the input value in proportion to the integral of this deviation is called integral action or I action (I stands for Integral). A control method that combines proportional and integral action in this way is called PI control. The action that changes the input value in proportion to the derivative of this deviation is called derivative action or D action (D stands for Derivative or Differential). This combination of proportional, integral, and derivative action is called PID control.

[0123] In this embodiment, each of the driving units 100 may have such a driving function. That is, each of the first plurality of driving units 100_1 may drive the first object 1 by feedback control based on the target position command signal VTARG1 of the first object 1 and the detected position signal Vip1 of the first object 1. Furthermore, each of the second plurality of driving units 100_2 may drive the second object 2 by feedback control based on the target position command signal VTARG2 of the second object 2 and the detected position signal Vip2 of the second object 2.

[0124] In each driving unit group, a plurality of driving units 100 each having such a driving function are arranged along the optical axis direction of the lens 2. That is, in the first driving unit group 11, a first plurality of driving units 100_1 each having such a driving function are arranged along the optical axis direction of the first lens 2_1. In such a first plurality of driving units 100_1, one driving unit is assigned in advance to be in charge of driving the first object 1_1 for each of a plurality of sections obtained by dividing the first movable range. Each driving unit 100 drives the first object 1_1 in the section it is responsible for, and thus the first plurality of driving units 100_1 cooperate to drive the first object 1_1 across the first movable range.

[0125] Similarly, in the second driving unit group 12, a second plurality of driving units 100_2 each having such a driving function are arranged along the optical axis direction of the second lens 2_2 (which may be the same direction as the optical axis direction of the first lens 2_1). In such a second plurality of driving units 100_2, one driving unit is assigned in advance to drive the second object 1_2 for each of a plurality of sections obtained by dividing the second movable range. Then, each driving unit 100 drives the second object 1_2 in the section it is responsible for, and the second plurality of driving units 100_2 cooperate to drive the second object 1_2 over the second movable range.

[0126] This will be explained in detail. Here, the first first drive unit 100a_1 and the second first drive unit 100a_2 are collectively referred to as the "first drive unit 100a." The first second drive unit 100b_1 and the second second drive unit 100b_2 are collectively referred to as the "second drive unit 100b." The first third drive unit 100c_1 and the second third drive unit 100c_2 are collectively referred to as the "third drive unit 100c." The first fourth drive unit 100d_1 and the first fourth drive unit 100d_2 are collectively referred to as the "fourth drive unit 100d."

[0127] FIG. 9 shows an example of assigning the drive units 100 to each of multiple sections. In this figure, the position of the object 1 at one end of the movable range is 0 mm, and the position of the object 1 at the other end is 10 mm. The movable range is divided into 10 sections, each 1 mm long. As an example, the first drive unit 100a is assigned to section 0, and applies a drive current in the forward direction to the drive coil 470a included in the first drive unit 100a, thereby driving the object 1 from the 0 mm position to the 1 mm position. The forward direction here refers to the direction of application from the first output terminal OUT1 to the second output terminal OUT2. Similarly, the second drive unit 100b is assigned to section 1, and applies a drive current in the reverse direction to the drive coil 470b included in the second drive unit 100b, thereby driving the object 1 from the 1 mm position to the 2 mm position. The reverse direction here refers to the direction of application from the second output terminal OUT2 to the first output terminal OUT1. In this manner, in each group of drive units, one drive unit for driving the object 1 may be assigned in advance to be in charge of each of a plurality of sections into which the movable range is divided.

[0128] FIG. 10 shows an example of the simulation results of the magnetic field detected when the target object 1 is driven within its movable range. In this figure, the horizontal axis indicates the position of the target object 1 in units of mm. In this figure, the vertical axis indicates the simulation results of the detected magnetic field in units of mT. In this figure, the solid line indicates the simulation results of the magnetic field detected by the magnetic sensor 410a included in the first driving unit 100a. In this figure, the dotted line indicates the simulation results of the magnetic field detected by the magnetic sensor 410b included in the second driving unit 100b. In this figure, the dashed line indicates the simulation results of the magnetic field detected by the magnetic sensor 410c included in the third driving unit 100c. In this figure, the long-chain line indicates the simulation results of the magnetic field detected by the magnetic sensor 410d included in the fourth driving unit 100d.

[0129] Each of the driving units 100 detects such a magnetic field generated by the magnet 3 provided in the target object 1 using a magnetic sensor 410. Then, each of the driving units 100 drives the target object 1 by feedback control based on the target position command signal VTARG of the target object 1 and the detected position signal Vip of the target object 1.

[0130] FIG. 11 shows an example of a flow in which the controller controls the drive device 10 according to this embodiment.

[0131] The magnification is changed in step 510. For example, the ISP detects that the magnification has been changed by the user.

[0132] In step S520, the controller controls the first driving unit group 11. As a result, the first plurality of driving units 100_1 included in the first driving unit group 11 cooperate to drive the first object 1_1.

[0133] In step S530, the controller controls the second driving unit group 12. As a result, the first plurality of driving units 100_2 included in the second driving unit group 12 cooperate to drive the second object 1_2.

[0134] The controller may execute the process of step S530 immediately after executing the process of step S520. Although it takes several msec to actually drive the object 1, the delay of the I2C command is on the order of μsec. Therefore, the delay from step S520 to step S530 is within a negligible range. This allows the controller to drive the first object 1_1 and the second object 1_2 almost simultaneously, as if they were synchronized. Therefore, the controller can reduce the focus shift caused by the change in magnification and smoothly drive the lens 2 without causing discomfort to the user (by suppressing phenomena such as motion sickness due to a sudden change in the screen or a sudden shift from the object to be photographed).

[0135] In step S540, the controller waits for a certain period of time. For example, the controller sets a timer to a predetermined period (several msec), starts the timer, and waits until the timer expires.

[0136] In step S550, the controller determines whether the target object 1 has arrived at a predetermined position. If it is determined that the target object 1 has not arrived (No), the controller returns the process to step S540 and continues the flow. On the other hand, if it is determined that the target object 1 has arrived (Yes), the controller ends this flow.

[0137] The controller controls at least one of the first driving unit group 11 and the second driving unit group 12, for example, according to such a flow, to drive at least one of the first object 1_1 and the second object 1_2 to a target position in the optical axis direction.

[0138] At this time, the controller may control the first driving unit group 11 and the second driving unit group 12 so as to drive the first object 1_1 and the second object 1_2 from their current positions to their target positions in one go, or may control them so as to drive them in stages. This will be described in detail.

[0139] FIG. 12 shows an example of driving the object 1 in one go and an example of driving the object 1 in stages. This figure shows a case where the object 1 is driven in one go from point A, which is the current position, to point B, which is the target position. That is, in the flow of FIG. 11, a predetermined position is set to point B, which is the target position, and the object 1 is driven in one go from point A, which is the current position, to point B, which is the target position. In such a case, if the target position is changed to point C while the object 1 is being driven from point A to point B, after the object 1 arrives at point B, the predetermined position is set to point C and the flow of FIG. 11 is executed again. As a result, it takes a long time for the object 1 to arrive at point C.

[0140] Therefore, the controller may drive the object 1 in stages. The bottom of this figure shows a case where, when driving the object 1 from point A, which is its current position, to point B, which is its target position, a first waypoint V1, a second waypoint V2, a third waypoint V3, and a fourth waypoint V4 are set and the object 1 is driven in stages. That is, in the flow of FIG. 11, the controller sets a predetermined position as the first waypoint V1 and drives the object 1 from point A, which is its current position, to the first waypoint V1. When the object 1 arrives at the first waypoint V1, the controller sets the predetermined position as the second waypoint V2 and executes the flow of FIG. 11 again. When the object 1 arrives at the second waypoint V2, the controller sets the predetermined position as the third waypoint V3 and executes the flow of FIG. 11 again.

[0141] In such a case, if the target position is changed to point C while driving the object 1 from point A to point B, the predetermined position can be set to point C after the object 1 arrives at the next waypoint, which is the third waypoint V3 in this figure, and the flow of FIG. 11 can be executed again. In this way, when driving at least one of the first object 1_1 and the second object 1_2 to the target position, the controller sets multiple waypoints that divide the route to the target position and performs driving to each of the multiple waypoints in stages. Then, when the target position is changed, the controller drives at least one of the first object 1_1 and the second object 1_2 from the next waypoint among the multiple waypoints immediately after the change to the changed target position. This allows the controller to set the changed target position without waiting for the object 1 to arrive at point B, thereby shortening the time it takes for the object 1 to arrive at point C.

[0142] In this way, the controller can shorten the arrival time when the target position is changed by controlling the camera to drive in a stepwise manner. However, since stepwise control involves repeating the flow of FIG. 11 as many times as the number of waypoints, if the target position remains unchanged at Point B, the more waypoints there are, the longer the time it takes to arrive at the target position. In other words, the more waypoints there are, the shorter the arrival time when the target position is changed, but the longer the arrival time when the target position is not changed. Therefore, the number of waypoints should be changed depending on the application and operating mode. For example, in the case of a camera position reset operation and anomaly detection, high-speed operation is desirable, and since the target position does not change, it is better not to drive in a stepwise manner. Here, the reset operation is, for example, an operation to set the lens 2 to a predetermined reference position, such as 0 mm, after power-on. Anomaly detection is an operation performed when the drive unit 100 detects magnetic field information or a drive signal that is different from what the controller expects due to an external impact, etc. On the other hand, in a shooting mode in which the target position may be changed (e.g., by the user), stepwise control is preferable because tracking is desirable even if it is somewhat slow. Therefore, the controller may determine which mode to use for driving based on the current operating state in this way. In other words, the controller may be able to switch between performing the above-mentioned driving in stages or not depending on the operating state of the system including the target object 1.

[0143] Generally, camera lens control requires high precision, requiring minute position detection of a few micrometers or less. This precision requirement remains unchanged even when the driving distance extends to several millimeters, and lenses with variable magnification tend to be heavy. However, due to factors such as the linearity of the magnetic field, the driving range of a single driving unit 100 is limited to approximately 1 to 2 mm, and making the driving coil 470 too large can result in a decrease in driving force. Therefore, by dividing the movable range into multiple parts using multiple driving units 100 and implementing closed-loop control (feedback control), it becomes possible to drive the lens 2 while maintaining the current precision and torque.

[0144] In this case, when multiple drive units 100 are used, communication using a communication means with a chip selector function, such as a four-wire SPI (Serial Peripheral Interface), is conceivable. However, such communication means require many communication lines, which can lead to the bulkiness of the drive device 10. To address this issue, the drive device 10 of this embodiment connects the drive units that drive the lens groups with magnification and focus adjustment functions in forward and reverse connections. This allows the drive device 10 of this embodiment to use the same IC as multiple drive units 100, minimizing the amount of wiring that would normally be required. This contributes to a smaller housing size for the drive device 10 and reduces costs. Furthermore, when multiple identical ICs are used, mass production testing can be required to change the slave addresses of the ICs. However, the drive device 10 of this embodiment can shorten this flow, thereby reducing manufacturing costs.

[0145] Various embodiments of the present invention may be described with reference to flowcharts and block diagrams, where the blocks may represent (1) stages of a process in which operations are performed or (2) sections of an apparatus responsible for performing the operations. Particular stages and sections may be implemented by dedicated circuitry, programmable circuitry provided with computer-readable instructions stored on a computer-readable medium, and / or a processor provided with computer-readable instructions stored on a computer-readable medium. Dedicated circuitry may include digital and / or analog hardware circuitry, and may include integrated circuits (ICs) and / or discrete circuits. Programmable circuitry may include reconfigurable hardware circuitry, including logical AND, OR, XOR, NAND, NOR, and other logical operations, flip-flops, registers, memory elements such as field programmable gate arrays (FPGAs), programmable logic arrays (PLAs), and the like.

[0146] A computer-readable medium may include any tangible device capable of storing instructions that are executed by an appropriate device, such that the computer-readable medium having instructions stored thereon comprises an article of manufacture containing instructions that can be executed to create means for performing the operations specified in the flowcharts or block diagrams. Examples of computer-readable media may include electronic, magnetic, optical, electromagnetic, and semiconductor storage media. More specific examples of computer-readable media may include floppy disks, diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), electrically erasable programmable read-only memory (EEPROM), static random access memory (SRAM), compact disc read-only memory (CD-ROM), digital versatile disc (DVD), Blu-ray (RTM) disc, memory stick, integrated circuit card, and the like.

[0147] The computer readable instructions may include either assembler instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk®, JAVA®, C++, etc., and conventional procedural programming languages ​​such as the “C” programming language or similar programming languages.

[0148] The computer-readable instructions may be provided to a processor or programmable circuitry of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, either locally or over a wide-area network (WAN) such as a local area network (LAN), the Internet, etc., which executes the computer-readable instructions to create means for performing the operations specified in the flowcharts or block diagrams. Examples of processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, etc.

[0149] 13 illustrates an example of a computer 9900 in which aspects of the present invention may be embodied, in whole or in part. Programs installed on the computer 9900 may cause the computer 9900 to function as or perform operations associated with an apparatus or one or more sections of the apparatus according to embodiments of the present invention, and / or to perform a process or steps of a process according to embodiments of the present invention. Such programs may be executed by the CPU 9912 to cause the computer 9900 to perform specific operations associated with some or all of the blocks in the flowcharts and block diagrams described herein.

[0150] The computer 9900 according to this embodiment includes a CPU 9912, a RAM 9914, a graphics controller 9916, and a display device 9918, which are interconnected by a host controller 9910. The computer 9900 also includes input / output units such as a communication interface 9922, a hard disk drive 9924, a DVD drive 9926, and an IC card drive, which are connected to the host controller 9910 via an input / output controller 9920. The computer also includes legacy input / output units such as a ROM 9930 and a keyboard 9942, which are connected to the input / output controller 9920 via an input / output chip 9940.

[0151] The CPU 9912 operates according to programs stored in the ROM 9930 and RAM 9914, thereby controlling each unit. The graphics controller 9916 retrieves image data generated by the CPU 9912 into a frame buffer or the like provided in the RAM 9914 or into the graphics controller itself, and causes the image data to be displayed on the display device 9918.

[0152] The communication interface 9922 communicates with other electronic devices via a network. The hard disk drive 9924 stores programs and data used by the CPU 9912 in the computer 9900. The DVD drive 9926 reads programs or data from the DVD-ROM 9901 and provides the programs or data to the hard disk drive 9924 via the RAM 9914. The IC card drive reads programs and data from an IC card and / or writes programs and data to an IC card.

[0153] The ROM 9930 stores therein a boot program or the like that is executed by the computer 9900 upon activation, and / or programs that depend on the hardware of the computer 9900. The input / output chip 9940 may also connect various input / output units to the input / output controller 9920 via a parallel port, a serial port, a keyboard port, a mouse port, etc.

[0154] The programs are provided by a computer-readable medium such as a DVD-ROM 9901 or an IC card. The programs are read from the computer-readable medium, installed in the hard disk drive 9924, RAM 9914, or ROM 9930, which are also examples of computer-readable media, and executed by the CPU 9912. The information processing described in these programs is read by the computer 9900, and causes cooperation between the programs and the various types of hardware resources described above. An apparatus or method may be configured by implementing information manipulation or processing in accordance with the use of the computer 9900.

[0155] For example, when communication is performed between the computer 9900 and an external device, the CPU 9912 may execute a communication program loaded into the RAM 9914 and instruct the communication interface 9922 to perform communication processing based on the processing described in the communication program. Under the control of the CPU 9912, the communication interface 9922 reads transmission data stored in a transmission buffer processing area provided in the RAM 9914, the hard disk drive 9924, the DVD-ROM 9901, or a recording medium such as an IC card, and transmits the read transmission data to the network, or writes received data received from the network to a reception buffer processing area or the like provided on the recording medium.

[0156] The CPU 9912 may also cause all or a necessary portion of a file or database stored on an external recording medium such as a hard disk drive 9924, a DVD drive 9926 (DVD-ROM 9901), an IC card, etc. to be read into the RAM 9914, and perform various types of processing on the data on the RAM 9914. The CPU 9912 then writes back the processed data to the external recording medium.

[0157] Various types of information, such as various types of programs, data, tables, and databases, may be stored on the recording medium and subjected to information processing. The CPU 9912 may perform various types of processing on data read from the RAM 9914, including various types of operations, information processing, conditional judgment, conditional branching, unconditional branching, information search / replacement, etc., as described throughout this disclosure and specified by the instruction sequences of the programs, and write the results back to the RAM 9914. The CPU 9912 may also search for information in a file, database, etc. on the recording medium. For example, if multiple entries each having an attribute value of a first attribute associated with an attribute value of a second attribute are stored on the recording medium, the CPU 9912 may search for an entry that matches a condition specified by the attribute value of the first attribute from among the multiple entries, read the attribute value of the second attribute stored in the entry, and thereby obtain the attribute value of the second attribute associated with the first attribute that satisfies a predetermined condition.

[0158] The programs or software modules described above may be stored in a computer-readable medium on or near the computer 9900. A recording medium such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet can also be used as a computer-readable medium, thereby providing the programs to the computer 9900 via the network.

[0159] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0160] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. According to this specification, the following items are also disclosed. [Item 1] a first driving unit group including a first plurality of driving units each generating a magnetic field to drive a first object provided with a first lens and a first magnet in an optical axis direction; a second driving unit group including a second plurality of driving units each generating a magnetic field to drive a second object provided with a second lens and a second magnet in the optical axis direction; each of the first plurality of driving units and the second plurality of driving units has a first terminal and a second terminal connected to a master that controls the first plurality of driving units as a slave via a clock signal line and a data signal line; At least one of the first plurality of driving units has the first terminal connected to the clock signal line and the second terminal connected to the data signal line in a forward direction; At least one driver unit in the second plurality of drivers has the second terminal connected to the clock signal line and the first terminal connected to the data signal line in a reverse manner. Drive unit. [Item 2] The drive device described in item 1, wherein each of the first plurality of drive units and the second plurality of drive units is slave-connected to a host that functions as a common controller that controls the first group of drive units and the second group of drive units. [Item 3] All of the first plurality of driving units are connected between the host and the first terminal to the clock signal line and the second terminal to the data signal line, Item 3. The drive device according to item 2, wherein all of the drive units in the second plurality of drive units are reversely connected between the host with the second terminal connected to the clock signal line and the first terminal connected to the data signal line. [Item 4] 4. The drive device according to item 2 or 3, further comprising the host. [Item 5] a first driver in the first plurality of drivers and a second driver in the second plurality of drivers are slave-connected to a host; other drivers in the first plurality of drivers are slave-connected to the first driver; Item 1. The drive device of item 1, wherein other drive units in the second plurality of drive units are slave-connected to the second drive unit. [Item 6] the first terminal of the first driving unit is connected to a primary clock signal line and the second terminal of the first driving unit is connected to a primary data signal line between the first driving unit and the host; Item 6. The drive device according to item 5, wherein the second drive unit is reversely connected between the host and the host, with the second terminal connected to the primary clock signal line and the first terminal connected to the primary data signal line. [Item 7] At least one of the other driving units in the first plurality of driving units has the first terminal connected to a secondary first clock signal line and the second terminal connected to a secondary first data signal line between the first driving unit and the other driving unit, Item 7. The driving device of item 6, wherein at least one of the other driving units in the first plurality of driving units is reversely connected to the first driving unit, with the second terminal connected to the secondary first clock signal line and the first terminal connected to the secondary first data signal line. [Item 8] At least one of the other driving units in the second plurality of driving units has the first terminal connected to a secondary second clock signal line and the second terminal connected to a secondary second data signal line between the other driving unit and the second driving unit, 8. The drive device according to item 6 or 7, wherein at least one of the other drive units in the second plurality of drive units is reversely connected to the second drive unit, with the second terminal connected to the secondary second clock signal line and the first terminal connected to the secondary second data signal line. [Item 9] 9. The drive device according to any one of items 5 to 8, wherein the first drive unit and the second drive unit function as individual controllers that respectively control the drive unit group to which they belong. [Item 10] a first driver in the first plurality of drivers is slave-connected to a host; Item 1. The drive device of item 1, wherein the first plurality of drive units and the other drive units in the second plurality of drive units are slave-connected to the first drive unit. [Item 11] All other driving units in the first plurality of driving units are connected in series between the first driving unit and the first driving unit, with the first terminals connected to secondary clock signal lines and the second terminals connected to secondary data signal lines, Item 11. The drive device according to item 10, wherein all of the drive units in the second plurality of drive units are reversely connected between the first drive unit and the first drive unit, with the second terminals connected to the secondary clock signal line and the first terminals connected to the secondary data signal line. [Item 12] Item 12. The drive device according to item 10 or 11, wherein the first drive unit functions as a common controller that controls the first drive unit group and the second drive unit group. [Item 13] 13. The driving device according to any one of items 1 to 12, wherein the at least one reverse-connected driving unit is capable of communicating with the master as a slave different from the at least one forward-connected driving unit. [Item 14] Item 14. The drive device according to item 13, wherein the at least one reversely connected drive unit distinguishes between a clock signal and a data signal and switches between an internal clock signal line and an internal data signal line. [Item 15] Item 15. The drive device according to item 14, wherein at least one of the reversely connected drive units changes its own slave address in response to switching of the internal clock signal line and the internal data signal line. [Item 16] Item 16. The drive device according to item 14 or 15, wherein each of the first plurality of drive units and the second plurality of drive units is configured to be able to distinguish between the clock signal and the data signal and switch between the internal clock signal line and the internal data signal line. [Item 17] each of the first plurality of driving units drives the first object by feedback control based on a target position command signal for the first object and a detected position signal for the first object; 17. The drive device according to any one of items 1 to 16, wherein each of the second plurality of drive units drives the second object by feedback control based on a target position command signal for the second object and a detected position signal for the second object. [Item 18] each of the first plurality of driving units includes at least one magnetic sensor element that detects a magnetic field generated by the first magnet; Item 18. The drive device according to item 17, wherein each of the second plurality of drive units includes at least one magnetic sensor element that detects a magnetic field generated by the second magnet. [Item 19] The driving device described in any one of items 4, 9, and 12, wherein the controller controls at least one of the first driving unit group and the second driving unit group to drive at least one of the first object and the second object to a target position in the optical axis direction. [Item 20] Item 20. The driving device according to item 19, wherein the controller, when driving at least one of the first object and the second object to the target position, sets a plurality of waypoints that divide a route to the target position, and performs driving to each of the plurality of waypoints in a stepwise manner. [Item 21] Item 21. The driving device according to item 20, wherein when the target position is changed, the controller drives at least one of the first object and the second object from a route point immediately after the change among the plurality of route points to the changed target position. [Item 22] 22. The drive device according to item 20 or 21, wherein the controller is capable of switching whether or not to perform the drive in stages depending on the operating state of a system including the object. [Explanation of symbols]

[0161] 1. Object 1_1 First object 1_2 Second object 2 lenses 2_1 First lens 2_2 Second lens 3. Magnets 3_1 First magnet 3_2 Second magnet 11 First drive group 12 Second drive group 20 hosts 100 Drive unit 100a First drive unit 100a_1 first first drive unit 100b_2 Second first driving unit 100b Second drive unit 100b_1 First second driving unit 100b_2 second second driving unit 100c Third drive unit 100c_1 First third drive unit 100c_2 Second third drive unit 100d 4th drive unit 100d_1 1st 4th drive unit 100d_2 2nd 4th drive unit 110 1st terminal 120 2nd terminal 130 Connection 140 Processing section 142 Clock receiving internal terminal 143 Data transmission internal terminal 144 Data reception internal terminal 146 Discrimination circuit 148 Storage section 150 Processing result storage unit 160 output terminal 170 Discrimination part 180 Changes 190 Fixed part 312 First Amplifier 314 Second Amplifier 316 First Switch 318 Filter section 326 Second Switch 328 Filter section 332 Delay Section 334 Third Switch 336 First Inverting Amplifier 338 First Switch Element 344 4th Switch 346 Second Inverting Amplifier 410 Magnetic Sensor 420 A / D conversion circuit 430 Position command signal generation circuit 440 PID control circuit 450 D / A conversion circuit 460 Output Driver 470 drive coil 9900 Computer 9901 DVD-ROM 9910 Host Controller 9912 CPU 9914 RAM 9916 Graphics Controller 9918 Display Device 9920 Input / Output Controller 9922 Communication Interface 9924 Hard Disk Drive 9926 DVD drive 9930 ROM 9940 I / O chip 9942 keyboard

Claims

1. a first driving unit group including a first plurality of driving units each generating a magnetic field to drive a first object provided with a first lens and a first magnet in an optical axis direction; a second driving unit group including a second plurality of driving units each generating a magnetic field to drive a second object provided with a second lens and a second magnet in the optical axis direction; each of the first plurality of drive units and the second plurality of drive units has a first terminal and a second terminal connected to a master that controls the drive unit as a slave via a clock signal line and a data signal line, and is switchable between a state in which the first terminal is a terminal for the clock signal line and the second terminal is a terminal for the data signal line, and a state in which the second terminal is a terminal for the clock signal line and the first terminal is a terminal for the data signal line; At least one of the first plurality of driving units is forward-connected such that the first terminal is connected to the clock signal line and the second terminal is connected to the data signal line, At least one of the second plurality of driving units is reversely connected such that the second terminal is connected to the clock signal line and the first terminal is connected to the data signal line, each of the first plurality of driving units and the second plurality of driving units is slave-connected to a host that functions as a common controller that controls the first group of driving units and the second group of driving units; Drive unit.

2. all of the first plurality of driving units are connected to the host in a forward manner such that the first terminals are connected to the clock signal lines and the second terminals are connected to the data signal lines; 2. The drive device according to claim 1, wherein all of the drive units in the second plurality of drive units are reverse-connected between the host, with the second terminals connected to the clock signal line and the first terminals connected to the data signal line.

3. The drive device according to claim 1 or 2, further comprising the host.

4. A first group of driving units having a first plurality of driving units each generating a magnetic field to drive a first object provided with a first lens and a first magnet in an optical axis direction; a second driving unit group including a second plurality of driving units each generating a magnetic field to drive a second object provided with a second lens and a second magnet in the optical axis direction; each of the first plurality of drive units and the second plurality of drive units has a first terminal and a second terminal connected to a master that controls the drive unit as a slave via a clock signal line and a data signal line, and is switchable between a state in which the first terminal is a terminal for the clock signal line and the second terminal is a terminal for the data signal line, and a state in which the second terminal is a terminal for the clock signal line and the first terminal is a terminal for the data signal line; At least one of the first plurality of driving units is forward-connected such that the first terminal is connected to the clock signal line and the second terminal is connected to the data signal line, At least one of the second plurality of driving units is reversely connected such that the second terminal is connected to the clock signal line and the first terminal is connected to the data signal line, a first driver in the first plurality of drivers and a second driver in the second plurality of drivers are slave-connected to a host; other drivers in the first plurality of drivers are slave-connected to the first driver; other drivers in the second plurality of drivers are slaved to the second driver; Drive unit.

5. the first driving unit is forward-connected to the host such that the first terminal is connected to a primary clock signal line and the second terminal is connected to a primary data signal line; 5. The drive device according to claim 4, wherein the second drive unit is reversely connected to the host such that the second terminal is connected to the primary clock signal line and the first terminal is connected to the primary data signal line.

6. At least one of the other driving units in the first plurality of driving units is forward-connected between the first driving unit and the first driving unit, with the first terminal connected to a secondary first clock signal line and the second terminal connected to a secondary first data signal line, 6. The drive device according to claim 5, wherein at least one of the other drive units in the first plurality of drive units is reversely connected to the first drive unit, with the second terminal connected to the secondary first clock signal line and the first terminal connected to the secondary first data signal line.

7. At least one of the other driving units in the second plurality of driving units is forward-connected between the second driving unit and the second driving unit, with the first terminal connected to a secondary second clock signal line and the second terminal connected to a secondary second data signal line, 7. The drive device according to claim 5 or 6, wherein at least one of the other drive units in the second plurality of drive units is reversely connected between the second drive unit and the second drive unit, with the second terminal connected to the secondary second clock signal line and the first terminal connected to the secondary second data signal line.

8. The drive device according to claim 4 , wherein the first drive unit and the second drive unit function as individual controllers that control the drive unit groups to which they belong.

9. A first group of driving units having a first plurality of driving units each generating a magnetic field to drive a first object provided with a first lens and a first magnet in an optical axis direction; a second driving unit group including a second plurality of driving units each generating a magnetic field to drive a second object provided with a second lens and a second magnet in the optical axis direction; each of the first plurality of drive units and the second plurality of drive units has a first terminal and a second terminal connected to a master that controls the drive unit as a slave via a clock signal line and a data signal line, and is switchable between a state in which the first terminal is a terminal for the clock signal line and the second terminal is a terminal for the data signal line, and a state in which the second terminal is a terminal for the clock signal line and the first terminal is a terminal for the data signal line; At least one of the first plurality of driving units is forward-connected such that the first terminal is connected to the clock signal line and the second terminal is connected to the data signal line, At least one of the second plurality of driving units is reversely connected such that the second terminal is connected to the clock signal line and the first terminal is connected to the data signal line, a first driver in the first plurality of drivers is slave-connected to a host; the other drivers in the first plurality of drivers and the second plurality of drivers are slaved to the first driver; Drive unit.

10. All other driving units in the first plurality of driving units are connected to the first driving unit in a forward manner such that the first terminals are connected to secondary clock signal lines and the second terminals are connected to secondary data signal lines, 10. The drive device according to claim 9, wherein all of the drive units in the second plurality of drive units are reversely connected between the first drive unit and the first drive unit, with the second terminals connected to the secondary clock signal line and the first terminals connected to the secondary data signal line.

11. The drive device according to claim 9 or 10, wherein the first drive unit functions as a common controller that controls the first drive unit group and the second drive unit group.

12. The drive device according to claim 1 , wherein the at least one reverse-connected drive unit is capable of communicating with the master as a slave different from the at least one forward-connected drive unit.

13. 13. The drive device according to claim 12, wherein the at least one reversely connected drive unit distinguishes between a clock signal and a data signal and switches between an internal clock signal line and an internal data signal line.

14. 14. The drive device according to claim 13, wherein at least one of the reversely connected drive units changes its own slave address in response to switching between the internal clock signal line and the internal data signal line.

15. 15. The drive device according to claim 13, wherein each of the first plurality of drive units and the second plurality of drive units is configured to be able to distinguish between the clock signal and the data signal and switch between the internal clock signal line and the internal data signal line.

16. each of the first plurality of driving units drives the first object by feedback control based on a target position command signal for the first object and a detected position signal for the first object; 16. The drive device according to claim 1, wherein each of the second plurality of drive units drives the second object by feedback control based on a target position command signal for the second object and a detected position signal for the second object.

17. each of the first plurality of driving units includes at least one magnetic sensor element that detects a magnetic field generated by the first magnet; The drive device according to claim 16 , wherein each of the second plurality of drive units includes at least one magnetic sensor element that detects a magnetic field generated by the second magnet.

18. 12. The driving device according to claim 3, wherein the controller controls at least one of the first driving unit group and the second driving unit group to drive at least one of the first object and the second object to a target position in the optical axis direction.

19. 19. The drive device according to claim 18, wherein the controller, when driving at least one of the first object and the second object to the target position, sets a plurality of waypoints that divide a route to the target position, and performs driving to each of the plurality of waypoints in a stepwise manner.

20. 20. The drive device according to claim 19, wherein, when the target position is changed, the controller drives at least one of the first object and the second object from a route point immediately after the change among the plurality of route points to the changed target position.

21. 21. The drive device according to claim 19, wherein the controller is capable of switching whether to perform the driving stepwise or not, depending on an operating state of a system including the first object or the second object.

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