Post-coat / exposure treatments to enhance the dry developability of metal-containing EUV resists

Abstract

Various embodiments described herein relate to methods, apparatus, and systems for treating a metal-containing photoresist to modify its material properties. For example, the present approach may include providing a substrate in a process chamber, the substrate including a photoresist layer on a substrate layer, the photoresist including a metal, and treating the photoresist to modify its material properties to enhance etch selectivity in a subsequent post-exposure dry development process. In various embodiments, the treatment may include exposing the substrate to elevated temperatures and / or a remote plasma. One or more process conditions, such as temperature, pressure, ambient gas chemistry, gas flow rates / ratios, and moisture, may be controlled during processing to tailor the material properties as desired.

Description

[Technical Field]

[0001] <Incorporated by Reference> A PCT application has been filed contemporaneously herewith as part of this application. Each application to which this application claims benefit or priority, as identified in the contemporaneously filed PCT application, is incorporated herein by reference in its entirety for all purposes. [Background technology]

[0002] The present disclosure relates generally to the field of semiconductor processing. In particular aspects, the present disclosure is directed to methods and apparatus for processing EUV photoresists (e.g., EUV-sensitive metal and / or metal oxide-containing resist films) in the context of EUV patterning to form patterning masks and development of the EUV-patterned films. Summary of the Invention

[0003] Various embodiments herein relate to methods, apparatus, and systems for processing substrates.

[0004] In one aspect of the disclosed embodiment, there is provided a method of processing a substrate, the method comprising: providing a substrate in a process chamber, the substrate comprising a substrate layer and a photoresist overlying the substrate layer, the photoresist comprising a metal; and performing a treatment to modify material properties of the photoresist to enhance etch selectivity in a subsequent post-exposure dry development process.

[0005] In certain embodiments, the treatment may increase crosslinking of the photoresist. In these or other embodiments, the treatment may include a thermal process that controls temperature, pressure, ambient gas chemistry, gas flow rates / ratios, and moisture. In various embodiments, the ambient gas chemistry may include an inert gas selected from the group consisting of nitrogen (N), helium, neon, argon, xenon, and combinations thereof. In some such cases, the ambient gas chemistry may be substantially free of reactive gases. In some other cases, the ambient gas chemistry may include reactive gas species. In some such cases, the reactive gas species may be selected from the group consisting of water, hydrogen (H), oxygen (O), ozone, hydrogen peroxide, carbon monoxide, carbon dioxide, carbonyl sulfide, sulfur dioxide, chlorine (Cl), ammonia, nitrous oxide, nitric oxide, methane, alcohol, acetylacetone, formic acid, oxalyl chloride, pyridine, carboxylic acids, amines, and combinations thereof.

[0006] In various embodiments, a photoresist has been applied to a substrate layer but has not yet been exposed to patterning radiation. In some such embodiments, the treatment may be a post-apply bake (PAB). In these or other embodiments, the treatment may be a post-apply remote plasma treatment. In various embodiments, the treatment increases the exposure radiation sensitivity of the photoresist, thereby achieving a lower dose-to-size while the substrate is exposed to patterning radiation and a lower line edge roughness after the substrate is exposed to patterning radiation compared to the higher dose-to-size and higher line edge roughness achieved without the treatment. In these or other embodiments, the treatment may be performed at a temperature of about 90 to 250°C or 90 to 190°C.

[0007] In various embodiments, the photoresist is patterned by partial exposure to patterning radiation, resulting in exposed and unexposed portions of the photoresist. In some such embodiments, the treatment is a post-exposure bake (PEB). In these or other embodiments, the treatment may be a post-exposure remote plasma treatment. In various embodiments, the treatment may be performed at a temperature of about 170 to 250°C or higher. In these or other embodiments, the composition of both the unexposed and exposed portions of the photoresist may be altered by the treatment to (i) increase the etch rate in a dry development etch gas, (ii) increase the compositional difference between the unexposed and exposed portions of the photoresist, and / or (iii) increase the difference in one or more material properties between the unexposed and exposed portions of the photoresist.

[0008] In various embodiments herein, the temperature of the substrate may be increased or decreased while the photoresist is being processed. In these or other embodiments, the pressure during processing may be controlled to subatmospheric pressure. For example, the pressure during processing may be controlled between about 0.1 and 760 Torr, or between about 0.1 and 10 Torr. In these or other embodiments, the processing may include exposing the photoresist to a remote plasma that reacts with the photoresist to generate radicals that modify one or more material properties of the photoresist. In some such cases, the radicals may be generated from a gas species selected from the group consisting of water, hydrogen (H), oxygen (O), ozone, hydrogen peroxide, carbon monoxide, carbon dioxide, carbonyl sulfide, sulfur dioxide, chlorine (Cl), ammonia, nitrous oxide, nitric oxide, methane, alcohol, acetylacetone, formic acid, oxalyl chloride, pyridine, carboxylic acids, amines, and combinations thereof.

[0009] In certain embodiments, the treatment may be a thermal treatment performed using a first set of treatment conditions and a second set of treatment conditions, where the first set and second set of treatment conditions vary with respect to at least one of an atmospheric gas or mixture, a temperature, and / or a pressure, thereby adjusting the material properties of the photoresist and tuning the etch selectivity of the photoresist.

[0010] In various implementations, the photoresist may be an EUV-sensitive film. In these or other embodiments, the treatment may occur before exposing the photoresist to EUV lithography. In some embodiments, the treatment may occur a second time after exposing the photoresist to EUV lithography. In some embodiments, the treatment occurs after exposing the photoresist to EUV lithography.

[0011] In another aspect of the disclosed embodiments, an apparatus for processing a substrate is provided, the apparatus including a process chamber including a substrate support; a process gas source connected to the process chamber and associated gas flow control hardware; a substrate thermal controller; substrate processing hardware connected to the process chamber; and a controller having a processor, the processor at least operatively connected to the gas flow control hardware, the substrate thermal controller, and the substrate processing hardware, the controller configured to perform any one or more of the methods claimed or otherwise described herein.

[0012] These and other aspects are further described below with reference to the drawings. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 provides a flow chart of a method for processing a substrate, according to various embodiments.

[0014] [Figure 2]FIG. 2 illustrates a substrate over the course of several processing steps in which a post-coat treatment is used, according to certain embodiments.

[0015] [Figure 3] FIG. 3 illustrates a substrate over the course of several processing steps in which post-exposure processing is used, according to various embodiments.

[0016] [Figure 4A] FIG. 4A illustrates a processing chamber in which certain thermal-based steps may be performed.

[0017] [Figure 4B] FIG. 4B illustrates a processing chamber in which various steps, including thermal-based and plasma-based steps, may be performed.

[0018] [Figure 5] FIG. 5 illustrates a cluster tool having a number of different modules configured to perform different operations, according to certain embodiments herein.

[0019] [Figure 6A] 6A-6D show experimental results illustrating the improved material contrast and selectivity achievable in accordance with certain embodiments herein. [Figure 6B] 6A-6D show experimental results illustrating the improved material contrast and selectivity achievable in accordance with certain embodiments herein. [Figure 6C] 6A-6D show experimental results illustrating the improved material contrast and selectivity achievable in accordance with certain embodiments herein. [Figure 6D] 6A-6D show experimental results illustrating the improved material contrast and selectivity achievable in accordance with certain embodiments herein. DETAILED DESCRIPTION OF THE INVENTION

[0020] Reference will be made in detail herein to specific embodiments of the present disclosure. Examples of specific embodiments are illustrated in the accompanying drawings. While the present disclosure will be described in conjunction with these specific embodiments, it will be understood that it is not intended to limit the disclosure to such specific embodiments. Rather, it is intended to cover alternatives, modifications, and equivalents that may be included within the spirit and scope of the present disclosure. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. The present disclosure may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the present disclosure.

[0021] Patterning thin films in semiconductor processing is often a critical step in semiconductor manufacturing. Patterning involves lithography. In traditional photolithography, such as 193 nm photolithography, a pattern is printed into a sensitive photoresist film by exposing the photoresist to photons in selected areas defined by a photomask, thereby triggering a chemical reaction in the exposed photoresist to form chemical contrast that can be exploited in a development step to remove specific portions of the photoresist to form the pattern. The patterned and developed photoresist film can then be used as an etch mask to transfer the pattern into underlying films composed of metals, oxides, etc.

[0022] Advanced technology nodes (as defined by the International Technology Roadmap for Semiconductors) include the 22 nm, 16 nm, and higher nodes. For example, at the 16 nm node, the width of a via or line in a damascene structure is typically about 30 nm or less. The scaling of features in advanced semiconductor integrated circuits (ICs) and other devices drives improvements in lithographic resolution.

[0023] Extreme ultraviolet (EUV) lithography extends lithography technology by moving to shorter imaging light source wavelengths than can be achieved with conventional photolithography methods. EUV sources with wavelengths of approximately 10-20 nm or 11-14 nm, e.g., 13.5 nm, can be used in cutting-edge lithography tools, also known as scanners. EUV radiation works in vacuum because it is strongly absorbed by a variety of solid and fluid materials, including quartz and water vapor.

[0024] EUV lithography uses EUV resists patterned using EUV light to form masks for use in etching underlying layers. The EUV resists may be polymer-based chemically amplified resists (CARs) produced by liquid-based spin-on techniques. An alternative to CARs is directly photopatternable metal oxide-containing EUV photoresist films. Such photoresist films are available from Inpria, Inc. of Corvallis, Oregon, and may be produced by wet (spin-on) techniques, such as those described in U.S. Patent Publication Nos. 2017 / 0102612 and 2016 / 0116839. These U.S. patent publications are incorporated herein by reference at least for their disclosure of photopatternable metal oxide-containing films. Such films can also be produced by dry (vapor deposition) techniques, such as those described in PCT / US19 / 31618, filed May 9, 2019, entitled "METHODS FOR MAKING EUV PATTERNABLE HARD MASKS," which is incorporated herein by reference.

[0025] These directly photopatternable EUV resists may be composed of or contain highly EUV-absorbing metals, their organometallic oxides / hydroxides, and other derivatives. Upon EUV exposure, EUV photons and generated secondary electrons can induce chemical reactions, such as beta-H elimination reactions in SnOx-based resists (and other metal oxide-based resists), providing chemical functionality that promotes cross-linking and other changes in the resist film. These chemical changes can then be exploited in a development step to selectively remove exposed or unexposed regions of the resist film, forming an etch mask for pattern transfer.

[0026] Metal oxide-containing films can be patterned directly (i.e., without the use of a separate photoresist) by EUV exposure in a vacuum environment providing patterning resolution of less than 30 nm, as described, for example, in U.S. Patent No. 9,996,004, entitled "EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARDMASKS," issued June 12, 2018, at least the disclosure of which relating to the composition, deposition, and patterning of directly photopatternable metal oxide films to form EUV resist masks is incorporated herein by reference. Generally, patterning involves exposing an EUV resist to EUV radiation to form a photopattern in the resist, followed by development and removal of portions of the resist according to the photopattern to form the mask.

[0027] While this disclosure relates to lithographic patterning techniques and materials exemplified by EUV lithography, it should be understood that the disclosure is also applicable to other next-generation lithography technologies. In addition to EUV, which includes the standard 13.5 nm EUV wavelength currently in use and under development, the most relevant radiation sources for such lithography are DUV (deep ultraviolet), which generally refers to the use of excimer laser sources at 248 nm or 193 nm; X-ray, which formally includes EUV in the lower energy range of the X-ray spectrum; and electron beam, which can cover a wide energy range. One such method involves contacting an exposed substrate bearing hydroxyl groups with a hydrocarbyl-substituted tin capping agent to form a hydrocarbyl-terminated SnOx film as an imaging / PR layer on the surface of the substrate. The specific method may depend on the specific materials and applications used in the semiconductor substrate and final semiconductor device. Therefore, the methods described herein are merely exemplary of methods and materials that may be used with current technology.

[0028] Directly photopatternable EUV resists may consist of or include metals and / or metal oxides mixed within an organic component. Metals / metal oxides hold great promise in that they can enhance EUV photon absorption to generate secondary electrons and / or exhibit increased etch selectivity relative to underlying film stacks and device layers. To date, these resists have been developed using wet (solvent) methods, which require wafers to be moved onto a track where they are exposed to a developing solvent, dried, and baked. Wet development not only limits productivity but can also lead to line collapse due to surface tension effects during solvent evaporation between fine features.

[0029] Dry development techniques have been proposed to overcome these issues by eliminating substrate delamination and interface failure. Dry development presents its own challenges, such as etch selectivity between unexposed and EUV-exposed resist materials, which can lead to higher dose-to-size requirements for effective resist exposure when compared to wet development. Suboptimal selectivity can also cause rounding of photoresist corners with prolonged exposure under etching gases, increasing line critical dimension (CD) variation in the subsequent transfer etching step.

[0030] According to various aspects of the present disclosure, one or more post-treatments on metal and / or metal oxide-based photoresists after deposition (e.g., post-apply bake (PAB)) and / or after exposure (e.g., post-exposure bake (PEB)) can increase the material property difference between exposed and unexposed photoresist (PR), thus reducing dose-to-size (DtS), improving PR profile, and improving line edge roughness and line width roughness (LER / LWR) after subsequent dry development. Such treatments can include thermal processes that control one or more of temperature, gas atmosphere, and moisture, resulting in improved dry development performance in subsequent processing. In some examples, remote plasma may also be used.

[0031] In the case of post-application treatments (e.g., PAB), a thermal process that controls one or more of temperature, gas atmosphere (e.g., using one or more of the gases described herein), pressure, and moisture can be used after deposition and before exposure to modify the composition of the unexposed metal and / or metal oxide-containing photoresist. This modification improves the EUV sensitivity of the material, thereby achieving lower dose-to-size and line edge roughness after exposure and dry development.

[0032] In the case of post-exposure treatment (e.g., PEB), a thermal process controlling one or more of temperature, gas atmosphere (e.g., using one or more of the gases described herein), pressure, and moisture can be used to alter the composition of both the unexposed and exposed photoresists. In some cases, the treatment may preferentially alter the composition and / or material properties of the exposed photoresist, such that the change in composition and / or material properties is greater in the exposed photoresist than in the unexposed photoresist. In some other cases, the treatment may preferentially alter the composition / material properties of the unexposed photoresist, such that the change in composition and / or material properties is greater in the unexposed photoresist than in the exposed photoresist. These preferential interactions may also occur due to chemical changes that occur during EUV exposure, such as the loss of alkyl groups in the photoresist. The changes that occur during treatment can increase the difference in composition / material properties between the unexposed and exposed photoresists, thereby increasing the difference in etch rates between the unexposed and exposed photoresists. Therefore, higher etch selectivity can be achieved (e.g., during dry development of patterns in the photoresist). Improved selectivity can result in a sharper PR profile with improved surface roughness and / or less photoresist residue / scum.

[0033] In either case, in another implementation, the thermal process can be replaced or supplemented with a remote plasma process. The remote plasma process can also act to increase reactive species, thereby lowering the energy barrier for the desired reaction and increasing productivity. The remote plasma can generate more reactive radicals, thus lowering the reaction temperature / time of the process (e.g., compared to processes that rely solely on thermal energy), leading to increased productivity.

[0034] Therefore, one or more processes may be applied to modify the photoresist itself to increase the selectivity of dry development. This thermal and / or radical modification can increase the contrast between unexposed and exposed materials, thus increasing the selectivity of the subsequent dry development step. The resulting difference in material properties between unexposed and exposed materials can be tailored by adjusting one or more process conditions, including temperature, gas flow, moisture, pressure, and / or RF power. The wide processing latitude enabled by dry development, which is not limited by the solubility of materials in wet developer solvents, allows for more aggressive conditions to be applied during processing, further increasing the achievable material contrast. The resulting high material contrast allows for a wider process window for dry development, thus enabling increased productivity, reduced costs, and better defectivity.

[0035] A substantial limitation of wet-developable resist films is their limited temperature bake. Wet development relies on the difference in material solubility between the exposed and unexposed regions of the photoresist. Heating the photoresist to high temperatures can significantly increase the degree of cross-linking in both the exposed and unexposed regions of the metal-containing resist film. When the photoresist is heated to temperatures above approximately 220°C, both the exposed and unexposed regions of the photoresist become insoluble in the wet development solvent, and the photoresist film can no longer be reliably developed using wet development techniques.

[0036] In contrast, for dry-developed resist films, where the dry etch rate difference (i.e., selectivity) between exposed and unexposed regions of the PR depends solely on the removal of either the exposed or unexposed portions of the resist, the processing temperature for PAB or PEB can be varied over a much wider window because the limitations that apply to solubility in wet development solvents do not apply to dry etching techniques. Thus, for dry development, the processing process can be adjusted / optimized over a relatively wide temperature range. For example, the processing temperature may range from about 90 to 250°C, e.g., 90 to 190°C, for PAB, and from about 170 to 250°C or higher for PEB. It has been found that a decrease in etch rate and an increase in etch selectivity occur at higher processing temperatures within the aforementioned ranges.

[0037] Figures 6A-6D show experimental results demonstrating the improved material contrast and selectivity between unexposed and exposed portions of the photoresist layer achievable by controlling the temperature during PEB. In each example, the substrate was exposed to a PEB in which the temperature of the substrate was controlled (e.g., by controlling the substrate support temperature). The photoresist layer on each substrate was then developed using dry techniques to form a series of photoresist features on the substrate. In Figure 6A, the temperature was controlled at approximately 235°C. In Figure 6B, the temperature was controlled at approximately 220°C. In Figure 6C, the temperature was controlled at approximately 205°C. In Figure 6D, the temperature was controlled at approximately 190°C. At low processing temperatures, the photoresist profile exhibited significant tapering / rounded features. In contrast, at higher processing temperatures, the photoresist profile was significantly improved, with features that were much less tapered / rounded and much more angular. Higher PEB temperatures result in higher material contrast between exposed and unexposed portions of the photoresist, thereby enabling greater selectivity during photoresist development. Furthermore, substrates processed at higher PEB temperatures exhibit higher line critical dimensions after development, which corresponds to a lower dose-to-size ratio. In other words, by using higher processing temperatures, desired critical dimensions can be achieved with a lower dose of EUV radiation than would be required to achieve the same critical dimension if the substrate were processed at a lower temperature (or not at all). As previously mentioned, dry development techniques were used after PEB processing. In many cases, wet development techniques cannot develop PEB-processed photoresist layers at high temperatures, e.g., above 180°C, for the reasons discussed above.

[0038] In certain embodiments, the PAB and / or PEB processes may be performed with an ambient gas flow in the range of 100 to 10,000 sccm. In these or other embodiments, the water content in the ambient environment may be controlled between about a few percent and 100% (e.g., in some cases, about 20% to 50%). In these or other embodiments, the pressure during the process may be controlled, for example, at subatmospheric pressure (e.g., using a vacuum to achieve subatmospheric pressure). In some cases, the pressure during the process may be about 0.1 to 760 Torr, for example, about 0.1 to 10 Torr, or in some cases, about 0.1 to 1 Torr. In these or other embodiments, the duration of the process may be controlled to about 1 to 15 minutes, for example, about 2 to 5 minutes, or about 2 minutes.

[0039] These findings can be used to adjust process conditions to adapt or optimize processes for specific materials and situations. For example, the selectivity achieved for a given EUV dose by a PEB thermal treatment at 220°C–250°C for approximately 2 minutes in air with approximately 20% humidity can be similar to that achieved for approximately 30% higher EUV doses without such a thermal treatment. Therefore, depending on the selectivity requirements / constraints of a semiconductor processing operation, thermal treatments such as those described herein can be used to lower the required EUV dose. Alternatively, if higher selectivity is required and a higher dose can be tolerated, much higher selectivity than is possible in the context of wet development (e.g., dry etch selectivity of up to 100 in exposed vs. unexposed areas of the photoresist) can be achieved. Remote plasma-based processes may also offer the same or similar benefits.

[0040] 1 illustrates a process flow for a method for processing a semiconductor substrate, according to one embodiment of the present disclosure. The method 100 includes providing a metal-containing photoresist on a substrate layer of a semiconductor substrate in a process chamber at 101. The substrate may be, for example, a partially fabricated semiconductor device film stack fabricated by any suitable method. At 103, the metal-containing photoresist is treated to modify the material properties of the metal-containing photoresist to enhance etch selectivity in a subsequent post-exposure dry development process. For example, the treatment may increase cross-linking in the metal-containing photoresist.

[0041] In some embodiments, the treatment may include a thermal process that controls the temperature, gas atmosphere, and / or moisture. The gas atmosphere may include air, water (H2O), hydrogen (H2), oxygen (O2), ozone (O3), hydrogen peroxide (H2O2), carbon monoxide (CO), carbon dioxide (CO2), carbonyl sulfide (COS), sulfur dioxide (SO2), chlorine (Cl2), ammonia (NH3), nitrous oxide (NO), nitric oxide (NO), methane (CH4), methylamine (CH3NH2), dimethylamine ((CH3)2NH), trimethylamine (N(CH3)3), ethylamine (CH3CH2NH2), diethylamine ((CH3CH2)2NH), triethylamine (N(CH2CH3)3), pyridine (C5H5N), alcohol (C n H 2n+1 OH, methanol, ethanol, propanol, and butanol), acetylacetone (CH3COCH2COCH3), formic acid (HCOOH), oxalyl chloride ((COCl)2), carboxylic acids (C n H 2n+1 COOH), other low molecular weight amines (NR 1 R 2 R 3 , where R 1 and R 2 and R 3may each independently comprise a reactive gas species such as hydrogen, hydroxyl, aliphatic, haloaliphatic, haloheteroaliphatic, heteroaliphatic, aromatic, aliphatic-aromatic, heteroaliphatic-aromatic, or any combination thereof. Substituted forms of any of these reactive gases may also be used. In some cases, a substrate may be exposed to more than one reactive gas during a processing operation.

[0042] In embodiments where a reactive gas is used to treat the photoresist, the reactive gas may interact with the photoresist through oxidation, coordination, or acid / base chemistry.

[0043] In various embodiments, the gas atmosphere may include an inert gas such as N, Ar, He, Ne, Kr, or Xe. In some cases, the inert gas may be provided along with one or more of the reactive gases listed above. In other cases, the gas atmosphere may be inert or substantially inert. For example, the gas atmosphere may be free or substantially free of reactive gases. As used herein, a gas atmosphere may be considered substantially free of reactive gases if only trace amounts of such gases are present. In various cases where an inert atmosphere is used, the inert atmosphere may increase compositional and / or material property contrast by reducing peroxides in relevant regions of the photoresist. For example, in some cases where the photoresist is heat-treated in an inert atmosphere after exposure to patterning radiation, the inert atmosphere promotes increased material contrast (e.g., compositional and / or material property) by reducing peroxides present in unexposed regions of the photoresist.

[0044] Any of the embodiments described herein may include a reduction step operable to reduce oxidized or overoxidized regions of the photoresist. Such a reduction step may be particularly useful after a step of oxidizing the photoresist (or a portion thereof). In various embodiments, the reduction step may include exposing the substrate to a reducing or inert atmosphere. In some cases, the reduction step may include heating the substrate and / or exposing the substrate to a plasma. The plasma may be generated from an inert gas and / or a reducing gas.

[0045] In various embodiments, as shown in FIG. 2 , a treatment may be applied after photoresist 202a is applied to substrate 201 and before photoresist 202a is exposed to patterning radiation. For example, in one example where the treatment is a thermal treatment, the treatment may be referred to as a post-apply bake (PAB). The treatment alters photoresist 202a to form a modified version of photoresist 202b. Compared to photoresist 202a before the treatment, the modified version of photoresist 202b exhibits improved properties. For example, the modified version of photoresist 202b may be more sensitive to EUV radiation than the unmodified version of photoresist 202a. As a result of this increased EUV sensitivity, the modified version of photoresist may exhibit a lower dose-to-size ratio during EUV exposure and may also provide lower line edge roughness after development.

[0046] The treatment may also be provided at different times. In various embodiments, as shown in FIG. 3 , the treatment may be applied after the photoresist 302a is deposited and patterned by partial exposure to radiation (e.g., EUV), such that the treated substrate includes both the exposed and unexposed portions 302c and 302b of the EUV photoresist. For example, in one example where the treatment is a thermal treatment, the treatment may be referred to as a post-exposure bake (PEB). The treatment may modify both the exposed and unexposed portions 302c and 302b of the EUV photoresist, thereby forming modified versions 302e and 302d of the exposed and unexposed portions. The modification caused by the treatment may increase the etch rate of the photoresist material in a dry development etching gas. Alternatively or additionally, the modification caused by the treatment may increase the difference in compositional / material properties between the unexposed and exposed portions of the photoresist. In other words, the difference in composition / material properties between (1) the modified version 302d of the unexposed portion of the photoresist after processing and (2) the modified version 302e of the exposed portion of the photoresist after processing is greater than the difference in composition / material properties between (1) the unexposed portion 302b of the photoresist before processing and (2) the exposed portion 302c of the photoresist before processing.

[0047] Additionally, the rate of increase or decrease of bake temperature in either the PAB or PEB process is another useful process parameter that can be manipulated to fine-tune crosslinking / etch selectivity results. The PAB and PEB thermal processes can be performed in either a single run or multiple runs. When multiple runs are used, different process conditions may be provided during each run. Examples of process conditions that may be varied during each run include, but are not limited to, the identity and concentration of the atmospheric gas or mixture adjacent to the substrate, moisture level, temperature, pressure, etc. These process conditions may be controlled to adjust PR characteristics and therefore different etch selectivities.

[0048] In alternative embodiments, either or both of the post-application treatment and the previous exposure treatment may include a remote plasma process in addition to or instead of a thermal treatment to generate radicals to react with the metal-containing photoresist, thereby modifying its material properties. With reference to FIG. 2 , in some embodiments, the remote plasma treatment process occurs after the photoresist 202 a is deposited and before it is exposed to EUV radiation. In this case, the treatment may be referred to as a post-application plasma treatment. With reference to FIG. 3 , in some embodiments, the remote plasma treatment process occurs after the photoresist 302 a is deposited and exposed to EUV radiation, forming exposed portions 302 c and unexposed portions 302 b. In this case, the treatment may be referred to as a post-exposure plasma treatment.

[0049] In implementations where a remote plasma is used to treat the photoresist, the radicals may be generated from the same or different gas species as described herein with respect to the thermal treatment.

[0050] In some embodiments, multiple processes may be used. For example, a first process may occur after photoresist deposition and before EUV exposure (as shown in FIG. 2), and a second process may occur after EUV exposure and before development (as shown in FIG. 3). One or more of the process conditions may be controlled as described herein during the first process and / or the second process.

[0051] Device: 4A and 4B show schematic diagrams of different embodiments of process stations that can be used to perform the processes described herein. The process station 480 shown in FIG. 4A may be used for thermal-based processes, such as a post-apply bake or a post-exposure bake. The process station 400 shown in FIG. 4B may be used for thermal-based processes, remote plasma processes, or both. These processes can include post-apply processes as well as post-exposure processes. The process stations shown in FIGS. 4A and 4B may also be used for other processes described herein. For steps requiring plasma, the process station 400 in FIG. 4B may be used. For steps not requiring plasma, either the process station 400 in FIG. 4B or the process station 480 in FIG. 4A may be used.

[0052] FIG. 4A shows a simplified diagram of a processing chamber 480 according to one embodiment. In this example, the processing chamber 480 is a closed chamber with a controllable atmosphere. A substrate 481 may be positioned on a substrate support 482, which may also heat and / or cool the substrate. In some cases, alternative or additional heating and cooling elements may be provided. Process gases enter the processing chamber 480 through an inlet 483. Materials are removed from the processing chamber 480 via an outlet 484, which may be connected to a vacuum source (not shown). Operation of the processing chamber 480 may be controlled by a controller 486, which is discussed further below. Additionally, a sensor 485 may be provided to monitor, for example, the temperature and / or the composition of the atmosphere within the processing chamber 480. Readings from the sensor 485 may be used in an active feedback loop by the controller 486. In various implementations, the processing chamber 480 may be modified by including a remote plasma chamber (not shown) in fluid communication with the processing chamber 480. In such cases, the plasma may be generated in a remote plasma chamber before the plasma is delivered to the processing chamber 480 .

[0053] The chamber in which processing occurs can be configured in many ways. In some embodiments, the chamber is the same chamber used to deposit photoresist, and / or the same chamber used to expose photoresist to EUV radiation, and / or the same chamber used to develop photoresist. In some embodiments, the chamber is a dedicated bake or remote plasma processing chamber that is not used for other processes, such as deposition, etching, EUV exposure, or photoresist development. The chamber may be a stand-alone chamber or may be integrated into a larger processing tool, such as a deposition tool used to deposit photoresist, an EUV exposure tool used to expose photoresist to EUV radiation, and / or a development tool used to develop photoresist. The chamber used to process photoresist may be combined with any one or more of these tools, for example, in a cluster tool, as desired for a particular application. In some cases, the chamber may be provided in a common low-pressure process tool environment that provides low pressure to multiple chambers.

[0054] 4B shows a schematic cross-sectional view of an inductively coupled plasma apparatus 400 suitable for performing certain embodiments or aspects of embodiments, such as deposition (dry deposition), thermal treatments described herein, plasma treatments described herein, dry development, and / or etching, an example of which is the Kiyo® reactor manufactured by Lam Research Corp. of Fremont, Calif. In other embodiments, other tools or tool types capable of performing one or more of the dry deposition, (thermal or remote plasma) treatment, development, and / or etching processes described herein may be used for implementation.

[0055] The inductively coupled plasma apparatus 400 includes a total process chamber 424 structurally defined by a chamber wall 401 and a window 411. The chamber wall 401 may be fabricated from stainless steel or aluminum. The window 411 may be fabricated from quartz or other dielectric material. An optional internal plasma grid 450 divides the total process chamber into an upper subchamber 402 and a lower subchamber 403. In certain embodiments, the plasma grid 450 may be removed, thereby utilizing the chamber space consisting of the subchambers 402 and 403. Where the plasma grid 450 is present, it may be used to shield the substrate from the plasma generated directly in the upper subchamber 402, thereby treating the substrate with a remote plasma in the lower subchamber 403. In this example, the plasma present in the lower subchamber 403 may be considered a remote plasma because it is initially generated in a location (e.g., the upper subchamber 402) upstream from the location (e.g., the lower subchamber 403) where the substrate is treated with the plasma.

[0056] A chuck 417 is located within the lower subchamber 403 near the bottom inner surface. The chuck 417 is configured to receive and hold a semiconductor wafer 419 on which etching and deposition processes are performed. When present, the chuck 417 may be an electrostatic chuck for supporting the wafer 419. In some embodiments, an edge ring (not shown) surrounds the chuck 417 and, if present above the chuck 417, has a substantially planar upper surface with the upper surface of the wafer 419. The chuck 417 also includes an electrostatic electrode for chucking and dechucking the wafer 419. For this purpose, a filter and DC clamp power supply (not shown) may be provided. Other control systems for lifting the wafer 419 from the chuck 417 may also be provided. The chuck 417 may be electrically charged using an RF power supply 423. The RF power supply 423 is connected to a matching circuit 421 via connection 427. The matching circuit 421 is connected to the chuck 417 via connection 425. In this manner, the RF power supply 423 is connected to the chuck 417. In various embodiments, the bias power of the electrostatic chuck may be set to about 50 V, or may be set to a different bias power depending on the process being performed in accordance with the disclosed embodiments. For example, the bias power may be from about 20 V to about 100 V, or from about 30 V to about 150 V.

[0057] The plasma-generating element includes a coil 433 positioned above the window 411. In some embodiments, a coil is not used. In some such embodiments, alternative mechanisms for generating plasma may be provided, for example, to provide capacitively coupled plasma, microwave plasma, etc. If inductively coupled plasma is used, the coil 433 is fabricated from a conductive material and includes at least one full turn. The example coil 433 shown in FIG. 4B includes three turns. A cross section of the coil 433 is indicated by symbols, with the coil marked with an "X" extending into the page and the coil marked with a "●" extending out of the page. The plasma-generating element further includes an RF power source 441 configured to provide RF power to the coil 433. Generally, the RF power source 441 is connected to a matching network 439 via connection 445. The matching network 439 is connected to the coil 433 via connection 443. In this manner, the RF power source 441 is connected to the coil 433.

[0058] An optional Faraday shield 449a is located between the coil 433 and the window 411. The Faraday shield 449a may be maintained at a distance from the coil 433. In some embodiments, the Faraday shield 449a is positioned directly above the window 411. In some embodiments, the Faraday shield 449b is between the window 411 and the chuck 417. In some embodiments, the Faraday shield 449b is not maintained at a distance from the coil 433. For example, the Faraday shield 449b may be directly below the window 411 without a gap. The coil 433, the Faraday shield 449a, and the window 411 are each configured to be substantially parallel to one another. The Faraday shield 449a may prevent metals or other species from depositing on the window 411 of the process chamber 424.

[0059] Process gases may enter the process chamber through one or more main gas inlets 460 located in the upper subchamber 402 and / or through one or more side gas inlets 470. Similarly, although not explicitly shown, similar gas inlets may be used to supply process gases to the capacitively coupled plasma processing chamber. A vacuum pump, such as a one- or two-stage mechanical dry pump and / or turbomolecular pump 440, may be used to draw process gases from the process chamber 424 and maintain pressure within the process chamber 424. For example, the vacuum pump may be used to evacuate the entire process chamber 424 or the lower subchamber 403 during a purge operation. A valve-controlled conduit may be used to fluidly connect the vacuum pump to the process chamber 424 to selectively control the application of the vacuum environment provided by the vacuum pump. This may be done using a closed-loop controlled flow-restricting device, such as a throttle valve (not shown) or a pendulum valve (not shown), during active plasma processing. Similarly, a vacuum pump and valve-controlled fluid connection to the capacitively coupled plasma processing chamber may also be employed.

[0060] During operation of the apparatus 400, one or more process gases may be supplied through the gas inlets 460 and / or 470. In certain embodiments, process gases may be supplied only through the main gas inlet 460 or only through the side gas inlet 470. In some cases, the illustrated gas inlets may be replaced by more complex gas inlets, such as one or more showerheads. The Faraday shield 449a and / or optional grid 450 may include internal channels and holes that allow delivery of process gases to the process chamber 424. Either or both the Faraday shield 449a and optional grid 450 may function as showerheads for delivery of process gases. In some embodiments, a liquid evaporation and delivery system may be located upstream of the process chamber 424 so that once the liquid reactant or precursor is evaporated, the evaporated reactant or precursor is introduced into the process chamber 424 via the gas inlets 460 and / or 470.

[0061] In some embodiments, a remote plasma generation unit may be provided upstream of the process chamber 424, and radicals formed by the remote plasma may be provided to the process chamber via gas inlets 460 and / or 470.

[0062] Radio frequency power is supplied from an RF power supply 441 to the coil 433, causing an RF current to flow through the coil 433. The RF current flowing through the coil 433 generates an electromagnetic field around the coil 433. The electromagnetic field generates an induced current within the upper subchamber 402. The physical and chemical interactions of the various ions and radicals generated with the wafer 419 etch features in the wafer 419 and selectively deposit layers on the wafer 419.

[0063] When a plasma grid 450 is used such that both an upper subchamber 402 and a lower subchamber 403 are present, induced currents act on the gas present in the upper subchamber 402 to generate an electron-ion plasma within the upper subchamber 402. The optional internal plasma grid 450 limits the amount of hot electrons within the lower subchamber 403. In some embodiments, the apparatus 400 is designed and operated such that the plasma present in the lower subchamber 403 is an ion-ion plasma.

[0064] Both the upper electron-ion plasma and the lower ion-ion plasma may contain positive and negative ions, although the ion-ion plasma has a greater ratio of negative ions to positive ions. Volatile etch and / or deposition byproducts may be removed from the lower subchamber 403 through port 422. The chuck 417 disclosed herein may operate at elevated temperatures ranging from about 10° C. to about 250° C. or higher. The temperature depends on the process operation and the particular recipe.

[0065] The tool 400 may be connected to equipment (not shown) when installed in a clean room or manufacturing facility. The equipment includes plumbing to provide process gases, vacuum, temperature control, and environmental particle control. These equipment are connected to the tool 400 when installed in the target manufacturing facility. Additionally, the tool 400 may be connected to a transfer chamber that allows semiconductor wafers to be moved in and out of the tool 400 by robotics using typical automation.

[0066] In some embodiments, a system controller 430 (which may include one or more physical or logical controllers) controls some or all of the operation of the process chamber 424. The system controller 430 may include one or more memory devices and one or more processors. In some embodiments, the apparatus 400 includes a switching system for controlling flow rates and durations when the disclosed embodiments are implemented. In some embodiments, the apparatus 400 may have a switching time of up to about 500 milliseconds, or up to about 750 milliseconds. The switching time may depend on the flow chemistry, the selected recipe, the reactor architecture, and other factors.

[0067] In some implementations, the system controller 430 is part of a system, which may be part of the examples described above. Such a system may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a wafer pedestal, gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after semiconductor wafer or substrate processing. The electronics may be integrated into the system controller 430, which may control various components or subparts of one or more systems. Depending on the processing parameters and / or system type, the system controller may be programmed to control any of the processes disclosed herein, including delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, liquid delivery settings, position and motion settings, wafer loading and unloading into and out of the tool, and wafer loading and unloading into and out of other transfer tools and / or load locks connected or interfacing with the particular system.

[0068] Broadly speaking, the system controller 430 may be defined as electronic equipment having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute the program instructions (e.g., software). The program instructions may be instructions communicated to the controller in the form of various individual settings (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for a system. The operational parameters, in some embodiments, may be part of a recipe defined by a process engineer to accomplish one or more processing steps during the fabrication or removal of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or die of a wafer.

[0069] In some implementations, the system controller 430 may be part of or connected to a computer that is integrated into, connected to, or otherwise networked to the system, or a combination thereof. For example, the controller may be all or part of a “cloud,” i.e., fab host computer system, enabling remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, examine trends or performance criteria from multiple manufacturing operations, modify parameters of a current process, configure processing steps to track a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) can provide process recipes to the system over a network, which may include a local network or the Internet. The remote computer may include a user interface that allows entry or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the system controller 430 receives instructions in the form of data specifying parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool the controller is configured to interface with or control. Thus, as described above, the system controller 430 may be distributed, such as by including one or more individual controllers networked together and operating toward a common purpose, such as the processes and controls described herein. One example of a distributed controller for such purposes is one or more integrated circuits on the chamber that are located remotely (e.g., at the platform level or as part of a remote computer) and communicate with one or more integrated circuits that cooperatively control the processes in the chamber.

[0070] Examples of systems may include, but are not limited to, a plasma etch chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (e.g., PECVD) chamber or module, an ALD chamber or module, an ALE chamber or module, an ion implantation chamber or module, a track chamber or module, an EUV lithography chamber (scanner) or module, a dry development chamber or module, and any other semiconductor processing system that may be associated with or used in the fabrication and / or manufacturing of semiconductor wafers.

[0071] As described above, depending on the process step or steps being performed by the tool, the controller may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used to transport materials to and from tool locations and / or load ports of wafers within a semiconductor fabrication factory.

[0072] EUVL patterning may be performed using any suitable tool, often referred to as a scanner, such as the TWINSCAN NXE:3300B® platform manufactured by ASML, Veldhoven, The Netherlands. The EUVL patterning tool may be a stand-alone device that loads and unloads substrates for deposition and etching, as described herein. Alternatively, as described below, the EUVL patterning tool may be a module on a larger, multi-component tool. FIG. 5 shows a semiconductor process cluster tool architecture with vacuum-integrated deposition, EUV patterning, and dry develop / etch modules that interface with a vacuum transfer module, suitable for carrying out the processes described herein. While the processes may be carried out without such vacuum-integrated equipment, such equipment may be advantageous in some implementations.

[0073] 5 illustrates a semiconductor process cluster tool architecture with a vacuum-integrated deposition and patterning module suitable for implementing embodiments described herein. Such a cluster process tool architecture may include a PR and underlayer deposition module, a resist exposure (EUV scanner) module, and / or a resist dry develop and etch module, as described herein. In some embodiments, one or more hardware parameters of the process stations, including those discussed in detail herein, may be programmatically adjusted by one or more computer controllers.

[0074] In some embodiments, certain of the processing functions, such as resist film deposition, processing, exposure and / or dry developing, and etching, can be performed sequentially within the same module.

[0003] Embodiments of the present disclosure are also directed to an apparatus for processing a substrate, the apparatus including a process chamber including a substrate support, a process gas source connected to the process chamber and associated flow control hardware, thermal control hardware, substrate processing hardware connected to the process chamber, and a controller having a processor and memory. In some implementations, the processor and memory are communicatively coupled to each other, the processor is at least operatively coupled to the flow control and substrate processing hardware, and the memory stores computer-executable instructions for performing operations in the methods for fabricating a patterned structure described herein.

[0075] As mentioned above, FIG. 5 illustrates a semiconductor process cluster tool architecture having a vacuum-integrated deposition and patterning module connected to a vacuum transfer module suitable for implementing the processes described herein. The arrangement of transfer modules for "transferring" wafers between multiple storage facilities and processing modules is sometimes referred to as a "cluster tool architecture" system. The deposition and patterning modules are vacuum-integrated according to the requirements of a particular process. Other modules, such as for etching, may also be included on the cluster. The processing steps described herein may be performed in any one or more of these modules, or in separate modules dedicated to such processes.

[0076] A vacuum transfer module (VTM) 538 interfaces with four processing modules 520a-520d, which may be individually optimized to perform various manufacturing processes. By way of example, processing modules 520a-520d may be implemented to perform film deposition, evaporation, thermal and / or plasma treatment, electroless deposition, dry development, etching, stripping, and / or other semiconductor processes. For example, module 520a may be an ALD reactor operable to perform non-plasma thermal atomic layer deposition to form metal-containing photoresists or other materials described herein. In one example, module 520a is a Vector® tool available from Lam Research Corporation of Fremont, California. In these or other embodiments, module 520b may be a plasma-enhanced chemical vapor deposition (PECVD) tool, such as a Lam Vector®. It should be understood that the figures are not necessarily drawn to scale.

[0077] Airlocks 542 and 546, also known as load locks or transfer modules, connect VTM 538 and patterning module 540. For example, as mentioned above, a suitable patterning module may be a TWINSCAN NXE:3300B® platform manufactured by ASML of Veldhoven, The Netherlands. This tool architecture allows workpieces, such as semiconductor substrates or wafers, to be transferred under vacuum to prevent reaction prior to exposure. Integration of the deposition module with the lithography tool is facilitated by the fact that EUV lithography also requires very low pressures, given the strong optical absorption of incident photons by ambient gases such as HO and O.

[0078] As noted above, this integrated architecture is only one possible embodiment of a tool for performing the described process. The process may also be performed using a more conventional stand-alone EUV lithography scanner and a deposition reactor, such as a Lam Vector tool, either stand-alone or integrated with other tools (e.g., a Lam Kiyo or Gamma tool) for etching, stripping, etc., in a cluster architecture without an integrated patterning module, but as a module as described with reference to FIG. 5.

[0079] Airlock 542 may be an "outgoing" load lock, referring to the transfer of substrates from VTM 538 to patterning module 540, which feeds deposition module 520a, and airlock 546 may be an "incoming" load lock, referring to the transfer of substrates from patterning module 540 back to VTM 538. Incoming load lock 546 may also provide an interface to the outside of the tool for accessing and unloading substrates. Each process module has a facet that connects the module to VTM 538. For example, deposition process module 520a has facet 536. Within each facet, sensors (e.g., sensors 1-18 shown) are used to detect the passage of wafer 526 as it is moved between the respective stations. Patterning module 540 and airlocks 542 and 546 may similarly include additional facets and sensors (not shown).

[0080] The main VTM robot 522 transfers wafers 526 between modules, including airlocks 542 and 546. In one embodiment, the robot 522 has one arm, and in another embodiment, the robot 522 has two arms, each arm having an end effector 524 that grasps a wafer, such as wafer 526, for transfer. The front-end robot 544 is used to transfer wafers 526 from the output airlock 542 to the patterning module 540 and from the patterning module 540 to the input airlock 546. The front-end robot 544 may also transport wafers 526 between the input load lock and the exterior of the tool for substrate access and removal. The input airlock module 546 has the ability to adapt to environments between atmosphere and vacuum, allowing wafers 526 to move between the two pressure environments without damage.

[0081] It should be noted that EUV lithography tools typically operate at a higher vacuum (e.g., lower pressure) than deposition tools. In this case, it may be desirable to increase the vacuum environment of the substrate during transfer between the deposition tool and the EUV lithography tool (e.g., apply a larger vacuum so that the substrate is exposed to a lower pressure) so that the substrate can be degassed before entering the EUV lithography tool. The unload airlock 542 provides this function by holding the transferred wafer for a period of time at a low pressure no higher than the pressure in the patterning module 540 and venting any off-gassing so that the optics of the patterning tool 540 are not contaminated by off-gassing from the substrate. A suitable pressure for the unload off-gas airlock is approximately 1E-8 Torr or less.

[0082] In some embodiments, a system controller 550 (which may include one or more physical or logical controllers) controls some or all of the operation of the cluster tool and / or its separate modules. Examples of system controllers are further described above in connection with FIG. 4B. Note that the controller may reside in the cluster architecture, be located outside the cluster architecture on the manufacturing floor, or be remotely connected to the cluster architecture via a network. The system controller 550 may include one or more memory devices and one or more processors. The processor may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, stepper motor controller boards, and other similar components. Instructions for implementing appropriate control operations are executed on the processor. These instructions may be stored in a memory device associated with the controller or provided over a network. In certain embodiments, the system controller executes system control software.

[0083] The system control software may include instructions for controlling the timing and / or extent of application of any aspect of tool or module operation. The system control software may be configured in any suitable manner. For example, various process tool component subroutines or control objects may be written to control the operation of the process tool components necessary to perform the various process tool processes. The system control software may be coded in any suitable computer-readable programming language. In some embodiments, the system control software includes input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each stage of a semiconductor manufacturing process may include one or more instructions for execution by the system controller. Instructions for setting process conditions for condensation, deposition, evaporation, patterning, and / or etching stages may be included in the corresponding recipe stages, for example.

[0084] In various embodiments, an apparatus for forming a negative tone patterned mask is provided. The apparatus may include one or more process chambers for patterning, deposition, and / or etching, and a controller including instructions for forming the negative tone patterned mask. One or more of the process chambers may be configured to perform one or more of the process steps described herein. The instructions may include code for, in the associated one or more process chambers, patterning features in a metal oxide resist on a semiconductor substrate by dry deposition, performing a process described herein, exposing to EUV light to expose a surface of the substrate, dry developing the photopatterned resist, and / or etching an underlying layer or layer stack using the patterned resist as a mask.

[0085] It should be noted that the computer controlling the wafer movement may be part of the cluster architecture, may be located outside the cluster architecture on the manufacturing floor, or may be at a remote location and connected to the cluster architecture via a network. A controller such as that described above with respect to Figure 4B may be implemented with the tool of Figure 5.

[0086] conclusion Treatment strategies (eg, post-apply bake, post-exposure bake, post-apply remote plasma treatment, and post-exposure remote plasma treatment) are disclosed to enhance the EUV lithography dry developability of metal-containing EUV resists.

[0087] It is understood that the examples and embodiments described herein are for illustrative purposes only, and that various modifications or changes will be suggested to those skilled in the art in light thereof. Various details have been omitted for clarity, and various design alternatives may be implemented. Therefore, the examples herein are to be considered illustrative and not limiting, and the disclosure is not limited to the details set forth herein, but may be modified within the scope of the disclosure.

[0088] The following claims are provided to further describe particular embodiments of the present disclosure, but the present disclosure is not necessarily limited to these embodiments. The present disclosure can also be realized in the following forms. [Form 1] 1. A method of processing a substrate, comprising: providing a substrate in a process chamber, the substrate being a semiconductor substrate comprising a substrate layer and a photoresist disposed on the substrate layer, the photoresist comprising a metal; treating the photoresist to modify its material properties so that it has high etch selectivity in a subsequent post-exposure dry development process; A method comprising: [Form 2] 2. The method of claim 1, The method wherein said treating increases cross-linking in said photoresist. [Form 3] 2. The method of claim 1, A method wherein the treatment comprises a thermal process that controls temperature, pressure, atmospheric gas chemistry, gas flow rates / ratios, and moisture. [Form 4] 4. The method of claim 3, The chemical structure of the atmospheric gas is nitrogen (N 2 ), an inert gas selected from the group consisting of helium, neon, argon, xenon, and combinations thereof. [Form 5] 5. The method of claim 4, The method, wherein the chemical structure of the ambient gas is substantially free of reactive gases. [Form 6] 4. The method of claim 3, wherein the chemical structure of the atmospheric gas comprises reactive gas species. [Form 7] 7. The method of claim 6, The reactive gas species may be water, hydrogen (H 2 ), oxygen (O 2 ), ozone, hydrogen peroxide, carbon monoxide, carbon dioxide, carbonyl sulfide, sulfur dioxide, chlorine (Cl 2 ), ammonia, nitrous oxide, nitric oxide, methane, alcohol, acetylacetone, formic acid, oxalyl chloride, pyridine, carboxylic acids, amines, and combinations thereof. [Form 8] 8. The method of any one of aspects 1 to 7, comprising: the photoresist is applied to the substrate layer but has not yet been exposed to patterning radiation; The method wherein said treatment is a post-apply bake (PAB). [Form 9] 9. The method of claim 8, further comprising: The method wherein the treatment increases the exposure radiation sensitivity of the photoresist, thereby achieving a lower dose to size while the substrate is exposed to the patterning radiation, and achieving lower line edge roughness after the substrate is exposed to the patterning radiation, compared to the higher dose to size and higher line edge roughness achieved without the treatment. [Form 10] 9. The method of claim 8, further comprising: The method wherein the treatment is carried out at a temperature of about 90 to 250°C or 90 to 190°C. [Form 11] 8. The method of any one of aspects 1 to 7, comprising: The method wherein the photoresist is patterned by partial exposure to patterning radiation resulting in exposed and unexposed portions of the photoresist, and the treatment is a post-exposure bake (PEB). [Form 12] 12. The method of claim 11, further comprising: A method wherein the treatment is carried out at a temperature of about 170 to 250°C or higher. [Form 13] 13. The method of claim 12, further comprising: wherein the composition of both the exposed and unexposed portions of the photoresist is altered by the treatment in a manner that (i) increases the etch rate in a dry development etch gas, (ii) increases the composition difference between the unexposed and exposed portions of the photoresist, and / or (iii) increases the difference in one or more material properties between the unexposed and exposed portions of the photoresist. [Form 14] 8. The method of any one of aspects 1 to 7, comprising: A method wherein the temperature of the substrate is increased or decreased during the processing of the photoresist. [Form 15] 8. The method of any one of aspects 1 to 7, comprising: The method wherein the pressure during the treatment is controlled to about 0.1 to 760 Torr. [Form 16] 16. The method of claim 15, The method wherein the pressure during the treatment is controlled to about 0.1 to 10 Torr. [Form 17] 2. The method of claim 1, The method, wherein the treating comprises exposing the photoresist to a remote plasma that generates radicals that react with the photoresist to modify one or more material properties of the photoresist. [Form 18] 18. The method of claim 17, The radicals may be water, hydrogen (H 2 ), oxygen (O 2 ), ozone, hydrogen peroxide, carbon monoxide, carbon dioxide, carbonyl sulfide, sulfur dioxide, chlorine (Cl 2 ), ammonia, nitrous oxide, nitric oxide, methane, alcohol, acetylacetone, formic acid, oxalyl chloride, pyridine, carboxylic acids, amines, and combinations thereof. [Form 19] 8. The method of any one of aspects 1 to 7, comprising: The method, wherein the treatment is a thermal treatment performed using a first set of treatment conditions and a second set of treatment conditions, and the first set and the second set of treatment conditions are varied with respect to at least one of an atmospheric gas or mixture, a temperature, and / or a pressure, thereby adjusting material properties of the photoresist and tuning an etch selectivity of the photoresist. [Form 20] 8. The method of any one of aspects 1 to 7, comprising: The method wherein the photoresist is an EUV sensitive film. [Form 21] 8. The method of any one of aspects 1 to 7, comprising: The method wherein the treating occurs before exposing the photoresist to EUV lithography. [Form 22] 8. The method of any one of aspects 1 to 7, comprising: The method wherein the treating occurs after exposing the photoresist to EUV lithography. [Form 23] 22. The method of claim 21, The method wherein the treatment is performed a second time after exposing the photoresist to EUV lithography. [Form 24] An apparatus for processing a substrate, comprising: a process chamber including a substrate support; a process gas source connected to the process chamber and associated gas flow control hardware; a substrate thermal control device; substrate processing hardware connected to the process chamber; a controller having a processor, the processor operatively connected to at least the gas flow control hardware, the substrate thermal control device, and the substrate processing hardware, the controller configured to perform any one or more of the methods of aspects 1 to 7 or as otherwise described herein; An apparatus comprising:

Claims

1. 1. A method of processing a substrate, comprising: providing a substrate in a process chamber, the substrate being a semiconductor substrate comprising a substrate layer and a photoresist disposed on the substrate layer, the photoresist comprising a metal; treating the photoresist to modify its material properties so that it has high etch selectivity in a subsequent post-exposure dry development process; Including, the treatment includes a thermal process that controls temperature, pressure, atmospheric gas chemistry, gas flow rates / ratios, and moisture; the chemical structure of the atmospheric gas includes reactive gas species; the reactive gas species comprises a combination of water and one or more of oxygen, hydrogen peroxide, ozone, chlorine, or nitrous oxide; method.

2. 10. The method of claim 1, The method wherein said treating increases cross-linking in said photoresist.

3. 10. The method of claim 1, The chemical structure of the atmospheric gas is nitrogen (N 2 ), an inert gas selected from the group consisting of helium, neon, argon, xenon, and combinations thereof.

4. 4. A method according to any one of claims 1 to 3, comprising: The method wherein the photoresist is patterned by partial exposure to patterning radiation resulting in exposed and unexposed portions of the photoresist, and the treatment is a post-exposure bake (PEB).

5. 5. The method of claim 4, A method wherein the treatment is carried out at a temperature of about 170 to 250°C or higher.

6. 6. The method of claim 5, wherein the composition of both the exposed and unexposed portions of the photoresist is altered by the treatment in a manner that (i) increases the etch rate in a dry development etch gas, (ii) increases the composition difference between the unexposed and exposed portions of the photoresist, and / or (iii) increases the difference in one or more material properties between the unexposed and exposed portions of the photoresist.

7. 4. A method according to any one of claims 1 to 3, comprising: A method wherein the temperature of the substrate is increased or decreased during the processing of the photoresist.

8. 4. A method according to any one of claims 1 to 3, comprising: The method wherein the pressure during said treatment is controlled to between about 0.1 and 760 Torr.

9. 9. The method of claim 8, The method wherein the pressure during the treatment is controlled to about 0.1 to 10 Torr.

10. 10. The method of claim 1, The method, wherein the treating comprises exposing the photoresist to a remote plasma that generates radicals that react with the photoresist to modify one or more material properties of the photoresist.

11. 11. The method of claim 10, The radicals may be water, hydrogen (H 2 ), oxygen (O 2 ), ozone, hydrogen peroxide, carbon monoxide, carbon dioxide, carbonyl sulfide, sulfur dioxide, chlorine (Cl 2 ), ammonia, nitrous oxide, nitric oxide, methane, alcohol, acetylacetone, formic acid, oxalyl chloride, pyridine, carboxylic acids, amines, and combinations thereof.

12. 4. A method according to any one of claims 1 to 3, comprising: The method of claim 1, wherein the treatment is a thermal treatment performed using a first set of treatment conditions and a second set of treatment conditions, and the first set and the second set of treatment conditions are varied with respect to at least one of an atmospheric gas or mixture, a temperature, and / or a pressure, thereby adjusting material properties of the photoresist and tuning an etch selectivity of the photoresist.

13. 4. A method according to any one of claims 1 to 3, comprising: The method wherein the photoresist is an EUV sensitive film.

14. 4. A method according to any one of claims 1 to 3, comprising: The method wherein the treating occurs before exposing the photoresist to EUV lithography.

15. 4. A method according to any one of claims 1 to 3, comprising: The method wherein the treating occurs after exposing the photoresist to EUV lithography.

16. 15. The method of claim 14, The method wherein the treatment is performed a second time after exposing the photoresist to EUV lithography.

17. An apparatus for processing a substrate, comprising: a process chamber including a substrate support; a process gas source connected to the process chamber and associated gas flow control hardware; a substrate thermal control device; substrate processing hardware connected to the process chamber; a controller having a processor, the processor operatively connected to at least the gas flow control hardware, the substrate thermal control device, and the substrate processing hardware, the controller configured to perform any one or more of the methods of claims 1 to 3; An apparatus comprising:

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