integrated circuits

The integrated circuit design uses power supply voltage detection and operation mode determination to switch between multiple modes externally, addressing the need for reduced terminal count in conventional circuits.

JP7823993B2Active Publication Date: 2026-03-04MINEBEAMITSUMI INC
View PDF 6 Cites 0 Cited by

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-09-03
Publication Date
2026-03-04

AI Technical Summary

Technical Problem

Conventional integrated circuits require multiple input terminals to switch between a large number of operating modes, necessitating a significant increase in terminal count, such as four terminals for 16 modes.

Method used

An integrated circuit design that includes a power supply voltage detection unit and an operation mode determination unit to determine operation modes based on power supply voltage and operation mode signals, allowing external switching without increasing the number of input terminals.

Benefits of technology

Enables external switching between a greater number of operation modes without increasing the number of input terminals, utilizing power supply voltage detection signals and operation mode signals to double the switchable modes.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007823993000001
    Figure 0007823993000001
  • Figure 0007823993000002
    Figure 0007823993000002
  • Figure 0007823993000003
    Figure 0007823993000003
Patent Text Reader

Abstract

To perform switching of a larger number of operation modes from the outside without increasing the number of input terminals for switching the operation modes.SOLUTION: An integrated circuit includes: a reset signal input terminal to which an external reset signal is inputted; an operation mode signal input terminal to which an operation mode signal is inputted; and an operation mode determination section for determining an operation mode on the basis of the operation mode signal and the external reset signal.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to integrated circuits. [Background technology]

[0002] The following Patent Document 1 discloses a technology in which an output buffer provided in a semiconductor integrated circuit outputs from a multiplexer either a signal output from a boundary scan register or a signal output from a scan flip-flop circuit depending on the value of a mode signal input to the multiplexer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2004-260093 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the technology of Patent Document 1 has only one input terminal for the mode signal, so it can only switch between two operating modes. Therefore, in conventional technology, in order to externally switch between more operating modes, it was necessary to increase the number of input terminals for switching between operating modes. For example, in a conventional integrated circuit, in order to externally switch between 16 operating modes, it was necessary to provide at least four input terminals for switching between operating modes.

[0005] For example, FIG. 5 is a diagram showing the configuration of a conventional integrated circuit 50. The conventional integrated circuit 50 shown in FIG. 5 is an integrated circuit that performs predetermined processing (e.g., amplification, AD conversion, etc.) on a sensor signal output from a sensor. The integrated circuit 50 has a plurality of operation modes. The plurality of operation modes includes an operation mode for testing the integrated circuit 50. It is possible to externally switch which of the plurality of operation modes the integrated circuit 50 operates in.

[0006] As shown in FIG. 5, the integrated circuit 50 includes a first power supply terminal VDD50, a second power supply terminal VRG, four operation mode signal input terminals TMODE0 to TMODE3, a reset signal input terminal RSTB, a reset unit 52, an operation mode determination unit 53, and a digital processing unit 54.

[0007] A first power supply voltage (e.g., 5.0 V) for operating the integrated circuit 50 is input to the first power supply terminal VDD50. A second power supply voltage (e.g., 1.8 V) for operating the integrated circuit 50 is input to the second power supply terminal VRG. An operation mode signal is input to each of the four operation mode signal input terminals TMODE0 to TMODE3. Each operation mode signal is set to "0" or "1." An external reset signal RSTB is input to the reset signal input terminal RSTB. When the external reset signal RSTB is input via the reset signal input terminal RSTB, the reset unit 52 restarts the digital processing unit 54.

[0008] The operation mode determination unit 53 determines the operation mode to be applied to the operation of the integrated circuit 50 based on four operation mode signals input from four operation mode signal input terminals TMODE0 to TMODE3. Then, the operation mode determination unit 53 notifies the digital processing unit 54 of the determined operation mode. This allows the operation mode determination unit 53 to switch between 16 operation modes provided in the digital processing unit 54 using the four operation mode signals. For this reason, the integrated circuit 50 is provided with four operation mode signal input terminals TMODE0 to TMODE3 for switching between operation modes. [Means for solving the problem]

[0009] An integrated circuit according to one embodiment includes a reset signal input terminal to which an external reset signal is input, an operation mode signal input terminal to which an operation mode signal is input, and an operation mode determination unit that determines an operation mode based on the operation mode signal and the external reset signal. [Effects of the Invention]

[0010] According to an integrated circuit according to one embodiment, a greater number of operation modes can be switched externally without increasing the number of input terminals for switching the operation modes. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a diagram showing the configuration of an integrated circuit according to an embodiment; [Figure 2] FIG. 10 is a diagram showing an example of a decision table included in an integrated circuit according to an embodiment; [Figure 3] FIG. 10 is a diagram showing an example of operation timing of an integrated circuit according to an embodiment; [Figure 4] FIG. 10 is a diagram showing another example of operation timing of the integrated circuit according to the embodiment; [Figure 5] 1 shows the configuration of a conventional integrated circuit. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, an embodiment will be described with reference to the drawings.

[0013] (Configuration of integrated circuit 10) FIG. 1 is a diagram showing the configuration of an integrated circuit 10 according to one embodiment. The integrated circuit 10 shown in FIG. 1 is an integrated circuit that performs predetermined processing (e.g., amplification, AD conversion, etc.) on a sensor signal output from a sensor, for example. The integrated circuit 10 has a plurality of operation modes. The plurality of operation modes includes an operation mode for testing the integrated circuit 10. It is possible to externally switch which of the plurality of operation modes the integrated circuit 10 operates in.

[0014] As shown in FIG. 1, the integrated circuit 10 includes a first power supply terminal VDD50, a second power supply terminal VRG, a first operation mode signal input terminal TMODE1, a second operation mode signal input terminal TMODE0, a reset signal input terminal RSTB, a power supply voltage detection unit 11, a reset unit 12, an operation mode determination unit 13, and a digital processing unit 14.

[0015] The first power supply terminal VDD50 receives a first power supply voltage (e.g., 5.0 V) for operating the integrated circuit 10. The second power supply terminal VRG receives a second power supply voltage (e.g., 1.8 V) for operating the integrated circuit 10. The first operation mode signal input terminal TMODE1 receives a first operation mode signal. The second operation mode signal input terminal TMODE0 receives a second operation mode signal. The first operation mode signal and the second operation mode signal are set to "0" or "1". The reset signal input terminal RSTB receives an external reset signal RSTB.

[0016] The power supply voltage detection unit 11 detects the input of a first power supply voltage (5.0 V) to the first power supply terminal VDD50, and outputs a first power supply voltage detection signal LVDB according to the input state of the first power supply voltage (5.0 V). Specifically, the power supply voltage detection unit 11 outputs a first power supply voltage detection signal LVDB that is "0 (off)" when the first power supply voltage (5.0 V) is not being input, and is "1 (on)" when the first power supply voltage (5.0 V) is being input.

[0017] Furthermore, the power supply voltage detection unit 11 detects the input of the second power supply voltage (1.8V) to the second power supply terminal VRG, and outputs a second power supply voltage detection signal PORB according to the input state of the second power supply voltage (1.8V). Specifically, the power supply voltage detection unit 11 outputs the second power supply voltage detection signal PORB, which is "0 (off)" when the second power supply voltage (1.8V) is not being input, and is "1 (on)" when the second power supply voltage (1.8V) is being input.

[0018] Specifically, the "power supply voltage detection unit" compares the input voltage of the first power supply terminal VDD50 with a reference voltage using a comparator, and if the input voltage reaches a predetermined voltage, outputs a first power supply voltage detection signal LVDB that goes "1 (ON)." The "power supply voltage detection unit" also compares the input voltage of the second power supply terminal VRG with the reference voltage using a comparator, and if the input voltage reaches a predetermined voltage, outputs a second power supply voltage detection signal PORB that goes "1 (ON)." However, the "power supply voltage detection unit" may have any configuration, such as a comparator, inverter, or amplifier, as long as it can output "1" as the first power supply voltage detection signal LVDB and the second power supply voltage detection signal PORB when the first power supply voltage (5.0 V) and the second power supply voltage (1.8 V) are input.

[0019] The reset unit 12 restarts the digital processing unit 14 when an external reset signal RSTB is input via a reset signal input terminal RSTB.

[0020] The operation mode determination unit 13 determines an operation mode to be applied to the operation of the integrated circuit 10 based on the first power supply voltage detection signal LVDB, the second power supply voltage detection signal PORB, the first operation mode signal, and the second operation mode signal. Then, the operation mode determination unit 13 notifies the digital processing unit 14 of the determined operation mode.

[0021] Specifically, the operation mode determination unit 13 determines, as the operation mode to be applied to the operation of the integrated circuit 10, an operation mode corresponding to the combination of the value of the first operation mode signal and the value of the second operation mode signal when the first power supply voltage detection signal LVDB switches from "off" to "on" and the value of the first operation mode signal and the value of the second operation mode signal when the second power supply voltage detection signal PORB switches from "off" to "on".

[0022] (An example of a decision table) FIG. 2 is a diagram illustrating an example of a decision table included in the integrated circuit 10 according to an embodiment. As illustrated in FIG. 2, the integrated circuit 10 according to an embodiment has 16 operation modes (operation mode 1 to operation mode 16). The 16 operation modes include, for example, four operation modes: normal operation mode, inspection mode 1, inspection mode 2, and inspection mode 4, and four combinations of operation setting 1 and operation setting 2 for each operation mode. Examples of the inspection modes include a burn-in test mode, a test mode in which NVM related to reliability testing is not loaded, a test mode in which no NVM is loaded, and a scan test mode. Examples of the operation settings include whether or not to use an input filter for I2C (Inter-Integrated Circuit), whether or not to change the threshold, and the like.

[0023] In the decision table shown in FIG. 2, each of the 16 operation modes of the integrated circuit 10 is associated with a combination of four signal values ​​input to the integrated circuit 10 as a decision condition for determining the operation mode.

[0024] The four signal values ​​input to the integrated circuit 10 refer to the value of the first operating mode signal and the value of the second operating mode signal when the first power supply voltage detection signal LVDB switches from "0" to "1", and the value of the first operating mode signal and the value of the second operating mode signal when the second power supply voltage detection signal PORB switches from "0" to "1".

[0025] In the decision table shown in FIG. 2, "LVDB=1" means that the first power supply voltage detection signal LVDB switches from "0" to "1."

[0026] In the decision table shown in FIG. 2, "PORB=1" means that the second power supply voltage detection signal PORB has switched from "0" to "1."

[0027] In the decision table shown in FIG. 2, "TMODE1" means the value of the first operation mode signal input from the first operation mode signal input terminal TMODE1.

[0028] In the decision table shown in FIG. 2, "TMODE0" means the value of the second operation mode signal input from the second operation mode signal input terminal TMODE0.

[0029] Based on the determination table shown in Figure 2, the operation mode determination unit 13 determines, from the 16 operation modes possessed by the integrated circuit 10, the operation mode corresponding to the combination of four signal values ​​input to the integrated circuit 10 as the operation mode to be applied to the operation of the integrated circuit 10.

[0030] For example, if the value of the first operation mode signal and the value of the second operation mode signal when the first power supply voltage detection signal LVDB switches from "0" to "1" and the value of the first operation mode signal and the value of the second operation mode signal when the second power supply voltage detection signal PORB switches from "0" to "1" are all "0", the operation mode determination unit 13 determines "operation mode 1" as the operation mode to be applied to the operation of the integrated circuit 10 based on the determination table shown in FIG. 2.

[0031] (Example of operation timing of the integrated circuit 10) FIG. 3 is a diagram showing an example of operation timing of the integrated circuit 10 according to an embodiment.

[0032] As shown in FIG. 3, after the application of voltage to the first power supply terminal VDD50 starts (timing t1), when the voltage value of the first power supply terminal VDD50 reaches a predetermined voltage, the power supply voltage detection unit 11 switches the first power supply voltage detection signal LVDB from "0" to "1" (timing t2).

[0033] At this timing, the operation mode determination unit 13 latches the value of the first operation mode signal input from the first operation mode signal input terminal TMODE1 and the value of the second operation mode signal input from the second operation mode signal input terminal TMODE0.

[0034] Next, after the application of voltage to the second power supply terminal VRG begins (timing t3), when the voltage value of the second power supply terminal VRG reaches a predetermined voltage (timing t4), the power supply voltage detection unit 11 switches the second power supply voltage detection signal PORB from "0" to "1" (timing t5).

[0035] At this timing, the operation mode determination unit 13 latches the value of the first operation mode signal input from the first operation mode signal input terminal TMODE1 and the value of the second operation mode signal input from the second operation mode signal input terminal TMODE0.

[0036] Then, based on the determination table shown in Figure 2, the operation mode determination unit 13 determines the operation mode corresponding to the combination of the value of the first operation mode signal and the value of the second operation mode signal latched at timing t2 and the value of the first operation mode signal and the value of the second operation mode signal latched at timing t5 as the operation mode to be applied to the operation of the integrated circuit 10.

[0037] 3, the values ​​of the first and second operation mode signals latched at timing t2 and the values ​​of the first and second operation mode signals latched at timing t5 are all 0. In this case, the operation mode determination unit 13 determines "operation mode 1" as the operation mode to be applied to the operation of the integrated circuit 10 based on the determination table shown in FIG.

[0038] Furthermore, the operation mode determination unit 13 notifies the determined operation mode to the digital processing unit 14. As a result, the integrated circuit 10 operates in the operation mode determined by the operation mode determination unit 13.

[0039] (Another example of operation timing of the integrated circuit 10) FIG. 4 is a diagram showing another example of the operation timing of the integrated circuit 10 according to an embodiment.

[0040] As shown in FIG. 4, after the application of voltage to the first power supply terminal VDD50 starts (timing t21), when the voltage value of the first power supply terminal VDD50 reaches a predetermined voltage, the power supply voltage detection unit 11 switches the first power supply voltage detection signal LVDB from "0" to "1" (timing t22).

[0041] At this timing, the operation mode determination unit 13 latches the value of the first operation mode signal input from the first operation mode signal input terminal TMODE1 and the value of the second operation mode signal input from the second operation mode signal input terminal TMODE0.

[0042] Next, after the application of voltage to the second power supply terminal VRG begins (timing t23), when the voltage value of the second power supply terminal VRG reaches a predetermined voltage (timing t24), the power supply voltage detection unit 11 switches the second power supply voltage detection signal PORB from "0" to "1" (timing t25).

[0043] Thereafter, the external reset signal RSTB input from the reset signal input terminal RSTB switches from "1" to "0" (timing t26), and when the external reset signal RSTB switches from "0" to "1" (timing t27), at this timing, the operation mode determination unit 13 latches the value of the first operation mode signal input from the first operation mode signal input terminal TMODE1 and the value of the second operation mode signal input from the second operation mode signal input terminal TMODE0.

[0044] Then, based on the decision table shown in Figure 2, the operation mode determination unit 13 determines the operation mode corresponding to the combination of the value of the first operation mode signal and the value of the second operation mode signal latched at timing t22 and the value of the first operation mode signal and the value of the second operation mode signal latched at timing t27 as the operation mode to be applied to the operation of the integrated circuit 10.

[0045] 4, the values ​​of the first and second operation mode signals latched at timing t22 and the values ​​of the first and second operation mode signals latched at timing t27 are all 0. In this case, the operation mode determination unit 13 determines "operation mode 1" as the operation mode to be applied to the operation of the integrated circuit 10 based on the determination table shown in FIG.

[0046] Furthermore, the operation mode determination unit 13 notifies the determined operation mode to the digital processing unit 14. As a result, the integrated circuit 10 operates in the operation mode determined by the operation mode determination unit 13.

[0047] As described above, the integrated circuit 10 according to one embodiment includes a power supply terminal to which a power supply voltage is input, a power supply voltage detection unit 11 that outputs a power supply voltage detection signal according to the input state of the power supply voltage to the power supply terminal, an operation mode signal input terminal to which an operation mode signal is input, and an operation mode determination unit 13 that determines an operation mode based on the operation mode signal and the power supply voltage detection signal.

[0048] As a result, the integrated circuit 10 according to one embodiment can externally switch between as many operating modes as there are combinations of the values ​​of the operating mode signal and the power supply voltage detection signal. Because the power supply terminal is always provided in the integrated circuit, it can be used without increasing the number of input terminals. Therefore, the integrated circuit 10 according to one embodiment can externally switch between a greater number of operating modes without increasing the number of input terminals for switching the operating modes.

[0049] Moreover, an integrated circuit 10 according to one embodiment includes a first power supply terminal VDD50 to which a first power supply voltage (5.0V) is input, a second power supply terminal VRG to which a second power supply voltage (1.8V) is input, a first operation mode signal input terminal TMODE1 to which a first operation mode signal is input, and a second operation mode signal input terminal TMODE0 to which a second operation mode signal is input, and a power supply voltage detection unit 11 outputs a first power supply voltage detection signal LVDB corresponding to the input state of the first power supply voltage (5.0V) and a second power supply voltage detection signal PORB corresponding to the input state of the second power supply voltage (1.8V), and an operation mode determination unit 13 determines an operation mode based on the first power supply voltage detection signal LVDB, the second power supply voltage detection signal PORB, the first operation mode signal, and the second operation mode signal.

[0050] As a result, the integrated circuit 10 according to one embodiment can externally switch between the operation modes of the number of combinations (i.e., 16) of the first power supply voltage detection signal LVDB, the second power supply voltage detection signal PORB, the first operation mode signal, and the second operation mode signal. Therefore, the integrated circuit 10 according to one embodiment can externally switch between a larger number of operation modes without increasing the number of input terminals for switching the operation modes.

[0051] Furthermore, in the integrated circuit 10 according to one embodiment, the operation mode determination unit 13 determines, as the operation mode, an operation mode that corresponds to the combination of the value of the first operation mode signal and the value of the second operation mode signal when the first power supply voltage detection signal LVDB switches from "off" to "on" and the value of the first operation mode signal and the value of the second operation mode signal when the second power supply voltage detection signal PORB switches from "off" to "on".

[0052] As a result, the integrated circuit 10 according to one embodiment can assign different meanings to the values ​​of the first and second operation mode signals by utilizing the timing at which the first power supply voltage (5.0 V) is input and the timing at which the second power supply voltage (1.8 V) is input. That is, by acquiring the values ​​of the first and second operation mode signals at each of the two timings, the integrated circuit 10 according to one embodiment can double the number of combinations of the values ​​of the first and second operation mode signals (i.e., the number of switchable operation modes) without increasing the number of input terminals for switching the operation modes.

[0053] The integrated circuit 10 according to one embodiment can be applied to, for example, an AFE (Analog Front End) for connecting a plurality of sensors (e.g., a plurality of strain sensors for detecting a load applied to an object) and an MCU (Micro Control Unit). In this case, the integrated circuit 10 functioning as the AFE includes a multiplexer that selects one of a plurality of sensor signals output from a plurality of sensor signals, an amplifier that amplifies the sensor signal selected by the multiplexer, an AD converter that converts the sensor signal amplified by the amplifier from an analog signal to a digital signal, and a digital processing circuit (corresponding to the digital processing unit 14) that performs predetermined digital processing (e.g., digital filtering, data transmission to the MCU via I2C communication, etc.) on the sensor signal (digital signal) output from the AD converter.

[0054] Although one embodiment of the present invention has been described in detail above, the present invention is not limited to these embodiments, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims.

[0055] For example, in the integrated circuit 10 according to one embodiment, the operation mode determination unit 13 may determine an operation mode corresponding to a combination of the value of the first operation mode signal and the value of the second operation mode signal when the first power supply voltage detection signal LVDB switches from "off" to "on", the value of the first operation mode signal and the value of the second operation mode signal when the second power supply voltage detection signal PORB switches from "off" to "on", and the order in which the first power supply voltage detection signal LVDB and the second power supply voltage detection signal PORB switch from "off" to "on".

[0056] As a result, the integrated circuit 10 of one embodiment can externally switch between operation modes equal to the number of combinations (i.e., 32) of the first power supply voltage detection signal LVDB, the second power supply voltage detection signal PORB, the first operation mode signal, the second operation mode signal, and the order in which the first power supply voltage detection signal LVDB and the second power supply voltage detection signal PORB switch from "off" to "on."

[0057] Also, for example, in one embodiment, the integrated circuit is provided with two input terminals for inputting operation mode signals, but this is not limited to this. If the integrated circuit is provided with three or more input terminals for inputting operation mode signals, by using these three or more input terminals to switch the operation mode, it becomes possible to switch between a greater number of operation modes from the outside.

[0058] For example, in one embodiment, two power supply terminals are provided on the integrated circuit, but this is not limited thereto. If three or more power supply terminals are provided on the integrated circuit, by using these three or more power supply terminals to switch between operating modes, it becomes possible to switch between a greater number of operating modes from the outside.

[0059] In addition, for example, in the embodiment, an example has been described in which an external reset terminal is used in addition to a power supply terminal for switching between operation modes, but this is not limiting, and for example, an external reset terminal may be used instead of a power supply terminal for switching between operation modes. In this case, too, switching between a larger number of operation modes can be performed externally without increasing the number of input terminals for switching between operation modes. [Explanation of symbols]

[0060] 10 Integrated Circuits 12 Reset section 11 Power supply voltage detection unit 13 Operation mode determination unit 14 Digital Processing Section RSTB Reset signal input terminal TMODE1 First operation mode signal input pin TMODE0 Second operation mode signal input pin VDD50 First power supply pin VRG Second power supply terminal

Claims

1. a reset signal input terminal to which an external reset signal is input; an operation mode signal input terminal to which an operation mode signal is input; an operation mode determination unit that determines an operation mode based on the operation mode signal and the external reset signal; a power supply terminal to which a power supply voltage is input; a power supply voltage detection unit that outputs a power supply voltage detection signal corresponding to an input state of the power supply voltage to the power supply terminal; The operation mode determination unit determines an operation mode based on the operation mode signal, the external reset signal, and the power supply voltage detection signal.

1. An integrated circuit comprising:

2. At the timing when the external reset signal is switched, the operation mode determination unit latches the value of the operation mode signal input to the operation mode signal input terminal.

2. The integrated circuit of claim 1.

3. a first power supply terminal to which a first power supply voltage is input; the operation mode signal input terminal has a first operation mode signal input terminal to which a first operation mode signal is input, and a second operation mode signal input terminal to which a second operation mode signal is input, The power supply voltage detection unit outputting a first power supply voltage detection signal according to an input state of the first power supply voltage; The operation mode determination unit determining an operation mode based on the first power supply voltage detection signal, the external reset signal, the first operation mode signal, and the second operation mode signal; 2. The integrated circuit of claim 1.

4. The operation mode determination unit An operation mode corresponding to a combination of the value of the first operation mode signal and the value of the second operation mode signal when the first power supply voltage detection signal switches from "off" to "on" and the value of the first operation mode signal and the value of the second operation mode signal when the external reset signal switches from "off" to "on" is determined as the operation mode.

4. The integrated circuit of claim 3.

5. The operation mode determination unit When the first power supply voltage detection signal switches from "off" to "on", the value of the first operation mode signal and the value of the second operation mode signal are latched, and when the external reset signal switches from "off" to "on", the value of the first operation mode signal and the value of the second operation mode signal are latched, and the operation mode corresponding to the combination of the four latched values ​​is determined as the operation mode.

4. The integrated circuit of claim 3.

6. The operation mode determination unit An operation mode corresponding to a combination of the value of the first operation mode signal and the value of the second operation mode signal when the first power supply voltage detection signal switches from "off" to "on", the value of the first operation mode signal and the value of the second operation mode signal when the external reset signal switches from "off" to "on", and the order in which the first power supply voltage detection signal and the external reset signal switch from "off" to "on" is determined as the operation mode.

4. The integrated circuit of claim 3.

Citation Information

Patent Citations

  • microcomputer

    JP1997204412A

  • Semiconductor integrated circuit

    JP2004045090A

  • Semiconductor integrated circuit device, design automating device and method, and program

    JP2004260093A

  • Test mode setting circuit

    JP2005331311A

  • Operation mode control circuit for information processor and information processor

    JP2008204087A