Overcurrent detection circuit

Abstract

To provide an over-current detecting circuit capable of detecting an over-current without utilizing a shunt resistor.SOLUTION: A MOS transistor T1 inputs an input voltage VIN from an input terminal 12. A first body diode D1 of a MOS transistor T2 is connected in series with, in an opposite direction to each other, a second body diode D2 of the MOS transistor T2 for output voltage control. When the input voltage VIN is compared with an output voltage VOUT and the output voltage VOUT is hight, the MOS transistor T1 is configured to turn off so as to suppress a wraparound current from an output terminal 12 to the input terminal 11. An operational amplifier OP2 detects the over-current of an output current IOUT from a power supply LA based on a difference in voltage between a voltage VN1 depending on the voltage drop by the first body diode D1 and a voltage VN2 depending on the voltage drop by a third body diode D3.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to an overcurrent detection circuit. [Background technology]

[0002] This type of overcurrent detection circuit is disclosed, for example, in Patent Document 1. In the technology described in Patent Document 1, a comparator detects the current flowing between the input and output terminals based on the terminal voltage of a shunt resistor connected in series between the power supply input terminal and the power supply output terminal. A switching circuit turns off a first transistor when a detected value of the current flowing from the power supply output terminal to the power supply input terminal exceeds a first detection threshold. The switching circuit also turns off a second transistor when a detected value of the current flowing from the power supply input terminal to the power supply output terminal exceeds a second detection threshold. In other words, an overcurrent is detected by detecting the potential difference across the shunt resistor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-090587 Summary of the Invention [Problem to be solved by the invention]

[0004] In the technology described in Patent Document 1, the input voltage must be higher than the output voltage by at least the amount of voltage drop caused by the shunt resistor. Because heat is generated based on the current flowing through the shunt resistor, it is desirable to keep the power supply voltage as low as possible. However, because the shunt resistor causes a voltage drop, it is necessary to increase the power supply voltage to meet the requirements.

[0005] An object of the present disclosure is to provide an overcurrent detection circuit that can detect an overcurrent without using a shunt resistor. [Means for solving the problem]

[0006] The invention of claim 1 is directed to an overcurrent detection circuit for a series regulator type power supply. An output voltage control MOS transistor with a second body diode outputs power from an output terminal. An input voltage is input to the input terminal of a MOS transistor with a first body diode, and the MOS transistor with a first body diode is connected in series with the second body diode of the output voltage control MOS transistor in the reverse direction. A sense MOS transistor with a third body diode receives an input voltage and a current flows through it.

[0007] At this time, when the input voltage and output voltage are compared and the output voltage becomes higher than normal, the MOS transistor turns off to prevent leakage current from the output terminal to the input terminal.The overcurrent detection unit detects overcurrent in the output current of the power supply based on the differential voltage between the voltage dependent on the voltage drop across the first body diode of the MOS transistor and the voltage dependent on the voltage drop across the third body diode of the sense MOS transistor.This makes it possible to detect overcurrent without using a shunt resistor. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a schematic diagram illustrating an electrical configuration of a first embodiment. [Figure 2] Time chart showing changes in voltage, current, etc. in the first embodiment [Figure 3] FIG. 10 is an electrical configuration diagram illustrating a second embodiment. [Figure 4] FIG. 10 is an electrical configuration diagram illustrating a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, several embodiments will be described with reference to the drawings. In the embodiments described below, components that perform the same or similar operations will be denoted by the same or similar reference numerals, and descriptions thereof may be omitted as necessary.

[0010] (First embodiment) A first embodiment will be described with reference to Figures 1 and 2. A power supply circuit 1 is used, for example, in an ECU mounted on a vehicle. The power supply circuit 1 includes a power supply LA in the form of a series regulator that steps down an input voltage VIN provided from, for example, an on-board battery via an input terminal 11, and outputs an output voltage VOUT having a desired voltage value from an output terminal 12. The steady-state value of the input voltage VIN is, for example, 12V, and the target value of the output voltage VOUT is set to 5V.

[0011] The power supply circuit 1 includes transistors T1 to T4, a switching circuit SW1, a comparator CP1, operational amplifiers OP1 and OP2, a reference voltage generating circuit Vref1, voltage dividing resistors R1 and R2, and constant current sources Isrc1 and Isrc2.

[0012] Transistors T1 to T3 are all configured as N-channel power MOS transistors, and body diodes D1 to D3, with the source side acting as the anode, are configured as parasitic diodes between the source and drain of each transistor. Transistor T3 is configured as a sense MOS transistor that is smaller than transistor T1 and senses a current that is dependent on and proportional to the current passing through transistor T1. By adjusting the sizes of transistors T1 and T3, it is possible to adjust the amount of voltage drop from the input voltage VIN when each of transistors T1 and T3 is off.

[0013] The series regulator type power supply LA is composed of an operational amplifier OP1, a transistor T2, and voltage-dividing resistors R1 and R2. A reference voltage Vref is input to the non-inverting input terminal of the operational amplifier OP1 from the reference voltage generating circuit GR. The gate of the transistor T2 is connected to the output of the operational amplifier OP1 and the transistor T2 is configured as an output voltage control MOS transistor. A second body diode D2 is attached to the transistor T2. The second body diode D2 is configured with the output terminal 12 side as the anode and the drain node N1 as the cathode.

[0014] The source of the transistor T2 is connected to an output terminal 12 that outputs an output voltage VOUT. Voltage-dividing resistors R1 and R2 are connected between the source of the transistor T2 and the ground node, and the voltage at the common connection point of the voltage-dividing resistors R1 and R2 is fed back to the inverting input terminal of the operational amplifier OP1. The transistor T2 forms a negative feedback loop for the operational amplifier OP1 and controls the output voltage VOUT.

[0015] Transistor T1 is composed of a MOS transistor equipped with a first body diode D1, and receives an input voltage VIN from input terminal 11 at its source. The drains of transistors T1 and T2 form a common node. The first body diode D1 is connected in series with the second body diode D2 of transistor T2 in the opposite directions.

[0016] Specifically, the first body diode D1 of the transistor T1 is configured with its anode facing the input terminal 11 and its cathode facing the output terminal 12. The second body diode D2 of the transistor T2 is configured with its anode facing the output terminal 12 and its cathode facing the input terminal 11. The drain common connection point of the transistors T1 and T2 is a node N1.

[0017] Node N1 is connected to the inverting input terminal of operational amplifier OP2 and to constant current source Isrc1, which is configured to draw a constant current from node N1 to the ground node. A resistor may be used in place of constant current source Isrc1. This applies a voltage VN1, which serves as a reference for overvoltage detection, to node N1, the inverting input terminal of operational amplifier OP2.

[0018] The source-drain of transistor T3 and constant current source Isrc2 are connected between input terminal 11, which inputs input voltage VIN, and the ground node. Transistor T3 is a MOS transistor that receives input voltage VIN at its source and through which the current of constant current source Isrc2 flows, and is equipped with a third body diode D3.

[0019] The common connection point between the drain of transistor T3 and constant current source Isrc2 is node N2, and third body diode D3 is configured with its source on the input terminal 11 side as its anode and node N2 as its cathode. Constant current source Isrc2 is configured to draw a constant current from node N2 to the ground node.

[0020] Node N2 is connected to the non-inverting input terminal of operational amplifier OP2. The output of operational amplifier OP2 is connected to the gate of transistor T4. The drain of transistor T4 is connected to the gate of transistor T2, and the source is connected to the ground node. Transistor T4 is an N-channel MOS transistor and is provided as an adjustment transistor to adjust the gate voltage of transistor T2.

[0021] The operational amplifier OP2 operates as an amplifier, providing feedback to the power supply LA for negative feedback. If the voltage VN2 at node N2 becomes higher than the voltage VN1 at node N1, causing the output of the operational amplifier OP2 to increase, the drain current of transistor T4 increases, thereby lowering the gate voltage of transistor T2. This reduces the output current IOUT. Conversely, if the voltage VN2 at node N2 becomes lower than the voltage VN1 at node N1, causing the output of the operational amplifier OP2 to decrease, the drain current of transistor T4 decreases, thereby increasing the gate voltage of transistor T2. This reduces the output current IOUT. The power supply LA can maintain the value of the output current IOUT at a constant level. The operational amplifier OP2 and transistor T4 function as an abnormal operation protection circuit, and the operational amplifier OP2 is configured as an overcurrent detection unit that detects overcurrents in the output current IOUT flowing from the output terminal 12.

[0022] The gates of the transistors T1 and T3 are connected in common, and a switching circuit SW1 is configured to switch between inputting an on-voltage Von or an off-voltage Voff to the gates of the transistors T1 and T3.

[0023] The comparator CP1 is configured to receive the input voltage VIN at its non-inverting input terminal and the output voltage VOUT at its inverting input terminal. The switching circuit SW1 switches between inputting an on-voltage Von or an off-voltage Voff to the gates of the transistors T1 and T3 based on the output of the comparator CP1.

[0024] The switching circuit SW1 outputs an on-voltage Von when the output of the comparator CP1 is at H level, and outputs an off-voltage Voff when the output is at L level. When the switching circuit SW1 outputs the on-voltage Von, the transistor T1 is turned on. When the switching circuit SW1 outputs the off-voltage Voff, the transistor T1 is turned off.

[0025] The following describes the monitoring operation of the input voltage VIN, output voltage VOUT, and output current IOUT. Comparator CP1 compares the input voltage VIN with the output voltage VOUT, and switching circuit SW1 outputs an on-voltage Von or an off-voltage Voff to the gates of transistors T1 and T3 according to the comparison result of comparator CP1.

[0026] The output terminal 12 of the power supply LA is connected to the outside of the ECU via a wire, for example. This means that the wire may short out to a high-voltage or low-voltage part outside the ECU. During normal operation, the target value of the output voltage VOUT is less than the steady-state value of the input voltage VIN. At this time, the transistor T1 remains on.

[0027] For example, if the wiring of the output terminal 12 shorts out to an external high-voltage part, the input voltage VIN becomes smaller than the output voltage VOUT. Since the output voltage VOUT becomes higher than the input voltage VIN, the switching circuit SW1 outputs the off voltage Voff, and the transistor T1 turns off.

[0028] Even if the voltage at node N1 becomes higher than the voltage at input terminal 11 when transistor T1 is turned off, current flow through first body diode D1 can be blocked, preventing current from flowing from output terminal 12 to input terminal 11. In other words, first body diode D1 is provided to prevent current from flowing from the drain of transistor T2 to input terminal 11, where input voltage VIN is present, when output voltage VOUT is higher than input voltage VIN.

[0029] Next, with reference to Figure 2, we will explain the overcurrent detection operation of the output current IOUT when the output terminal 12 is shorted to an external low-voltage part. Figure 2 shows an enlarged schematic diagram of the transient operation. Please note that this is a diagram for explaining the operating principle, and the actual waveforms may differ.

[0030] While the power supply LA is outputting the output voltage VOUT, the operational amplifier OP2 compares a voltage VN1 that depends on the voltage drop across the first body diode D1 of the transistor T1 with a voltage VN2 that depends on the voltage drop across the third body diode D3 of the transistor T3.

[0031] The transistor T2 operates normally, but if the output terminal 12 is shorted to the low voltage portion due to some influence, an overcurrent flows from the input terminal 11 to the output terminal 12 side through the transistors T1 and T2.

[0032] The voltage VN1 at node N1 decreases as more current flows toward the output terminal 12. When the output current IOUT reaches the overcurrent detection threshold Ith, the voltage drop across transistor T1 increases, causing the voltage VN1 at node N1 to become smaller than the voltage VN2 at node N2.

[0033] As a result, at timing t2 in Figure 2, the output of operational amplifier OP2 is fed back to the gate of transistor T4, adjusting the drain voltage of transistor T4. By adjusting the gate input voltage of transistor T2, the output current IOUT can be controlled, preventing overcurrent of the output current IOUT.

[0034] <Summary of Comparative Example and This Embodiment> Conventionally, there has been a method of detecting overcurrent by inserting a shunt resistor, but this is not preferable because it requires a high power supply voltage.

[0035] According to this embodiment, the input voltage VIN and the output voltage VOUT are compared, and a transistor T1 is provided to prevent sneak current from flowing from the output terminal 12 to the input terminal 11 when the output voltage VOUT becomes high. An operational amplifier OP2 detects an overcurrent in the output current IOUT of the power supply LA based on the differential voltage between a voltage VN1 that depends on the voltage drop across the first body diode D1 of the transistor T1 and a voltage VN2 that depends on the voltage drop across the third body diode D3 of the transistor T3. This makes it possible to detect an overcurrent without inserting a shunt resistor, eliminating the need to increase the power supply voltage.

[0036] (Second embodiment) The second embodiment will be described with reference to FIG. The power supply circuit 21, which replaces the power supply circuit 1, includes a switch SW2 at the output of the operational amplifier OP2. The rest of the configuration of the power supply circuit 21 is the same as that of the power supply circuit 1, so a description thereof will be omitted. The switch SW2 is configured to use the output of the operational amplifier OP2 as a control signal, and applies an on-voltage Von2 / off-voltage Voff2 to the transistor T4 to limit the current flowing through the transistor T2, thereby limiting the function of the power supply LA.

[0037] When the output of the operational amplifier OP2 is at a low level, the switch SW2 is in the normal state, the switch SW2 outputs the off-voltage Voff2, and the transistor T4 remains in the off state. Conversely, when the output of the operational amplifier OP2 is at a high level, the switch SW2 outputs the on-voltage Von2, and the transistor T4 is in the fully on state. Since the gate voltage of the transistor T2 is zero, the transistor T2 is turned off.

[0038] This allows the output current IOUT and output voltage VOUT to be cut off. According to this embodiment, a switch SW2 is provided at the output of the operational amplifier OP2, and the switch SW2 shapes the waveform and applies an on-voltage Von2 / off-voltage Voff2 to the gate of the transistor T4. This allows the transistor T2 to be stably turned off without being affected as much as possible by the output characteristics of the operational amplifier OP2. This provides the same effects as those of the previous embodiment.

[0039] (Third embodiment) The third embodiment will be described with reference to FIG. A power supply circuit 31, which replaces the power supply circuits 1 and 21, includes NPN bipolar transistors NPN1 and NPN2 and PNP bipolar transistors PNP1 and PNP2.

[0040] The bipolar transistors NPN1 and PNP1 are diode-connected by connecting their bases and collectors. These diode-connected bipolar transistors NPN1 and PNP1 are forward-connected between the common drain node of transistors T1 and T2 and node N1, forming a level shift circuit LV1. The level shift circuit LV1 shifts the voltage of the common drain node of transistors T1 and T2 by twice the forward voltage Vf, and inputs it as voltage VN1 to the inverting input terminal of operational amplifier OP2.

[0041] The bipolar transistors NPN2 and PNP2 are diode-connected by connecting their bases and collectors. These diode-connected bipolar transistors NPN2 and PNP2 are forward-connected between the drain node of transistor T3 and node N2, forming level shift circuit LV2. The level shift circuit LV2 shifts the voltage at the drain node of transistor T3 by twice the forward voltage Vf, and inputs it as voltage VN2 to the non-inverting input terminal of operational amplifier OP2.

[0042] This allows the operational amplifier OP2 to compare voltages VN1 and VN2 that have been level-shifted by the same voltage using the level shift circuits LV1 and LV2. According to this embodiment, by providing the level shift circuits LV1 and LV2, each voltage can be adjusted to match the input voltage of the operational amplifier OP2. This has the effect of preventing backflow of current to the input nodes N1 and N2 of the operational amplifier OP2.

[0043] (Other embodiments) The present disclosure is not limited to the above-described embodiment, and for example, the following modifications or extensions are possible. Although the configuration has been shown in which transistor T4 turns on and transistor T2 turns off when an overcurrent is detected, it is not necessary to turn transistor T2 off. The overcurrent can also be reduced by lowering the gate voltage of transistor T2 to reduce the current flowing between the drain and source of transistor T2. Resistors and resistive elements can also be used instead of constant current sources Isrc1 and Irc2. This is because it is sufficient to pass current.

[0044] Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure. [Explanation of symbols]

[0045] In the drawing, OP2 is an operational amplifier (overcurrent detection section), T1 is a transistor (MOS transistor), D1 is a first body diode, T2 is a transistor (MOS transistor for output voltage control), D2 is a second body diode, T3 is a transistor (sense MOS transistor), D3 is a third body diode, T4 is a transistor (adjustment transistor), and SW2 is a switch.

Claims

1. An overcurrent detection circuit for a series regulator type power supply, an output voltage control MOS transistor (T2) with a second body diode (D2) that outputs the power supply from an output terminal; an MOS transistor (T1) that receives an input voltage from an input terminal and has a first body diode (D1) connected in series in the opposite directions to the second body diode (D2) of the output voltage control MOS transistor; a sense MOS transistor (T3) with a third body diode (D3) through which a current flows when the input voltage is input; When the input voltage and the output voltage are compared and the output voltage becomes higher, the MOS transistor (T1) is turned off to prevent sneak current from the output terminal to the input terminal, an overcurrent detection circuit comprising an overcurrent detection unit (OP2) that detects an overcurrent in the output current of the power supply based on a differential voltage between a voltage (VN1) that depends on a voltage drop across a first body diode of the MOS transistor (T1) and a voltage (VN2) that depends on a voltage drop across a third body diode of the sense MOS transistor (T3).

2. the overcurrent detection unit is configured by a comparator, an adjustment transistor (T4) that adjusts the gate voltage of the output voltage control MOS transistor; a switch (SW2) that uses the output of the comparator as a control signal; 2. The overcurrent detection circuit according to claim 1, wherein the switch applies an on-voltage / off-voltage to the adjustment transistor to limit the current flowing through the output voltage control MOS transistor (T2), thereby limiting the function of the power supply.

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