Information processing device and method for starting the information processing device

Abstract

To shorten the activation time of an information processing apparatus.SOLUTION: Each of information processing apparatuses 100, 101 has a plurality of processors 11, 12 and 13, a non-volatile memory 30 storing a plurality of programs 20, 21, 22, and 23, a volatile memory 40 accessed by the plurality of processors, a transfer unit 50 for successively transferring the plurality of programs from the non-volatile memory to the volatile memory, and an activation instructing unit 60 for issuing instructions for activation of one program among the plurality of programs to each of the plurality of processors. The transfer unit notifies the activation instructing unit of completion of transfer of the program whenever completing the transfer of each of the programs. Whenever receiving the notification from the transfer unit, the activation instructing unit issues the activation instructions to a processor set as a processor executing the transferred program among the plurality of processors.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to an information processing device and a method for starting up an information processing device. [Background technology]

[0002] Various techniques have been proposed to shorten the startup time of an information processing device equipped with multiple processors. For example, Patent Document 1 discloses a technique for shortening the startup time of the device by providing a startup instruction unit that executes a startup instruction to each processor and starting up three processors in parallel. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-113137 Summary of the Invention [Problem to be solved by the invention]

[0004] During startup processing, each program executed by each processor is transferred from non-volatile memory to volatile memory. In the communication device described in Patent Document 1, the startup instruction is executed by the startup instruction unit after all programs are transferred to volatile memory, so there is room for improvement in shortening the startup time of the device. [Means for solving the problem]

[0005] The present disclosure can be realized in the following forms.

[0006] According to one aspect of the present disclosure, there is provided an information processing device (100, 101), comprising: a plurality of processors (11, 12, 13); a non-volatile memory (30) storing a plurality of programs (20, 21, 22, 23); a volatile memory (40) accessed by the plurality of processors; a transfer unit (50) that sequentially transfers the plurality of programs from the non-volatile memory to the volatile memory; and a start instruction unit (60) that executes a start instruction for one of the plurality of programs for each of the plurality of processors, wherein the transfer unit notifies the start instruction unit of the completion of transfer of the program each time the transfer of each of the programs is completed, and the start instruction unit executes the start instruction for a processor, among the plurality of processors, that is set as a processor to execute the program for which the transfer has been completed each time the transfer unit receives a notification from the transfer unit.

[0007] According to this form of information processing device, the transfer unit notifies the startup instruction unit of the completion of the transfer each time the transfer of a program from non-volatile memory to volatile memory is completed, and the startup instruction unit executes a startup instruction for the processor set as the processor that will execute the program whose transfer has been completed each time it receives a notification of the completion of the transfer, thereby shortening the startup time compared to a configuration in which the startup instruction is executed after all programs have been transferred to volatile memory. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a block diagram schematically illustrating a configuration of an information processing device according to an embodiment of the present disclosure. [Figure 2] 4 is a flowchart showing the procedure of a startup process according to the first embodiment. [Figure 3] 10 is a time series graph showing the startup process of an example in the first embodiment. [Figure 4] 10 is a time series graph showing a startup process of a comparative example in the first embodiment. [Figure 5] FIG. 10 is a block diagram schematically illustrating the configuration of an information processing apparatus according to a second embodiment. [Figure 6] 10 is a flowchart showing the procedure of a startup process according to a second embodiment. [Figure 7] 10 is a time series graph showing the startup process of an example in the second embodiment. [Figure 8] 10 is a time series graph showing a startup process of a comparative example in the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] A. First embodiment: A1.Device configuration: The information processing device 100 shown in FIG. 1 includes a non-volatile memory 30, a transfer unit 50, a volatile memory 40, a startup instruction unit 60, a first processor 11, a second processor 12, and a third processor 13.

[0010] The nonvolatile memory 30 stores an initial startup program 20, a first program 21, a second program 22, and a third program 23. The nonvolatile memory 30 is, for example, a ROM (Read Only Memory). The initial startup program 20 is a program that is directly read into the processor when the processor is started and starts up the processor. The first program 21, the second program 22, and the third program 23 are each any program that is executed when the information processing device 100 is started up. The first program 21, the second program 22, and the third program 23 are executed after being transferred from the nonvolatile memory 30 to the volatile memory 40 by a transfer unit 50 (described later).

[0011] When the information processing device 100 is started up, the transfer unit 50 transfers the first program 21, the second program 22, and the third program 23 stored in the non-volatile memory 30 to the volatile memory 40 in that order. The volatile memory 40 is, for example, a dynamic random access memory (DRAM). The order in which the programs are transferred is set in advance. In this embodiment, the first program 21, the second program 22, and the third program 23 are transferred in this order. Each time the transfer of one program is completed, the transfer unit 50 notifies the start instruction unit 60 of the completion of the transfer of that program.

[0012] Each time the start instruction unit 60 receives a transfer completion notification from the transfer unit 50, it executes a start instruction to one of the first processor 11, the second processor 12, and the third processor 13 that will execute the transferred program. The "processor that will execute the transferred program" is a processor that is pre-set and associated with the program to be executed. The "start instruction" is an instruction to cause a processor to execute a program. In this embodiment, the first processor 11 executes the first program 21, the second processor 12 executes the second program 22, and the third processor 13 executes the third program 23. That is, when the start instruction unit 60 receives a transfer completion notification for the first program 21, it executes a start instruction to the first processor 11. When the start instruction unit 60 receives a transfer completion notification for the second program 22, it executes a start instruction to the second processor 12. When the start instruction unit 60 receives a transfer completion notification for the third program 23, it executes a start instruction to the third processor 13.

[0013] When the first processor 11 receives a startup instruction from the startup instruction unit 60, it starts up by accessing the nonvolatile memory 30 and executing the initial startup program 20. When the startup is complete, the first processor 11 accesses the volatile memory 40 and executes the first program 21.

[0014] When the second processor 12 receives a startup instruction from the startup instruction unit 60, it starts up by accessing the nonvolatile memory 30 and executing the initial startup program 20. When the startup is complete, the second processor 12 accesses the volatile memory 40 and executes the second program 22.

[0015] When the third processor 13 receives a startup instruction from the startup instruction unit 60, it starts up by accessing the nonvolatile memory 30 and executing the initial startup program 20. When the startup is complete, the third processor 13 accesses the volatile memory 40 and executes the third program 23.

[0016] A2. Startup process: When the information processing device 100 is started up, it executes the start-up process shown in FIG.

[0017] The transfer unit 50 transfers the first program 21, the second program 22, and the third program 23 stored in the nonvolatile memory 30 to the volatile memory 40 in this order (step S105).

[0018] Each time the transfer of a program from the non-volatile memory 30 to the volatile memory 40 is completed, the transfer unit 50 notifies the boot instruction unit 60 of the completion of the transfer of the program (step S110). Specifically, when the transfer of the first program 21 is completed, the transfer unit 50 notifies the boot instruction unit 60 of the completion of the transfer of the first program 21, when the transfer of the second program 22 is completed, the transfer unit 50 notifies the boot instruction unit 60 of the completion of the transfer of the second program 22, and when the transfer of the third program 23 is completed, the transfer unit 50 notifies the boot instruction unit 60 of the completion of the transfer of the third program 23. In other words, it can be said that the process of step S105 and the process of step S110 are partially executed in parallel.

[0019] Each time the start instruction unit 60 receives a transfer completion notification from the transfer unit 50, it executes a start instruction to the processor among the first processor 11, the second processor 12, and the third processor 13 that is set as the processor that will execute the program whose transfer has been completed (step S115). Specifically, when the start instruction unit 60 receives a transfer completion notification for the first program 21, it executes a start instruction to the first processor 11, when it receives a transfer completion notification for the second program 22, it executes a start instruction to the second processor 12, and when it receives a transfer completion notification for the third program 23, it executes a start instruction to the third processor 13.

[0020] As in the information processing device 100 of the first embodiment, the transfer unit 50 notifies the startup instruction unit 60 of the completion of the transfer each time the transfer of a program from the non-volatile memory 30 to the volatile memory 40 is completed, and the startup instruction unit 60 executes a startup instruction to the processor set as the processor that will execute the program whose transfer has been completed each time it receives a notification of the completion of the transfer.The reason for this is explained below.

[0021] In the time series graph shown in FIG. 3, the processing of the transfer unit 50, the first processor 11, the second processor 12, and the third processor 13 of the information processing device 100 according to the first embodiment is shown in chronological order from left to right. For ease of explanation, the startup of each processor by executing the initial startup program 20 is omitted. The first program 21, the second program 22, and the third program 23 have increasing sizes in this order. As shown in FIG. 3, when the information processing device 100 boots up, the transfer of the first program 21 begins at time t0. When the transfer of the first program 21 is completed at time t1, the transfer unit 50 notifies the startup instruction unit 60 of the completion of the transfer of the first program 21, and the startup instruction unit 60 instructs the first processor 11 to start the first program 21. The first processor 11 executes the first program 21 in accordance with the startup instruction. Furthermore, when the transfer of the first program 21 is completed at time t1, the transfer unit 50 starts transferring the second program 22. That is, at time t1, the execution of the first program 21 by the first processor 11 and the transfer of the second program 22 by the transfer unit 50 are performed almost simultaneously.

[0022] When the transfer of the second program 22 is completed at time t2, the transfer unit 50 notifies the start instruction unit 60 of the completion of the transfer of the second program 22, and the start instruction unit 60 instructs the second processor 12 to start the second program 22. The second processor 12 executes the second program 22 in accordance with the start instruction. Furthermore, when the transfer of the second program 22 is completed at time t2, the transfer unit 50 starts transferring the third program 23. That is, at time t2, the execution of the second program 22 by the second processor 12 and the transfer of the third program 23 by the transfer unit 50 are performed almost simultaneously.

[0023] When the transfer of the third program 23 is completed at time t3, the transfer unit 50 notifies the start-up instruction unit 60 of the completion of the transfer of the third program 23, and the start-up instruction unit 60 instructs the third processor 13 to start the third program 23. The third processor 13 executes the third program 23 in accordance with the start-up instruction. When the execution of the third program 23 is completed at time t4, the start-up process of the information processing device 100 is completed.

[0024] On the other hand, in the start-up process of the information processing apparatus of the comparative example shown in FIG. 4, after all programs are transferred by the transfer unit 50 in the start-up process, each program is started by each processor. Specifically, the transfer unit 50 starts the program at time t 10 The transfer of the first program 21 starts at time t 11 When the transfer of the first program 21 is completed at time t 12 When the transfer of the second program 22 is completed at time t 13 When the transfer of the third program 23 is completed at time t, the first processor 11 executes the first program 21, the second processor 12 executes the second program 22, and the third processor 13 executes the third program 23. 14 When the execution of all the programs is completed, the startup process of the information processing device is completed.

[0025] The time from time t0 to time t4 in FIG. 3 and the time t 10 From time t 14 As is clear from a comparison of the time required to start up the information processing device 100 of the first embodiment and the time required to start up the information processing device of the comparative example, the time required to start up the information processing device 100 of the first embodiment is shorter than the time required to start up the information processing device of the comparative example. This is because the information processing device 100 of the first embodiment does not wait for all programs to be transferred by the transfer unit 50 during the start-up process, but instead executes programs in order starting from the programs for which transfer has been completed.

[0026] According to the information processing device 100 of the first embodiment described above, the transfer unit 50 notifies the startup instruction unit 60 of the completion of the transfer each time the transfer of a program from the non-volatile memory 30 to the volatile memory 40 is completed, and the startup instruction unit 60 executes a startup instruction for the processor set as the processor that will execute the program whose transfer has been completed each time it receives a notification of the completion of the transfer, thereby shortening the startup time.

[0027] B. Second embodiment: B1. Equipment configuration: 5 differs from the information processing device 100 of the first embodiment in that it further includes an initialization processor 14, a memory monitoring unit 70, and an initialization program 24 stored in non-volatile memory 30. It also differs from the information processing device 100 of the first embodiment in that a transfer unit 50 transfers a program every time a notification is received from the memory monitoring unit 70. The other configuration of the information processing device 101 of the second embodiment is the same as that of the information processing device 100 of the first embodiment, and therefore the same configuration is denoted by the same reference numerals and detailed description thereof will be omitted.

[0028] When the information processing device 101 starts up, the initialization processor 14 starts up by executing the initial startup program 20 stored in the nonvolatile memory 30. When the startup is complete, the initialization processor 14 executes the initialization program 24 stored in the nonvolatile memory 30 to initialize the volatile memory 40. The initialization of the volatile memory 40 is performed before the transfer unit 50 transfers each program described above.

[0029] The memory monitoring unit 70 monitors the storage area of ​​the volatile memory 40 and notifies the transfer unit 50. Specifically, each time the initialization processor 14 sequentially initializes the storage areas required to read the first program 21, the second program 22, and the third program 23, which are transferred sequentially by the transfer unit 50, into the volatile memory 40, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the programs to be transferred from the non-volatile memory 30 to the initialized storage areas. The "programs to be transferred" refer to programs to be transferred in a predetermined order. In this embodiment, the programs are transferred in the order of the first program 21, the second program 22, and the third program 23. Specifically, for example, when the storage area required to read the first program 21 is initialized by the initialization processor 14, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the first program 21. Next, when the memory area required to read the second program 22 is initialized, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the second program 22, and when the memory area required to read the third program 23 is initialized, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the third program 23.

[0030] The transfer unit 50 transfers the program from the non-volatile memory 30 to the volatile memory 40 every time it receives a notification from the memory monitoring unit 70. As in the first embodiment, the transfer unit 50 notifies the start instruction unit 60 of the completion of the transfer of the program every time the transfer of the program is completed.

[0031] B2. Startup process: 6 differs from the startup process of the first embodiment in that steps S205 and S210 are executed before step S105, and in that step S106 is executed instead of step S105. The other steps in the startup process of the second embodiment are the same as those in the startup process of the first embodiment, so the same steps are denoted by the same reference numerals and detailed descriptions thereof will be omitted.

[0032] The initialization processor 14 executes initialization of the volatile memory 40 (step S205). The initialization processor 14 executes the initialization program 24 and executes initialization of the storage area of ​​the volatile memory 40.

[0033] The memory monitoring unit 70 monitors the storage area of ​​the volatile memory 40 and notifies the transfer unit 50 to transfer the program (step S210). The memory monitoring unit 70 monitors the storage area of ​​the volatile memory 40 that is initialized by the initialization processor 14, and each time the storage areas required to read each of the first program 21, the second program 22, and the third program 23 into the volatile memory 40 are sequentially initialized by the initialization processor 14, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the program to be transferred to the initialized storage area from the non-volatile memory 30 to the volatile memory 40.

[0034] Every time the transfer unit 50 receives a notification from the memory monitoring unit 70, it transfers the program from the nonvolatile memory 30 to the volatile memory 40 (step S106).

[0035] Note that the processes of steps S205, S210, and S106 may be executed in parallel. Specifically, when initialization of the storage area required to read the first program 21 is completed, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the first program 21, and the transfer of the first program 21 begins. Even during the transfer of the first program 21, initialization of the volatile memory 40 is executed, and when initialization of the storage area required to read the second program 22 is completed, the transfer of the second program 22 begins. In this way, the initialization of the volatile memory 40 in step S205, the monitoring of the volatile memory 40 by the memory monitoring unit 70 and notification to the transfer unit 50 in step S210, and the transfer of the program by the transfer unit 50 in step S106 may be executed in parallel.

[0036] The effects of the information processing device 101 of the second embodiment, in which the initialization processor 14 initializes the volatile memory 40, the memory monitoring unit 70 monitors the storage area of ​​the volatile memory 40 and notifies the transfer unit 50 each time the storage area for reading a program is initialized, and the transfer unit 50 transfers the program from the non-volatile memory 30 to the volatile memory 40 each time it receives the notification, are described below.

[0037] 7, the processes of the transfer unit 50, the first processor 11, the second processor 12, the third processor 13, and the initialization processor 14 of the information processing device 101 of the second embodiment are shown in chronological order from left to right on the page. For the sake of explanation, the startup of each processor by executing the initial startup program 20 is omitted.

[0038] As shown in FIG. 7, when the information processing device 101 is started, at time t 20 The initialization processor 14 starts the initialization of the volatile memory 40 at .

[0039] time t 21 When initialization of the memory area (hereinafter referred to as the "first area") required to read the first program 21 is completed, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the first program 21, and the transfer unit 50 executes the transfer of the first program 21.

[0040] time t 22 When the transfer of the first program 21 is completed, the transfer unit 50 notifies the start-up instruction unit 60 of the completion of the transfer of the first program 21, and the start-up instruction unit 60 executes a start-up instruction to the first processor 11. The first processor 11 executes the first program 21 in accordance with the start-up instruction.

[0041] time t 23When initialization of the memory area (hereinafter referred to as the "second area") required to read the second program 22 is completed, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the second program 22, and the transfer unit 50 executes the transfer of the second program 22.

[0042] time t 24 When the transfer of the second program 22 is completed in step S10, the transfer unit 50 notifies the start-up instruction unit 60 of the completion of the transfer of the second program 22, and the start-up instruction unit 60 executes a start-up instruction to the second processor 12. The second processor 12 executes the second program 22 in accordance with the start-up instruction.

[0043] time t 25 When initialization of the memory area (hereinafter referred to as the "third area") required to read the third program 23 is completed, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the third program 23, and the transfer unit 50 executes the transfer of the third program 23.

[0044] time t 26 When the transfer of the third program 23 is completed in step S10, the transfer unit 50 notifies the start-up instruction unit 60 of the completion of the transfer of the third program 23, and the start-up instruction unit 60 executes a start-up instruction to the third processor 13. The third processor 13 executes the third program 23 in accordance with the start-up instruction.

[0045] On the other hand, in the startup process of the information processing device of the comparative example shown in FIG. 8, after all storage areas from the first area to the third area are initialized by the initialization processor 14, the transfer unit 50 starts transferring the first program 21. Specifically, when the information processing device is started, at time t 30 At time t 31 8, when the initialization of the first area, the second area, and the third area is completed, the transfer unit 50 transfers the first program 21. The subsequent processing is the same as the processing explained in FIG. 3 of the first embodiment, and therefore the explanation will be omitted. 31 , t 32, t 33 , t 34 The processes starting from times t0, t1, t2, and t3 in FIG. 3 correspond to the processes starting from times t0, t1, t2, and t3 in FIG.

[0046] Time t in Figure 7 20 From time t 27 The time to and time t in Fig. 8 30 From time t 35 As is clear from a comparison of the time required to start up the information processing device 101 of the second embodiment and the time required to start up the information processing device of the comparative example, the time required to start up the information processing device 101 of the second embodiment is shorter than the time required to start up the information processing device of the comparative example. This is because the information processing device 101 of the second embodiment executes program transfer by the transfer unit 50 every time a storage area required to read a program is initialized, without waiting for all storage areas of the first area, the second area, and the third area to be initialized by the initialization processor 14.

[0047] The information processing apparatus 101 of the second embodiment described above provides the same effects as the information processing apparatus 100 of the first embodiment. Furthermore, according to the information processing apparatus 101 of the second embodiment, the memory monitoring unit 70 monitors the storage area of ​​the volatile memory 40, and each time the storage areas required for reading each of the multiple programs into the volatile memory 40 are sequentially initialized by the initialization processor 14, the memory monitoring unit 70 notifies the transfer unit 50 to transfer the programs to be transferred to the initialized storage areas from the non-volatile memory 30 to the volatile memory 40, and the transfer unit 50 transfers the programs from the non-volatile memory 30 to the volatile memory 40 each time it receives a notification from the memory monitoring unit 70. Therefore, the startup time can be shortened compared to a configuration in which each program is transferred after all of the areas for reading the multiple programs have been initialized.

[0048] C. Other Embodiments: (C1) The sizes of the first program 21, the second program 22, and the third program 23 may increase in this order. According to this configuration, the first program 21, which takes the longest time to start up, starts up first, thereby further shortening the start-up time of the information processing device 100 as a whole.

[0049] (C2) In each embodiment, an example in which three programs are executed at startup has been described, but the present disclosure is not limited to this. The number of programs executed at startup may be any number equal to or greater than two.

[0050] (C3) In the second embodiment, the initialization processor 14 may be any one of the first to third processors 11 to 13. That is, any one of the first to third processors 11 to 13 may initialize the volatile memory 40 and execute the program. According to this embodiment, the number of processors mounted in the information processing device 100 can be reduced.

[0051] (C4) In each embodiment, the information processing devices 100, 101 may be portable terminal devices such as mobile phones. In such cases, each of the first to third programs 21-23 may be, for example, a program for controlling the execution of an application, a program for controlling communication processing, or a program for performing calculations in communication processing. Furthermore, when the information processing devices 100, 101 are mounted on a vehicle, each of the first to third programs 21-23 may be a program for executing autonomous driving, a program for recognizing objects around the vehicle, a program for performing GPS communication, or the like. Note that the information processing devices 100, 101 are not limited to portable terminal devices and may be any type of information processing device.

[0052] The present disclosure is not limited to the above-described embodiments and can be realized in various configurations without departing from the spirit thereof. For example, the technical features in the embodiments corresponding to the technical features in each aspect described in the Summary of the Invention section can be appropriately replaced or combined to solve some or all of the above-described problems or achieve some or all of the above-described effects. Furthermore, if a technical feature is not described as essential in this specification, it can be appropriately deleted. [Explanation of symbols]

[0053] 11...first processor, 12...second processor, 13...third processor, 14...initialization processor, 20...initial startup program, 21...first program, 22...second program, 23...third program, 24...initialization program, 30...non-volatile memory, 40...volatile memory, 50...transfer unit, 60...startup instruction unit, 70...memory monitoring unit, 100, 101...information processing device

Claims

1. An information processing device (100, 101), A plurality of processors (11, 12, 13); a non-volatile memory (30) that stores a plurality of programs (20, 21, 22, 23); a volatile memory (40) accessible by said plurality of processors; a transfer unit (50) that transfers the plurality of programs from the nonvolatile memory to the volatile memory in order; a start instruction unit (60) that instructs each of the plurality of processors to start one of the plurality of programs; Equipped with the transfer unit notifies the start instruction unit of the completion of transfer of each of the programs each time the transfer of the program is completed; the start instruction unit executes the start instruction to a processor, among the plurality of processors, that is set as a processor that will execute the program for which the transfer has been completed, every time the start instruction unit receives a notification from the transfer unit. Information processing device.

2. 2. The information processing device according to claim 1, an initialization processor (14) that is stored in the nonvolatile memory and that executes an initialization program (24) that initializes the volatile memory when the information processing device is started; a memory monitoring unit (70) that monitors a storage area of ​​the volatile memory; Further provided with the memory monitoring unit notifies the transfer unit to transfer the program to be transferred to the initialized storage area from the non-volatile memory to the volatile memory every time the storage area in the volatile memory necessary for reading each of the plurality of programs to be transferred in sequence by the transfer unit is sequentially initialized by the initialization processor; the transfer unit transfers the program from the non-volatile memory to the volatile memory every time a notification is received from the memory monitoring unit; Information processing device.

3. 3. The information processing device according to claim 2, The information processing device, wherein the initialization processor is one of the plurality of processors.

4. A method for starting an information processing device including a plurality of processors, a non-volatile memory that stores a plurality of programs, and a volatile memory that is accessed by the plurality of processors, the method comprising: a step of transferring the plurality of programs stored in the nonvolatile memory to the volatile memory in sequence in the information processing device; a step of notifying the information processing device of the completion of transfer of each of the programs each time the transfer of the program is completed; a step of executing a start instruction to a processor, among the plurality of processors, that is set as a processor that will execute the program whose transfer has been completed, each time the information processing device receives a notification of the completion of transfer of each of the programs; A startup method comprising:

5. 5. The method for starting an information processing device according to claim 4, initializing the volatile memory in the information processing device when the information processing device is started; a step of monitoring a storage area of ​​the volatile memory in the information processing device, and notifying the information processing device to transfer the programs to be transferred to the initialized storage areas from the nonvolatile memory to the volatile memory each time storage areas necessary for reading each of the plurality of programs to be transferred from the nonvolatile memory to the volatile memory in order are sequentially initialized in the initializing step; The startup method further comprises:

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