Method for manufacturing silicon films

The cold-wall type thermal CVD method addresses the challenge of thermal history in silicon film deposition by heating the substrate and using inert gas dilution, resulting in high-speed, low-temperature silicon films with uniform thickness and improved step coverage on substrates with irregularities.

JP7833150B2Active Publication Date: 2026-03-19NIPPON SHOKUBAI CO LTD +1
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Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-06-27
Publication Date
2026-03-19

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Abstract

The present invention addresses the problem of providing a method for producing a silicon film, in which a cyclic silane compound is reduced in heat history and excellent film thickness evenness or step coverage is attained. The present invention relates to a method for producing a silicon film, characterized by heating a substrate inserted into the reaction chamber of a cold wall type thermal CVD device and simultaneously feeding a cyclic silane compound to the reaction chamber to form a silicon film on the substrate.
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Description

[Technical Field]

[0001] This invention relates to a method for manufacturing a silicon film using the CVD method and to a silicon film. [Background technology]

[0002] Silicon thin films (such as amorphous silicon films and polysilicon films) used in semiconductors and electronic devices such as thin-film transistors and integrated circuits are formed using monosilane, a gaseous material, as a raw material by chemical vapor deposition (CVD) or other methods. However, in recent years, there has been a demand for improved deposition rates to produce larger quantities of silicon thin films, as well as for deposition under low-temperature conditions to accommodate complex device structures, and for the deposition of uniform films on uneven substrates.

[0003] For example, Patent Document 1 describes a method for forming an amorphous silicon deposited film by applying thermal energy to a gaseous cyclic silane compound under atmospheric pressure. In this Patent Document 1, in addition to the deposition chamber containing the substrate, it is also necessary to heat multiple preheating devices connecting the raw material gas adjustment chamber and the deposition chamber. Furthermore, Patent Document 2 discloses a method for depositing a chemically epitaxial Si-containing film onto a substrate by introducing cyclohexasilane into a chamber and heating the chamber in a temperature range of 400°C to 750°C. Furthermore, Patent Document 3 provides a method for forming a silicon-containing epitaxial film at 450-600°C using a deposition gas containing a specific hydride silane compound as a silicon source. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Special Publication No. 5-000469 [Patent Document 2] Special Publication No. 2013-537705 [Patent Document 3] Japanese Patent Publication No. 2015-053382 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] In all of the above-mentioned Patent Documents 1 to 3, the cyclic silane compound is subjected to heating not only in the deposition chamber containing the substrate but also in other apparatuses. As a result, the thermal history of the cyclic silane compound becomes large, causing the cyclic silane compound to decompose before deposition on the substrate, making it difficult to form a silicon film with a uniform thickness (or a silicon film with excellent step coverage) on the substrate.

[0006] In view of the above problems, the present invention aims to provide a method for producing a silicon film and a silicon film that reduces the thermal history of cyclic silane compounds and exhibits excellent film thickness uniformity or step coverage. [Means for solving the problem]

[0007] [1] A method for producing a silicon film, characterized by heating a substrate inserted into the reaction chamber of a cold-wall type thermal CVD apparatus and supplying a cyclic silane compound to the reaction chamber to form a silicon film on the substrate. [2] The manufacturing method according to [1], wherein an inert gas is supplied to the reaction chamber in addition to the cyclic silane compound, and the volume of the inert gas supplied to the reaction chamber is five times or more the volume of the silane compound. [3] The manufacturing method according to [1] or [2], wherein a silicon film having a uniformity of film thickness distribution of ±10% or less is formed on a substrate having trench-like or hole-like irregularities. [4] The manufacturing method according to [3], wherein the aspect ratio of the trench-like or hole-like shape is 30 or less. [5] The manufacturing method according to any one of [1] to [4], wherein the heating temperature of the substrate is 200 to 600°C. [6] The manufacturing method according to any one of [1] to [5], wherein the pressure inside the reaction chamber is 0.01 to 50 kPa. [7] A manufacturing method according to any one of [1] to [6], wherein the cyclic silane compound filled in a container is vaporized and transferred to the reaction chamber. [8] The manufacturing method according to any one of [1] to [7], wherein the cyclic silane compound contains cyclopentasilane or cyclohexasilane. [9] The manufacturing method according to any one of [1] to [8], wherein the obtained silicon film is heat-treated at 600 °C or higher.

[10] A silicon film formed using a cyclic silane compound, wherein when the film thickness is 0.5 nm or more and less than 3.0 nm, the uniformity of the film thickness is ±0.3 nm or less, and when the film thickness is 3.0 nm or more, the uniformity of the film thickness distribution is within ±10%.

[11] A silicon film formed using a cyclic silane compound, wherein on a substrate having irregularities, when the bottom of the groove is at a depth of 0 / t and the upper end of the groove is at a depth of t / t, the ratio (A / B) of the silicon film thickness A of the side wall portion at a depth of 1 / 4t to the silicon film thickness B of the side wall portion at a depth of 3 / 4t is 0.8 to 1.2.

[12] The silicon film according to

[11] , wherein the aspect ratio of the substrate having irregularities is 30 or less.

[13] The 510 cm -1 , -1 , -1 , -1 ~ 530 cm -1 The value of the half-width of the peak position at is 3 cm -1 or more and 10 cm -1 or less. The silicon film according to any one of

[10] to

[12] .

Advantages of the Invention

[0008] According to the present invention, it is possible to provide a manufacturing method of a silicon film and a silicon film in which the thermal history of the cyclic silane compound is reduced and the film thickness uniformity or step coverage is excellent.

Brief Description of the Drawings

Embodiments for Carrying Out the Invention

[0010] 1. Method for manufacturing a silicon film Hereinafter, an embodiment of the method for manufacturing a silicon film of the present invention will be described with reference to FIG. 1, but the present invention is not limited to this embodiment.

[0011] FIG. 1 is a schematic diagram of an apparatus for explaining an example of the method for manufacturing a silicon film of the present invention. In this example, a substrate 8 inserted into a reaction chamber 7 of a cold-wall type thermal CVD apparatus 15 is heated, and a cyclic silane compound 2 is supplied to the reaction chamber 7 to form a silicon film 12 on the substrate 8.

[0012] In the present invention, cold-wall type thermal CVD means thermal CVD in which the reaction chamber is not heated, only the substrate is heated, and the heating means is provided in a part inside the reaction chamber (preferably offset inside the reaction chamber (for example, near the bottom inside the reaction chamber) and the volume of the non-heated part inside the reaction chamber is large). Hot-wall type thermal CVD means thermal CVD in which both the reaction chamber and the substrate are heated, and the heating means is provided outside the reaction chamber or provided throughout the inside of the reaction chamber. In the case of hot-wall type thermal CVD, the cyclic silane compound may be decomposed by heat, and since it is necessary to heat the pipe for feeding the cyclic silane compound into the reaction chamber and the reaction chamber, there is a risk that the cyclic structure is decomposed before the cyclic silane compound reaches the substrate, and the film-forming material may not obtain sufficient three-dimensional processability. On the other hand, in the case of cold-wall thermal CVD, the cyclic silane compound filling the reaction chamber does not need to be substantially heated by a heat source other than the substrate inside the reaction chamber. For example, there is no need to substantially heat the piping that delivers the cyclic silane compound to the reaction chamber or the reaction chamber itself with a heat source. This results in a heating temperature that is extremely low compared to that of hot-wall thermal CVD, allowing the cyclic silane compound to reach the substrate while maintaining its cyclic structure without decomposition, and enabling the production of a film with excellent three-dimensional processability. The phrase "substantially unheated" means that the gas supplied to the reaction chamber (raw material gas, carrier gas, etc.) is heated to, for example, 100°C or lower (preferably 70°C or lower, more preferably 50°C or lower, and even more preferably 35°C or lower). A preferred apparatus for achieving this may include a micro-heating means (for example, at least one of the heating chamber and piping, with a temperature of preferably 26°C or higher, more preferably 28°C or higher) to prevent liquefaction of the gas supplied to the reaction chamber.

[0013] The cold wall type thermal CVD apparatus 15 includes a raw material tank 1, an inert gas introduction line 3 for bubbling connected to the raw material tank 1, a discharge line 5 connecting the raw material tank and the reaction chamber, pressure controllers 6 and 14, a reaction chamber 7, a substrate 8, a substrate heater 9, an outlet 10 from the reaction chamber, an inert gas introduction line 13 for dilution, and the like.

[0014] More specifically, the raw material tank 1 is equipped with an inert gas introduction line 3 for bubbling, through which the cyclic silane compound 2 is bubbled with the inert gas, and the mixed gas, whose concentration is determined by the vapor pressure of the cyclic silane compound, is sent to the reaction chamber 7 via a pressure controller 6.

[0015] The reaction chamber 7 in the illustrated example is equipped with a substrate 8, a substrate heater 9, a substrate holder (not shown), an outlet 10, etc., and a silicon film 12 can be formed on the substrate 8 by directly introducing a cyclic silane compound 2 (preferably cyclohexasilane) into the reaction chamber 7 from the delivery line 5. The reaction chamber 7 in the illustrated example is connected to a pressure controller 14 and a vacuum pump 11, allowing the gas flow to be adjusted, and the temperature, pressure, etc. may be adjusted as appropriate.

[0016] A key feature of this invention is that the cyclic silane compound is heated only on the substrate in the reaction chamber without thermal decomposition of the cyclic silane compound in the raw material tank or reaction chamber (reducing the thermal history of the cyclic silane compound). Ultimately, a cyclic silane compound free from polymers and decomposed light-boiling components generated from the cyclic silane compound by heat can be stably supplied to the reaction chamber. Consequently, when employing the CVD method, high-speed and low-temperature film deposition is possible, high step coverage can be achieved, and a high-purity silicon film can be formed.

[0017] From the viewpoint of compound stability, cyclic silane compound 2 preferably contains cyclopentasilane or cyclohexasilane, and more preferably contains cyclohexasilane.

[0018] When the cyclic silane compound is cyclohexasilane, the cyclohexasilane may be any cyclohexasilane produced by a conventionally known method. For example, (1) cyclohexasilane obtained by coupling diphenyldichlorosilane with a metal to form a 6-membered ring, followed by halogenation and reduction steps may be used. (2) Cyclohexasilane obtained by reacting trichlorosilane, triphenylphosphine, and N,N-diisopropylethylamine as a halosilane to form a cyclic halosilane neutral complex in which triphenylphosphine is coordinated to a 6-membered ring dodecachlorocyclohexasilane, and then reducing this cyclic halosilane neutral complex may be used. (3) Cyclohexasilane obtained by treating a salt of a cyclic halosilane compound obtained by reacting trichlorosilane with an onium salt such as an ammonium salt or a phosphonium salt and a tertiary amine with a Lewis acid compound to obtain a cyclic halosilane compound, and then reducing it may be used. Furthermore, from the viewpoint of forming a high-purity silicon film, purified cyclohexasilane may be used to remove impurities.

[0019] The cyclohexasilane content is preferably 97% by mass or more, more preferably 97.5% by mass or more, and even more preferably 98.0% by mass or more, and it is desirable to be as close to 100% by mass as possible, but it may be 99.9% by mass or less or 99.7% by mass or less. The content may be based on the area percentage obtained from gas chromatography analysis.

[0020] Cyclohexasilane may be present together with a very small amount of metal (e.g., Al) derived from the raw materials, and the metal content in the composition containing cyclohexasilane and metal is, for example, 1 ppm or less, preferably 500 ppb or less, more preferably 100 ppb or less, for example 0.01 ppb or more, preferably 0.1 ppb or more, and more preferably 1 ppb or more, based on the total amount of metal by mass. The metal content can be determined by methods such as ICP mass spectrometry, ICP emission spectrometry, and atomic absorption spectrometry.

[0021] In the raw material tank 1, it is recommended that the cyclic silane compound 2 is not subjected to thermal polymerization or photopolymerization, and that it be kept in a state where it can be stably supplied to the reaction chamber 7 via the delivery line 5.

[0022] Methods for introducing the cyclic silane compound 2 into the reaction chamber 7 include bubbling, baking, and direct vaporization, and these can be combined. However, when heating the cyclic silane compound, it is desirable to do so at temperatures below those described later, due to the risk of polymerization decomposition.

[0023] When heating the cyclic silane compound 2, for example, the temperature of the cyclic silane compound 2 in the raw material tank 1 may be maintained below a predetermined temperature. It is preferable to vaporize the cyclic silane compound 2 filled in the container (raw material tank 1) and transfer it to the reaction chamber 7, and it is even more preferable to vaporize the cyclic silane compound 2 filled in the container (raw material tank 1) at a temperature of 70°C or lower and transfer (dispense) it to the reaction chamber 7. The temperature may be maintained at a more preferable 50°C or lower, even more preferably 45°C or lower, and even more preferably 40°C or lower. However, if the temperature is lowered too much, the thermal polymerization and photopolymerization prevention effect will saturate, while cooling below the melting point will cause solidification, making transportation difficult. The lower limit of the temperature of the cyclic silane compound 2 is preferably maintained at 15°C or higher, more preferably 18°C ​​or higher, and even more preferably 20°C or higher. This temperature corresponds to the cases where the raw material tank 1 is depressurized and where an inert gas is supplied to the raw material tank 1, as described later.

[0024] On the other hand, in the case of a method in which the reaction chamber 7 is heated to an extent that the cyclic silane compound 2 does not decompose, the temperature of the raw material tank 1 is preferably room temperature or 100°C or lower, more preferably 70°C or lower, even more preferably 50°C or lower, and most preferably 40°C or lower. If the temperature is higher than 100°C, the cyclic structure of the cyclic silane compound 2 may decompose, reducing the purity of the cyclic silane compound 2 in the raw material tank 1, and there is a risk that the uniformity of the film thickness or step coverage cannot be improved. Among these, a temperature of 50°C or lower is particularly desirable from the viewpoint of stereoprocessability.

[0025] The material of the raw material tank 1 is not particularly limited as long as it is a material that does not allow the cyclic silane compound 2 to undergo thermal polymerization or photopolymerization. For example, suitable materials include light-opaque, high-strength, stable materials such as iron, nickel, molybdenum, manganese, chromium, titanium, copper, aluminum, and their alloys. Specifically, the material of the raw material tank 1 is preferably stainless steel (SUS).

[0026] Furthermore, the raw material tank 1 may have light-shielding properties as needed, and light-shielding plates or the like may be used. From the viewpoint of safely handling the spontaneously combustible cyclic silane compound 2, it is preferable that the raw material tank 1 has pressure resistance. It is more preferable that the pressure-resistant raw material tank 1 has a pressure of 0.05 MPa or higher.

[0027] Furthermore, the raw material tank 1 is required to have an outlet with at least one valve attached, for example, as shown in the delivery line 5. However, if at least two valves are used, it is preferable that at least one valve is a pressurizing valve or a material filling valve, and at least one valve is a material delivery valve. In addition, the raw material tank 1 may have two or more outlets for tank cleaning.

[0028] The capacity of the raw material tank 1 is preferably about 50 ml to 100 L, and more preferably about 500 ml to 10 L. The shape of the raw material tank 1 is not particularly limited, but examples include cylindrical, prismatic, and cylindrical shapes.

[0029] The delivery of the cyclic silane compound 2 from the raw material tank 1 to the reaction chamber 7 is not limited to the bubbling method as shown in Figure 1, but in any case, a delivery method with minimal thermal history is preferred. In the case of the bubbling method, in the example in Figure 1, the inert gas introduction line 3 for bubbling is provided at the top (especially the top surface) of the raw material tank 1, and the flow rate of the inert gas can be adjusted by the flow rate controller 4. The connection position of the inert gas introduction line 3 for bubbling can be set as appropriate, preferably below the liquid surface of the cyclic silane compound 2, and preferably at the very bottom (bottom surface) of the container (raw material tank 1). The pressure when bubbling from the raw material tank 1 can be any pressure and may be adjusted by a pressure controller.

[0030] Examples of inert gases include nitrogen, helium, neon, and argon. However, in terms of versatility and cost, the inert gas is preferably nitrogen, helium, or argon, more preferably nitrogen or argon, and even more preferably argon.

[0031] When reducing the pressure of the raw material tank 1 filled with the cyclic silane compound 2, a pressure controller 6 may be provided in the delivery line 5. The pressure of the raw material tank 1 is preferably 0.01 to 50 kPa, more preferably 0.05 to 20 kPa, and even more preferably 0.1 to 10 kPa. If the pressure of the raw material tank 1 is greater than 50 kPa, the cyclic silane compound 2 may not vaporize at a sufficient concentration.

[0032] In the delivery line 5, it is preferable to deliver the cyclic silane compound 2 from the raw material tank 1 to the reaction chamber 7 using a bubbling method. The bubbling method can be achieved by installing a suitable inert gas introduction line 3 for bubbling in the raw material tank 1 or the like, separately from the delivery line 5. Alternatively, a flow rate controller 4 may be installed at an appropriate location (for example, on or upstream of the inert gas introduction line 3) during bubbling.

[0033] The material of the delivery line 5 can be any material known in the prior art, as long as the cyclic silane compound 2 is delivered through it, and may be corrosion-resistant aluminum, stainless steel, etc. Furthermore, the structure of the delivery line 5 is not particularly limited, as long as it is a sealed pipe that transfers the material from the raw material tank 1 to the reaction chamber 7. The temperature of the delivery line 5 may be the same as the temperature of the raw material tank 1 described above.

[0034] The pressure controller 6 inserted in the discharge line 5 is not essential in this invention, and the discharge amount can be appropriately controlled by appropriate flow rate control or pressure control in the reaction chamber. However, it is preferable to control the discharge amount of the cyclic silane compound 2 using the pressure controller 6. The pressure controller 6 is inserted on the discharge line 5 from the raw material tank 1 to the reaction chamber 7, and its position can be arbitrary as long as it can control the pressure in the raw material tank 1.

[0035] In the present invention, the flow controller 4 is preferably composed of a flow sensor, a bypass, a flow control valve, and an electrical circuit. The delivered material is first divided to the flow sensor and the bypass, and the flow control valve may be controlled by an electrical circuit to achieve an appropriate flow rate. Examples of flow control valves include piezo actuator valves, thermal actuator valves, solenoid actuator valves, and the like.

[0036] If the flow controller 4 is a throttle valve, it is preferable that the throttle valve is also controlled appropriately according to the flow rate. For example, a sensor for measuring the liquid flow rate may be installed in a suitable location such as the raw material tank 1, on the delivery line 5, or inside the reaction chamber 7, and the opening degree of the throttle valve may be adjusted by the signal from this sensor.

[0037] Chemical vapor deposition is not limited to the apparatus or method shown in Figure 1, but any CVD method can be selected as long as it enables high-speed and low-temperature film deposition and forms a silicon film with high step coverage and high purity. Among these, low-pressure CVD is preferred. By using low-pressure CVD, the inclusion of foreign matter during film deposition can be further suppressed, and the mean free path of the deposition gas species can be increased, further improving film thickness uniformity and step coverage.

[0038] Low-pressure CVD is a chemical vapor deposition method in which a compound containing the constituent elements of the desired deposit is supplied onto a substrate as a high-vapor-pressure seed along with a carrier gas to grow amorphous, polycrystalline, or single crystals. The main reaction is a thermally excited chemical reaction, and it refers to a chemical vapor deposition method in which the gas phase pressure is below atmospheric pressure (e.g., less than 101 kPa). The reaction chamber is equipped with a substrate, substrate heater, carrier gas supply pipe, outlet, vacuum pump, etc., and can be used to thermally decompose cyclic silane compounds and deposit amorphous silicon or polysilicon thin films onto the substrate.

[0039] In low-pressure CVD, the reaction chambers can be of various types, including horizontal, vertical, cylindrical, continuous, and tubular furnace types. For example, in a horizontal reactor, the substrate is placed horizontally, and gas is introduced horizontally to the substrate to form a Si-containing film on it. In a vertical reactor, the substrate is placed horizontally, and gas is introduced from the top or bottom of the reaction chamber to form a Si-containing film on it. In a cylindrical reactor, the substrate is cylindrical, and gas is introduced from the top or bottom of the reaction chamber, forming a Si-containing film on the substrate while it rotates. In a continuous reactor, gas is introduced from the top of the reaction chamber to a substrate placed on a belt conveyor to form a Si-containing film on it. In a tubular furnace type, the substrate is placed between a pair of tubular heaters, and gas is drawn in using a vacuum device to form a Si-containing film on the substrate. In addition, in low-pressure CVD, the pressure inside the reaction chamber is reduced using a vacuum pump or the like, but pumps such as mechanical booster pumps (MBPs) and turbomolecular pumps (TMPs) can be combined.

[0040] The reaction chamber 7 itself does not necessarily need to be equipped with a heating means, and may have a cooling means, but the temperature of the reaction chamber 7 is not particularly limited as long as the substrate meets a predetermined temperature, as will be described later.

[0041] The pressure inside reaction chamber 7 is preferably 0.001 to 50 kPa, more preferably 0.005 to 10 kPa, even more preferably 0.01 to 5 kPa, and even more preferably 0.1 to 1 kPa, in absolute pressure.

[0042] The flow rate of the cyclic silane compound 2 introduced into the reaction chamber 7 is preferably 0.01 sccm to 100 sccm, more preferably 0.04 sccm to 50 sccm, and even more preferably 0.1 sccm to 10 sccm. The flow rate unit sccm is standard cc / min, 1 atm (atmospheric pressure 1013 hPa), and standard cc refers to the value converted to 0°C.

[0043] The reaction chamber 7 may be provided with a dilution inert gas introduction line 13, from the viewpoint of adjusting the concentration of the cyclic silane compound 2. The flow rate of the inert gas (carrier gas (e.g., argon)) introduced into the reaction chamber 7 is preferably 0.01 sccm to 200 sccm, more preferably 0.1 sccm to 150 sccm, even more preferably 0.5 sccm to 100 sccm, and even more preferably 1 sccm to 100 sccm, as the total amount of dilution inert gas and bubbling inert gas.

[0044] In the delivery line 5, the ratio of the amount of inert gas (by volume) to the silane compound, i.e., the amount of inert gas / amount of silane compound (preferably the flow rate of inert gas for bubbling / flow rate of cyclic silane compound gas), is preferably 5 to 1500, more preferably 10 to 1200, even more preferably 15 to 900, and even more preferably 20 to 600. When the ratio falls within the above range, the step coverage of the silicon film deposited on a substrate with irregularities tends to be further improved.

[0045] The ratio of the amount (volume) of inert gas supplied to the reaction chamber to the amount of silane compound supplied to the reaction chamber, i.e., the amount of inert gas / amount of silane compound (for example, the total amount of inert gas flow rate for bubbling and inert gas flow rate for dilution / flow rate of cyclic silane compound gas), is preferably 5 to 2000, more preferably 10 to 1700, even more preferably 15 to 1400, and even more preferably 20 to 1100. When the ratio is within the above range, the cyclic silane compound reacts uniformly throughout the entire substrate with uneven surfaces, which tends to improve step coverage.

[0046] After the cyclic silane compound 2 is sent to the reaction chamber 7, known treatments may be performed to ensure that the cyclic silane compound 2 reaches the substrate 8 uniformly, for example, by passing it through a mesh-like layer.

[0047] Examples of substrate 8 include silicon substrates and substrates on which the following films are formed on their surface. Examples of films formed on the surface of a silicon substrate include silicon oxide films, metal oxide films (the metal may be hafnium, iridium, titanium, zirconium, tantalum, etc.), silicon nitride films, metal nitride films (the metal may be tungsten, titanium, zirconium, tantalum, etc.), and metal films (the metal may be copper, iridium, titanium, zirconium, tantalum, etc.). These may be single films or multiple types of films may be mixed to form a pattern. The shape of the substrate 8 is preferably a roughly plate-like shape with irregularities.

[0048] The predetermined shape of the substrate 8 may be flat or not, but the predetermined shape may include a trench-like or hole-like structure with irregularities. The trench-like structure preferably has a predetermined depth, and the opening width at the substrate surface and the opening width at the depth of the substrate are the same width, but the opening width at the substrate surface and the opening width at the depth of the substrate may differ, for example, the opening width at the substrate surface may be large and the opening width may decrease towards the depth of the substrate. The hole-like structure may be cylindrical or polygonal (triangular prism, quadrangular prism, etc.).

[0049] If the substrate 8 has a trench-like shape, the opening width is, for example, 10 to 3000 nm, preferably 20 to 2000 nm, and more preferably 50 to 1000 nm. If the substrate 8 has a hole-like shape, the width or equivalent diameter of the circle is, for example, 10 to 3000 nm, preferably 20 to 2000 nm, and more preferably 50 to 1000 nm. The trench-like or hole-like depth may satisfy the following aspect ratios, preferably 1 to 50,000 nm, more preferably 2 to 40,000 nm, even more preferably 3 to 30,000 nm, and even more preferably 5 to 20,000 nm. The aspect ratio of the trench-shaped or hole-shaped form (depth / opening width in the case of a trench, depth / opening diameter in the case of a hole (if the hole is not perfectly round, the minor axis of the opening)) is preferably 30 or less, more preferably 25 or less, even more preferably 20 or less, even more preferably 15 or less, preferably 0.1 or more, 0.2 or more, or 0.5 or more, from the viewpoint of improving coverage.

[0050] The heating temperature of the substrate 8 is preferably 200 to 600°C, more preferably 250 to 550°C, even more preferably 520°C or lower, even more preferably 500°C or lower, and particularly preferably 480°C or lower, from the viewpoint of the stability of the resulting silicon film. In the present invention, it is possible to form a silicon film with excellent film thickness uniformity or step coverage by simply heating the substrate.

[0051] The reaction time in reaction chamber 7 can be selected according to the heating temperature of the substrate used, the flow rate of the inert gas supplied to the reaction chamber, and the flow rate of the cyclic silane compound gas, preferably 10 minutes to 24 hours, more preferably 15 minutes to 18 hours, and even more preferably 30 minutes to 12 hours.

[0052] The growth rate of the silicon film 12 is preferably 0.05 nm / min or more, more preferably 0.1 nm / min or more, even more preferably 0.5 nm / min or more, preferably 100 nm / min or less, more preferably 10 nm / min or less, and even more preferably 5 nm / min or less. In order to improve the growth rate of the film or the uniformity of the film thickness, it is preferable to have a flow that suppresses convection and stagnation in the reaction chamber, and the flow should be laminar, that is, the fluid streamlines should always be parallel to the discharge line axis. The Reynolds number Re is cited as an indicator of this, and Re is expressed by the following general formula. Re=duρ / η(d: Pipe diameter (m), u: Flow velocity (m / s), ρ: Density (kg / cm 3 ), η: viscosity of a Newtonian fluid (kg / m·s) The lower this value, the less likely turbulence is to occur, and for this reason, for example, multiple gas inlet pipes may be installed.

[0053] The silicon film 12 formed on a substrate by the manufacturing method of the present invention is not particularly limited, but its thickness can be measured by any method such as a spectroscopic ellipsometer, step thickness gauge, scanning electron microscope (SEM), or transmission electron microscope (TEM). In particular, when measuring the thickness on an uneven substrate having a trench-like or hole-like structure, the substrate may be processed using a focused ion beam (FIB) in an appropriate manner to cut out a cross-section, and then the thickness may be measured from the resulting image using an electron microscope such as an SEM or TEM.

[0054] The silicon film 12 formed on the substrate by the manufacturing method of the present invention has uniform film thickness. The properties of a silicon film are evaluated based on the uniformity of the film thickness distribution (film thickness of 3.0 nm or more) and the uniformity of the film thickness (film thickness of less than 3.0 nm), depending on the thickness of the silicon film. The uniformity of the film thickness distribution is calculated as the average film thickness ± {(maximum film thickness - minimum film thickness) / (maximum film thickness + minimum film thickness)} × 100. The ± {(maximum film thickness - minimum film thickness) / (maximum film thickness + minimum film thickness)} × 100 part represents the error in the uniformity of the film thickness distribution. The uniformity of the film thickness distribution is within ±10% (-10% to +10%), preferably within ±9% (-9% to +9%), more preferably within ±8% (-8% to +8%), and even more preferably within ±7% (-7% to +7%), for example, within ±0.01% (-0.01% to +0.01%), preferably within ±0.02% (-0.02% to +0.02%), and more preferably within ±0.03% (-0.03% to +0.03%). In this invention, the uniformity of the film thickness distribution is expressed as, for example, within ±10%, but represents a range of +10% to -10%, and the same applies to other values.

[0055] The uniformity of the film thickness is expressed as (maximum film thickness - minimum film thickness). The uniformity of the film thickness of the silicon film 12 (the difference between the maximum and minimum film thickness) is within ±0.3 nm (-0.3 nm to +0.3 nm), preferably within ±0.29 nm (-0.29 nm to +0.29 nm), more preferably within ±0.28 nm (-0.28 nm to +0.28 nm), and even more preferably within ±0.27 nm (-0.27 nm to +0.27 nm). It is preferable to be as close to 0 as possible, but preferably within ±0.01 nm (-0.01 nm to +0.01 nm) or within ±0.02 nm (-0.02 nm to +0.02 nm). In this invention, the uniformity of the film thickness is expressed as, for example, within ±0.3 nm, but it represents a range of +0.3 nm to -0.3 nm, and the same applies to other values.

[0056] Furthermore, the raw material tank 1 and the piping of the delivery line 5 used in the method for manufacturing the silicon film of the present invention may be safely and repeatedly used to form the silicon film 12 by cyclic purging, depressurizing and / or heating after the silicon film 12 has been formed, thereby completely removing any remaining liquid material or vaporized gas.

[0057] 2. Silicone film The present invention also includes the silicon film 12 formed by the silicon film manufacturing method described above. The silicon film 12 formed by the silicon film manufacturing method can be deposited at high speed and low temperature, achieves high step coverage, and is a high-purity film, so it can be suitably used in semiconductors and electronic devices such as thin-film transistors and integrated circuits, regardless of whether it is an amorphous silicon or polysilicon film, wherever such films are needed.

[0058] In one embodiment, the silicon film 12 of the present invention is a silicon film formed using a cyclic silane compound, characterized in that when the film thickness is 0.5 nm or more and less than 3.0 nm, the uniformity of the film thickness is ±0.3 nm or less, and when the film thickness is 3.0 nm or more, the uniformity of the film thickness distribution is ±10% or less. The silicon film 12 may be formed on a flat substrate. The film thickness uniformity may be the same as described above. When monosilane or disilane is used, a silicon film of 0.5 to 3.0 nm may not be obtained.

[0059] The thickness of the silicon film 12 is preferably 0.5 to 2000 nm, more preferably 0.6 to 1000 nm, even more preferably 0.7 to 500 nm, even more preferably 0.8 to 200 nm, and particularly preferably 1 to 100 nm.

[0060] The silicon film 12 preferably has a size (area) that corresponds to a 30 to 300 mm wafer.

[0061] The silicon film 12 may have a predetermined refractive index, which in the case of an amorphous silicon film is, for example, 4.0 to 4.7, preferably 4.1 to 4.6, and more preferably 4.2 to 4.5.

[0062] In one embodiment, the silicon film 12 of the present invention is a silicon film formed using a cyclic silane compound, and is characterized in that, when the bottom of a groove is set to a depth of 0 / t and the upper end of a groove to a depth of t / t on a substrate having irregularities, the ratio (A / B) of the silicon film thickness A at a depth of 1 / 4t to the silicon film thickness B at a depth of 3 / 4t is 0.8 to 1.2.

[0063] As shown in Figure 2, when the substrate 8 includes irregularities (trench-like) and a silicon film 12 is formed on the substrate 8, and the bottom of the groove is set to a depth of 0 / t and the upper end of the groove to a depth of t / t, the ratio (A / B) of the silicon film thickness A on the side wall at a depth of 1 / 4t to the silicon film thickness B on the side wall at a depth of 3 / 4t is, from the viewpoint of step coverage, 0.8 to 1.2, preferably 0.82 or more, more preferably 0.84 or more, even more preferably 0.86 or more, even more preferably 0.88 or more, even more preferably 0.90 or more, particularly preferably 0.92 or more, preferably 1.10 or less, more preferably 1.05 or less, and even more preferably 1.00 or less.

[0064] On the other hand, step coverage may be evaluated by the ratio of the thickness of the silicon film formed at the bottom of the groove to the thickness of the silicon film formed on the substrate where no groove is formed, and this ratio may be around 1.

[0065] The thickness of the silicon film 12 formed on the substrate containing irregularities is preferably 0.5 to 2000 nm, more preferably 1 to 1000 nm, even more preferably 2 to 500 nm, and even more preferably 3 to 100 nm. It is preferable that the thickness is obtained by the method described above and averaged from values ​​measured at two or more locations.

[0066] With the miniaturization of semiconductors, there is a strong demand for uniformity and thinness of deposited films. However, when using monosilane or disilane, for example, and using a substrate that includes irregularities (trench-like) as shown in Figure 2, the ratio (A / B) of the silicon film thickness A on the sidewall at a depth of 1 / 4t to the silicon film thickness B on the sidewall at a depth of 3 / 4t is less than 0.8, as described above, making it impossible to obtain a satisfactory uniform silicon film.

[0067] If the silicon film 12 of the present invention is an amorphous (non-crystalline) silicon film, it may be crystallized as needed. Various annealing apparatuses can be used as means for crystallization. For example, a crystalline silicon film (polysilicon film) can be obtained by heat treatment of the film surface at a high temperature (such as a lamp annealing apparatus) or by laser annealing. Furthermore, while it is preferable to perform the annealing treatment in a nitrogen gas atmosphere, hydrogen gas may also be used in combination.

[0068] When heat-treating the silicon film 12 of the present invention at a high temperature to crystallize it, the temperature is preferably 600°C or higher, more preferably 650°C or higher, and even more preferably 700°C or higher. On the other hand, considering thermal damage to the substrate, the temperature is preferably 1200°C or lower, and more preferably 1000°C or lower.

[0069] The obtained crystalline silicon film may be confirmed for its crystallinity by, for example, Raman spectroscopy, infrared spectroscopy, or X-ray spectroscopy, and may have a predetermined peak position and full width at half maximum (FWHM) by Raman spectroscopy. That is, the crystalline silicon film has a Raman spectrum measured by laser Raman spectroscopy at 510 cm -1 ~530 cm -1 (particularly around 520 cm -1 ) and preferably satisfies that the value of the FWHM of the peak position is 3 cm -1 or more and 10 cm -1 or less. The value of the FWHM is more preferably 3 cm -1 or more and 9 cm -1 or less, and even more preferably 4 cm -1 or more and 8 cm -1 or less. When the value of the FWHM is within the above range, it can be said that the crystallinity of the silicon film is extremely high. The measurement conditions of laser Raman spectroscopy can be carried out as described in the examples.

[0070] The peak position of the Raman spectrum after heat-treating the silicon film at 600 °C or higher exists around 520 cm -1 , and the peak value is derived from the Si-Si bond. However, the peak position of the Raman spectrum before heat-treating the silicon film at 600 °C or higher exists on the lower wavenumber side than 520 cm -1 . In addition, since the FWHM around the peak position of 520 cm -1 is extremely narrow, the degree of crystallinity is high. On the other hand, for the peak position existing on the lower wavenumber side than 520 cm[[ID=D39]] -1 , no FWHM is observed, or if an FWHM is observed, its width is wide over a wide range, and the degree of crystallinity is low.

[0071] In the silicon film 12 of the present invention, it is preferable that the FWHM around the peak position of 520 cm -1 of the Raman spectrum is smaller than the FWHM of the peak value on the lower wavenumber side of the peak position of 520 cm -1 of the Raman spectrum.

[0072] The silicon film 12 of the present invention may include amorphous silicon films, crystalline silicon films, and composites of amorphous silicon films and crystalline silicon films. The composite may include laminates of amorphous silicon films and crystalline silicon films, amorphous silicon films on which crystalline silicon is formed, and so on. The silicon film 12 of the present invention preferably does not contain an epitaxial film formed using an etching gas.

[0073] The silicon film 12 of the present invention can be widely used as a component of semiconductor thin-film transistors, and a variety of applications are envisioned, such as polysilicon electrodes for three-dimensional packaging. It can also be used as an electronic device in a wide range of fields, such as solar cells and display components.

[0074] This application claims the benefit of priority based on Japanese Patent Application No. 2022-104744, filed on 29 June 2022. The entire specification of Japanese Patent Application No. 2022-104744, filed on 29 June 2022, is incorporated herein by reference. [Examples]

[0075] The present invention will be described in more detail below with reference to examples, but the present invention is not limited by the following examples, and it is certainly possible to implement it with appropriate modifications within the scope that is consistent with the spirit of the preceding and following descriptions, and all such modifications are included within the technical scope of the present invention.

[0076] <Evaluation of uniformity of film thickness distribution and film thickness uniformity of silicon films> The formed silicon film was evaluated using the following method. FIB method: After embedding a resist film to protect the outermost surface of the sample, a tungsten film was coated using FIB, and then sample fragments were extracted by FIB microsampling. Subsequently, the extracted fragments were thinned to a thickness suitable for TEM observation by FIB processing. Fabrication equipment: Hitachi High-Technologies focused ion / electron beam processing and observation system (nanoDUET NB5000) : Japan FE-I Dual Beam (FIB / SEM) System Nova200 Acceleration voltage: 30kV 5kV Ion source: Ga

[0077] The obtained samples were observed using a transmission electron microscope (TEM) to measure the film thickness by observing the cross-section of the substrate under the following conditions. TEM equipment: Hitachi High-Technologies HF-2200 field emission transmission electron microscope Gatan One View (Model 1095) Acceleration voltage: 200kV

[0078] Uniformity of film thickness distribution = Average film thickness ± {(Maximum film thickness - Minimum film thickness) / (Maximum film thickness + Minimum film thickness)} × 100 Film thickness uniformity = (Maximum film thickness - Minimum film thickness)

[0079] Raman spectroscopy measurement conditions Measurement device: JASCO Corporation NRS-3100 micro-Raman spectrometer Measurement method: Micro-Raman spectroscopy using a 532nm laser with a 100x objective lens. CCD acquisition time: 20 seconds, cumulative: 4 times

[0080] Example 1 As shown in Figure 1, a silicon film was manufactured using a silicon film manufacturing apparatus (cold wall type thermal CVD apparatus 15). Cyclohexasilane (99% purity by gas chromatography) was packed into the raw material tank 1 as cyclic silane compound 2. The raw material tank 1 and the delivery line 5 were heated to 30°C, the pressure in the raw material tank 1 was reduced to 6.5 kPa, and the reaction chamber 7 was reduced to 400 Pa. Inert gas (argon gas) was supplied at a rate of 14 sccm from the bubbling inert gas introduction line 3 connected to the raw material tank 1, and cyclic silane compound 2 was supplied to the reaction chamber 7 (the flow rate of cyclohexasilane contained in the inert gas (argon gas) supplied from the delivery line 5 to the reaction chamber 7 was 0.14 sccm). Inert gas (argon gas) was supplied at a rate of 21 sccm from the dilution inert gas introduction line 13. The substrate 8 in the reaction chamber 7 is a silicon substrate with trench-shaped grooves (depth 10000 nm, width 800 nm). This substrate 8 was heated to 500°C by the substrate heater 9, and a silicon film 12 was formed in 5 hours. The resulting silicon film 12 was an amorphous silicon film.

[0081] The obtained silicon film 12 and substrate 8 were subjected to cross-sectional TEM measurements, as shown in Figures 3 to 5. When the uniformity of the film thickness distribution was evaluated using the above method, with the bottom of the trench-shaped groove set to depth 0 / t and the upper end of the groove set to depth t / t, the silicon film thickness A at the trench sidewall at depth 1 / 4t was 25.4 nm, and the silicon film thickness B at the trench sidewall at depth 3 / 4t was 25.3 nm, with a ratio (A / B) of 1.00. The silicon film 12 had a uniformity of film thickness distribution of within ±10% throughout the entire film. A TEM image of the 1 / 4t depth portion is shown in Figure 5, and a TEM image of the 3 / 4t depth portion is shown in Figure 4.

[0082] Example 2 In Example 1, the raw material tank 1 was reduced to 1.9 kPa, an inert gas (argon gas) was supplied at a rate of 1 sccm from the bubbling inert gas introduction line 3 connected to the raw material tank 1, and an inert gas (argon gas) was supplied at a rate of 34 sccm from the dilution inert gas introduction line 13. A silicon film 12 was formed under the same conditions as in Example 1 (the flow rate of cyclohexasilane contained in the inert gas (argon gas) supplied from the delivery line 5 to the reaction chamber 7 was 0.04 sccm). The resulting silicon film 12 was an amorphous silicon film.

[0083] Cross-sectional TEM measurements of the obtained silicon film 12 showed that, with the bottom of the trench-shaped groove defined as depth 0 / t and the upper end of the groove defined as depth t / t, the silicon film thickness A at a depth of 1 / 4t on the trench sidewall was 17.1 nm, and the silicon film thickness B at a depth of 3 / 4t on the trench sidewall was 18.4 nm, with a ratio (A / B) of 0.93. The silicon film 12 exhibited uniformity of film thickness distribution within ±10% throughout the entire film.

[0084] Example 3 In Example 1, a silicon film was formed under the same conditions as in Example 1, except that the reaction chamber 7 was reduced to 533 Pa and an inert gas (argon gas) was supplied from the dilution inert gas introduction line 13 at a rate of 36 sccm (the flow rate of cyclohexasilane contained in the inert gas (argon gas) supplied from the delivery line 5 to the reaction chamber 7 was 0.14 sccm). The resulting silicon film 12 was an amorphous silicon film.

[0085] Cross-sectional TEM measurements of the obtained silicon film showed that, with the bottom of the groove defined as depth 0 / t and the top of the groove defined as depth t / t, the silicon film thickness A at a depth of 1 / 4t on the trench sidewall was 31.9 nm, and the silicon film thickness B at a depth of 3 / 4t on the trench sidewall was 34.3 nm, with a ratio (A / B) of 0.93. The silicon film 12 exhibited uniformity of film thickness distribution within ±10% throughout the entire film.

[0086] Example 4 In Example 1, a silicon film 12 was formed under the same conditions as in Example 1, except that a flat silicon substrate with a thermal oxide film (thickness 100 nm) was used as the substrate. When the Raman spectrum of the obtained silicon film was measured, it showed a broad peak characteristic of amorphous silicon films (peak position 477.7 cm⁻¹). -1 ).

[0087] The amorphous silicon film obtained from the above-mentioned cyclohexasilane was heat-treated using a lamp annealing apparatus (RTA) at 800°C for 30 seconds. The Raman spectrum of the resulting film was measured, and the peak position was found to be 519.7 cm⁻¹. -1 The peak half-width is 8cm. -1 A sharp peak was detected, indicating a highly crystalline silicon film (polysilicon film).

[0088] Comparative Example 1 As shown in Figure 1 (however, a high-pressure gas cylinder of disilane is used instead of raw material tank 1), a silicon film 12 was manufactured using a silicon film manufacturing apparatus (cold wall type thermal CVD apparatus 15). Instead of the raw material tank 1, a high-pressure gas cylinder of disilane was used to supply 5 sccm of disilane to the reaction chamber 7. An inert gas (argon gas) of 21 sccm was supplied from the dilution inert gas introduction line 13. The substrate 8 in the reaction chamber 7 was a silicon substrate with trench-shaped grooves (10,000 nm deep, 800 nm wide). This substrate 8 was heated to 500°C by the substrate heater 9, and film deposition was carried out for 4 hours to form a silicon film 12. The obtained silicon film 12 was an amorphous silicon film.

[0089] When the obtained silicon film 12 and substrate 8 were subjected to cross-sectional TEM measurements, the silicon film thickness A at the trench sidewall at a depth of 1 / 4t was 23.3 nm, and the silicon film thickness B at a depth of 3 / 4t was 31.0 nm, with a ratio (A / B) of 0.75. The silicon film 12 did not have a uniformity of ±10% in film thickness distribution throughout the entire film.

[0090] [Table 1] [Explanation of Symbols]

[0091] 1: Raw material tank 2: Cyclic silane compounds 3: Inert gas introduction line for bubbling 4: Flow controller 5: Dispatch line 6: Pressure controller 7: Reaction Room 8: Circuit board 9: Circuit board heater 10: Outlet 11: Vacuum pump 12: Silicone film 13: Inert gas introduction line for dilution 14: Pressure controller 15: Cold Wall Type Thermal CVD Apparatus

Claims

1. A method for producing a silicon film, characterized by heating a substrate inserted into the reaction chamber of a cold-wall type thermal CVD apparatus and supplying a cyclic silane compound to the reaction chamber to form a silicon film on the substrate.

2. The manufacturing method according to claim 1, wherein an inert gas is supplied to the reaction chamber in addition to the cyclic silane compound, and the volume of the inert gas supplied to the reaction chamber is five times or more the volume of the cyclic silane compound.

3. The manufacturing method according to claim 1 or 2, wherein a silicon film having a uniformity of film thickness distribution of ±10% or less is formed on a substrate having trench-shaped or hole-shaped irregularities.

4. The manufacturing method according to claim 3, wherein the aspect ratio of the trench-like or hole-like shape is 30 or less.

5. The manufacturing method according to claim 1 or 2, wherein the heating temperature of the substrate is 200 to 600°C.

6. The manufacturing method according to claim 1 or 2, wherein the pressure inside the reaction chamber is 0.01 to 50 kPa.

7. The manufacturing method according to claim 1 or 2, wherein a cyclic silane compound filled in a container is vaporized and transferred to the reaction chamber.

8. The method for producing the cyclic silane compound according to claim 1 or 2, wherein the cyclic silane compound comprises cyclopentasilane or cyclohexasilane.

9. The manufacturing method according to claim 1 or 2, wherein the obtained silicon film is heat-treated at 600°C or higher.

Citation Information

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