Selective rejection band non-high frequency coupled tiling and related methods and systems

Abstract

The selective rejection band non-RF coupling tile includes a ground plate disposed on a first side of a printed circuit board. The selective rejection band non-RF coupling tile also includes a planar inductor disposed on a second side of the printed circuit board. The selective rejection band non-RF coupling tile also includes a conductive via structure extending through the printed circuit board. The conductive via structure electrically connects to both the ground plate and the planar inductor at a location near an inner end of the planar inductor. The selective rejection band non-RF coupling tile is used to shield enclosure walls and / or other electrical circuits from RF fields. The selective rejection band non-RF coupling tile is also used to encapsulate RF-carrying components and block RF fields emanating from the RF-carrying components.

Description

Background Art

[0001] Many industrial systems use radio frequency (RF) power for various purposes. For example, the semiconductor manufacturing industry uses RF power to generate plasma for various purposes, such as, among other things, etching of materials from semiconductor wafers, deposition of materials onto semiconductor wafers, and cleaning of materials from semiconductor wafers. To prevent the associated RF fields from interfering with other adjacent electrical systems, it may be necessary to enclose components that carry RF power in an electrically grounded structure. FIG. 1 shows an exemplary enclosure 101 that includes an inner region where the configuration of an RF circuit 103 is installed. The walls of the enclosure 101 are electrically grounded. If the RF circuit 103 is located too close to the walls of the enclosure 101, the RF fields generated from the RF circuit 103 will couple to the walls of the enclosure 101, thereby causing RF power loss / waste and parasitic effects through the RF circuit 103, which may affect the performance of downstream RF devices. Therefore, the RF circuit 103 must be positioned at a minimum distance 102 away from the walls of the enclosure to avoid reverse coupling of RF power from the RF circuit 103 to the walls of the enclosure 101. Unfortunately, the minimum distance 102 required to avoid unwanted RF coupling to the walls of the enclosure 101 is quite large, and correspondingly, it is necessary to expand the enclosure 101, which is not always possible, especially within the scope of a semiconductor manufacturing facility. Furthermore, at higher RF powers, the minimum distance 102 increases, and the size of the corresponding enclosure 101 also increases. However, it may not be possible to increase the size of the enclosure 101 as needed to achieve the minimum separation distance 102 between the RF circuit and the walls of the enclosure 101. Therefore, due to size limitations, many systems must absorb RF power loss / waste and manage parasitic impairments caused by unwanted and unavoidable coupling of RF power from the RF circuit 103 to the walls of the enclosure 101. The present invention arises in such a situation.

Summary of the Invention

[0002] In an exemplary embodiment, a selected reject band non-RF-coupling tile is disclosed. The selected reject band non-RF-coupling tile includes a grounding plate located on a first side of the printed circuit board. The selected reject band non-RF-coupling tile also includes a planar inductor located on a second side of the printed circuit board. The selected reject band non-RF-coupling tile also includes a conductive via structure extending through the printed circuit board. The conductive via structure is electrically connected to the planar inductor near its inner end. The conductive via structure is also electrically connected to the grounding plate.

[0003] In an exemplary embodiment, a method for fabricating a selective rejection band non-RF coupled tile is disclosed. The method includes locating a ground plate on a first side of a printed circuit board. The method also includes forming a hole through the printed circuit board. The method also includes locating a conductive via structure within the hole to make electrical contact with the ground plate. The method also includes locating a planar inductor on a second side of the printed circuit board. The planar inductor is positioned such that it makes electrical contact with the conductive via structure near the inner end of the planar inductor.

[0004] In an exemplary embodiment, a selected reject band non-RF-coupling enclosure is disclosed. The selected reject band non-RF-coupling enclosure includes an enclosure wall formed of a conductive material. The enclosure wall is electrically connected to a reference ground potential. The enclosure wall has an inner and an outer side. The selected reject band non-RF-coupling enclosure also includes at least one selected reject band non-RF-coupling tile located inside the enclosure wall. Each of the at least one selected reject band non-RF-coupling tile includes a corresponding ground plate located on the first side of the corresponding printed circuit board. The corresponding ground plate is positioned in physical and electrical contact with the inside of the enclosure wall. Each of the at least one selected reject band non-RF-coupling tile also includes a corresponding planar inductor located on the second side of the corresponding printed circuit board. Each of the at least one selected reject band non-RF-coupling tile also includes a corresponding conductive via structure extending through the corresponding printed circuit board and electrically connected to both the corresponding ground plate and the corresponding planar inductor near the inner end of the corresponding planar inductor.

[0005] In an exemplary embodiment, a method for forming a selective rejection band non-RF coupled enclosure is disclosed. The method includes having a selective rejection band non-RF coupled tile comprising a grounding plate located on a first side of a printed circuit board and a planar inductor located on a second side of the printed circuit board. The selective rejection band non-RF coupled tile also includes conductive via structures extending through the printed circuit board and electrically connecting to both the grounding plate and the planar inductor near the inner end of the planar inductor. The method also includes locating the selective rejection band non-RF coupled tile inside the enclosure wall, so that the grounding plate of the selective rejection band non-RF coupled tile is in physical and electrical contact with the inside of the enclosure wall. The enclosure wall is formed of a conductive material. The enclosure wall is also electrically connected to a reference ground potential.

[0006] In an exemplary embodiment, an RF signal filter is disclosed. The RF signal filter includes a first selective rejection band non-RF coupled tile. The RF signal filter also includes a second selective rejection band non-RF coupled tile. The RF signal filter also includes a planar RF line filter positioned between the first selective rejection band non-RF coupled tile and the second selective rejection band non-RF coupled tile. The first selective rejection band non-RF coupled tile, the second selective rejection band non-RF coupled tile, and the planar RF line filter are integrally formed as a single unit.

[0007] In exemplary embodiments, a method for forming an RF signal filter is disclosed. The method includes having a first selective rejection band non-RF coupled tile. The method also includes having a second selective rejection band non-RF coupled tile. The method also includes placing a planar RF line filter between the first selective rejection band non-RF coupled tile and the second selective rejection band non-RF coupled tile, thereby forming the first selective rejection band non-RF coupled tile, the second selective rejection band non-RF coupled tile, and the planar RF line filter integrally as a single unit.

[0008] Other aspects and advantages of the present invention will become more apparent from the following detailed description, which will be interpreted in conjunction with the accompanying drawings illustrating the invention. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 shows an exemplary enclosure including the inner region where the RF circuit configuration is installed.

[0010] [Figure 2A] Figure 2A is a top view of a selective rejection band non-RF coupled tile according to several embodiments.

[0011] [Figure 2B] Figure 2B is a bottom view of a selective rejection band non-RF coupled tile according to several embodiments.

[0012] [Figure 2C] Figure 2C is a side view of a selective rejection band non-RF coupled tile, corresponding to view AA referenced in Figure 2A, according to several embodiments.

[0013] [Figure 2D] Figure 2D is a vertical cross-sectional view of a selective rejection band non-RF coupled tile, corresponding to view BB referenced in Figure 2A, according to several embodiments.

[0014] [Figure 2E] Figure 2E is an enlarged vertical cross-sectional view of a planar inductor on a selective rejection band non-RF coupled tile, corresponding to view CC referenced in Figure 2A, according to several embodiments.

[0015] [Figure 2F] Figure 2F is an isometric top view of a selectively removed-band non-RF coupled tile, with the PCB material removed for illustrative purposes, according to several embodiments.

[0016] [Figure 3A] Figure 3A is a top view of a selective rejection band non-RF coupled tile, including another example of a planar inductor having a square spiral shape according to several embodiments.

[0017] [Figure 3B] Figure 3B is a top view of a selective rejection band non-RF coupled tile, including another example of a planar inductor having a hexagonal spiral shape according to several embodiments.

[0018] [Figure 3C] Figure 3C is a top view of a selective rejection band non-RF coupled tile, including another example of a planar inductor having an octagonal spiral shape according to several embodiments.

[0019] [Figure 3D]FIG. 3D is a top view of a selective removal band non-RF coupling tile that includes another example of a planar inductor having a circular spiral shape, according to some embodiments.

[0020] [Figure 3E] FIG. 3E is a top view of a selective removal band non-RF coupling tile that includes another example of a planar inductor having a triangular spiral shape, according to some embodiments.

[0021] [Figure 3F] FIG. 3F is a top view of a selective removal band non-RF coupling tile that includes an example of a planar inductor having a square double spiral shape, according to some embodiments.

[0022] [Figure 4] FIG. 4 is a diagram showing a plot of RF field attenuation provided by the selective removal band non-RF coupling tile of the present disclosure as a function of the operating RF frequency, according to some embodiments.

[0023] [Figure 5] FIG. 5 is a flowchart of a method for fabricating the selective removal band non-RF coupling tile of the present disclosure, according to some embodiments.

[0024] [Figure 6A] FIG. 6A is a diagram showing the arrangement of six selective removal band non-RF coupling tiles positioned on the wall of an enclosure, according to some embodiments.

[0025] [Figure 6B] FIG. 6B is a side view of the enclosure wall shown in FIG. 6A, according to some embodiments.

[0026] [Figure 7] FIG. 7 is a flowchart of a method for forming a selective removal band non-RF coupling enclosure, according to some embodiments.

[0027] [Figure 8A] Figure 8A shows exemplary arrangements of selective rejection band non-RF coupled tiles for effective encapsulation of RF carrier components, according to several embodiments.

[0028] [Figure 8B] Figure 8B is a circuit diagram illustrating the electrical function of the first selective rejection band non-RF coupled tile in the configuration of Figure 8A, according to several embodiments.

[0029] [Figure 8C] Figure 8C shows a plot of impedance provided by the first selective rejection band non-RF coupled tile as a function of frequency for different values ​​of capacitance (C1), based on the circuit of Figure 8B, according to several embodiments.

[0030] [Figure 8D] Figure 8D shows a plot of impedance provided by the first selective rejection band non-RF coupled tile as a function of frequency for different values ​​of both capacitance (C2) and inductance (L1), based on the circuit of Figure 8B, according to several embodiments.

[0031] [Figure 9A] Figure 9A shows an RF shielding RF line filter according to several embodiments.

[0032] [Figure 9B] Figure 9B is a view toward a planar inductor of a first set of four selective rejection band non-RF coupled tiles, referred to as view AA in Figure 9A, according to several embodiments.

[0033] [Figure 9C] Figure 9C is a side view of a first set of four selective rejection band non-RF coupled tiles, referred to as view BB in Figure 9B, according to several embodiments.

[0034] [Figure 9D] Figure 9D shows the first half of an RF line filter according to several embodiments.

[0035] [Figure 9E] Figure 9E shows the latter half of an RF line filter according to several embodiments.

[0036] [Figure 9F] Figure 9F shows the assembly of the front and rear parts of an RF line filter according to several embodiments.

[0037] [Figure 9G] Figure 9G is an isometric view of a partial assembly of an RF shielding RF line filter according to several embodiments.

[0038] [Figure 9H] Figure 9H is an isometric view of Figure 9G, in which, according to some embodiments, a second set of four selective rejection band non-RF coupled tiles is positioned on the side of the RF line filter, as shown in Figure 9A.

[0039] [Figure 10] Figure 10 is a flowchart of a method for forming an RF signal filter according to several embodiments. [Modes for carrying out the invention]

[0040] The following description includes many specific details in order to provide a complete understanding of the disclosure. However, it will be apparent to those skilled in the art that embodiments of the disclosure can be practiced without some or all of these specific details. In other examples, well-known process behaviors are not described in detail so as not to unnecessarily obscure the disclosure.

[0041] Figure 2A shows a top view of a selected reject band non-radiofrequency-coupling tile (RF-coupled tile) 200 according to several embodiments. Figure 2B shows a bottom view of a selected reject band non-RF-coupled tile 200 according to several embodiments. The selected reject band non-RF-coupled tile 200 is also called an RF band rejection filter. The selected reject band non-RF-coupled tile 200 includes a grounding plate 207 located on a first side of a printed circuit board (PCB) 201. The grounding plate 207 is configured to cover the bottom of the selected reject band non-RF-coupled tile 200, as shown in Figure 2B. According to several embodiments, the grounding plate 207 is exposed at the bottom of the selected reject band non-RF-coupled tile 200. The selected reject band non-RF-coupled tile 200 also includes a planar inductor 203 located on a second side of the PCB 201. The planar inductor 203 is configured to extend across the upper surface of the selective rejection band non-RF coupled tile 200. In this way, in some embodiments, the selective rejection band non-RF coupled tile 200 is formed as a two-layer PCB 201, with the planar inductor 203 on one side of the PCB 201 and a ground plate 207 on the opposite side of the PCB 201. The planar inductor 203 is configured to have a helical shape, with the inner end 203A of the planar inductor 203 positioned at the center of the helical shape and the outer end 203B of the planar inductor 203 positioned at the outer edge of the helical shape. In some embodiments, the planar inductor 203 is exposed on the upper surface of the selective rejection band non-RF coupled tile 200. However, in some embodiments, the planar inductor 203 is covered by a thin layer (e.g., less than about 1 mm) of PCB material protecting the planar inductor 203, thereby preventing the planar inductor 203 from being exposed on the upper surface of the selective rejection band non-RF coupled tile 200. The selective rejection band non-RF coupled tile 200 also includes a conductive via structure 205 that extends through PCB 201 and electrically connects to both the ground plate 207 and the planar inductor 203 near the inner end 203A of the planar inductor 203.In this way, the inner end 203A of the planar inductor 203 is electrically connected to the grounding plate 207 through the conductive via structure 205 near the center of the grounding plate 207 (as shown in Figure 2B).

[0042] Figure 2C shows a side view of a selective rejection band non-RF coupled tile 200, corresponding to view AA referenced in Figure 2A, according to several embodiments. Figure 2D shows a vertical section view of a selective rejection band non-RF coupled tile 200, corresponding to view BB referenced in Figure 2A, according to several embodiments. Figure 2E shows an enlarged vertical section view of a planar inductor 203, corresponding to view CC referenced in Figure 2A, according to several embodiments. As shown in Figure 2E, in some embodiments, the planar inductor 203 is defined by a substantially rectangular vertical section having a nominal width 211 measured parallel to the PCB 201 in the range of about 0.1 mm to about 10 mm, and a nominal height 213 measured perpendicular to the PCB 201 in the range of about 0.05 mm to about 3 mm. It should be understood that the vertical section of the planar inductor 203 during manufacturing may have a substantially rectangular shape compared to a perfectly rectangular shape due to manufacturing capabilities. For example, the vertical section of the planar inductor 203 during manufacturing may have a substantially rectangular shape with some variation in roundness at some of the corners. Furthermore, in some embodiments, the distance 209 measured parallel to the PCB 201 between adjacent turns of the planar inductor 203 is in the range of approximately 0.1 mm to approximately 5 mm. In some embodiments, a substantially uniform value of the distance 209 between adjacent turns is maintained around the helical shape of the planar inductor 203. However, in some embodiments, the value of the distance 209 between adjacent turns varies around the helical shape of the planar inductor 203. Also, in some embodiments, the planar inductor 203 includes a number of turns in the range of approximately 2 turns to approximately 50 turns. It should be understood that the number of turns of the planar inductor 203 is limited by the width 211 of the vertical cross-section of the planar inductor 203, the distance 209 between adjacent turns of the planar inductor 203, and the total area of ​​the PCB 201. Figure 2F shows a top isometric view of a selectively removed-band non-RF coupled tile 200, with the material of the PCB 201 removed for illustrative purposes, according to some embodiments.

[0043] The planar inductor 203 is shaped and sized to prevent RF signals within a specific RF frequency band from coupling to the ground plate 207. When deployed, the selective rejection band non-RF coupled tile 200 is oriented so that the planar inductor 203 faces the source of the RF field incident on the selective rejection band non-RF coupled tile 200. The planar inductor 203 functions to block and / or reflect RF signals within a specific RF frequency band, preventing those RF signals from reaching the ground plate 207. The specific RF frequency band to which the planar inductor is configured to block / reflect is defined to include the operating RF frequencies that play a role in generating the RF field in the vicinity of the selective rejection band non-RF coupled tile 200. The planar inductor 203 is configured to have a specific interaction with the RF field in order to block / reflect RF signals from reaching the ground plate 207.

[0044] In some embodiments, as shown in Figure 2A, the planar inductor 203 has a square helical shape. Figure 3A shows a top view of a selective rejection band non-RF coupled tile 200A, including another example of a planar inductor 203A having a square helical shape according to some embodiments. The planar inductor 203A is also placed on a corresponding square PCB 201A. It should be understood that the selective rejection band non-RF coupled tile 200A also includes a grounding plate 207A and a conductive via structure 205A, similar to those described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A.

[0045] The helical shape of the planar inductor 203 can vary in various embodiments. For example, in various embodiments, the helical shape of the planar inductor 203 may be, among other things, a hexagonal helical shape, an octagonal helical shape, a circular helical shape, a rectangular helical shape, or a triangular helical shape. Figure 3B shows a top view of a selective rejection band non-RF coupled tile 200B, including another example of a planar inductor 203B having a hexagonal helical shape according to some embodiments. The planar inductor 203B is also placed on a corresponding hexagonal PCB 201B. It should be understood that the selective rejection band non-RF coupled tile 200B also includes a grounding plate 207B and a conductive via structure 205B, similar to those described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. Figure 3C shows a top view of a selective rejection band non-RF coupled tile 200C, including another example of a planar inductor 203C having an octagonal helical shape according to some embodiments. Planar inductor 203C is also positioned on the corresponding octagonal PCB 201C. It should be understood that the selective rejection band non-RF coupled tile 200C also includes a ground plate 207C and conductive via structures 205C, similar to those described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A.

[0046] Figure 3D shows a top view of a selective rejection band non-RF coupled tile 200D, including another example of a planar inductor 203D having a circular helical shape according to several embodiments. The planar inductor 203D is also placed on a corresponding circular PCB 201D. It should be understood that the selective rejection band non-RF coupled tile 200D also includes a grounding plate 207D and a conductive via structure 205D, similar to those described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. Figure 3E shows a top view of a selective rejection band non-RF coupled tile 200E, including another example of a planar inductor 203E having a triangular helical shape according to several embodiments. The planar inductor 203E is also placed on a corresponding triangular PCB 201E. It should be understood that the selective rejection band non-RF coupled tile 200E also includes a grounding plate 207E and a conductive via structure 205E, similar to those described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. In some embodiments, any of the helical configurations of the planar inductor 203 can be formed by a double helix, triple helix, and so on. For example, Figure 3F shows a top view of a selective rejection band non-RF coupled tile 200F including an example of a planar inductor 203F having a square double helix shape according to some embodiments. The planar inductor 203F is also placed on a corresponding square PCB 201F. It should be understood that the selective rejection band non-RF coupled tile 200F also includes a ground plate 207F and a conductive via structure 205F, similar to those described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. It should be understood that the planar helical inductor 203 can be configured in different ways, as long as the selective rejection band non-RF coupled tiles 200A-200F function to prevent the RF field associated with the operating RF frequency from coupling with the ground plate 207. For simplicity of explanation, the selective rejection band non-RF coupled tile 200 is used in this specification to describe various embodiments. However, it should be understood that any of the selective rejection band non-RF coupled tiles 200, 200A, 200B, 200C, 200D, 200E, 200F, or any variation thereof may be used in various embodiments disclosed herein, in which the selective rejection band non-RF coupled tile 200 is appropriately referenced.

[0047] In some embodiments, PCB 201 is formed from a dielectric material, such as FR-4 glass epoxy, among many other possible PCB substrate materials. In some embodiments, the thickness of PCB 201 between the planar inductor 203 and the ground plate 207 (measured perpendicularly between the planar inductor 203 and the ground plate 207) is a maximum of about 6 mm. In some embodiments, the thickness of PCB 201 between the planar inductor 203 and the ground plate 207 (measured perpendicularly between the planar inductor 203 and the ground plate 207) is in the range of about 1 mm to about 6 mm. In some embodiments, the thickness of PCB 201 between the planar inductor 203 and the ground plate 207 (measured perpendicularly between the planar inductor 203 and the ground plate 207) is in the range of about 3 mm to about 4 mm. Also, in some embodiments, the area percentage of the ground plate 207 over which the planar inductor 203 overlaps is in the range of about 30% to about 100%. In some embodiments, the area percentage of the grounding plate 207 over which the planar inductor 203 overlaps is in the range of up to approximately 50%. The PCB 201 ensures that the spacing between the planar inductor 203 and the grounding plate 207 is strictly controlled and maintained. The PCB 201 also ensures that a constant spatial relationship is maintained between the planar inductor 203 and the grounding plate 207.

[0048] In some embodiments, the grounding plate 207, the planar inductor 203, and the conductive via structure 205 are formed of copper, and the PCB 201 is formed of FR-4 glass epoxy. However, in other embodiments, the grounding plate 207, the planar inductor 203, and the conductive via structure 205 can be formed of other conductive materials that are suitable for the PCB fabrication process. Also, in other embodiments, the PCB 201 can be formed of essentially any PCB substrate material.

[0049] The selective rejection band non-RF coupled tile 200 is configured to provide maximum attenuation of the incident RF field at a specific operating RF frequency. Figure 4 shows a plot of the RF field attenuation provided by the selective rejection band non-RF coupled tile 200 as a function of the operating RF frequency, according to several embodiments. Figure 4 shows how an exemplary selective rejection band non-RF coupled tile 200 provides maximum attenuation of the incident RF field when the operating RF frequency is close to 55 megahertz (MHz). It should be understood that the specific operating RF frequency at which the selective rejection band non-RF coupled tile 200 provides maximum RF field attenuation depends on the configuration of the selective rejection band non-RF coupled tile 200 and is by no means limited to 55 MHz. In various embodiments, the selective rejection band non-RF coupled tile 200 can be configured to provide maximum RF field attenuation at RF operating frequencies in the range of about 100 kilohertz to about 1000 MHz.

[0050] In some embodiments, the inductance (L) of the planar inductor 203 is calculated using a "Modified Wheeler Formula," as described in "Simple Accurate Expressions for Planar Spiral Inductances" by Sunderarajan S. Mohan et al., IEEE Journal of Solid-State Circuits, Vol. 34, No. 10, October 1999. The capacitance (C) of the PCB 201 between the planar inductor 203 and the ground plate 207 is calculated as C = εA / d, where (ε) is the dielectric constant of the material of the PCB 201 between the planar inductor 203 and the ground plate 207, (A) is the area of ​​the ground plate 207 over which the planar inductor 203 overlaps (essentially the total base area of ​​the planar inductor 203), and (d) is the distance between the planar inductor 203 and the ground plate 207 (the thickness of the PCB 201 between the planar inductor 203 and the ground plate 207). Given that the inductance (L) of the planar inductor 203 and the capacitance (C) between the planar inductor 203 and the ground plate 207 are known, the resonant frequency of the selective rejection band non-RF coupled tile 200 is F res = 1 / [2π(LC)] 1 / 2 It is calculated as ]. Therefore, by controlling the configuration of the planar inductor 203 and the corresponding inductance (L), as well as the thickness of the PCB 201 between the planar inductor 203 and the ground plate 207 and the corresponding capacitance (C), the resonant frequency (F) of the selective rejection band non-RF coupled tile 200 can be determined. res It should be understood that it is possible to tune the ) to the target operating RF frequency. In this way, it is possible to fabricate selective rejection band non-RF coupled tiles 200 with different configurations for use in blocking RF fields associated with different target RF operating frequencies.

[0051] Figure 5 shows a flowchart of a method for fabricating a selective rejection band non-RF coupled tile 200 according to several embodiments. The method includes operation 501 for positioning a ground plate 207 on a first side of PCB 201. The method also includes operation 503 for forming a hole through PCB 201. In some embodiments, operation 503 is performed before operation 501. The method also includes operation 505 for positioning a conductive via structure 205 within the hole to electrically contact the ground plate 207. The method also includes operation 507 for positioning a planar inductor 203 on a second side of PCB 201, the planar inductor 203 being formed to have a helical shape. The planar inductor 203 is positioned such that a location of the planar inductor 203 near its inner end 203A is electrically in contact with the conductive via structure 205. In some embodiments, the ground plate 207, the planar inductor 203, and the conductive via structure 205 are formed of copper, and PCB 201 is formed of FR-4 glass epoxy. However, in other embodiments, the grounding plate 207, the planar inductor 203, and the conductive via structure 205 can be formed from a different conductive material that is suitable for the PCB fabrication process. Also, in other embodiments, the PCB 201 can be formed from essentially any PCB substrate material. The method also controls the configuration of the planar inductor 203 and the thickness of the PCB 201, and the resonant frequency (F) of the selective rejection band non-RF coupled tile 200. res This includes tuning the device to the target operating RF frequency.

[0052] The selective rejection band non-RF coupled tile 200 provides a mechanism that can reduce the size of the enclosure surrounding the RF carrier circuit without causing adverse effects of RF field coupling with the grounded enclosure wall. The selective rejection band non-RF coupled tile 200 disclosed herein functions as an RF band rejection filter when positioned between an RF field source, e.g., an RF signal carrier circuit / device, and a grounded enclosure wall, with the planar inductor 203 of the selective rejection band non-RF coupled tile 200 oriented to face the RF field source, and the grounding plate 207 of the selective rejection band non-RF coupled tile 200 making physical and electrical contact with the grounded enclosure wall.

[0053] Figure 6A shows the arrangement of six selective rejection band non-RF coupled tiles 200 positioned on the wall of an enclosure 601 according to several embodiments. The enclosure 601 is electrically grounded. The configuration in Figure 6A is an example of how the selective rejection band non-RF coupled tiles 200 can be positioned to essentially completely cover the inner wall surface of the enclosure 601 configured to surround an RF carrier circuit / device. As described with respect to the selective rejection band non-RF coupled tiles 200A-200F in Figures 3A-3F, it should be understood that the different shapes and sizes of the selective rejection band non-RF coupled tiles 200 make it possible to essentially completely cover the inner wall surface of an enclosure of essentially any size and shape. Figure 6B shows a side view of the wall of an exemplary enclosure 601 with the selective rejection band non-RF coupled tiles 200 positioned according to several embodiments. Figure 6B shows how, in this example, the RF carrier component 603, which is an inductor, may be positioned at a distance 605 from the selective rejection band non-RF coupled tile 200, where 605 is less than the distance the RF field extends away from the RF carrier component 603. In this example, the RF field generated from the RF carrier component 603 is blocked / reflected by the selective rejection band non-RF coupled tile 200 to prevent coupling / interaction between the RF field and the grounded enclosure wall 601.

[0054] The selective rejection band non-RF coupled tile 200 is configured such that the planar inductor 203 resonates with the grounding plate 207 and the grounded enclosure wall 601 at a specific operating RF frequency. In this way, when the selective rejection band non-RF coupled tile 200 is positioned such that its grounding plate 207 is in physical and electrical contact with the grounded enclosure wall 601 and its planar inductor 203 faces the RF field at a specific operating RF frequency, the selective rejection band non-RF coupled tile 200 provides high attenuation of the RF field, particularly at the operating RF frequency, to prevent the RF field from coupling with the grounding plate 207 and the grounded enclosure wall 601. It should be understood that the selective rejection band non-RF coupled tile 200 provides a mechanism for reducing the size of the RF equipment enclosure, and consequently, the overall size of the RF device and system.

[0055] In some embodiments, a selective rejection band non-RF coupled enclosure is provided. The selective rejection band non-RF coupled enclosure includes an enclosure wall formed of a conductive material. The enclosure wall is electrically connected to a reference ground potential. The enclosure wall has an inner and an outer side. The selective rejection band non-RF coupled enclosure includes an inner volume from which an RF field is generated. The selective rejection band non-RF coupled enclosure also includes at least one selective rejection band non-RF coupled tile 200 located inside the enclosure wall. Each of the at least one selective rejection band non-RF coupled tile 200 includes a corresponding ground plate 207 located on the first side of the corresponding PCB 201. The corresponding ground plate 207 is positioned in physical and electrical contact with the inside of the enclosure wall. Each of the at least one selective rejection band non-RF coupled tile 200 includes a corresponding planar inductor 203 located on the second side of the corresponding PCB 201. Each of the at least one selective rejection band non-RF coupled tile 200 includes a corresponding conductive via structure 205 that extends through the corresponding PCB 201 and electrically connects to both the corresponding ground plate 207 and the corresponding planar inductor 203 at a location near the inner end 203A of the corresponding planar inductor 203. In some embodiments, the at least one selective rejection band non-RF coupled tile 200 prevents the RF field from coupling / interacting with the region of the enclosure wall covered by the at least one selective rejection band non-RF coupled tile 200. In some embodiments, the at least one selective rejection band non-RF coupled tile 200 substantially covers the inside of the enclosure wall. In some embodiments, the at least one selective rejection band non-RF coupled tile 200 has one or more of the following shapes: square, hexagonal, octagonal, rectangular spiral, circular, and triangular.

[0056] Figure 7 shows a flowchart of a method for forming a selective rejection band non-RF coupled enclosure according to several embodiments. The method includes operation 701 for having a selective rejection band non-RF coupled tile 200, which includes a grounding plate 207 located on a first side of PCB 201 and a planar inductor 203 located on a second side of PCB 201. The selective rejection band non-RF coupled tile 200 includes a conductive via structure 205 that extends through PCB 201 and electrically connects to both the grounding plate 207 and the planar inductor 203 at a location near the inner end 203A of the planar inductor 203. The method also includes operation 703 for positioning the selective rejection band non-RF coupled tile 200 inside the enclosure wall, so that the grounding plate 207 of the selective rejection band non-RF coupled tile 200 is in physical and electrical contact with the inside of the enclosure wall. The enclosure wall is formed of a conductive material. The enclosure wall is electrically connected to a reference ground potential. The enclosure wall is part of the enclosure containing the internal volume where the RF field is generated. The selectively removed-band non-RF coupled tile 200 prevents the RF field from coupling / interacting with the region of the enclosure wall covered by the selectively removed-band non-RF coupled tile 200. In some embodiments, the selectively removed-band non-RF coupled tile 200 substantially covers the inside of the enclosure wall. In some embodiments, the selectively removed-band non-RF coupled tile 200 has one or more of the following shapes: square, hexagonal, octagonal, rectangular spiral, circular, and triangular.

[0057] In some embodiments, a selective rejection band non-RF coupled tile 200 can be used to effectively encapsulate RF carrier components so that the RF field generated from the RF carrier component does not extend through the selective rejection band non-RF coupled tile 200. In some embodiments, using RF carrier components individually encapsulated in a selective rejection band non-RF coupled tile 200 eliminates any RF field that could reach the grounded enclosure wall. Therefore, using RF carrier components individually encapsulated in a selective rejection band non-RF coupled tile 200 may allow for the surrounding grounded enclosure to remain unshielded. Alternatively, using RF carrier components individually encapsulated in a selective rejection band non-RF coupled tile 200 may allow for the elimination or reduction of the surrounding enclosure while still providing shielding and protection from radiated / RF interference. It should be understood that eliminating or reducing the surrounding enclosure frees up more space that can be used by other components.

[0058] Figure 8A shows an example of how the RF carrier component 805 can be effectively encapsulated using selective rejection band non-RF coupled tiles 200 according to several embodiments. The first selective rejection band non-RF coupled tile 200-1 is positioned on one side of the RF carrier component 805 such that the planar inductor 203-1 of the first selective rejection band non-RF coupled tile 200-1 faces the RF carrier component 805. The first selective rejection band non-RF coupled tile 200-1 includes a grounding plate 207-1, a PCB 201-1, a planar inductor 203-1, and a conductive via structure 205-1, as described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. The second selective rejection band non-RF coupled tile 200-2 is positioned on the other side of the RF carrier component 805 such that the planar inductor 203-2 of the second selective rejection band non-RF coupled tile 200-2 faces the RF carrier component 805. The second selective rejection band non-RF coupled tile 200-2 includes a grounding plate 207-2, PCB 201-2, planar inductor 203-2, and conductive via structure 205-2, as described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. PCB substrate material 801 is placed between the first selective rejection band non-RF coupled tile 200-1 and the RF carrier component 805. PCB substrate material 801 is coupled to both the first selective rejection band non-RF coupled tile 200-1 and the RF carrier component 805. PCB substrate material 803 is placed between the second selective rejection band non-RF coupled tile 200-2 and the RF carrier component 805. PCB substrate material 803 is coupled to both the second selective rejection band non-RF coupled tile 200-2 and the RF carrier component 805.

[0059] In some embodiments, the first end of the RF carrier component 805 is covered by PCB material 815. A conductive input terminal 809 is located outside the PCB material 815. At least one conductor 807 is electrically connected to the input terminal 809 and the RF carrier component 805. In some embodiments, the second end of the RF carrier component 805 is covered by PCB material 817. A conductive output terminal 813 is located outside the PCB material 817. At least one conductor 811 is electrically connected to the output terminal 813 and the RF carrier component 805.

[0060] In the configuration of Figure 8A, each of the first selective rejection band non-RF coupled tile 200-1 and the second selective rejection band non-RF coupled tile 200-2 is configured to resonate at the operating RF frequency of the RF carrier component 805. In this way, each of the first selective rejection band non-RF coupled tile 200-1 and the second selective rejection band non-RF coupled tile 200-2 functions to block / reflect the RF field generated from the RF carrier component 805. Figure 8B shows a circuit diagram representing the electrical function of the first selective rejection band non-RF coupled tile 200-1 in the configuration of Figure 8A, according to several embodiments. The electrical function of the second selective rejection band non-RF coupled tile 200-2 in the configuration of Figure 8A is the same as that of the first selective rejection band non-RF coupled tile 200-1. Therefore, the circuit diagram of Figure 8B equally describes each of the first selective rejection band non-RF coupled tile 200-1 and the second selective rejection band non-RF coupled tile 200-2. In the circuit diagram of Figure 8B, the PCB substrate material 801 between the RF carrier component 805 and the planar inductor 203-1 is represented as capacitance (C1). The RF carrier component 805 is represented as the RF field. The planar inductor 203-1 is represented as inductance (L1). The PCB 201-1 between the planar inductor 203-1 and the grounding plate 207-1 is represented as capacitance (C2). The grounding plate 207-1 is also represented as electrical ground. When the PCB substrate material 801 between the RF carrier component 805 and the planar inductor 203-1 is thinned, the capacitance (C1) increases, and vice versa. Similarly, when the PCB 201-1 between the planar inductor 203-1 and the grounding plate 207-1 is thinned, the capacitance (C2) increases, and vice versa. Furthermore, the configuration of the planar inductor 203-1 can be changed to alter its inductance (L1). As described above, in some embodiments, the inductance of the planar inductor 203-1 is determined using the "modified Wheeler formula".

[0061] Figure 8C shows plots of the impedance provided by the first selectively rejected-band non-RF coupled tile 200-1 as a function of frequency for different values ​​of capacitance (C1), based on the circuit of Figure 8B, according to several embodiments. The data in Figure 8C show that higher values ​​of capacitance (C1) provide a wider bandwidth of RF frequencies that can be blocked / reflected by the first selectively rejected-band non-RF coupled tile 200-1. Therefore, increasing the value of capacitance (C1) is important. To increase the value of capacitance (C1), it is necessary to reduce the thickness of the PCB substrate material 801 between the RF carrier component 805 and the planar inductor 203-1 as much as possible. In some embodiments, the thickness of the PCB substrate material 801 between the RF carrier component 805 and the planar inductor 203-1 is less than about 1 millimeter. In some embodiments, the thickness of the PCB substrate material 801 between the RF carrier component 805 and the planar inductor 203-1 is less than about 0.5 millimeters. In some embodiments, the thickness of the PCB substrate material 801 between the RF transport component 805 and the planar inductor 203-1 is the thickness of the thinnest available PCB layer.

[0062] Figure 8D shows plots of the impedance provided by the first selective rejection band non-RF coupled tile 200-1 as a function of frequency for different values ​​of both capacitance (C2) and inductance (L1), based on the circuit of Figure 8B, according to several embodiments. The data in Figure 8D show that lower values ​​of capacitance (C2) combined with higher values ​​of inductance (L1) provide a wider bandwidth of RF frequencies that can be blocked / reflected by the first selective rejection band non-RF coupled tile 200-1. Therefore, it is important to reduce the value of capacitance (C2). To reduce the value of capacitance (C2), it is necessary to increase the thickness of PCB 201-1 between the planar inductor 203-1 and the ground plate 207-1. In some embodiments, the thickness of PCB 201-1 between the planar inductor 203-1 and the ground plate 207-1 is up to about 6 millimeters. In some embodiments, the thickness of PCB 201-1 between the planar inductor 203-1 and the ground plate 207-1 is in the range of about 1 millimeter to about 6 millimeters. In some embodiments, the thickness of PCB 201-1 between the planar inductor 203-1 and the grounding plate 207-1 is in the range of approximately 3 mm to approximately 4 mm. In some embodiments, the thickness of PCB 201-1 between the planar inductor 203-1 and the grounding plate 207-1 is the thickness of the thickest available PCB layer. In some embodiments, the thickness of PCB 201-1 between the planar inductor 203-1 and the grounding plate 207-1 is formed by multiple stacked PCB layers.

[0063] In some embodiments, an RF line filter is a specific example of an RF carrier component 805 that can be effectively encapsulated by a selective rejection band non-RF coupled tile 200. The RF line filter is configured to filter RF frequencies within a frequency band in which the operating RF frequency resides. The RF line filter is placed in the RF power path to prevent the RF signal from being reverse-coupled with other electrical components. For example, in some semiconductor fabrication systems, an RF line filter is installed to prevent RF from coupling to a heater array and being returned to the heater power supply. In this example, the RF line filter is placed in the heater power path between the heater power supply and the heater. Conventional RF line filters are open-air RF line filters that generate a large RF field that can interact with components and / or ground walls that are far away. By reconfiguring a conventional RF line filter based on the configuration of Figure 8A and encapsulating it with a selective rejection band non-RF coupled tile 200, interaction of the RF field with adjacent electrical components and / or ground walls can be prevented.

[0064] Figure 9A shows an RF shielding RF line filter 900 according to several embodiments. Figure 9A shows an example of how an RF line filter 920 can be effectively encapsulated to form an RF shielding RF line filter 900 using selective rejection band non-RF coupled tiles 200. A first set of four selective rejection band non-RF coupled tiles 200 is positioned on one side of the RF line filter 920, so that the planar inductors 203 of the first set of four selective rejection band non-RF coupled tiles 200 face toward the RF line filter 920. A second set of four selective rejection band non-RF coupled tiles 200 is positioned on the other side of the RF line filter 920, so that the planar inductors 203 of the second set of four selective rejection band non-RF coupled tiles 200 face toward the RF line filter 920. Each selective rejection band non-RF coupled tile 200 in the first and second sets of four selective rejection band non-RF coupled tiles 200 includes a grounding plate 207, a PCB 201, a planar inductor 203, and a conductive via structure 205, as described with respect to the selective rejection band non-RF coupled tile 200 in Figure 2A. A PCB substrate material 901 is placed between the first set of four selective rejection band non-RF coupled tiles 200 and the RF line filter 920. The PCB substrate material 901 is coupled to each of the first set of four selective rejection band non-RF coupled tiles 200 and the RF line filter 920. A PCB substrate material 903 is placed between the second set of four selective rejection band non-RF coupled tiles 200 and the RF line filter 920. The PCB substrate material 903 is coupled to each of the second set of four selective rejection band non-RF coupled tiles 200 and the RF line filter 920.

[0065] In some embodiments, the first end of the RF line filter 920 is covered by PCB material 907. A conductive input terminal 911 is located outside the PCB material 907. The input terminal 911 is electrically connected to the RF line filter 920. In some embodiments, the second end of the RF line filter 920 is covered by PCB material 905. A conductive output terminal 909 is located outside the PCB material 905. The output terminal 909 is electrically connected to the RF line filter 920.

[0066] In the configuration of Figure 9A, each of the four selective rejectband non-RF coupled tiles 200 in the first set and the four selective rejectband non-RF coupled tiles 200 in the second set is configured to resonate at the operating RF frequency of the RF line filter 920. In this way, each of the selective rejectband non-RF coupled tiles 200 functions to block / reflect the RF field generated from the RF line filter 920. The circuit diagram in Figure 8B illustrates the electrical function of each of the selective rejectband non-RF coupled tiles 200 in the configuration of Figure 9A.

[0067] Figure 9B is a view of a planar inductor 203 of a first set of four selective rejectband non-RF coupled tiles 200, referred to as view AA in Figure 9A, according to several embodiments. A view of a planar inductor 203 of a second set of four selective rejectband non-RF coupled tiles 200 is the same as that shown in Figure 9B. Figure 9C shows a side view of a first set of four selective rejectband non-RF coupled tiles 200, referred to as view BB in Figure 9B, according to several embodiments. A side view of a second set of four selective rejectband non-RF coupled tiles 200 is the same as that shown in Figure 9C.

[0068] Figure 9D shows the front portion 923 of an RF line filter 920 according to several embodiments. The front portion 923 includes a hexagonal double planar helix of conductive material, which includes a first hexagonal planar helix 923A and a second hexagonal planar helix 923B of conductive material. Figure 9E shows the rear portion 924 of an RF line filter 920 according to several embodiments. The rear portion 924 includes a hexagonal double planar helix of conductive material, which includes a first hexagonal planar helix 924A and a second hexagonal planar helix 924B of conductive material. Figure 9F shows an assembly of the front portion 923 and the rear portion 924 of an RF line filter 920 according to several embodiments. The first hexagonal planar helix 923A of the front portion 923 is electrically connected to the first hexagonal planar helix 924A of the rear portion 924 by a conductive via structure 925A. Similarly, the second hexagonal planar helix 923B of the first half portion 923 is electrically connected to the second hexagonal planar helix 924B of the second half portion 924 by a conductive via structure 925B. Referring again to Figure 9A, the PCB material 927 is positioned between the first half portion 923 and the second half portion 924 of the RF line filter 920. Also in Figure 9A, the conductive via structures 925A and 925B are represented by a conductive via structure 925 that extends through the PCB material 927 and electrically connects the first half portion 923 of the RF line filter 920 to the second half portion 924 of the RF line filter 920.

[0069] Figure 9G shows an isometric view of a partial assembly of an RF shielding RF line filter 900 according to several embodiments. PCB materials 201, 901, 903, and 927 are not shown in Figure 9G to avoid obscuring other features. Each of the first hexagonal planar helix 923A and the second hexagonal helix 923B of the front portion 923 of the RF line filter 920 is electrically connected to the output terminal 909. Similarly, each of the first hexagonal planar helix 924A and the second hexagonal helix 924B of the rear portion 924 of the RF line filter 920 is electrically connected to the input terminal 911. Figure 9H shows an isometric view of Figure 9G, according to several embodiments, with a second set of four selective rejection band non-RF coupled tiles 200 positioned on the side of the RF line filter 920, as shown in Figure 9A.

[0070] In some embodiments of the RF shielding RF line filter 900, a first set of four selective rejection band non-RF coupled tiles 200 is a first monolithic selective rejection band non-RF coupled tile having a continuous ground plate 207 and four separate planar inductors connected to the ground plate 207 through their respective conductive vias 205, with the material of the continuous PCB 201 positioned between the ground plate 207 and each of the four planar inductors 203. Also in these embodiments, a second set of four selective rejection band non-RF coupled tiles 200 is a second monolithic selective rejection band non-RF coupled tile having a continuous ground plate 207 and four separate planar inductors connected to the ground plate 207 through their respective conductive vias 205, with the material of the continuous PCB 201 positioned between the ground plate 207 and each of the four planar inductors 203. In these embodiments of the RF shielding RF line filter 900, the RF line filter 920 is a planar RF line filter positioned between a first monolithic selective rejection band non-RF coupled tile and a second monolithic selective rejection band non-RF coupled tile. In these embodiments of the RF shielding RF line filter 900, the first monolithic selective rejection band non-RF coupled tile, the second monolithic selective rejection band non-RF coupled tile, and the planar RF line filter 920 are integrally formed as a single unit.

[0071] Figure 10 shows a flowchart of a method for forming an RF signal filter according to several embodiments. The method includes operation 1001 for having a first selective rejection band non-RF coupled tile 200. The method includes operation 1003 for having a second selective rejection band non-RF coupled tile 200. The method includes operation 1005 for arranging a planar RF line filter 920 between the first selective rejection band non-RF coupled tile 200 and the second selective rejection band non-RF coupled tile 200, so that the first selective rejection band non-RF coupled tile 200, the second selective rejection band non-RF coupled tile 200, and the planar RF line filter 920 are integrally formed as a single unit.

[0072] In some embodiments of the method, each of the first selective rejection band non-RF coupled tile 200 and the second selective rejection band non-RF coupled tile 200 is formed by arranging a corresponding grounding plate 207 on the first side of the corresponding PCB 201, forming a hole through the corresponding PCB 201, arranging a corresponding conductive via structure 205 within the hole to electrically contact the corresponding grounding plate 207, and arranging a corresponding planar inductor 203 on the second side of the corresponding PCB 201. The corresponding planar inductor 203 is arranged such that the planar inductor 203 electrically contacts the corresponding conductive via structure 205 near the inner end 203A of the planar inductor 203. The method also includes orienting the corresponding planar inductor 203 of the first selective rejection band non-RF coupled tile 200 to face a planar RF line filter 920. The method also includes orienting the corresponding planar inductor 203 of the second selective rejection band non-RF coupled tile 200 to face a planar RF line filter 920.

[0073] The method also includes placing a first-thickness PCB material 901 between the corresponding planar inductor 203 of the first selective rejection band non-RF coupled tile 200 and the planar RF line filter 920. The method also includes placing a second-thickness PCB material 903 between the corresponding planar inductor 203 of the second selective rejection band non-RF coupled tile 200 and the planar RF line filter 920. In some embodiments, the first-thickness PCB material 901 is substantially equal to the second-thickness PCB material 903. In some embodiments, the thickness of the PCB 201 of the first selective rejection band non-RF coupled tile 200 is greater than or equal to the first-thickness PCB material 901, and the thickness of the PCB 201 of the second selective rejection band non-RF coupled tile 200 is greater than or equal to the second-thickness PCB material 903.

[0074] In some embodiments, the method includes forming a planar RF line filter 920 to include a planar helical inductor having an electrical input at a first edge of the RF signal filter and an electrical output at a second edge of the RF signal filter. In some embodiments, the method includes forming a planar helical inductor to include a first planar helical conductor 923, the first planar helical conductor 923 curving in a first direction from the outer end of the first planar helical conductor 923 to the inner end of the first planar helical conductor 923. The method also includes forming a planar helical inductor to include a second planar helical conductor 924, the second planar helical conductor 924 curving in a first direction from the inner end of the second planar helical conductor 924 to the outer end of the second planar helical conductor 924. The method also includes oriented the first planar helical conductor 923 substantially parallel to the second planar helical conductor 924. The method also includes connecting the outer end of the first planar helical conductor 923 to the electrical input of the RF signal filter. The method also includes connecting the outer end of the second planar helical conductor 924 to the electrical output of the RF signal filter. The method also includes connecting the inner end of the first planar helical conductor 923 to the inner via structure 925. The method also includes connecting the inner end of the second planar helical conductor 924 to the inner conductive via structure 925. In some embodiments, the method also includes placing a third thickness PCB material 927 between the first planar helical conductor 923 and the second planar helical conductor 924 of the RF line filter, so that the inner conductive via structure 925 extends through the third thickness PCB material 927.

[0075] While the foregoing disclosure includes some details for clear understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the attached claims. For example, it should be understood that one or more features from any embodiment disclosed herein can be combined with one or more features from any other embodiment disclosed herein. Therefore, these embodiments should be considered illustrative rather than restrictive, and the claims should not be limited to the details described herein, but may be modified within the scope of the embodiments and equivalents described herein. This disclosure includes the following examples of applications. [Application Example 1] A grounding plate located on the first side of the printed circuit board, A planar inductor is disposed on the second side of the printed circuit board, A conductive via structure extending through the printed circuit board, wherein the conductive via structure is electrically connected to both the ground plate and the planar inductor at a location near the inner end of the planar inductor. A selective rejection band non-high frequency coupled tile. [Application Example 2] A selective rejection band non-high frequency coupling tile as described in Application Example 1, The planar inductor is a helical-shaped, selective rejection-band non-high frequency coupling tile. [Application Example 3] A selective rejection band non-high frequency coupling tile as described in Application Example 2, The planar inductor has a substantially rectangular vertical cross-sectional shape defined by width and height, wherein the width is measured parallel to the printed circuit board, the height is measured perpendicular to the printed circuit board, the width is in the range of about 0.1 mm to about 10 mm, and the height is in the range of about 0.05 mm to about 3 mm, a selective rejection band non-high frequency coupling tile. [Application Example 4] A selective rejection band non-high frequency coupling tile as described in Application Example 2, The planar inductor is a selective rejection band non-high frequency coupling tile with a number of turns ranging from approximately 2 turns to approximately 50 turns. [Application Example 5] A selective rejection band non-high frequency coupling tile as described in Application Example 4, A selective rejection band non-high frequency coupling tile in which the spacing between adjacent turns of the planar inductor, measured parallel to the printed circuit board, is in the range of approximately 0.1 mm to approximately 5 mm. [Application Example 6] A selective rejection band non-high frequency coupling tile as described in Application Example 2, The helical shape of the planar inductor is a square helical shape, which is a selective rejection band non-high frequency coupling tile. [Application Example 7] A selective rejection band non-high frequency coupling tile as described in Application Example 2, A selective rejection band non-high frequency coupling tile in which the helical shape of the planar inductor is one of a hexagonal helical shape, an octagonal helical shape, a circular helical shape, a rectangular helical shape, or a triangular helical shape. [Application Example 8] A selective rejection band non-high frequency coupling tile as described in Application Example 1, The planar inductor is shaped and sized to prevent selective band high-frequency signals within a specific high-frequency band from coupling to the ground plate, and is a selective rejection band non-high-frequency coupling tile. [Application Example 9] A selective rejection band non-high frequency coupling tile as described in Application Example 1, The grounding plate, the planar inductor, and the conductive via structure are formed of copper, and the printed circuit board is a selective rejection band non-high frequency coupling tile formed of FR-4 glass epoxy. [Application Example 10] A selective rejection band non-high frequency coupling tile as described in Application Example 1, A selective rejection band non-high frequency coupling tile in which the area percentage of the ground plate over which the planar inductor overlaps is in the range of approximately 30% to approximately 100%. [Application Example 11] A selective rejection band non-high frequency coupling tile as described in Application Example 1, The aforementioned printed circuit board has a thickness in the range of approximately 1 mm to approximately 6 mm, and is a selective rejection band non-high frequency coupled tile. [Application Example 12] A first selective rejection band non-high frequency coupled tile, A second selective rejection band non-high frequency coupled tile, A planar high-frequency line filter positioned between the first selective rejection band non-high-frequency coupled tile and the second selective rejection band non-high-frequency coupled tile, Equipped with, The first selective rejection band non-high frequency coupled tile, the second non-high frequency coupled tile, and the planar high frequency line filter are integrally formed as a single unit. High-frequency signal filter. [Application Example 13] The high-frequency signal filter described in Application Example 12, A high-frequency signal filter wherein each of the first and second selective rejection band non-high-frequency coupling tiles includes a corresponding ground plate located on the first side of the corresponding printed circuit board, each of the first and second selective rejection band non-high-frequency coupling tiles includes a corresponding planar inductor located on the second side of the corresponding printed circuit board, and each of the first and second selective rejection band non-high-frequency coupling tiles includes a corresponding conductive via structure extending through the corresponding printed circuit board and electrically connected to both the corresponding ground plate and the corresponding planar inductor at a location near the inner end of the corresponding planar inductor. [Application Example 14] The high-frequency signal filter described in Application Example 13, A high-frequency signal filter in which the corresponding planar inductor of the first selective rejection band non-high-frequency coupling tile is oriented to face the planar high-frequency line filter, and the corresponding planar inductor of the second selective rejection band non-high-frequency coupling tile is oriented to face the planar high-frequency line filter. [Application Example 15] A high-frequency signal filter as described in Application Example 14, A first thickness printed circuit board material is disposed between the corresponding planar inductor of the first selective rejection band non-high frequency coupling tile and the planar high frequency line filter, A second thickness printed circuit board material is disposed between the corresponding planar inductor of the second selective rejection band non-high frequency coupling tile and the planar high frequency line filter. A high-frequency signal filter, which further includes this. [Application Example 16] A high-frequency signal filter as described in Application Example 15, A high-frequency signal filter wherein the printed circuit board material of the first thickness is substantially equal to the printed circuit board material of the second thickness. [Application Example 17] A high-frequency signal filter as described in Application Example 15, A high-frequency signal filter wherein the thickness of the corresponding printed circuit board of the first selective rejection band non-high-frequency coupling tile is greater than or equal to the thickness of the printed circuit board material of the first, and the thickness of the corresponding printed circuit board of the second selective rejection band non-high-frequency coupling tile is greater than or equal to the thickness of the printed circuit board material of the second. [Application Example 18] The high-frequency signal filter described in Application Example 15, The planar high-frequency line filter includes a planar helical inductor having an electrical input at a first edge of the high-frequency signal filter and an electrical output at a second edge of the high-frequency signal filter. [Application Example 19] A high-frequency signal filter as described in Application Example 18, The planar helical inductor comprises a first planar helical conductor, the first planar helical conductor curving in a first direction from the outer end of the first planar helical conductor to the inner end of the first helical conductor, the planar helical inductor comprises a second planar helical conductor, the second planar helical conductor curving in a first direction from the inner end of the second planar helical conductor to the outer end of the second planar helical conductor, the first planar helical conductor is oriented substantially parallel to the second planar helical conductor, the outer end of the first planar helical conductor is connected to the electrical input, the outer end of the second planar helical conductor is connected to the electrical output, the inner end of the first planar helical conductor is connected to an internal conductive via structure, and the inner end of the second planar helical conductor is connected to the internal conductive via structure, wherein the planar helical inductor comprises a high-frequency signal filter. [Application Example 20] A high-frequency signal filter as described in Application Example 19, A high-frequency signal filter comprising the first and second planar helical conductors separated from each other by a third thickness printed circuit board material, wherein the inner conductive via structure extends through the third thickness printed circuit board material. [Application Example 21] A high-frequency signal filter as described in Application Example 14, Each of the corresponding planar inductors of the first and second selective rejection band non-high frequency coupling tiles is a high-frequency signal filter having a helical shape. [Application Example 22] A high-frequency signal filter as described in Application Example 21, Each of the corresponding planar inductors of the first and second selective rejection band non-high frequency coupling tiles has a substantially rectangular vertical cross-sectional shape defined by width and height, wherein the width is measured parallel to the corresponding printed circuit board, the height is measured perpendicular to the corresponding printed circuit board, the width is in the range of about 0.1 mm to about 10 mm, and the height is in the range of about 0.05 mm to about 3 mm, a high frequency signal filter. [Application Example 23] A high-frequency signal filter as described in Application Example 21, Each of the corresponding planar inductors in the first and second selective rejection band non-high frequency coupling tiles is a high-frequency signal filter having a number of turns in the range of about 2 turns to about 50 turns. [Application Example 24] The high-frequency signal filter described in Application Example 23, Each of the corresponding planar inductors of the first and second selective rejection band non-high frequency coupling tiles is a high frequency signal filter having spacing between adjacent turns in the range of about 0.1 mm to about 5 mm, measured parallel to the corresponding printed circuit board. [Application Example 25] A high-frequency signal filter as described in Application Example 21, Each of the corresponding planar inductors in the first and second selective rejection band non-high frequency coupling tiles is a high-frequency signal filter having a square helical shape. [Application Example 26] A high-frequency signal filter as described in Application Example 21, A high-frequency signal filter wherein each of the corresponding planar inductors of the first and second selective rejection band non-high-frequency coupling tiles has a hexagonal helical shape, an octagonal helical shape, a circular helical shape, a rectangular helical shape, or a triangular helical shape. [Application Example 27] A high-frequency signal filter as described in Application Example 14, A high-frequency signal filter wherein the corresponding planar inductor of the first selective rejection band non-high-frequency coupling tile is shaped and sized to prevent high-frequency signals within a specific high-frequency band from coupling to the corresponding ground plate of the first selective rejection band non-high-frequency coupling tile, and the corresponding planar inductor of the second selective rejection band non-high-frequency coupling tile is shaped and sized to prevent high-frequency signals within a specific high-frequency band from coupling to the corresponding ground plate of the second selective rejection band non-high-frequency coupling tile. [Application Example 28] A high-frequency signal filter as described in Application Example 14, A high-frequency signal filter wherein the corresponding ground plate, the corresponding planar inductor, and the corresponding conductive via structure of the first selectively rejected band non-high-frequency coupled tile are formed of copper, the corresponding printed circuit board of the first selectively rejected band non-high-frequency coupled tile is formed of FR-4 glass epoxy, and the corresponding ground plate, the corresponding planar inductor, and the corresponding conductive via structure of the second selectively rejected band non-high-frequency coupled tile are formed of copper, and the corresponding printed circuit board of the second selectively rejected band non-high-frequency coupled tile is formed of FR-4 glass epoxy. [Application Example 29] A high-frequency signal filter as described in Application Example 14, A high-frequency signal filter wherein the area percentage of the corresponding ground plate of the first selectively rejected band non-high-frequency coupled tile over which the corresponding planar inductor of the first selectively rejected band non-high-frequency coupled tile overlaps is in the range of about 30% to about 100%, and the area percentage of the corresponding ground plate of the second selectively rejected band non-high-frequency coupled tile over which the corresponding planar inductor of the second selectively rejected band non-high-frequency coupled tile overlaps is in the range of about 30% to about 100%. [Application Example 30] A high-frequency signal filter as described in Application Example 14, A high-frequency signal filter in which the thickness of the corresponding printed circuit board of the first selective rejection band non-high-frequency coupled tile is in the range of about 1 mm to about 6 mm, and the thickness of the corresponding printed circuit board of the second selective rejection band non-high-frequency coupled tile is in the range of about 1 mm to about 6 mm.

[0076] The claims are as follows:

Claims

1. A first high-frequency band rejection filter, A second high-frequency band rejection filter, A planar high-frequency line filter is disposed between the first high-frequency band rejection filter and the second high-frequency band rejection filter. Equipped with, The first high-frequency band rejection filter, the second high-frequency band rejection filter, and the planar high-frequency line filter are integrally formed as a single unit. High-frequency signal filter.

2. A high-frequency signal filter according to claim 1, A high-frequency signal filter comprising: each of the first and second high-frequency band rejection filters includes a corresponding grounding plate located on the first side of the corresponding printed circuit board; each of the first and second high-frequency band rejection filters includes a corresponding planar inductor located on the second side of the corresponding printed circuit board; and each of the first and second high-frequency band rejection filters includes a corresponding conductive via structure extending through the corresponding printed circuit board and electrically connected to both the corresponding grounding plate and the corresponding planar inductor at a location near the inner end of the corresponding planar inductor.

3. A high-frequency signal filter according to claim 2, A high-frequency signal filter in which the corresponding planar inductor of the first high-frequency band rejection filter is oriented to face the planar high-frequency line filter, and the corresponding planar inductor of the second high-frequency band rejection filter is oriented to face the planar high-frequency line filter.

4. A high-frequency signal filter according to claim 3, A first thickness printed circuit board material is disposed between the corresponding planar inductor and the planar high-frequency line filter of the first high-frequency band rejection filter, A second thickness printed circuit board material is disposed between the corresponding planar inductor and the planar high-frequency line filter of the second high-frequency band rejection filter. A high-frequency signal filter, which further includes this.

5. A high-frequency signal filter according to claim 4, A high-frequency signal filter wherein the printed circuit board material of the first thickness is substantially equal to the printed circuit board material of the second thickness.

6. A high-frequency signal filter according to claim 4, A high-frequency signal filter wherein the thickness of the corresponding printed circuit board of the first high-frequency band rejection filter is greater than or equal to the thickness of the printed circuit board material of the first, and the thickness of the corresponding printed circuit board of the second high-frequency band rejection filter is greater than or equal to the thickness of the printed circuit board material of the second.

7. A high-frequency signal filter according to claim 4, The planar high-frequency line filter includes a planar helical inductor having an electrical input at a first edge of the high-frequency signal filter and an electrical output at a second edge of the high-frequency signal filter.

8. A high-frequency signal filter according to claim 7, A high-frequency signal filter comprising a planar helical inductor, comprising a first planar helical conductor, the first planar helical conductor curving in a first direction from the outer end of the first planar helical conductor to the inner end of the first planar helical conductor, the planar helical inductor comprising a second planar helical conductor, the second planar helical conductor curving in a first direction from the inner end of the second planar helical conductor to the outer end of the second planar helical conductor, the first planar helical conductor oriented substantially parallel to the second planar helical conductor, the outer end of the first planar helical conductor connected to the electrical input, the outer end of the second planar helical conductor connected to the electrical output, the inner end of the first planar helical conductor connected to an internal conductive via structure, and the inner end of the second planar helical conductor connected to the internal conductive via structure.

9. A high-frequency signal filter according to claim 8, A high-frequency signal filter comprising the first and second planar helical conductors separated from each other by a third thickness printed circuit board material, wherein the inner conductive via structure extends through the third thickness printed circuit board material.

10. A high-frequency signal filter according to claim 3, Each of the corresponding planar inductors of the first and second high-frequency band rejection filters is a high-frequency signal filter having a helical shape.

11. A high-frequency signal filter according to claim 10, Each of the corresponding planar inductors of the first and second high-frequency band rejection filters has a substantially rectangular vertical cross-sectional shape defined by width and height, wherein the width is measured parallel to the corresponding printed circuit board, the height is measured perpendicular to the corresponding printed circuit board, the width is in the range of about 0.1 mm to about 10 mm, and the height is in the range of about 0.05 mm to about 3 mm, a high-frequency signal filter.

12. A high-frequency signal filter according to claim 10, Each of the corresponding planar inductors of the first and second high-frequency band rejection filters is a high-frequency signal filter having a number of turns in the range of about 2 turns to about 50 turns.

13. A high-frequency signal filter according to claim 12, Each of the corresponding planar inductors of the first and second high-frequency band rejection filters has a spacing between adjacent turns in the range of about 0.1 mm to about 5 mm, measured parallel to the corresponding printed circuit board, and is a high-frequency signal filter.

14. A high-frequency signal filter according to claim 10, Each of the corresponding planar inductors of the first and second high-frequency band rejection filters is a high-frequency signal filter having a square helical shape.

15. A high-frequency signal filter according to claim 10, A high-frequency signal filter wherein each of the corresponding planar inductors of the first and second high-frequency band rejection filters has a hexagonal spiral shape, an octagonal spiral shape, a circular spiral shape, a rectangular spiral shape, or a triangular spiral shape.

16. A high-frequency signal filter according to claim 3, A high-frequency signal filter wherein the corresponding planar inductor of the first high-frequency band rejection filter is shaped and sized to prevent high-frequency signals within a specific high-frequency band from coupling to the corresponding ground plate of the first high-frequency band rejection filter, and the corresponding planar inductor of the second high-frequency band rejection filter is shaped and sized to prevent high-frequency signals within a specific high-frequency band from coupling to the corresponding ground plate of the second high-frequency band rejection filter.

17. A high-frequency signal filter according to claim 3, A high-frequency signal filter wherein the corresponding ground plate, the corresponding planar inductor, and the corresponding conductive via structure of the first high-frequency band rejection filter are formed of copper, and the corresponding printed circuit board of the first high-frequency band rejection filter is formed of FR-4 glass epoxy; and the corresponding ground plate, the corresponding planar inductor, and the corresponding conductive via structure of the second high-frequency band rejection filter are formed of copper, and the corresponding printed circuit board of the second high-frequency band rejection filter is formed of FR-4 glass epoxy.

18. A high-frequency signal filter according to claim 3, A high-frequency signal filter wherein the area percentage of the corresponding ground plate of the first high-frequency band rejection filter over which the corresponding planar inductor of the first high-frequency band rejection filter overlaps is in the range of approximately 30% to approximately 100%, and the area percentage of the corresponding ground plate of the second high-frequency band rejection filter over which the corresponding planar inductor of the second high-frequency band rejection filter overlaps is in the range of approximately 30% to approximately 100%.

19. A high-frequency signal filter according to claim 3, A high-frequency signal filter wherein the thickness of the corresponding printed circuit board of the first high-frequency band rejection filter is in the range of approximately 1 mm to approximately 6 mm, and the thickness of the corresponding printed circuit board of the second high-frequency band rejection filter is in the range of approximately 1 mm to approximately 6 mm.

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