Semiconductor testing equipment and semiconductor device manufacturing method

Abstract

To reduce generation of partial discharge and stably run a test of the electric characteristics of a semiconductor device.SOLUTION: A semiconductor testing device 101 includes a stage 10, a probe 20, a separation unit 30, and a gas supply unit 40. The probe 20 performs an electric input or an electric output to a semiconductor device 200 held to the stage. The separation unit 30 separates the upper space of the semiconductor device 200 held to the stage 10 into a pressurized space 50 and a probe space 60 including a probe 20. The gas supply unit 40 supplies gas to the pressurized space 50 and presses the pressurized space 50.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a semiconductor test apparatus and a method for manufacturing a semiconductor device.

Background Art

[0002] A semiconductor test apparatus for evaluating the electrical characteristics of a semiconductor device contacts a probe for performing electrical input / output with an electrode provided on the surface of the semiconductor device. When the semiconductor device has a vertical structure in which current flows in the vertical direction, that is, in a direction perpendicular to the surface, partial discharge (hereinafter referred to as partial discharge) may occur between a portion of the semiconductor device at the same potential as the stage and the electrode on the surface of the semiconductor device during the test. This partial discharge may cause partial damage to the semiconductor device or defects in the semiconductor device.

[0003] The test apparatus disclosed in Patent Document 1 performs a test with the air pressure in a pressure vessel on which a test object is placed pressurized. Thereby, the test apparatus prevents partial discharge that occurs during a high voltage test of the test object.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The probes of semiconductor test apparatuses tend to have their diameters miniaturized, and various types of probes such as wire probes with finer wires have been proposed, for example. Depending on the type of probe, the probe may be deformed due to the enclosure of gas into the pressure vessel during pressurization. Such deformation affects the quality of the test of the electrical characteristics of the semiconductor device.

[0006] This disclosure aims to provide a semiconductor testing apparatus that can reduce the occurrence of partial discharge and stably perform electrical characteristic testing of semiconductor devices in order to solve the above-mentioned problems. [Means for solving the problem]

[0007] The semiconductor test apparatus according to this disclosure evaluates the electrical characteristics of a semiconductor device. The semiconductor test apparatus includes a stage, a probe, a separation unit, and a gas supply unit. The probe provides electrical input and output to the semiconductor device held on the stage. The separation unit separates the space above the semiconductor device held on the stage into a pressurized space and a probe space containing the probe. The gas supply unit supplies gas to the pressurized space to pressurize it. [Effects of the Invention]

[0008] This disclosure provides a semiconductor testing apparatus that reduces the occurrence of partial discharge and enables stable testing of the electrical characteristics of semiconductor devices.

[0009] The purpose, features, aspects, and advantages of this disclosure will become clearer from the following detailed description and accompanying drawings. [Brief explanation of the drawing]

[0010] [Figure 1] This is a cross-sectional view showing the configuration of the semiconductor testing apparatus in Embodiment 1. [Figure 2] This figure shows the cross-sectional and planar configurations of a semiconductor testing apparatus. [Figure 3] This figure shows the cross-sectional and planar configurations of a semiconductor testing apparatus. [Figure 4] This is a flowchart showing the method for manufacturing a semiconductor device in Embodiment 1. [Figure 5] This is a cross-sectional view showing the configuration of the semiconductor testing apparatus in Embodiment 2. [Figure 6] This figure shows the cross-sectional and planar configurations of a semiconductor testing apparatus. [Figure 7]This is a cross-sectional view showing the configuration of the semiconductor testing apparatus in Embodiment 3. [Figure 8] This figure shows the cross-sectional and planar configurations of a semiconductor testing apparatus. [Figure 9] This figure shows the cross-sectional and planar configurations of a semiconductor testing apparatus. [Figure 10] This is a cross-sectional view showing the configuration of a semiconductor testing apparatus in a modified example of Embodiment 3. [Modes for carrying out the invention]

[0011] <Embodiment 1> (Configuration of semiconductor testing equipment) Figure 1 is a cross-sectional view showing the configuration of the semiconductor test apparatus 101 in Embodiment 1. Figure 2 is a diagram showing the cross-sectional and plan configurations of the semiconductor test apparatus 101. The cross-sectional view shown in the upper part of Figure 2 shows the cross-section at AA shown in the plan view below it. Figure 3 is a diagram showing the cross-sectional and plan configurations of the semiconductor test apparatus 101. The cross-sectional view shown in the upper part of Figure 3 shows the cross-section at BB shown in the plan view below it. The plan views in Figures 2 and 3 show the plan configuration of some of the components of the semiconductor test apparatus 101 by viewing them transparently.

[0012] The semiconductor test apparatus 101 evaluates the electrical characteristics of the semiconductor device 200, which is the object under test. The semiconductor device 200 may be a semiconductor chip cut from a wafer and individually assembled, or it may be a semiconductor wafer on which multiple semiconductor chips are integrated before individualization. The semiconductor device 200 is formed from a semiconductor such as Si, or from a so-called wide-bandgap semiconductor such as SiC, GaN, Ga2O3, or diamond. The semiconductor device 200 is, for example, a semiconductor device for power control, a so-called power semiconductor device. The semiconductor device 200 includes a plurality of semiconductor elements (not shown). These semiconductor elements are, for example, IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), Schottky barrier diodes, etc. Alternatively, the semiconductor elements may be RC-IGBTs (Reverse-Conducting IGBTs) in which the IGBT and freewheeling diode are formed on a single semiconductor substrate.

[0013] In Embodiment 1, a surface electrode (not shown) is provided on the upper surface of the semiconductor device 200, and a back electrode (not shown) is provided on the lower surface. The semiconductor device 200 has a vertical structure in which current flows between the surface electrode and the back electrode. The semiconductor device 200 also includes an element formation region 201 and a withstand voltage holding region 202. A semiconductor element is formed in the element formation region 201. A withstand voltage holding structure for maintaining the withstand voltage of the semiconductor device 200 is formed in the withstand voltage holding region 202. In Embodiment 1, the withstand voltage holding structure is formed to surround the element formation region 201 in a plan view. The withstand voltage holding structure is, for example, an FLR (Field Limiting Ring) formed on the surface layer on the upper side of the semiconductor device 200.

[0014] The semiconductor test apparatus 101 includes a stage 10, a plurality of probes 20, a separation unit 30, a gas supply unit 40, and a pressure adjustment unit (not shown).

[0015] The stage 10 is a pedestal for holding the semiconductor device 200. The surface of the stage 10 is electrically connected to an external device (not shown) and functions as one of the electrodes in the semiconductor test apparatus 101. During the test, the semiconductor device 200 is placed on the stage 10, and the surface of the stage 10 contacts the back electrode of the semiconductor device 200. The semiconductor test apparatus 101 in Embodiment 1 fixes the semiconductor device 200 to the surface of the stage 10 by vacuum suction. The fixing means, that is, the holding means, is not limited to vacuum suction and may be electrostatic suction or the like. The stage 10 can hold one or more semiconductor devices. Hereinafter, for the sake of simplicity, an example in which one semiconductor device 200 is held by the stage 10 will be described.

[0016] Each of the plurality of probes 20 performs electrical input / output with respect to the semiconductor device 200 held by the stage 10. The probe 20 is attached to the probe substrate 21 via a socket. The probe 20 is electrically connected to an external device and functions as another electrode of the semiconductor test apparatus 101. During the test, the probe 20 contacts the surface electrode of the semiconductor device 200. By providing the plurality of probes 20, the semiconductor test apparatus 101 can apply a current of 5 A or more to the semiconductor device 200.

[0017] The separation part 30 includes an upper plate 30A, a first side wall 30B, a second side wall 30C, and a protection member 30D. The first side wall 30B and the second side wall 30C are provided on the lower surface of the upper plate 30A. The protection member 30D is provided at the lower end of the first side wall 30B. The protection member 30D is formed of, for example, an elastic body having flexibility. The cross-sectional shape formed by the upper plate 30A, the first side wall 30B, the second side wall 30C, and the protection member 30D is an inverted U shape. In other words, the separation part 30 forms a tunnel-shaped space in a cross-sectional view. Also, the separation part 30 has a structure in which the tunnel-shaped space circulates in a plan view. That is, the separation part 30 has a ring shape in a plan view.

[0018] The positions of the first side wall 30B and the second side wall 30C are preferably determined based on the arrangement of the element formation region 201 and the withstand voltage holding region 202 in the semiconductor device 200 held on the stage 10. For example, the first side wall 30B is provided such that, during testing, the protective member 30D contacts a region of the semiconductor device 200 that is further inside than the withstand voltage holding region 202. The second side wall 30C is preferably provided so as to be located outside the outer edge of the semiconductor device 200 during testing.

[0019] The separation section 30 covers the pressurized space 50, which corresponds to the space above the withstand voltage holding region 202, within the space above the semiconductor device 200 held on the stage 10 during testing. In other words, the pressurized space 50 corresponds to the tunnel-shaped space surrounded by the separation section 30 and the withstand voltage holding region 202. The first side wall 30B separates the probe space 60 and the pressurized space 50 within the space above the semiconductor device 200. The probe space 60 corresponds to the space including the probe 20 facing the upper surface of the semiconductor device 200. In other words, the probe space 60 corresponds to the space including the probe 20 located above the element formation region 201.

[0020] The gas supply unit 40 is located in the separation unit 30. During testing, the gas supply unit 40 supplies gas to the pressurized space 50 to pressurize it. The gas supply unit 40 is controlled to enable gas supply based on the detection of contact between the protective member 30D of the first side wall 30B and the surface of the semiconductor device 200.

[0021] In Embodiment 1, a plurality of gas supply units are provided. At least one of these gas supply units 40 includes a nozzle 40A that is installed to blow gas onto the upper surface of the semiconductor device 200 from an oblique direction, as shown in Figure 3. Here, the nozzle 40A is installed at an angle to the upper plate 30A of the separation unit 30. Furthermore, the gas supply unit 40 is installed such that the gas blown out from the nozzle 40A forms a flow that circulates around a ring-shaped pressurized space 50. Moreover, it is preferable that the gas supply unit 40 is installed so as to uniformly pressurize the pressurized space 50 when gas is supplied.

[0022] A pressure adjustment unit (not shown) adjusts the pressure in the pressurized space 50. The pressure adjustment unit adjusts the pressure in the pressurized space 50 by controlling, for example, the amount of gas supplied to the pressurized space 50 by the gas supply unit 40.

[0023] (Method of manufacturing semiconductor devices) Next, a method for manufacturing the semiconductor device 200 using the semiconductor testing apparatus 101 will be described. Figure 4 is a flowchart of the manufacturing method for the semiconductor device 200 in Embodiment 1. This manufacturing method includes a manufacturing step of evaluating the electrical characteristics of the semiconductor device 200 using the semiconductor testing apparatus 101. The manufacturing step of evaluation will be described below.

[0024] In step S11, the parallelism of the contact portions corresponding to the tips of the multiple probes 20 is aligned.

[0025] In step S12, the semiconductor device 200 is placed on the stage 10. The semiconductor device 200 is placed, for example, at a predetermined position on the stage 10. The semiconductor device 200 placed on the stage 10 is fixed in place by vacuum suction or the like, that is, it is held on the stage 10.

[0026] In step S13, the separation section 30 descends and approaches the semiconductor device 200. The separation section 30 covers the pressurized space 50, which corresponds to the space above the pressure-resistant holding area 202 in the space above the semiconductor device 200 held on the stage 10. As the separation section 30 descends, the protective member 30D of the first side wall 30B comes into contact with the upper surface of the semiconductor device 200. Preferably, the protective member 30D comes into contact with a region inside the semiconductor device 200 beyond the pressure-resistant holding area 202. The first side wall 30B separates the probe space 60 from the pressurized space 50. The second side wall 30C is located outside the outer edge of the semiconductor device 200. The lower end of the second side wall 30C is not in contact with the stage 10.

[0027] In step S14, the gas supply unit 40 supplies gas to the pressurized space 50 to pressurize it. In Embodiment 1, the gas supply unit 40 is controlled to enable gas supply based on the detection of contact between the protective member 30D of the first side wall 30B and the surface of the semiconductor device 200. The nozzle 40A of the gas supply unit 40 shown in Figure 3 in Embodiment 1 blows gas onto the pressure-resistant holding area 202 of the semiconductor device 200 from an oblique direction. The gas blown from this oblique direction removes foreign matter adhering to the pressure-resistant holding area 202 of the semiconductor device 200. In addition, the gas blown out at an oblique direction generates a clockwise or counterclockwise gas flow in the ring-shaped pressurized space 50. This gas flow also effectively lifts and blows away any foreign matter adhering to the semiconductor device 200. Since the second side wall 30C is not in contact with the stage 10, foreign matter is discharged from the gap between the lower end of the second side wall 30C and the stage 10.

[0028] In step S15, the pressure adjustment unit adjusts the pressure in the pressurized space 50 to a set pressure. The pressure adjustment unit controls, for example, the amount of gas supplied to the pressurized space 50 by the gas supply unit 40. The set pressure depends on the temperature and applied voltage when the test is performed, but is, for example, 20 kPa or higher. This step S15 may be performed simultaneously with step S14.

[0029] In step S16, multiple probes 20 descend and contact the surface electrodes of the semiconductor device 200. The semiconductor test apparatus 101 starts the test by passing current through the probes 20 to the semiconductor device. In other words, the semiconductor test apparatus 101 performs electrical input and output to the semiconductor device 200 through the probes 20. During this test, the pressure in the pressurized space 50 is higher than the pressure in the probe space 60. In other words, the pressurized space 50 is pressurized. As a result, the possibility of partial discharge that may occur in the withstand voltage holding region 202 is reduced. Step S16 may be performed after step S15 or simultaneously with step S15.

[0030] In step S17, the gas supply unit 40 stops supplying gas. The pressure in the pressurized space 50 returns to normal. The probe 20 and the separation unit 30 move away from the surface of the semiconductor device 200.

[0031] In step S18, the tested semiconductor device 200 is removed from stage 10. This completes the testing of the semiconductor device 200, and it is then moved on to the next manufacturing process. Subsequently, the semiconductor testing equipment 101 tests another semiconductor device. That is, step S11 or step S12 is performed again.

[0032] In this configuration, during testing, the space surrounding the pressure-resistant holding region 202, where partial discharge is likely to occur, i.e., the pressurized space 50, is pressurized. Therefore, the possibility of partial discharge is reduced.

[0033] When gas is supplied to the pressurized space 50 from the gas supply unit 40, the pressurized space 50 and the probe space 60 are separated by the first side wall 30B. Therefore, the high-pressure gas is not directly blown onto the probe 20 in the probe space 60. Consequently, regardless of the type of probe 20, deformation caused by blowing is suppressed in the probe 20. For example, even when a thin pin-type probe with a reduced diameter or a thin wire-type probe is used, deformation caused by blowing is suppressed in those probes 20. Since the deformation of the probe 20 is limited to that caused by contact, the semiconductor test apparatus 101 enables stable testing of the electrical characteristics of the semiconductor device 200.

[0034] Since the probe 20 is not affected by the gas supply, the gas supply unit 40 can strongly blow gas onto the pressure-resistant holding area 202 of the semiconductor device 200. As a result, the removal rate of foreign matter from the pressure-resistant holding area 202 is improved, and the possibility of partial discharge is further reduced.

[0035] Furthermore, because the separation unit 30 pressurizes only the pressurized space 50 where partial discharge is likely to occur, the amount of gas used is reduced, and the pressurization process is made more efficient.

[0036] In summary, the semiconductor test apparatus 101 in Embodiment 1 evaluates the electrical characteristics of a semiconductor device 200. The semiconductor test apparatus 101 includes a stage 10, a probe 20, a separation unit 30, and a gas supply unit 40. The probe 20 provides electrical input and output to the semiconductor device 200 held on the stage 10. The separation unit 30 separates the space above the semiconductor device 200 held on the stage 10 into a pressurized space 50 and a probe space 60. The pressurized space 50 corresponds to the space above the pressure-bearing holding region 202 formed on the semiconductor device 200 to maintain its withstand voltage. The probe space 60 includes the probe 20 facing the semiconductor device 200. The gas supply unit 40 supplies gas to the pressurized space 50 to pressurize it.

[0037] Such a semiconductor testing apparatus 101 reduces the occurrence of partial discharge and enables stable testing of the electrical characteristics of the semiconductor device 200. The occurrence of defective products due to partial discharge is reduced, and the electrical characteristics are accurately evaluated, thereby improving the yield and reliability of the semiconductor device 200.

[0038] The semiconductor testing apparatus 101 is required to apply a large current or high voltage depending on the specifications of the semiconductor device 200 under test. To meet such requirements, a multi-pin probe 20 is used. Furthermore, there is a need to reduce damage to the semiconductor device 200 due to contact with the probe 20. For this reason, probes 20 with a thin wire structure, such as thin pin-type probes with a smaller diameter or wire-type probes, have been proposed. According to the semiconductor testing apparatus 101 shown in Embodiment 1, even when such thin wire-structured probes 20 are used, deformation of the probe 20 under pressure is limited to that caused by contact. Therefore, the reliability of the test results is improved and stabilized.

[0039] Furthermore, the protective member 30D of the separation portion 30 in Embodiment 1 is made of a flexible elastic material. As a result, the durability of the lower part of the first side wall 30B, which is repeatedly contacted with each semiconductor device 200 under test, is increased. In addition, the contact and adhesion between the first side wall 30B and the semiconductor device 200 are improved.

[0040] <Embodiment 2> In Embodiment 2, components similar to those in Embodiment 1 are given the same reference numerals, and their detailed descriptions are omitted.

[0041] Figure 5 is a cross-sectional view showing the configuration of the semiconductor test apparatus 102 in Embodiment 2. Figure 6 is a diagram showing the cross-sectional and plan configurations of the semiconductor test apparatus 102. The cross-sectional view shown at the top of Figure 6 shows the cross-section at CC shown in the plan view below it. The plan view of Figure 6 shows the plan configuration of some of the components of the semiconductor test apparatus 102 by viewing them transparently.

[0042] The separation section 31 includes an upper plate 31A, a first side wall 31B, a second side wall 31C, and a protective member 31D. The lower surface of the upper plate 31A is located lower than the lower surface of the upper plate 30A in Embodiment 1. During testing, the upper plate 31A is positioned close to the pressure-resistant holding area 202.

[0043] The gas supply section 40 includes a gas passage 40B. The gas passage 40B is provided so as to penetrate the upper plate 31A. Here, the gas passage 40B is provided along the first side wall 31B. In other words, the gas passage 40B is provided so as to be in contact with the first side wall 31B.

[0044] The operation of the semiconductor test apparatus 102 in Embodiment 2 is basically the same as the operation of the semiconductor test apparatus 101 in Embodiment 1 (Figure 4). However, the details of steps S13 to S15 in Figure 4 differ from those in Embodiment 1.

[0045] In step S13, the separation section 31 descends and approaches the semiconductor device 200. The separation section 31 covers the pressurized space 50 above the pressure-resistant holding area 202. As the separation section 31 descends, the protective member 31D of the first side wall 31B comes into contact with the upper surface of the semiconductor device 200, and the upper plate 31A of the separation section 31 approaches the pressure-resistant holding area 202. The distance between the upper plate 31A and the pressure-resistant holding area 202 in Embodiment 2 is shorter than the distance between the upper plate 30A and the pressure-resistant holding area 202 in Embodiment 1. The first side wall 31B separates the probe space 60 and the pressurized space 50. The second side wall 31C, located outside the outer edge of the semiconductor device 200, is not in contact with the stage 10.

[0046] In step S14, the gas supply unit 40 supplies gas to the pressurized space 50 through the gas flow path 40B to pressurize the pressurized space 50. In Embodiment 2, the gas supply unit 40 is controlled to enable gas supply based on the detection of contact between the protective member 31D of the first side wall 31B and the surface of the semiconductor device 200. The gas supplied to the pressurized space 50 through the gas flow path 40B is blown onto the pressure-resistant holding area 202. As a result, foreign matter on the pressure-resistant holding area 202 is blown away. Since the second side wall 31C is not in contact with the stage 10, the foreign matter is discharged from the gap between the lower end of the second side wall 31C and the stage 10.

[0047] In step S15, the pressure adjustment unit adjusts the pressure in the pressurized space 50. The pressure adjustment unit controls, for example, the amount of gas supplied to the pressurized space 50 through the gas passage 40B.

[0048] Even in tests using the semiconductor testing apparatus 102 as described above, the pressurized space 50 is pressurized. Therefore, the possibility of partial discharge is reduced.

[0049] When gas is supplied to the pressurized space 50 from the gas supply unit 40, the pressurized space 50 and the probe space 60 are separated by the first side wall 31B. Therefore, high-pressure gas is not blown onto the probe 20 in the probe space 60. As a result, deformation caused by blowing is suppressed in the probe 20, regardless of the type of probe 20.

[0050] In Embodiment 2, the lower surface of the upper plate 31A of the separation unit 31 is close to the pressure-resistant holding area 202 of the semiconductor device 200. As a result, the pressurized space 50 is narrowed, and the flow velocity of the gas supplied from the gas supply unit 40 increases. Consequently, foreign matter on the pressure-resistant holding area 202 is effectively removed. Furthermore, because the volume of the pressurized space 50 is small, effective pressurization of the pressurized space 50 becomes possible.

[0051] <Embodiment 3> In Embodiment 3, components similar to those in Embodiment 1 are given the same reference numerals, and their detailed descriptions are omitted.

[0052] Figure 7 is a cross-sectional view showing the configuration of the semiconductor test apparatus 103 in Embodiment 3. Figure 8 is a diagram showing the cross-sectional and plan configurations of the semiconductor test apparatus 103. The cross-sectional view shown at the top of Figure 8 shows the cross-section at DD shown in the plan view below it. Figure 9 is a diagram showing the cross-sectional and plan configurations of the semiconductor test apparatus 103. The cross-sectional view shown at the top of Figure 9 shows the cross-section at EE shown in the plan view below it. The plan views in Figures 8 and 9 show the plan configuration of some of the components of the semiconductor test apparatus 103 through a transparent view.

[0053] The semiconductor test apparatus 103 includes a stage 10, a plurality of probes 20, a separation unit 32, a plurality of gas supply units 40, a pressure adjustment unit (not shown), and an exhaust unit (not shown).

[0054] The separation section 32 includes an upper plate 30A, a first side wall 30B, a second side wall 30C, a first protective member 32D, and a second protective member 32E. The first protective member 32D is provided at the lower end of the first side wall 30B. The second protective member 32E is provided at the lower end of the second side wall 30C. The first protective member 32D and the second protective member 32E are formed of, for example, a flexible elastic material. The cross-sectional shape formed by the upper plate 30A, the first side wall 30B, the second side wall 30C, the first protective member 32D, and the second protective member 32E is an inverted U-shape.

[0055] Multiple gas supply units 40 supply gas to the pressurized space 50 during testing. Each gas supply unit 40 is controlled to enable gas supply based on the detection of contact between the second protective member 32E of the second side wall 30C and the surface of the stage 10. Each gas supply unit 40 includes a nozzle 40A, as shown in Figure 9, which is installed to blow gas onto the upper surface of the semiconductor device 200 from an oblique direction. In a plan view, the multiple gas supply units 40 are arranged to coincide with the corners of the pressure-bearing area 202 of the semiconductor device 200. Each gas supply unit 40 is configured such that the gas blown out from each nozzle 40A forms a flow that circulates around the ring-shaped pressurized space 50. Furthermore, each gas supply unit 40 is configured to uniformly pressurize the pressurized space 50 when gas is supplied.

[0056] An exhaust unit (not shown) exhausts the gas from the pressurized space 50. The pressure adjustment unit adjusts the pressure in the pressurized space 50. The pressure adjustment unit controls the amount of gas supplied to the pressurized space 50 by the gas supply unit 40 or the amount of gas exhausted from the pressurized space 50 by the exhaust unit.

[0057] The operation of the semiconductor test apparatus 103 in Embodiment 3 is basically the same as the operation of the semiconductor test apparatus 101 in Embodiment 1 (Figure 4). However, the details of steps S13 and S14 in Figure 4 differ from those of Embodiment 1.

[0058] In step S13, the separation section 32 descends and approaches the semiconductor device 200. The separation section 32 covers the pressurized space 50 above the pressure-resistant holding area 202. As the separation section 32 descends, the first protective member 32D of the first side wall 30B comes into contact with the semiconductor device 200, and the second protective member 32E of the second side wall 30C comes into contact with the stage 10. The first side wall 30B separates the probe space 60 from the pressurized space 50. The pressurized space 50 is sealed by the separation section 32, the semiconductor device 200, and the stage 10.

[0059] In step S14, the gas supply unit 40 supplies gas to the pressurized space 50, and the exhaust unit exhausts the gas from the pressurized space 50. In Embodiment 3, the gas supply unit 40 is controlled to enable gas supply based on the detection of contact between the protective member 30E of the second side wall 30C and the surface of the stage 10. The nozzle 40A of the gas supply unit 40 in Figure 9 blows gas onto the pressure-resistant holding area 202 of the semiconductor device 200 from an oblique direction. The gas blown from this oblique direction removes foreign matter adhering to the pressure-resistant holding area 202 of the semiconductor device 200. Furthermore, in Embodiment 3, since the gas nozzle 40A is positioned to coincide with the corner of the pressure-resistant holding area 202 of the semiconductor device 200, an efficient rotational flow of gas is generated. As a result, the effect of removing foreign matter is improved. In addition, as the gas from the pressurized space 50 is exhausted from the exhaust unit, the foreign matter that has detached from the pressure-resistant holding area 202 is discharged to the outside of the pressurized space 50.

[0060] Even in tests using the semiconductor testing apparatus 103 as described above, the pressurized space 50 is pressurized. Therefore, the possibility of partial discharge is effectively reduced. When gas is supplied to the pressurized space 50, the pressurized space 50 is sealed. Therefore, high-pressure gas is not blown onto the probe 20 in the probe space 60. Consequently, regardless of the type of probe 20, deformation caused by blowing is suppressed in the probe 20.

[0061] (Modified example of Embodiment 3) Figure 10 is a cross-sectional view showing the configuration of a semiconductor test apparatus 104 in a modified example of Embodiment 3. The semiconductor test apparatus 104 has a configuration in which the probe substrate 21 and the separation unit 30 of the semiconductor test apparatus 103 shown in Embodiment 3 are integrated. Specifically, the probe substrate 21 is joined to the upper end of the first side wall 30B of the separation unit 30.

[0062] During testing, the separation section 30 descends, and the first protective member 32D of the first side wall 30B comes into contact with the semiconductor device 200. The probe space 60 is sealed by the probe substrate 21, the first side wall 30B of the separation section 30, the first protective member 32D, and the upper surface of the semiconductor device 200.

[0063] Even with this configuration, the same effects as in Embodiment 3 can be obtained. Furthermore, the configuration in which the probe substrate 21 and the separation unit 30 are integrated is also applicable to the semiconductor test apparatus 101 of Embodiment 1 and the semiconductor test apparatus 102 of Embodiment 2.

[0064] This disclosure allows for the free combination of each embodiment, and enables the modification or omission of each embodiment as appropriate.

[0065] The various aspects of this disclosure are summarized below as an appendix.

[0066] (Note 1) A semiconductor testing apparatus for evaluating the electrical characteristics of semiconductor devices, The stage and, A probe that performs electrical input / output to the semiconductor device held on the stage, A separation unit capable of separating the space above the semiconductor device held on the stage into a pressurized space and a probe space including the probe, A semiconductor testing apparatus comprising a gas supply unit that supplies gas to the pressurized space to pressurize the pressurized space.

[0067] (Note 2) The semiconductor testing apparatus according to Appendix 1, further comprising an exhaust unit for exhausting the gas from the pressurized space, or a pressure adjustment unit for adjusting the pressure in the pressurized space.

[0068] (Note 3) The separation section has a ring shape in plan view, as described in Appendix 1 or Appendix 2 of the semiconductor testing apparatus.

[0069] (Note 4) The semiconductor testing apparatus according to any one of the appendices 1 to 3, wherein the gas supply unit further comprises a nozzle installed to blow the gas onto the upper surface of the semiconductor device from an oblique direction.

[0070] (Note 5) A method for manufacturing a semiconductor device, comprising evaluating the electrical characteristics of the semiconductor device using a semiconductor testing apparatus described in any of Appendix 1 to Appendix 4, wherein the semiconductor device is manufactured as described above. A step of holding the semiconductor device on the stage, The separation unit separates the space above the semiconductor device held on the stage into the pressurized space and the probe space. The process involves supplying gas to the pressurized space using the gas supply unit to pressurize the pressurized space, A method for manufacturing a semiconductor device, comprising the steps of: then performing electrical input / output to the semiconductor device held on the stage via the probe.

[0071] (Note 6) A method for manufacturing a semiconductor device according to Appendix 5, further comprising the steps of exhausting the gas from the pressurized space or adjusting the pressure of the pressurized space.

[0072] (Note 7) The method for manufacturing a semiconductor device according to Appendix 5 or Appendix 6, wherein the separation portion has a ring shape in a plan view.

[0073] (Note 8) A method for manufacturing a semiconductor device according to any one of Appendix 5 to 7, wherein in the step of supplying the gas, the gas is blown onto the upper surface of the semiconductor device from an oblique direction.

[0074] (Note 9) A method for manufacturing a semiconductor device according to any one of the appendices 5 to 8, wherein in the step of pressurizing the pressurized space, the pressurized space is sealed.

[0075] (Note 10) A method for manufacturing a semiconductor device according to any one of the appendices 5 to 9, wherein the probe space is sealed during the step of pressurizing the pressurized space.

[0076] (Note 11) A method for manufacturing a semiconductor device according to any one of the appendices 5 to 10, wherein, in the step of performing the electrical input / output to the semiconductor device, the pressure in the pressurized space is higher than the pressure in the probe space. [Explanation of symbols]

[0077] 10 Stage, 20 Probe, 21 Probe substrate, 30 Separation section, 30A Top plate, 30B First side wall, 30C Second side wall, 30D Protective member, 31 Separation section, 31A Top plate, 31B First side wall, 31C Second side wall, 31D Protective member, 32 Separation section, 32D First protective member, 32E Second protective member, 40 Gas supply section, 40A Outlet, 40B Gas flow path, 50 Pressurized space, 60 Probe space, 101-104 Semiconductor testing equipment, 200 Semiconductor device, 201 Element formation area, 202 Withstand pressure holding area.

Claims

1. A semiconductor testing apparatus for evaluating the electrical characteristics of semiconductor devices, The stage and, A probe that performs electrical input / output to the semiconductor device held on the stage, A separation unit capable of separating the space above the semiconductor device held on the stage into a pressurized space and a probe space including the probe, A semiconductor testing apparatus comprising a gas supply unit that supplies gas to the pressurized space to pressurize the pressurized space.

2. The semiconductor testing apparatus according to claim 1, further comprising an exhaust unit for exhausting the gas from the pressurized space, or a pressure adjustment unit for adjusting the pressure of the pressurized space.

3. The semiconductor testing apparatus according to claim 1, wherein the separation portion has a ring shape in a plan view.

4. The semiconductor testing apparatus according to claim 1, wherein the gas supply unit further comprises a nozzle installed to blow the gas onto the upper surface of the semiconductor device from an oblique direction.

5. A method for manufacturing a semiconductor device, comprising evaluating the electrical characteristics of a semiconductor device using the semiconductor testing apparatus described in claim 1, and manufacturing the semiconductor device, A step of holding the semiconductor device on the stage, The separation unit separates the space above the semiconductor device held on the stage into the pressurized space and the probe space. The process involves supplying gas to the pressurized space using the gas supply unit to pressurize the pressurized space, A method for manufacturing a semiconductor device, comprising the steps of subsequently performing electrical input / output to the semiconductor device held on the stage via the probe.

6. The method for manufacturing a semiconductor device according to claim 5, further comprising the steps of exhausting the gas from the pressurized space or adjusting the pressure in the pressurized space.

7. The method for manufacturing a semiconductor device according to claim 5, wherein the separation portion has a ring shape in a plan view.

8. The method for manufacturing a semiconductor device according to claim 5, wherein in the step of supplying the gas, the gas is blown onto the upper surface of the semiconductor device from an oblique direction.

9. The method for manufacturing a semiconductor device according to claim 5, wherein in the step of pressurizing the pressurized space, the pressurized space is sealed.

10. The method for manufacturing a semiconductor device according to claim 5, wherein in the step of pressurizing the pressurized space, the probe space is sealed.

11. The method for manufacturing a semiconductor device according to claim 5, wherein, in the step of performing the electrical input / output to the semiconductor device, the pressure in the pressurized space is higher than the pressure in the probe space.

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