Enhanced dynamic biasing technology for on-resistance-based current sensing in MOSFETs

Abstract

To provide power converter switching and an operation method thereof, where current monitoring provides proper operation over a range of switching frequencies.SOLUTION: A switching converter circuit comprises: an inductive circuit element; a driver switching circuit configured to provide energy to the inductive circuit element to generate an output voltage of the switching converter circuit, the output voltage having an alternating current (AC) signal component and a direct current (DC) signal component; a current sensing circuit configured to generate a current sense signal representative of inductor current of the inductive circuit element, wherein an output of the current sensing circuit is coupled to a bias circuit node; and a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This invention relates to a dynamic biasing technique for on-resistance-based current sensing of enhanced MOSFETs. [Background technology]

[0002] Electronic systems may include devices that require a regulated power supply. A power supply circuit can be used to provide a circuit power rail with a regulated voltage. Some power supply circuits are switching converter circuits. It is desirable to monitor the current of the power supply circuit. This can provide detection of overcurrent conditions or can be used to stabilize the output of the power supply circuit. Current monitoring must provide proper operation over a range of switching frequencies. [Overview of the project] [Means for solving the problem]

[0003] This document primarily concerns the switching of power converters and their operation methods. An embodiment of a switching converter circuit includes an inductive circuit element, a driver switching circuit configured to supply energy to the inductive circuit element to generate an output voltage having alternating current (AC) and direct current (DC) signal components, a current sensing circuit coupled to a bias circuit node and configured to generate a current sensing signal representing the inductor current of the inductive circuit element, and a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, the dynamic bias voltage including an AC component that tracks the AC signal component of the output voltage.

[0004] An embodiment of a method for operating a switching converter circuit includes: generating an output voltage of the switching converter circuit by charging and discharging an inductive circuit element using a driver and a MOSFET (DrMOS) switching circuit; monitoring the inductor current of the inductive circuit element using a current sensing circuit; and applying a dynamic bias voltage to the bias circuit node of the current sensing circuit, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.

[0005] An embodiment of the voltage converter circuit includes a charge pump circuit including a plurality of switching transistors connected in series; an inductive circuit element coupled to a first switching circuit node between a first low-side switching transistor and a second high-side switching transistor of the plurality of switching transistors; a driver circuit configured to control the activation of the plurality of switching transistors to generate an output voltage at the output terminal of the voltage converter circuit, wherein the output voltage has alternating current (AC) and direct current (DC) signal components; a current sensing circuit for generating a current sensing signal representing the inductor current of the inductive circuit element, wherein the current sensing circuit is coupled to a bias circuit node; and a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.

[0006] This section is intended to provide an overview of the subject matter of this patent application. It is not intended to provide an exclusive or exhaustive description of the invention. Further details are included to provide additional information regarding this patent application.

[0007] In the drawings, the figures are not necessarily drawn to scale, and similar numbers may describe the same components in different drawings. Similar numbers with different letter suffixes may represent different examples of the same components. The drawings are illustrative, not limiting, but illustrating the various embodiments discussed in this document.

Brief Description of Drawings

[0008] [Figure 1] It is a circuit diagram of an embodiment of a switching converter circuit. [Figure 2] The graph of the board diagram of the current sensing gain of the circuit of FIG. 1 is shown. [Figure 3] It is a schematic circuit diagram of a multiphase switching converter circuit. [Figure 4] The board diagrams of the current sensing gain and phase of the multiphase switching converter of FIG. 3 are shown. [Figure 5] It is a schematic circuit diagram of another embodiment of a switching converter circuit. [Figure 6] The graph of the board diagram of the current sensing gain of the circuit embodiment of FIG. 5 is shown. [Figure 7] It is a schematic circuit diagram of another embodiment of a switching converter circuit. [Figure 8] It is a schematic circuit diagram of yet another embodiment of a switching converter circuit. <00001​​​​​​​​​​​​​​​​​​​​[Modes for carrying out the invention]

[0009] Power supply circuits, as the electrical circuit power source for electronic systems, may need to provide a fixed or stable output voltage. Some power supply circuits are switching converter circuits that convert an input voltage into a regulated output voltage. Regulated voltage conversion can provide a regulated output voltage that is higher than the regulator's input voltage, lower than the input voltage, or inverted from the input voltage. Regulating is typically achieved by repeatedly charging an inductor from an energy source and then discharging the inductor's energy to drive a load. Charging and discharging can be performed using electronic switches, including transistors.

[0010] Monitoring inductor current can be useful. This monitoring can be used for closed-loop control, such as current-mode control in pulse-width modulation (PWM), and fault protection, such as overcurrent protection and load current limiting. If the switching converter circuit operates across a range of switching frequencies, current monitoring needs to be effective across that frequency range.

[0011] Inductor current signal sensing must be accurate, fast, and clean. Accurate current sensing means not only that the sensing must accurately reflect the DC current value, but also that the sensing current value must not be exaggerated or minimized as the frequency range changes. In a frequency-domain Bode plot, the current sensing gain should be a flat straight line with zero phase lead and lag from zero frequency to the switching frequency. From a closed-loop control perspective, distortion-free proportional gain does not create undesirable poles and zeros that can complicate feedback loop designs. From a fault protection perspective, distortion-free proportional current sensing also provides consistent DC current limiting and consistent dynamic current limiting.

[0012] High-speed current sensing means that the sensing current signal tracks the instantaneous current waveform in real time. For example, in peak current mode control, a control field-effect transistor (FET) is turned on by the system clock, and when the control FET is on, the inductor current rises linearly. When the current sensing signal rises to a specified peak current threshold, the control FET turns off and remains off until the next on time. If the sensing current signal does not immediately track the current waveform in real time, PWM control can be delayed and unstable.

[0013] Clean current sensing means that the sensed current signal is free of signal noise. Sensing a clean current waveform is crucial for stable PWM control, especially current-mode PWM control. In current-mode PWM, the control mechanism is sensitive to signal noise such as spikes and ringing. In peak current-mode control, spikes during the control FET on-time can cause the current comparator used in the control to trip prematurely terminate the on-time.

[0014] Compared to other forms of switching control, the sensed inductor current waveform provides more complete information to the control system of a switching-mode power converter, whereas current-mode PWM control typically uses only the sensed current waveform for one time interval of the complete switching cycle. For example, in the case of a peak current-mode control converter, pulse width modulation only requires the waveform during the control FET on time. However, the current waveform sensed during the on time of the synchronous FET is also important to the control system. If the sensed current signal during this period exceeds a threshold due to a dynamic or fault event in the load, the controller will not turn on the control FET for the next switching cycle. In the case of an average current-mode converter, the complete on and off times of the inductor current sensed signal are used for closed-loop stabilization. Furthermore, in the case of discontinuous conduction-mode operation in any control architecture, real-time inductor current sensing is required for detecting current zero crossings.

[0015] One approach to inductor current sensing is to determine the inductor current by placing a sensing resistor in series with the inductor and monitoring the voltage across the resistor. While this method of using a current-sensing resistor in series with the inductor is accurate, it induces undesirable power loss.

[0016] Another approach is DC resistance (DCR) current sensing, which estimates the inductor current using the equivalent winding resistance of the inductor. This approach does not add power loss to the system to sense the current. The drawback of DCR current sensing is the wide range of gain variation due to variations in the manufacturer's DCR value and also because the DCR value changes with temperature.

[0017] Another current sensing method uses the on-resistance of a power FET as an active sensing circuit element. This approach also does not add power loss to the system. The active sensing circuit measures the voltage drop across the on-resistance and divides it by the resistance to generate a current proportional to the current in the power device. In integrated circuit processes, this resistance can be fabricated to closely track the process variations and temperature coefficients of the power FET device, resulting in a consistent current sensing gain. However, due to the switching nature of power FET devices in switching-mode power converters, the sensing signal inevitably has spikes or dips around the switching edge, which adds noise to system control. Furthermore, the current in a power FET device exhibits a step-change nature during the device's off-to-on transition. Overcoming sensing delay is difficult because the bandwidth of the current sensing amplifier is finite. For high-frequency, low-duty-cycle switching converters, the on-time can be as short as tens of nanoseconds. The noise and delay of FET on-resistance-based current sensing limit its application in inductor current sensing in switching converter circuits.

[0018] Figure 1 is a schematic diagram of an embodiment of the switching converter circuit 100. The circuit has a buck converter topology and uses a driver and metal oxide semiconductor field-effect transistor (DRMOS) control. The DrMOS integrates a power device (e.g., a power FET) and a power device driver. The controller 102 controls the circuit load R 負荷 This controls the switching of the FET to generate a stabilized output voltage Vo. The current sensor within the DrMOS senses the current flowing through the power device when the power device is on and supplies and sinks a current signal proportional to the power device current. Since the sum of the power device currents is equal to the inductor current, the output current of the current sensor is equal to the inductor current (Kcs·i). L This is a current proportional to (V). This current is converted into a voltage signal Vsns using a current sensing circuit element Rcs. The current sensor uses an intermediate DC voltage (V) to provide headroom for the current sensor circuit. バイアス_DC The voltage signal Vsns is biased using ). The voltage signal Vsns represents the sensed current, and the controller 102 may use Vsns for current-mode PWM control, overcurrent protection, or load limiting.

[0019] A low-pass filter formed by capacitance C1 and resistor Rcs attenuates high-frequency noise from the current sensor circuit. A high-pass filter formed by resistor R1 and capacitance C2 injects high-frequency signals from the switching node SW into the sensed current signal. The gain of the current sensing circuit should have a flat frequency response to provide accurate current sensing, and ideally, it should remain constant from DC to infinity frequency.

[0020] Figure 2 shows the current sensing gain (Vsns(s) / i) of the circuit in Figure 1. LThe Bode plot graph of (s)) is shown. The Bode plot shows the frequency response 204 of the low-pass filtered current signal supplied from the DrMOS, the frequency response 206 of the high-pass filtered SW injection signal, and the combined frequency response 208 of the high-pass and low-pass filtering. The frequency response of the SW injection signal 206 is the resonant frequency of the power stage (ωo = 1 / (L·Cout) 1 / 2 The notch is indicated by ). The Bode plot shows that the composite frequency response is gain-flat only when the selected corner frequency fc of the low-pass filter is far above the resonant frequency of the power stage. The graph shows a flat composite frequency response when the corner frequency is an order of magnitude higher than the resonant frequency of the power stage (as shown in Graph 210), and as the corner frequency approaches the resonant frequency, the response becomes non-flat (as shown in Graphs 212 and 214).

[0021] Figure 3 is a schematic circuit diagram of an embodiment of the multiphase switching converter circuit 300. The circuit includes multiple power stages or phase stages that are activated and deactivated in response to changes in load. When using a multiphase switching converter, the challenge of implementing flat gain in current sensing becomes more difficult. Figure 4 shows the Bode plot of current sensing gain and phase for the multiphase switching converter of Figure 3. The plot shows that the current sensing gain depends on the number of active phases.

[0022] As previously described in this specification, shifting the corner frequency much higher than the power stage resonant frequency can provide a flat current sensing frequency response. However, in practice, due to the very high noise from the current sensor, the corner frequency generally must be close to or lower than the power stage resonant frequency. For this reason, implementing current sensing with a flat gain frequency response is difficult in practice.

[0023] FIG. 5 is a schematic circuit diagram of a switching converter circuit 500 having a frequency response improved over that of the embodiment of FIG. 1. The switching converter circuit includes, among other things, an inductive circuit element 504, which can be a discrete inductor or an inductive device fabricated on an integrated circuit (IC). The switching converter circuit also includes a DrMOS switching circuit 506 having upper and lower power devices (e.g., power FETs). The DrMOS control charges and discharges the inductive circuit element 504 to generate an output voltage Vo to the circuit load R 負荷 The output voltage Vo is connected to the V OSNS pin of the controller 502. The V OSNS signal is 、 supplied to the inverting input of a voltage stabilization loop error amplifier 508 that compares the sensed output voltage to a voltage reference Vref connected to the non-inverting input. The output of the error amplifier can be supplied to a voltage stabilization circuit loop that adjusts the switching of the DrMOS to stabilize the output. The amplified error is supplied to a pulse modulation (PWM) circuit and other circuits within the controller 502. During soft start, the reference voltage rises smoothly to its final DC value, and the closed-loop feedback control adjusts the switching of the DrMOS to cause the output voltage Vo to track the reference voltage.

[0024] The switching converter circuit also includes a current sensing circuit for sensing the inductor current. The DrMOS supplies a current proportional to the inductor current (K CS ·i L ), and the supplied current is applied to a current sensing circuit element R CS to generate a voltage V L proportional to the supplied current and thus proportional to the inductor current i SNS . Since the current sensed by the DrMOS is based on the on-resistance of the power FET, the supplied current (K CS ·i L ) is a noisy signal and can have noise spikes, noise dips, and signal delays. The sensed voltage V SNS is filtered and provided to the controller 502. R CSCapacitor C1 connected in parallel with the sensing voltage V SNS This attenuates the noise. The R1~C2 path is V SNS V supplies high-frequency components so that it perfectly represents the inductor current. SNS It can be used for overcurrent protection, load limiting, or current-mode pulse switch modulation (PWM) in DrMOS control.

[0025] Since the current source of a DrMOS has one or more active devices, the current sensing circuit element R CS The bias circuit node provides headroom to the active device by using a lower supply voltage (e.g., ground) above a higher supply voltage (e.g., V). CC It is biased to an intermediate common-mode voltage below ). However, the bias is not a DC bias relative to common mode. Instead, the switching converter circuit includes a dynamic bias circuit that applies a dynamic bias voltage to the bias circuit node. The dynamic bias voltage is time-varying.

number

[0026] The output voltage Vo also contains a DC signal component equal to the reference voltage Vref. This DC signal component is removed by a dynamic bias circuit. In the embodiment shown in Figure 5, the dynamic bias circuit includes a differential amplifier 510. The reference voltage Vref is applied to the inverting terminal of the amplifier 510, and the sensed output voltage V OSNS DC bias (V バイアス_DC It is supplied to the non-inverting input along with ). This removes Vref from Vo while retaining the AC component and adding a new DC bias V bias_DC. The dynamic bias voltage output by the differential amplifier is,

number

[0027] The output of the differential amplifier 510 is connected to a signal limiter (e.g., a clamp circuit) to limit the amplitude of the dynamic bias voltage. Limiter 512 is

number

[0028] The switching converter circuit 500 also includes a low-pass filter R CS The high-pass filter includes a high-pass filter coupled to C1 and a switching circuit node (SW) connected to the inductive circuit element 504. The high-pass filter includes a resistor R1 and a capacitor C2 connected in series. The high-pass filter is connected to the current-sensing input of the controller and the current-sensing resistor R CS The current injected into it is filtered.

[0029] Figure 6 shows the current sensing (Vsns(s) / i) for the circuit embodiment shown in Figure 5. L The graph of the Bode plot of the gain of (s)) is shown. The Bode plot shows the frequency response of the low-pass filtered current signal 604, the frequency response of the high-pass filtered SW injection signal 606, and the combined frequency response of the high-pass and low-pass filtering 608. Compared with the Bode plot of Figure 2, the frequency response of the high-pass filtered SW injection signal 606 does not contain a notch. As a result, the combined frequency response of the gain 608 is flat across the entire frequency range.

[0030]

number

[0031] There are clear physical reasons why dynamic biasing techniques overcome the limitations of systems with DC bias. Above the crossover frequency fc, the current signal from the DrMOS is strongly attenuated, so the current sensing signal relies on the signal from the SW node injection. The voltage across the inductor is the voltage at the SW circuit node minus the output voltage Vo. The dynamic properties of both signals determine the inductor current. To reflect the dynamic behavior of the inductor current, the signal from the SW node injection is coupled to the same dynamic signal. With a DC bias voltage as in the exemplary circuit in Figure 1, the lower end of the injection branch is connected to the DC bias voltage, and as a result, the dynamic properties of Vo are lost.

[0032] Figure 7 is a schematic circuit diagram of another embodiment of the switching converter circuit 700. In this embodiment, the sensing output voltage V for stabilization and biasing is FB This is similar to the embodiment in Figure 5, except that it is a divided version of the output voltage Vo. The dynamic bias voltage output by the differential amplifier is

number

number

[0033] Figure 8 is a schematic circuit diagram of another embodiment of the switching converter circuit. In this embodiment, the injection signal is located inside the controller. This eliminates the connection to the SW circuit node and allows the capacitors C1, C2 and resistor R1 to be located inside the controller.

number

number

[0034] Figure 9 is a schematic circuit diagram of another embodiment of the switching converter circuit. The switching converter circuit is a buck converter circuit. Although the controller is not shown in the embodiment, the controller senses the voltage V at inputs SNS+ and SNS-. SNS It receives the voltage source V. The dynamic bias circuit uses a voltage source V. バイアス_Dyn This is shown. In the embodiment of Figure 9, only the current of the lower power FET is sensed.

[0035] In high-frequency switching, low-duty-cycle buck converters, the on-time of the upper switch is short. Due to reverse recovery and other switching noise, providing an accurate current signal during the on-time of the upper FET is difficult. This is true even for average measurements, as an overestimated or underestimated current sensing signal can distort the average current reading. Furthermore, the current sensing of the upper switch is a flying circuit, making its implementation in hardware far more complex.

[0036] To represent the average inductor current, it is feasible to sense only the average current of the lower FET. The average current of the lower FET can be obtained by averaging the signal during the lower FET on-time or by sampling at the midpoint of the lower FET on-time.

[0037] The current sensing circuit samples the current from the lower FET and uses the sampled current sensing signal (K CS ·i SAM The system includes a sample-and-hold circuit 914 that generates a current signal. The sampled current signal is applied to a current-sensing circuit element, and the sample-and-hold circuit tracks the low-frequency signal. A low-pass filter circuit filters the sampled current-sensing signal. Current injection from the SW circuit node provides the high-frequency signal component, as before.

[0038] Figure 10 illustrates an embodiment in which the current (Ibot) of the lower FET is sampled. The figure shows that the current is sampled midway through the on-time of the lower FET. The sampling effect limits the usable bandwidth of this averaged signal to well below 1 / 10 of the switching frequency, but the proposed technique allows for the creation of a real-time current-sensing signal through effective high-frequency injection.

[0039] Figure 11 shows the Bode plot 1110 of the gain and Bode plot 1120 of the phase for the current sensing circuit embodiment of Figure 9. The phase Bode plot 1120 shows that the sampled and filtered average current signal exhibits a significant delay due to the sampling effect. The gain Bode plot 1110 shows the low-frequency signal (I) of the sampled lower FET current. BOT (s) / i L The frequency response of (s) is shown in 1122. The sampled lower FET current is combined with a high-pass filtered SW injection signal and dynamic bias to form a current sensing signal (Vsns(s) / i L(s)) is reconstructed. Graph 1108 shows the gain of the current sense signal reconstructed with a dynamic bias voltage, and Graph 1106 shows the gain of the current sense signal reconstructed with a constant bias voltage. Bode plot 1110 shows that the gain of the frequency response of the current sense with a dynamic bias voltage is flat across the entire frequency range.

[0040] Figure 12 is a schematic circuit diagram of the hybrid switched-capacitor PWM step-down voltage regulator 1200. The hybrid switched-capacitor PWM regulator has higher power conversion efficiency than the switching converter circuits of the embodiments described herein, especially in high-voltage, high-frequency applications. The hybrid switched-capacitor PWM regulator includes a charge pump circuit stage and a power stage. The charge pump circuit consists of four switching transistors (Q1, Q2, Q3, Q4) connected in series, and a midpoint capacitor C MID、 and flying capacitor C FLY It includes three switching circuit nodes (SW1, SW2, SW3) between the switching transistors. The power stage is SW3 and C FLY Includes the connected inductor L.

[0041] The driver circuit 1202 controls the activation of the switching transistor, and load R 負荷 Output voltage V is output to the connected output terminal. O The driver circuit 1202 may use voltage stabilization to adjust the switching duty cycle of the switching transistors to generate a stabilized output voltage. The driver circuit activates the switching transistors in conjunction with one of the high-side transistors activated by one of the low-side transistors. During the active stage, devices Q1 and Q3 are on, and during the freewheeling stage, devices Q2 and Q4 are on.

[0042] Figure 13 is a graph showing the drain-source current (Ids) waveforms of the switching transistors during the active stage and the freewheeling stage. During the active stage, the inductor current (i L ) is the sum of the Q1 current and the Q3 current, or

number

[0043] The current distribution may not be equal, and that is C FLY and C MID Please note that this depends on the design. Therefore, it is not possible to infer the inductor current signal by sensing only the Q1 current or Q3 current. During the freewheeling stage, the inductor current is the Q4 current minus the Q2 current, or

number

[0044] Figure 14 shows the inductor current (i L ), Q2 current (i Q2 ), Q4 current (i Q4 ), and Q4-Q2 current (i Q4 -i Q2 The waveform is shown. During the freewheeling period when Q2 and Q4 are on, the waveform shows that the inductor current is equal to the Q4 current minus the Q2 current.

[0045] In some special cases, when the Q2 current is small and negligible, the Q4 current is equal to the inductor current. These special cases include, but are not limited to, i) the flying capacitor and mid-capacitor are sufficiently large, resulting in a small Q2 current; ii) the on-resistance of the FET is small, resulting in the Q2 current decaying to a negligible value by the midpoint of the on-times of Q2 and Q4; and iii) a topological improvement that reduces Q2 to a small value.

[0046] A hybrid switched-capacitor converter has multiple floating power MOSFETs. Compared to a simple buck converter, transferring and summing the sensing current signals of multiple floating MOSFETs is more complex. This is especially true for Q1 and Q3, as these switching transistors are "flying" switches. Transistor Q2 is C MID Stable voltage V MID Since it is located above and Q4 refers to ground, current sensing of Q2 and Q4 (or Q4 alone in special cases) is simpler.

[0047] As shown in the embodiment of Figure 9, by using a current sensing circuit having a sample-and-hold circuit and a dynamic bias circuit, the average total current of Q1 and Q3 in the active stage, or preferably the average total current of Q2 and Q4 in the freewheeling stage, can be sensed, and the sampled signal can be used as a low-frequency inductor current signal. Above the crossover frequency, the high-frequency injection signal takes over the current sensing signal. The inductor current is reconstructed using the sampled low-frequency current signal and the high-frequency injection current signal.

[0048] Figure 15 is a flowchart of an embodiment of method 1500 for operating a switching converter circuit, such as one of the switching converter circuits described herein. In block 1505, an inductive circuit element is charged and discharged using a driver circuit to generate the output voltage of the switching converter circuit. The driver circuit may be a DrMOS switching circuit.

[0049] In 1510, the inductor current is monitored using a current sensing circuit. The sensed current may be supplied by a driver circuit. In some embodiments, the driver circuit supplies a current signal that is low-pass filtered by the current sensing circuit, and the current signal from the switching node is high-pass filtered and summed with the low-pass filtered signal by injection into the circuit elements of the current sensing circuit. In some embodiments, the current signal provided by the driver circuit is sampled, and the inductor current is estimated by reconstructing the inductor current using the sampled low-pass filtered and high-pass filtered current signals.

[0050] In 1515, a dynamic bias voltage is applied to the bias circuit node of the current sensing circuit. The dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage. A DC bias component is added to the AC component to provide headroom for the device supplying current for monitoring.

[0051] Several embodiments of the systems, devices, and methods described can be used to monitor inductor current for switching-mode power converters and hybrid switched-capacitor converters. Current sensing is accurate, provided in real time, and robust against signal noise.

[0052] Additional explanations and aspects A first embodiment (embodiment 1) comprises an inductive circuit element, a driver switching circuit configured to provide energy to the inductive circuit element to generate an output voltage having alternating current (AC) and direct current (DC) signal components, a current sensing circuit coupled to a bias circuit node and configured to generate a current sensing signal representing the inductor current of the inductive circuit element, and a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, the dynamic bias voltage including a subject (such as a switching converter circuit) that includes an AC component for tracking the AC signal component of the output voltage.

[0053] In Embodiment 2, the subject matter of Embodiment 1 optionally includes a dynamic bias circuit configured to separate the DC signal component of the output voltage from the AC signal component of the output voltage, and to add a DC bias component to the AC signal component to generate a dynamic bias voltage.

[0054] In Embodiment 3, the subject of Embodiment 2 optionally includes an error amplifier configured to compare a sensed output voltage with a reference voltage, and a dynamic bias circuit including a differential amplifier configured to subtract the reference voltage from the output voltage, add a DC bias component, and retain an AC signal component to generate a dynamic bias voltage.

[0055] In Embodiment 4, the subject of one or any combination of Embodiments 1 to 3 optionally includes a clamp circuit configured to limit the amplitude of a dynamic bias circuit.

[0056] In Embodiment 5, the subject matter of one or any combination of Embodiments 1 to 4 optionally includes a current sensing circuit element included in a current sensing circuit and configured to generate a sensing voltage representing an inductor current; a low-pass filter circuit configured to filter the sensing voltage; and a high-pass filter circuit operably coupled to a switching circuit node operably coupled to the low-pass filter circuit and the inductive circuit element.

[0057] In Embodiment 6, the subject matter of one or any combination of Embodiments 1 to 4 optionally includes a current sensing circuit element included in a current sensing circuit and configured to generate a sensing voltage signal representing an inductor current; a low-pass filter circuit configured to filter the sensing voltage signal; a voltage stabilization circuit loop configured to monitor the output voltage and generate a duty cycle signal to activate a switching circuit element of a driver switching circuit to provide a stabilized output voltage; and a high-pass filter circuit configured to apply a high-pass filtered duty cycle signal to the current sensing element.

[0058] In Embodiment 7, the subject of one or any combination of Embodiments 1 to 4 optionally includes a low-pass filter circuit, a high-pass filter circuit operably coupled to a switching circuit node operably coupled to the low-pass filter circuit and inductive circuit elements, and a current sensing circuit including a sample-and-hold circuit configured to generate a sampled current sensing signal of the current in the switching circuit elements of the driver switching circuit, wherein the low-pass filter circuit is configured to filter the sampled current sensing signal.

[0059] Embodiment 8 includes a subject (such as a method for operating a switching converter circuit) or can optionally be combined with one or any combination of Embodiments 1 to 7 to include such a subject, and includes charging and discharging an inductive circuit element using a driver and a MOSFET (DrMOS) switching circuit to generate an output voltage of a switching converter circuit; monitoring the inductor current of the inductive circuit element using a current sensing circuit; and applying a dynamic bias voltage to the bias circuit node of the current sensing circuit, wherein the dynamic bias voltage includes an alternating current (AC) component that tracks the AC signal component of the output voltage.

[0060] In embodiment 9, the subject matter of embodiment 8 optionally includes removing the DC signal component of the output voltage to generate the AC component of the dynamic bias voltage, and adding the DC bias component to the AC component of the dynamic bias voltage.

[0061] In embodiment 10, the subject matter of embodiment 9 optionally includes stabilizing the output voltage by comparing the output voltage to a voltage reference using an error amplifier and subtracting the reference voltage from the output voltage.

[0062] In embodiment 11, the subject of one or any combination of Examples 8 to 10 optionally includes limiting the amplitude of the dynamic bias voltage using a clamp circuit.

[0063] In Embodiment 12, the subject of one or any combination of Examples 8 to 11 optionally includes sensing an inductor current by sensing the voltage of a current sensing circuit element and filtering the sensed voltage using a low-pass filter circuit, and applying a current to the current sensing circuit element from a switching circuit node connected to the inductive circuit element and filtering the current using a high-pass filter circuit.

[0064] In embodiment 13, the subject of one or any combination of embodiments 8 to 12 optionally includes activating the switching circuit elements of a DrMOS switching circuit according to a duty cycle signal to generate an output voltage, sensing an inductor current by sensing the voltage of a current sensing circuit element and filtering the sensed voltage using a low-pass filter circuit, and applying a duty cycle signal to the current sensing element and filtering the duty cycle signal using a high-pass filter circuit.

[0065] In embodiment 14, the subject of one or any combination of embodiments 8 to 14 optionally includes sensing an inductor current by sampling the current of a switching circuit element of a DrMOS switching circuit connected to an inductive circuit element, generating a sampled signal, and filtering the sampled signal using a low-pass filter circuit, and applying a current from a switching circuit node connected to an inductive circuit element to a current sensing element, and filtering the current using a high-pass filter circuit.

[0066] Embodiment 15 includes a charge pump circuit including a plurality of switching transistors connected in series, which may include a subject (such as a voltage converter circuit) or may optionally be combined with one or any combination of Embodiments 1 to 14 to include such a subject; an inductive circuit element coupled to a first switching circuit node between a first low-side switching transistor and a second high-side switching transistor of the plurality of switching transistors; a driver circuit configured to control the activation of the plurality of switching transistors to generate an output voltage at the output terminal of the voltage converter circuit, wherein the output voltage has alternating current (AC) and direct current (DC) signal components; a current sensing circuit for generating a current sensing signal representing the inductor current of the inductive circuit element, wherein the current sensing circuit is coupled to a bias circuit node; and a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.

[0067] In Embodiment 16, the subject matter of Embodiment 15 optionally includes a sample-and-hold circuit coupled to a low-side switching transistor, and a current sensing circuit configured to generate a sampled current sensing signal of the current in the low-side switching transistor.

[0068] In embodiment 17, the subject of embodiment 16 optionally includes a low-pass filter circuit configured to filter a sampled current-sensing signal, and a high-pass filter circuit operably coupled to the low-pass filter circuit and a switching circuit node.

[0069] In embodiment 18, the subject of one or any combination of embodiments 15 to 17 optionally includes a dynamic bias circuit configured to remove the DC signal component from the feedback output voltage and add a DC bias component to the AC signal component of the feedback output voltage to generate a dynamic bias voltage.

[0070] In embodiment 19, the subject of one or any combination of embodiments 15 to 18 optionally includes a clamp circuit configured to limit the amplitude of a dynamic bias circuit.

[0071] In embodiment 20, the subject of one or any combination of embodiments 15 and embodiments 18-19 optionally includes a current sensing circuit element included in a current sensing circuit and configured to generate a sensing voltage signal representing an inductor current; a low-pass filter circuit configured to filter the sensing voltage signal; and a high-pass filter circuit operably coupled to a switching circuit node operably coupled to the low-pass filter circuit and the inductive circuit element.

[0072] These various embodiments can be combined in any permutation or combination. The above detailed description includes references to accompanying drawings, which form part of the detailed description. The drawings illustrate specific embodiments by which the present invention can be carried out. These embodiments are also referred to herein as “Examples.” All publications, patents, and patent documents referenced herein are incorporated herein by reference in whole as they would be incorporated individually by reference. Where there is an inconsistent use between this document and the documents incorporated by reference, the use in the incorporated reference should be considered supplementary to the use in this document, and the use in this document shall prevail in the case of any inconsistent inconsistency.

[0073] In this document, the terms “a” or “an” are used to include one or more than one, regardless of other examples or uses of “at least one” or “one or more,” as is common in patent literature. In this document, the term “or” is used to refer to non-exclusive “or,” such that “A or B” includes “A but not B,” “B but not A,” and “A and B.” In the appended claims, the terms “including” and “in which” are used as plain English equivalents of the terms “comprising” and “wherein.” Furthermore, in the following claims, the terms “including” and “comprising” are unrestrictive; that is, any system, device, article, or process containing elements in addition to those enumerated after such terms in a claim is still considered to be within the scope of that claim. Furthermore, in the following claims, terms such as “first,” “second,” and “third” are used merely as labels and are not intended to impose numerical requirements on the subject matter. Embodiments of the methods described herein can be implemented at least partially in a machine or computer.

[0074] The above description is illustrative and not limiting. For example, the above embodiments (or one or more embodiments thereof) can be used in combination with each other. Those skilled in the art can use other embodiments by considering the above description. The abstract is provided in accordance with 37 C. FR § 1.72(b) to enable the reader to quickly confirm the nature of the technical disclosure. The abstract is submitted with the understanding that it is not to be used to interpret or limit the claims or their meaning. Also, in the forms for carrying out the above invention, various features can be grouped together to simplify the disclosure. This should not be interpreted as meaning that any disclosed feature not claimed is essential to any claim. Rather, the subject matter of the invention may not be present in all features of a particular disclosed embodiment. Therefore, the following claims are incorporated into the forms for carrying out the invention, and each claim stands on its own as a separate embodiment. The scope of the present invention should be determined by referring to the appended claims, together with the entire scope of equivalents to which such claims are granted. [Explanation of symbols]

[0075] 100 Switching Converter Circuits 102 Controllers 204 Frequency Response 206 SW injection signal 206 Frequency Response 208 Combined frequency response 300 Multiphase Switching Converter Circuit 500 Switching Converter Circuit 502 Controller 504 Inductive Circuit Elements 506 DrMOS switching circuit 508 Voltage-stabilized loop error amplifier 510 Differential Amplifier 512 Limiter 604 Frequency Response 606 Frequency Response 608 Combined frequency response 700 Switching Converter Circuit 914 Sample-and-Hold Circuit 1106 Graph 1108 Graph 1110 Gain Bode Plot 1120 Phase Bode plot 1122 Frequency Response 1200 Hybrid Switched Capacitor PWM Step-Down Voltage Regulator 1202 Driver Circuit 1500 ways

Claims

1. A switching converter circuit, Inductive circuit elements, A driver switching circuit configured to supply energy to the inductive circuit element to generate the output voltage of the switching converter circuit, wherein the output voltage has an alternating current (AC) signal component and a direct current (DC) signal component, A current sensing circuit configured to generate a sensing voltage proportional to the inductor current of the aforementioned inductive circuit element, wherein the sensing voltage is output to a bias circuit node, A switching converter circuit comprising: a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.

2. The switching converter circuit according to claim 1, wherein the dynamic bias circuit is configured to separate the DC signal component of the output voltage from the output voltage obtained by adding a DC bias component to the AC signal component of the output voltage, and generate the dynamic bias voltage.

3. Includes an error amplifier configured to compare the sensed output voltage with a reference voltage, The switching converter circuit according to claim 2, wherein the dynamic bias circuit includes a differential amplifier configured to generate the dynamic bias voltage by subtracting the reference voltage from the output voltage obtained by adding the DC bias component to the AC signal component of the output voltage.

4. The switching converter circuit according to claim 1, further comprising a clamp circuit configured to limit the amplitude of the output of the dynamic bias circuit.

5. A current sensing circuit element included in the current sensing circuit and configured to generate a sensing voltage representing the inductor current, A low-pass filter circuit configured to filter the aforementioned sensed voltage, The switching converter circuit according to claim 1, comprising the low-pass filter circuit and a high-pass filter circuit coupled to a switching circuit node between the driver switching circuit and the inductive circuit element.

6. A current sensing circuit element included in the current sensing circuit and configured to generate a sensing voltage signal representing the inductor current, A low-pass filter circuit configured to filter the aforementioned sensing voltage signal, A voltage stabilization circuit loop configured to monitor the output voltage, generate a duty cycle signal, activate the switching circuit elements of the driver switching circuit, and provide a stabilized output voltage, The switching converter circuit according to claim 1, comprising a high-pass filter circuit configured to apply a high-pass filtered duty cycle signal to the current sensing circuit element.

7. A low-pass filter circuit, The low-pass filter circuit and the high-pass filter circuit coupled to the switching circuit node between the driver switching circuit and the inductive circuit element are included. The switching converter circuit according to claim 1, wherein the current sensing circuit includes a sample-and-hold circuit configured to generate a sampled current sensing signal of the current in the switching circuit elements of the driver switching circuit, and the low-pass filter circuit is configured to filter the sampled current sensing signal.

8. A method for operating a switching converter circuit, The driver and MOSFET switching circuit (DrMOS switching circuit) are used to charge and discharge inductive circuit elements to generate the output voltage of the switching converter circuit, The inductor current of the inductive circuit element is monitored using a current sensing circuit, A method comprising: applying a dynamic bias voltage, which includes an AC component for tracking the alternating current (AC) signal component of the output voltage, to a bias circuit node that outputs a sensing voltage proportional to the inductor current of the current sensing circuit.

9. Applying the aforementioned dynamic bias voltage The method according to claim 8, comprising removing the DC signal component from the output voltage obtained by adding a DC bias component to the AC signal component of the output voltage.

10. This includes stabilizing the output voltage by comparing it with a reference voltage using an error amplifier, The method according to claim 9, wherein removing the DC signal component of the output voltage includes subtracting the reference voltage from the output voltage.

11. The method according to claim 8, comprising using a clamp circuit to limit the amplitude of the dynamic bias voltage.

12. The inductor current is detected by sensing the voltage of the current sensing circuit element, and the detected voltage of the current sensing circuit element is filtered using a low-pass filter circuit. The method according to claim 8, comprising applying a current to the current sensing circuit element from a switching circuit node between the DrMOS switching circuit and the inductive circuit element, and filtering the current using a high-pass filter circuit.

13. The switching circuit elements of the DrMOS switching circuit are activated according to the duty cycle signal to generate the output voltage, The inductor current is detected by sensing the voltage of the current sensing circuit element, and the detected voltage of the current sensing circuit element is filtered using a low-pass filter circuit. The method according to claim 8, further comprising applying the result of filtering the duty cycle signal using a high-pass filter circuit to the output of the current sensing circuit element.

14. The inductor current is sensed by sampling the current of the switching circuit element of the DrMOS switching circuit connected to the inductive circuit element, a sampled signal is generated, and the sampled signal is filtered using a low-pass filter circuit. The method according to claim 8, comprising applying a current to a current sensing circuit element from a switching circuit node between the DrMOS switching circuit and the inductive circuit element, and filtering the current using a high-pass filter circuit.

15. A voltage converter circuit, A charge pump circuit including multiple switching transistors connected in series, An inductive circuit element coupled to a switching circuit node between the low-side switching transistor and the high-side switching transistor of the plurality of switching transistors, A driver circuit configured to generate an output voltage at the output terminal of the voltage converter circuit by controlling the activation of the plurality of switching transistors, wherein the output voltage has an alternating current (AC) signal component and a direct current (DC) signal component. A current sensing circuit for generating a sensing voltage proportional to the inductor current of the aforementioned inductive circuit element, wherein the sensing voltage is output to a bias circuit node, A voltage converter circuit comprising: a dynamic bias circuit configured to apply a dynamic bias voltage to the bias circuit node, wherein the dynamic bias voltage includes an AC component that tracks the AC signal component of the output voltage.

16. The voltage converter circuit according to claim 15, wherein the current sensing circuit includes a sample-and-hold circuit coupled to the low-side switching transistor and is configured to generate a sampled current sensing signal of the current in the low-side switching transistor.

17. A low-pass filter circuit configured to filter the sampled current sensing signal, The voltage converter circuit according to claim 16, comprising the low-pass filter circuit and a high-pass filter circuit coupled to the switching circuit node.

18. The voltage converter circuit according to claim 15, wherein the dynamic bias circuit is configured to generate the dynamic bias voltage by removing the DC signal component from the AC signal component of the feedback output voltage plus the DC bias component.

19. The voltage converter circuit according to claim 15, further comprising a clamp circuit configured to limit the amplitude of the output of the dynamic bias circuit.

20. A current sensing circuit element included in the current sensing circuit and configured to generate a sensing voltage signal representing the inductor current, A low-pass filter circuit configured to filter the aforementioned sensing voltage signal, The voltage converter circuit according to claim 15, comprising the low-pass filter circuit and a high-pass filter circuit coupled to the switching circuit node.

Images